- 17 6月, 2013 6 次提交
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由 Linus Walleij 提交于
This adds the COH 901 318 DMA controller to the U300 device tree. All devices now converted to device tree so far will start to find their DMA channels. Note that the U300 is not yet using the device tree to obtain DMA channels, but this is a first step. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds DMA channel assignments to the MMC/SD-controller and the two UARTs already in the U300 device tree, as we have now defined a way to obtain DMA channels from the device tree. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds support for the U300 MMC/SD card slot from the device tree boot. No other changes needed. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Now that we have enabled board power and the AB3100 regulators, put the regulator data into the device tree and enable it so we can start to tie regulators to devices. To begin with we're only supplying the power to the board itself. Cc: Mark Brown <broonie@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds support for setting up the board power from the device tree on the U300. We use a board-specific node in the device tree for the S365 board and bind a regulator for the board power to this node. Cc: Mark Brown <broonie@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds the COH 901 331 RTC to the U300 device tree. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 31 5月, 2013 5 次提交
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由 Linus Walleij 提交于
This adds the COH 901 327 watchdog to the U300 device tree. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds the two I2C busses to the device tree so these probe properly. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This register the most basic peripherals and makes the U300 boot to prompt from a device tree. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds device tree support for the U300 timer, by making the memory base offset and IRQ dynamically assigned, then optionally looking them up from the device tree. Since the timer needs to be registered before any platform devices are created, we will go into the device tree and look up the "/timer@c0014000" node and read our base address and IRQ from there. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
The U300 can support timer-based delays, so implement this. Skips past jiffy calibration. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 5月, 2013 21 次提交
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由 Bjorn Helgaas 提交于
We now cache the MSI-X capability offset in the struct pci_dev, so no need to find the capability again. Acked-by: NJan Beulich <jbeulich@suse.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Bjorn Helgaas 提交于
PCI_MSIX_FLAGS_BIRMASK is mis-named because the BIR mask is in the Table Offset register, not the flags ("Message Control" per spec) register. Acked-by: NJan Beulich <jbeulich@suse.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Vineet Gupta 提交于
This tracks Alexandre Courbot's mainline GPIO rework Signed-off-by: NVineet Gupta <vgupta@synopsys.com> Acked-by: NAlexandre Courbot <acourbot@nvidia.com>
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由 Doug Anderson 提交于
The 'samsung,vbus-gpio' was submitted before pinmux landed for exynos5250 and uses the old-style gpio specifier. Fix the two exynos5250 boards that use it. Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Inderpal Singh 提交于
The kernel crashes while resuming from AFTR idle mode. It happens because L2 cache was not going into retention state. This patch configures the USE_RETENTION bit of ARM_L2_OPTION register so that it does not depend on MANUAL_L2RSTDISABLE_CONTROL of ARM_COMMON_OPTION register for L2RSTDISABLE signal. Signed-off-by: NInderpal Singh <inderpal.singh@linaro.org> Tested-by: NChander Kashyap <chander.kashyap@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Lee Jones 提交于
arch/arm/mach-ux500/board-mop500.c: In function ‘mop500_prox_activate’: arch/arm/mach-ux500/board-mop500.c:406:18: warning: ignoring return value of ‘regulator_enable’, declared with attribute warn_unused_result [-Wunused-result] Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Fabio Baltieri 提交于
Fix db8500_read_soc_id() to read all five soc_id number locations instead of repeating the second one two times. Signed-off-by: NFabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Olof Johansson 提交于
Trivial patch, adding the i2c Cypress trackpad used on Snow. Signed-off-by: NOlof Johansson <olof@lixom.net> Reviewed-by: NDoug Anderson <dianders@chromium.org> Acked-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Fabio Estevam 提交于
Since commit 657eee7d (media: coda: use genalloc API) the following build error happens with imx_v4_v5_defconfig: drivers/built-in.o: In function 'coda_remove': clk-composite.c:(.text+0x112180): undefined reference to 'gen_pool_free' drivers/built-in.o: In function 'coda_probe': clk-composite.c:(.text+0x112310): undefined reference to 'of_get_named_gen_pool' clk-composite.c:(.text+0x1123f4): undefined reference to 'gen_pool_alloc' clk-composite.c:(.text+0x11240c): undefined reference to 'gen_pool_virt_to_phys' clk-composite.c:(.text+0x112458): undefined reference to 'dev_get_gen_pool' Select GENERIC_ALLOCATOR and get rid of the custom IRAM_ALLOC. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Shawn Guo 提交于
Commit bca7a5a0 (ARM: cpu hotplug: remove majority of cache flushing from platforms) removes include of <asm/cacheflush.h> and hence discovers a few indirect inclusion and declaration problems as below. CC arch/arm/mach-imx/hotplug.o In file included from arch/arm/mach-imx/hotplug.c:16:0: arch/arm/mach-imx/common.h:100:29: warning: ‘struct pt_regs’ declared inside parameter list [enabled by default] arch/arm/mach-imx/common.h:100:29: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] arch/arm/mach-imx/common.h:101:29: warning: ‘struct pt_regs’ declared inside parameter list [enabled by default] arch/arm/mach-imx/hotplug.c: In function ‘imx_cpu_die’: arch/arm/mach-imx/hotplug.c:53:2: error: implicit declaration of function ‘cpu_do_idle’ [-Werror=implicit-function-declaration] arch/arm/mach-imx/hotplug.c: In function ‘imx_cpu_kill’: arch/arm/mach-imx/hotplug.c:58:26: error: ‘jiffies’ undeclared (first use in this function) arch/arm/mach-imx/hotplug.c:58:26: note: each undeclared identifier is reported only once for each function it appears in arch/arm/mach-imx/hotplug.c:58:2: error: implicit declaration of function ‘msecs_to_jiffies’ [-Werror=implicit-function-declaration] arch/arm/mach-imx/hotplug.c:61:3: error: implicit declaration of function ‘time_after’ [-Werror=implicit-function-declaration] Fix them by adding the needed inclusion and declaration. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Denis Efremov 提交于
EXPORT_SYMBOL and inline directives are contradictory to each other. The patch fixes this inconsistency. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: NDenis Efremov <yefremov.denis@gmail.com> Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Geert Uytterhoeven 提交于
arch/xtensa/platforms/iss/simdisk.c: In function 'proc_read_simdisk': arch/xtensa/platforms/iss/simdisk.c:220:12: warning: initialization discards 'const' qualifier from pointer target type [enabled by default] arch/xtensa/platforms/iss/simdisk.c: In function 'proc_write_simdisk': arch/xtensa/platforms/iss/simdisk.c:241:38: error: 'buffer' undeclared (first use in this function) arch/xtensa/platforms/iss/simdisk.c:241:38: note: each undeclared identifier is reported only once for each function it appears in Introduced by commit a69755b1 ("xtensa simdisk: switch to proc_create_data()") Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Vineet Gupta 提交于
Enforce congruency of userspace shared mappings Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Vineet Gupta 提交于
Fix the one zillion warnings Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Vineet Gupta 提交于
This is the meat of the series which prevents any dcache alias creation by always keeping the U and K mapping of a page congruent. If a mapping already exists, and other tries to access the page, prev one is flushed to physical page (wback+inv) Essentially flush_dcache_page()/copy_user_highpage() create K-mapping of a page, but try to defer flushing, unless U-mapping exist. When page is actually mapped to userspace, update_mmu_cache() flushes the K-mapping (in certain cases this can be optimised out) Additonally flush_cache_mm(), flush_cache_range(), flush_cache_page() handle the puring of stale userspace mappings on exit/munmap... flush_anon_page() handles the existing U-mapping for anon page before kernel reads it via the GUP path. Note that while not complete, this is enough to boot a simple dynamically linked Busybox based rootfs Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Vineet Gupta 提交于
This preps the low level dcache flush helpers to take vaddr argument in addition to the existing paddr to properly flush the VIPT dcache Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Jason Cooper 提交于
If a board isn't using twl4030, then dtc will complain about the missing phandle (which is in twl4030.dtsi). Move the phy declaration to the dts files. Signed-off-by: NJason Cooper <jason@lakedaemon.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Commit 6770b211 (ARM: OMAP2+: Export SoC information to userspace) had some broken return value handling as noted by Russell King: + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR_OR_NULL(soc_dev)) { + kfree(soc_dev_attr); + return; + } + + parent = soc_device_to_device(soc_dev); + if (!IS_ERR_OR_NULL(parent)) + device_create_file(parent, &omap_soc_attr); This is nonsense. For the first, IS_ERR() is sufficient. For the second, tell me what error checking is required in the return value of this function: struct device *soc_device_to_device(struct soc_device *soc_dev) { return &soc_dev->dev; } when you've already determined that the passed soc_dev is a valid pointer. If you read the comments against the prototype: /** * soc_device_to_device - helper function to fetch struct device * @soc: Previously registered SoC device container */ struct device *soc_device_to_device(struct soc_device *soc); if "soc" is valid, it means the "previously registered SoC device container" must have succeeded and that can only happen if the struct device has been registered. Ergo, there will always be a valid struct device pointer for any registered SoC device container. Therefore, if soc_device_register() succeeds, then the return value from soc_device_to_device() will always be valid and no error checking of it is required. Simples. The rule as ever applies here: get to know the APIs your using and don't fumble around in the dark hoping that you'll get this stuff right. Fix it as noted by Russell. Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 5月, 2013 8 次提交
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由 Raghu Gandham 提交于
Add new clockevent driver that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: NRaghu Gandham <Raghu.Gandham@imgtec.com> Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>
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由 Steven J. Hill 提交于
Various whitespace and #ifdef removals for GIC and R4K clocksources. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>
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由 Steven J. Hill 提交于
Reorganize some of the GIC clocksource driver code. Below is a list of the various changes. * No longer select CSRC_GIC by default for Malta platform. * Limit choice for either the GIC or R4K clocksource, not both. * Change location in Makefile. * Created new 'gic_read_count' function in common 'irq-gic.c' file. * Change 'git_hpt_read' function in 'csrc-gic.c' to use new function. * Surround GIC specific code in Malta platform code with #ifdef's. * Only initialize the GIC clocksource if it was selected. Original code called it unconditionally if a GIC was found. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>
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由 Steven J. Hill 提交于
Move the global variable 'gic_frequency' to be defined in the file 'arch/mips/kernel/irq-gic.c' instead of defining it individually for each platform making use of the GIC. Also change the type to be an unsigned integer instead of signed. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>
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由 Steven J. Hill 提交于
Move the global variable 'gic_present' to be defined in the file 'arch/mips/kernel/irq-gic.c' instead of defining it individually for each platform making use of the GIC. Also change the type to be an unsigned integer instead of signed. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>
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由 Steven J. Hill 提交于
Add logic needed to handle unaligned accesses in MIPS16e mode. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: NLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
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由 Steven J. Hill 提交于
Add logic needed to properly calculate exceptions for delay slots when in MIPS16e mode. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>
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由 Steven J. Hill 提交于
Add structures for all the MIPS16e instructions. Also add the enumerations for all the bit fields for opcodes, functions, etc. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>
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