- 02 7月, 2015 1 次提交
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由 Boris Brezillon 提交于
at91sam9g45, at91sam9x5 and sama5 SoCs should not use "atmel,at91sam9rl-udc" for their USB device compatible property since this compatible is attached to a specific hardware bug fix. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: NBo Shen <voice.shen@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: <stable@vger.kernel.org> #4.0+ Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 25 6月, 2015 1 次提交
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由 Arnd Bergmann 提交于
This backs out all changes that were added in the hip04-dt branch after various boot problems were discovered in UEFI booting. Reported-by: NTyler Baker <tyler.baker@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> [khilman: minor changelog updates] Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 24 6月, 2015 1 次提交
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由 Russell King 提交于
v3.18 changed handle_IRQ() to call __handle_domain_irq(), which now rejects attempts to deliver IRQ0. Since IRQ 0 is used as the timer interrupt (just like the PIT on x86), this causes boot to fail as the bogomips calibration never completes. Fix this by shuffling all interrupts up by one. Fixes: a71b092a ("ARM: Convert handle_IRQ to use __handle_domain_irq") Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 17 6月, 2015 2 次提交
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由 Thomas Petazzoni 提交于
The current Armada XP suspend to RAM implementation, as added in commit 27432825 ("ARM: mvebu: Armada XP GP specific suspend/resume code") does not handle big-endian configurations properly: the small bit of assembly code putting the DRAM in self-refresh and toggling the GPIOs to turn off power forgets to convert the values to little-endian. This commit fixes that by making sure the two values we will write to the DRAM controller register and GPIO register are already in little-endian before entering the critical assembly code. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.19+ Fixes: 27432825 ("ARM: mvebu: Armada XP GP specific suspend/resume code")
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由 Thomas Petazzoni 提交于
Following the merge of "pinctrl: mvebu: armada-xp: rename spi to spi0" by Linus Walleij, we need to adjust the Armada XP Device Tree accordingly, by adjusting the pinctrl configuration for SPI pins. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 13 6月, 2015 3 次提交
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由 Kevin Hilman 提交于
commit dcf9a03b (ARM: multi_v7_defconfig: Enable PMIC and MUIC drivers for exynos) mistakenly added an duplicate line for CONFIG_COMMON_CLK_QCOM=y. Remove it. Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Russell King 提交于
Fix: arch/arm/kernel/sleep.S:121: Error: selected processor does not support ARM opcodes arch/arm/kernel/sleep.S:123: Error: attempt to use an ARM instruction on a Thumb-only processor -- `adr r9,1f+1' arch/arm/kernel/sleep.S:124: Error: attempt to use an ARM instruction on a Thumb-only processor -- `bx r9' Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Stephen Boyd 提交于
Some platforms always enter the kernel in the ARM state even if the kernel is compiled for THUMB2. Add a small wrapper on top of cpu_resume() that switches into THUMB2 state. This provides the functionality to fix a problem reported by Kevin Hilman on next-20150601 where the ifc6410 fails to boot a THUMB2 kernel because the platform's firmware always enters the kernel in ARM mode from deep idle states. (rmk: tweaked to work without BSYM->badr changes.) Reported-by: NKevin Hilman <khilman@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 6月, 2015 6 次提交
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由 Jun Nie 提交于
Add basic defconfig support to zx SOC, including uart, mmc and other common config Signed-off-by: NJun Nie <jun.nie@linaro.org> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Jun Nie 提交于
Add initial dts file and document for ZX296702 and board ZX296702-AD1. More peripherals will be added later. Signed-off-by: NJun Nie <jun.nie@linaro.org> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Kevin Hilman 提交于
After commit 02b4e275 (ARM: v7 setup function should invalidate L1 cache) the soc specific secondary_startup is removed, causing build failures: ../arch/arm/mach-socfpga/platsmp.c: In function 'socfpga_a10_boot_secondary': ../arch/arm/mach-socfpga/platsmp.c:66:140: error: 'socfpga_secondary_startup' undeclared (first use in this function) ../arch/arm/mach-socfpga/platsmp.c:66:140: note: each undeclared identifier is reported only once for each function it appears in To fix, use the generic secondary_startup. Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Krzysztof Kozlowski 提交于
Enable the Exynos DSI and S6E8AA0 panel for full X11 display on Trats2. Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Mika Westerberg 提交于
This includes setting up EGPIOs 0 and 9 for card detection and chip select respectively. This patch is needed to mount a root filesystem on the SPI-based MMC card reader found on the Sim.One. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Linus Walleij 提交于
Adjust device tree entry to the proper registered compatible string for LIS3LV02DL. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 11 6月, 2015 13 次提交
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The xdmac channel configuration is done in one cell not two. This error prevents from probing devices correctly. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Fixes: 83906783 ("ARM: at91/dt: sama5d4: add aes, sha and tdes nodes") Cc: stable@vger.kernel.org # 4.1 Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Murali Karicheri 提交于
Enable netcp driver in defconfig for keystone SoCs. Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NSantosh Shilimkar <ssantosh@kernel.org> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Alan Tull 提交于
Add code that requests that the sdr controller go into self-refresh mode. This code is run from ocram. Suspend-to-RAM and EDAC support are mutually exclusive on SOCFPGA. If the EDAC is enabled, it will prevent the platform from going into suspend. Example of how to request to suspend to ram: $ echo enabled > \ /sys/devices/soc/ffc02000.serial0/tty/ttyS0/power/wakeup $ echo -n mem > /sys/power/state Signed-off-by: NAlan Tull <atull@opensource.altera.com> Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Maxime Coquelin 提交于
The STMicrolectornics's STM32F429 MCU has the following main features: - Cortex-M4 core running up to @180MHz - 2MB internal flash, 256KBytes internal RAM - FMC controller to connect SDRAM, NOR and NAND memories - SD/MMC/SDIO support - Ethernet controller - USB OTFG FS & HS controllers - I2C, SPI, CAN busses support - Several 16 & 32 bits general purpose timers - Serial Audio interface - LCD controller Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Dinh Nguyen 提交于
Update the arria10 gmac nodes with all the necessary properties for ethernet to function on the Arria10 devkit. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Murali Karicheri 提交于
k2l netcp range size is 16M (0x1000000) and not 0xffffff. This patch fixes this. Similarly fix the size of switch module register space to 0x20000. Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NSantosh Shilimkar <ssantosh@kernel.org>
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由 Murali Karicheri 提交于
k2e netcp range size is 16M (0x1000000) and not 0xffffff. This patch fixes this. Similarly fix the size of switch module register space to 0x20000. Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NSantosh Shilimkar <ssantosh@kernel.org>
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由 Murali Karicheri 提交于
k2hk netcp range size is 1M (0x100000) and not 0xfffff. This patch fixes this. Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NSantosh Shilimkar <ssantosh@kernel.org>
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由 Murali Karicheri 提交于
This patch enables networking on k2l evm by providing device bindings for netcp, knav, and qmss. See device binding documentation at Documentation/devicetree/bindings/net/keystone-netcp.txt Signed-off-by: NWingMan Kwok <w-kwok2@ti.com> Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NSantosh Shilimkar <ssantosh@kernel.org>
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由 Murali Karicheri 提交于
This patch enables networking on k2e evm by adding device bindings for netcp, knav and qmss. See device binding documentation below for details. Documentation/devicetree/bindings/net/keystone-netcp.txt Signed-off-by: NWingMan Kwok <w-kwok2@ti.com> Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NSantosh Shilimkar <ssantosh@kernel.org>
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由 Murali Karicheri 提交于
This patch enables networking on k2hk evm by adding device bindings for netcp, knav and qmss. See device binding documentation below for details. Documentation/devicetree/bindings/net/keystone-netcp.txt Signed-off-by: NWingMan Kwok <w-kwok2@ti.com> Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NSantosh Shilimkar <ssantosh@kernel.org>
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由 Dinh Nguyen 提交于
Add boot_secondary implementation for the Arria10 platform. Bringing up the secondary core on the Arria 10 platform is pretty similar to the Cyclone/Arria 5 platform, with the exception of the following differences: - Register offset to bringup CPU1 out of reset is different. - The cpu1-start-addr for Arria10 contains an additional nibble. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Dinh Nguyen 提交于
Convert cyclone5/arria5 to use CPU_METHOD_OF_DECLARE for smp operations. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 07 6月, 2015 3 次提交
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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由 Hauke Mehrtens 提交于
The driver for the PCIe controller was just added, this adds the missing definition of the IRQ numbers to device tree. The driver itself will be automatically detected by bcma. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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由 Hauke Mehrtens 提交于
This adds the NAND flash chip description for a standard chip found connected to this SoC. This makes use of generic Broadcom NAND driver with the iProc interface. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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- 06 6月, 2015 10 次提交
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由 Marek Szyprowski 提交于
SYSMMU devices are registered very early in arch_initcall, so ensure that they can get access to power domains by registering power domain driver from earlier initcall. This change requires dropping usage of the platform device associated with each power domain and replacing clock calls with respective of_clk_* equivalents. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Marek Szyprowski 提交于
PS_HOLD based power off procedure is common for all Exynos SoCs, so use it for every Exynos SoCs. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Tested-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Krzysztof Kozlowski 提交于
The platform_device_id is not modified by the driver and core uses it as const. Signed-off-by: NKrzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Krzysztof Kozlowski 提交于
The irq_domain_ops are not modified by the driver and the irqdomain core code accepts pointer to a const data. Signed-off-by: NKrzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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The following patch adds coupled cpuidle support for Exynos3250 to an existing cpuidle-exynos driver. As a result it enables AFTR mode to be used by default on Exynos3250 without the need to hot unplug CPU1 first. The detailed changelog: - use exynos_[get,set]_boot_addr() in cpuidle-exynos.c and then make cpu_boot_reg_base() static - use exynos_core_restart() in exynos_cpu0_enter_aftr() - add missing smp_rmb() to exynos_cpu0_enter_aftr() (to make the code in-sync with the platform SMP code) - add call_firmware_op(cpu_boot, 1) to exynos_cpu0_enter_aftr() - use dsb_sev() instead of IPI wakeup for Exynos3250 in exynos_cpu0_enter_aftr() - add CPU0 vs CPU1 synchronization based on S5P_PMU_SPARE2 register for Exynos3250 to cpuidle-exynos.c - add flush_cache_all() for CPU1/0 before powerdown/AFTR for Exynos3250 to exynos_wfi_finisher()/exynos_do_idle() Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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Add get_cpu_boot_addr() firmware operation and then exynos_get_boot_addr() helper. This is a preparation for adding coupled cpuidle support for Exynos3250 SoC. There should be no functional changes caused by this patch. Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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Add exynos_set_boot_addr() helper and covert existing code (exynos_boot_secondary() and exynos_smp_prepare_cpus()) to use it. There should be no functional changes caused by this patch. Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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There is a kernel message about secondary CPU bootup when exynos_core_restart() is called through CPU hotplug code-path (the only exynos_core_restart() user currently) so there is no need for an extra info on Exynos3250 SoC about software reset. This also prepares exynos_core_restart() to be re-used in coupled cpuidle code-path in the future. Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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exynos_boot_secondary() can erroneously return 0 or -ENOSYS even when waiting on pen_release being set to -1 timeouts. Fix it by adjusting ret variable value to -ETIMEDOUT when necessary. Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Krzysztof Kozlowski 提交于
Using a fixed (by DTS) parent for clocks when turning on the power domain may introduce issues in other drivers. For example when such driver changes the parent during runtime and expects that he is the only place of such change. Do not rely on DTS providing the fixed parent for such clocks. Instead before switching domain off, grab a current parent of a clock with clk_get_parent(). Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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