The GPIOLIB symbol currently require that
ARCH_WANT_OPTIONAL_GPIOLIB or ARCH_REQUIRE_GPIOLIB is selected
to be selectable.

The ARCH_REQUIRE_GPIOLIB does only one thing: select GPIOLIB.

This is just confusing: architectures that want GPIOLIB should
be able to configure it in no matter what, and those who
require it should just select GPIOLIB.

It also creates problems for drivers that need to state
"select GPIOLIB" to get dependencies: those depend on the
selected architecture to select
ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB first, and will cause
compile errors for the few archs that state neither.

These intermediary symbols need to go.

As a first step, remove the dependencies so that:

- ARCH_WANT_OPTIONAL_GPIOLIB becomes a noop (GPIOLIB will be
  available for everyone) and

- "select ARCH_REQUIRE_GPIOLIB" can be replaced by just
  "select GPIOLIB"

After this patch we can follow up with patches cleaning up the
architectures one-by one and eventually remove the
ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB symbols altogether.
Reported-by: NMichael Hennerich <michael.hennerich@analog.com>
Cc: Michael Büsch <m@bues.ch>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Allow compile testing this driver by adding a new config option which
is enabled by default and depends on the old symbol or COMPILE_TEST.
Signed-off-by: NAlexander Stein <alexanders83@web.de>

Lower dependencies for compile testing.
Signed-off-by: NAlexander Stein <alexanders83@web.de>

This patch adds GPIO driver for Loongson1B.
Signed-off-by: NKelvin Cheung <keguang.zhang@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

These chips seem to have a 9th GPIO block (thus supporting 72 GPIOs)
which is configured through SuperIO register 0xd2 (output enable) and
0xd3 (simple I/O). This is also the reason why io_size is larger than
on IT8728 / IT8732. Unfortunately I don't have hardware to test this 9th
GPIO block.

I am also not sure about not configuring the Simple I/O registers as the
hardware I have only uses GPIO block 8. Reading back the values of
0xc0-0xc7 (as configured by the BIOS/EFI on my board) shows that all
have 0xff set.
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

- Add GPIO support for Broadcom Vulcan ARM64.
- Add depends on ARCH_VULCAN to Kconfig to enable gpio controller
  driver for Broadcom Vulcan ARM64 SoCs.
Signed-off-by: NKamlakant Patel <kamlakant.patel@broadcom.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use gpio-generic to simplify this driver.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Tested-by: NYD Tseng <Yd_Tseng@asmedia.com.tw>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This switches the mcp23s08 driver to use the gpiolib irqchip
helpers.
Signed-off-by: NPhil Reid <preid@electromag.com.au>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The standby GPIO controller can be used as a interrupt controller.
Select GPIOLIB_IRQCHIP when compiling this driver. Otherwise we get
a compilation error:

drivers/gpio/gpio-xgene-sb.c: In function 'xgene_gpio_sb_probe':
drivers/gpio/gpio-xgene-sb.c:312:10: error: 'struct gpio_chip'
  has no member named 'irqdomain'
  priv->gc.irqdomain = priv->irq_domain;
          ^
scripts/Makefile.build:295: recipe for target
'drivers/gpio/gpio-xgene-sb.o' failed
make[2]: *** [drivers/gpio/gpio-xgene-sb.o] Error 1

Fixes: 1013fc41 "gpio: xgene: Enable X-Gene standby GPIO as interrupt controller"
Signed-off-by: NMatthias Brugger <mbrugger@suse.com>
Acked-by: NQuan Nguyen <qnguyen@apm.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add support for the TPS65086 PMIC GPOs.

TPS65086 has four configurable GPOs that can be used for several
purposes. These are output only.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The 16Z127 is a 32bit GPIO controller on a MCB FPGA.
Every single line can be configured as input and output.

Push pull and open drain are supported as well as setting
a debounce value for the input lines.
Signed-off-by: NAndreas Werner <andy@wernerandy.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The TS-4800 is an i.MX515 board. Its GPIO driver should only be compiled
for this CPU or for test builds.
Signed-off-by: NJulien Grossholtz <julien.grossholtz@savoirfairelinux.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There is no build dependency for this driver, so enable COMPILE_TEST to get
better build coverage.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There is no build dependency for this driver, so enable COMPILE_TEST to get
better build coverage.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Make use of ARCH_RENESAS in place of ARCH_SHMOBILE.

This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Make use of ARCH_RENESAS in place of ARCH_SHMOBILE.

This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds support for the TPS65912 PMIC GPIOs.

TPS65912 has five configurable GPIOs that can be used for several
purposes.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The old tps65912 driver is being replaced, delete old driver.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Acked-by: NMark Brown <broonie@kernel.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Driver for the GPIO block found in ti's tps65218 pmics.

The device has two GPIOs and one GPO pin which can be configured as follows:
GPIO1:
	-general-purpose, open-drain output controlled by GPO1 user bit and/or
	 sequencer
	-DDR3 reset input signal from SOC. Signal is either latched or
	 passed-trough to GPO2 pin. See below for details.
GPO2:
	-general-purpose output controlled by GPO2 user bit
	-DDR3 reset output signal. Signal is controlled by GPIO1 and PGOOD.
	 See below for details.
	-Output buffer can be configured as open-drain or push-pull.
GPIO3:
	-general-purpose, open-drain output controlled by GPO3 user bit and/or
	 sequencer
	-reset input-signal for DCDC1 and DCDC2.

The input configurations are not meant to be used by the user so the driver
only offers GPOs.

v2: Added request routine that evaluates the fw config flags and removed module
    owner
v3: Added .direction_input() routine, and took care of all Linus Walleij
suggestions (clamp to bool, use proper include)
Signed-off-by: NNicolas Saenz Julienne <nicolassaenzj@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add driver for TI TPIC2810 8-Bit LED Driver with I2C Interface.

The TPIC2810 has 8 open-drain outputs that can but used to drive
LEDs and other low-side switched resistive loads.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add generic parallel-in/serial-out shift register GPIO driver.

This includes SPI compatible devices like SN74165 serial-out shift
registers and the SN65HVS88x series of industrial serializers that can
be read over the SPI bus and used for GPI (General Purpose Input).
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Tested-by: NSean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add support for the interrupt controller using GPIOLIB_IRQCHIP.
Both edges isn't supported by the chip and has to be emulated
by switching the polarity on each interrupt.
Signed-off-by: NAlban Bedel <albeu@free.fr>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

To allow building the driver in compile tests we must drop the
dependency on asm/mach-ath79/ar71xx_regs.h. For this we replace the
include with local definition of the registers needed for this driver.
Signed-off-by: NAlban Bedel <albeu@free.fr>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Drop most of the code in favor of the generic MMIO GPIO driver.
As the driver now depend on CONFIG_GPIO_GENERIC also add a Kconfig
entry to make the driver optional.

We leave the base pointer and lock in the data struct because they are
needed for the IRQ support.
Signed-off-by: NAlban Bedel <albeu@free.fr>
Acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The TS-4800 GPIO driver provide support for the GPIOs available
on the Technologic Sytems board FPGA. It allows to set
direction and read/write states.

It uses the generic gpio driver.
Signed-off-by: NJulien Grossholtz <julien.grossholtz@savoirfairelinux.com>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The gpio-mpc8xxx.c should can support qoriq and
Layerscape platforms.
Signed-off-by: NLiu Gang <Gang.Liu@nxp.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add F81866 GPIO supports

Fintek F81866 is a SuperIO. It contains HWMON/GPIO/Serial Ports.
and it has totally 72(9x8 sets) gpio pins.

Here is the PDF spec:
http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html

The control method is the same with F7188x, but we should care the address
of GPIO8x.

GPIO address is below:
    GPIO0x based: 0xf0
    GPIO1x based: 0xe0
    GPIO2x based: 0xd0
    GPIO3x based: 0xc0
    GPIO4x based: 0xb0
    GPIO5x based: 0xa0
    GPIO6x based: 0x90
    GPIO7x based: 0x80
    GPIO8x based: 0x88 <-- not 0x70.
Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com>
Acked-by: NSimon Guinot <simon.guinot@sequanux.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The ACCES 104-DIO-48E device provides 48 lines digital I/O via two
Programmable Peripheral Interface (PPI) chips of type 82C55. Bit C3 at
each 24-bit Group can be used as an external interrupt, triggered by a
rising edge.

This driver provides GPIO and IRQ support for these 48 channels of
digital I/O. The base port address for the device may be configured via
the dio_48e_base module parameter. The interrupt line number for the
device may be configured via the dio_48e_irq module parameter.
Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The WinSystems WS16C48 device provides 48 lines of digital I/O. In
addition, the first 24 lines may be used for interrupt-handled edge
detection; rising edge detection and falling edge detection are
supported.

This driver provides GPIO and IRQ support for these 48 channels of
digital I/O. The base port address for the device may be configured via
the ws16c48_base module parameter. The interrupt line number for the
device may be configured via the ws16c48_irq module parameter.
Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

BMIPS_GENERIC (arch/mips/bmips) is the Kconfig symbol associated with
Broadcom MIPS-based STB chips. Since this driver is perfectly usable on
these platforms as well, allow using it.
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
Acked-by: NGregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The PCI/USB expander menus already depend on PCI/USB, drop subdependecies
on individual drivers.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
[Rebased to the GPIO tree]
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Allow the pch_gpio driver to be built for MIPS platforms, in preparation
for use on the MIPS Boston board.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The gpio-samsung driver is special in the sense that it
interacts directly in multiple ways with the legacy platform
code for the s3c24xx and s3c64xx platforms. In contrast,
all devicetree based machines for Samsung, including the
ones on those two SoC families use a different driver.

The header files that define the interface between the platform
code and the gpio driver are not visible when building a
kernel for ARCH_MULTIPLATFORM, which prevents us from
turning on this option for s3c64xx.

To work around this, we now move the driver back into platform
code, from where it was originally moved to as part of commit
1b39d5f2 ("gpio/samsung: gpio-samsung.c to support
Samsung GPIOs").

The long-term plan for this driver would be to remove it
entirely, after all Samsung machines have been converted
over to boot from DT, but there is currently no timeline
for when that might happen.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>

The ACCES 104-IDI-48 family of PC/104 utility boards feature 48
individually optically isolated digital inputs. Enabled inputs feature
change-of-state detection capability; if change-of-state detection is
enabled, an interrupt is fired off if a change of input level
(low-to-high or high-to-low) is detected. Change-of-state IRQs are
enabled/disabled on 8-bit boundaries, for a total of six boundaries.

This driver provides GPIO and IRQ support for these 48 channels of
digital input. The base port address for the device may be configured
via the idi_48_base module parameter. The interrupt line number for the
device may be configured via the idi_48_irq module parameter.
Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The ACCES 104-IDIO-16 series offers Change-of-State detection interrupt
functionality; if Change-of-State detection is enabled, an interrupt is
fired off if any input line changes state (i.e. goes from low to high,
or from high to low). This patch adds support to handle these interrupts
and allows the user to mask which GPIO lines are affected. The interrupt
line number for the device may be set via the idio_16_irq module
parameter.
Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

- Relax dependencies on SPI_MASTER for drivers in the SPI menu
  that already has this dependency.
- Move out the expander that would be hidden for I2C access if
  SPI_MASTER was not selected. Tentatively create a separate
  menu for this.
- Move the ZX SoC driver to memory-mapped drivers, this must be
  a mistake and only worked because the system has an SPI master
  enabled at the same time.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The I2C expander menu already depends on I2C, drop subdependecies
on individual drivers. Keep the instances of depends on I2C=y
though, so these are still restricted to the compiled-in case.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Port-mapped I/O depends on X86 already, so individual drivers need
not specify this dependency.
Suggested-by: NVivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Create a Kconfig submenu for drivers using X86 port-mapped I/O
and depend on X86 for this.
Suggested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Cc: William Breathitt Gray <vilhelm.gray@gmail.com>
Cc: Andreas Bofjall <andreas@gazonk.org>
Cc: Diego Elio Pettenò <flameeyes@flameeyes.eu>
Cc: Daniel Krueger <daniel.krueger@systec-electronic.com>
Cc: Bruno Randolf <br1@einfach.org>
Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Acked-by: NSimon Guinot <simon.guinot@sequanux.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The driver does not have any real architecture dependencies. To avoid
listing each architecture that might use this driver on some
FPGA-enabled platform, drop these dependencies.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: NMoritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>