- 20 8月, 2013 1 次提交
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由 Greg Kroah-Hartman 提交于
The dev_attrs field of struct class is going away soon, dev_groups should be used instead. This converts the MIPS vpe_class code to use the correct field. Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Crispin <blogic@openwrt.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 05 8月, 2013 1 次提交
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由 Florian Fainelli 提交于
The hardware interrupt routing for boot CPU != 0 is wrong because it will route all the hardware interrupts to TP0 which is not the one we booted from. Fix this by properly checking which boot CPU we are booting from and updating the right interrupt mask for the boot CPU. This fixes booting on BCM3368 with bmips_smp_emabled = 0. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: jogo@openwrt.org Cc: cernekee@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5650/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 31 7月, 2013 2 次提交
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由 Florian Fainelli 提交于
The current BMIPS SMP code assumes that the slave CPU is physical and logical CPU 1, but on some systems such as BCM3368, the slave CPU is physical CPU0. Fix the code to read the physical CPU (thread ID) we are running this code on, and adjust the relocation vector address based on it. This allows bringing up the second CPU on BCM3368 for instance. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Cc: blogic@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5621/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Florian Fainelli 提交于
Commit 4df715aa ("MIPS: BMIPS: support booting from physical CPU other than 0") changed the interupt routing when we are booting from physical CPU 0, but the settings are actually correct if we are booting from physical CPU 0 or CPU 1. Revert that specific change. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Cc: blogic@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5622/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 24 7月, 2013 1 次提交
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由 Santosh Shilimkar 提交于
On some PAE architectures, the entire range of physical memory could reside outside the 32-bit limit. These systems need the ability to specify the initrd location using 64-bit numbers. This patch globally modifies the early_init_dt_setup_initrd_arch() function to use 64-bit numbers instead of the current unsigned long. There has been quite a bit of debate about whether to use u64 or phys_addr_t. It was concluded to stick to u64 to be consistent with rest of the device tree code. As summarized by Geert, "The address to load the initrd is decided by the bootloader/user and set at that point later in time. The dtb should not be tied to the kernel you are booting" More details on the discussion can be found here: https://lkml.org/lkml/2013/6/20/690 https://lkml.org/lkml/2012/9/13/544Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NVineet Gupta <vgupta@synopsys.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NGrant Likely <grant.likely@linaro.org>
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- 19 7月, 2013 1 次提交
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由 Florian Fainelli 提交于
Commit 4df715aa ["MIPS: BMIPS: support booting from physical CPU other than 0"] introduced a thinko which will prevents slave CPUs from being released from reset on systems where we boot from TP0. The problem is that we are checking whether the slave CPU logical CPU map is 0, which is never true for systems booting from TP0, so we do not release the slave TP from reset and we are just stuck. Fix this by properly checking that the CPU we intend to boot really is the physical slave CPU (logical and physical value being 1). Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5598/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 17 7月, 2013 1 次提交
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由 Ralf Baechle 提交于
panic() doesn't return so this call was useless. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Reported-by: NAlexander Sverdlin <alexander.sverdlin@nsn.com>
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- 15 7月, 2013 1 次提交
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由 Paul Gortmaker 提交于
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream. The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. Here, we remove all the MIPS __cpuinit from C code and __CPUINIT from asm files. MIPS is interesting in this respect, because there are also uasm users hiding behind their own renamed versions of the __cpuinit macros. [1] https://lkml.org/lkml/2013/5/20/589 [ralf@linux-mips.org: Folded in Paul's followup fix.] Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5494/ Patchwork: https://patchwork.linux-mips.org/patch/5495/ Patchwork: https://patchwork.linux-mips.org/patch/5509/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 04 7月, 2013 1 次提交
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由 Zhang Yanfei 提交于
saved_max_pfn is used to know the amount of memory that the previous kernel used. And for powerpc, we set saved_max_pfn by passing the kernel commandline parameter "savemaxmem=". The only user of saved_max_pfn in mips is read_oldmem interface. Since we have removed read_oldmem, so we don't need this parameter anymore. Signed-off-by: NZhang Yanfei <zhangyanfei@cn.fujitsu.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Dave Hansen <dave@sr71.net> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Matt Fleming <matt.fleming@intel.com> Cc: Michael Holzheu <holzheu@linux.vnet.ibm.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Vivek Goyal <vgoyal@redhat.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 01 7月, 2013 9 次提交
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由 Steven J. Hill 提交于
The ISA exception bit selects whether exceptions are taken in classic or microMIPS mode. This bit is Config3.ISAOnExc and was improperly defined as bits 16 and 17 instead of just bit 16. A new function was added so that platforms could set this bit when running a kernel compiled with only microMIPS instructions. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5377/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
It is only used from within a single file, it should not be globally visible. Signed-off-by: NDavid Daney <david.daney@cavium.com> Acked-by: NSteven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5325/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Tony Wu 提交于
Signed-off-by: NTony Wu <tung7970@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5535/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Tony Wu 提交于
Signed-off-by: NTony Wu <tung7970@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5536/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Florian Fainelli 提交于
BMIPS43xx CPUs have two hardware threads, and on some SoCs such as 3368, the bootloader has configured the system to boot from TP1 instead of the more usual TP0. Create the physical to logical CPU mapping to cope with that, do not remap the software interrupts to be cross CPUs such that we do not have to do use the logical CPU mapping further down the code, and finally, reset the slave TP1 only if booted from TP0. Signed-off-by: NJonas Gorski <jogo@openwrt.org> Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: cernekee@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5553/ Patchwork: https://patchwork.linux-mips.org/patch/5556/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Tony Wu 提交于
There is an infinite loop in gic_set_affinity. When irq_set_affinity gets called on gic controller, it blocks forever. Signed-off-by: NTony Wu <tung7970@gmail.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5537/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
MIPS I is the ancestor of all MIPS ISA and architecture variants. Anything ever build in the MIPS empire is either MIPS I or at least contains MIPS I. If it's running Linux, that is. So there is little point in having cpu_has_mips_1 because it will always evaluate as true - though usually only at runtime. Thus there is no point in having the MIPS_CPU_ISA_I ISA flag, so get rid of it. Little complication: traps.c was using a test for a pure MIPS I ISA as a test for an R3000-style cp0. To deal with that, use a check for cpu_has_3kex or cpu_has_4kex instead. cpu_has_3kex is a new macro. At the moment its default implementation is !cpu_has_4kex but this may eventually change if Linux is ever going to support the oddball MIPS processors R6000 and R8000 so users of either of these macros should not make any assumptions. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5551/
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由 Gregory Fong 提交于
For non-SMP, uses the new random canary value that is stored in the task struct whenever a new task is forked. Based on ARM version in df0698be and subject to the same limitations: the variable GCC expects, __stack_chk_guard, is global, so this will not work on SMP. Quoting Nicolas Pitre <nico@fluxnic.net>: "One way to overcome this GCC limitation would be to locate the __stack_chk_guard variable into a memory page of its own for each CPU, and then use TLB locking to have each CPU see its own page at the same virtual address for each of them." Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5488/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Gregory Fong 提交于
Implements basic stack protector support based on ARM version in c743f380 , with Kconfig option, constant canary value set at boot time, and script to check if compiler actually supports stack protector. Tested by creating a kernel module that writes past end of char[]. Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com> Cc: linux-mips@linux-mips.org Cc: Filippo Arcidiacono <filippo.arcidiacono@st.com> Cc: Carmelo Amoroso <carmelo.amoroso@st.com> Patchwork: https://patchwork.linux-mips.org/patch/5448/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 25 6月, 2013 1 次提交
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由 Jonas Gorski 提交于
When having enabled MIPS_PGD_C0_CONTEXT, trap_init() might call the generated tlbmiss_handler_setup_pgd before it was committed to memory, causing boot failures: trap_init() |- per_cpu_trap_init() | |- TLBMISS_HANDLER_SETUP() | |- tlbmiss_handler_setup_pgd() |- flush_tlb_handlers() To avoid this, move flush_tlb_handlers() into build_tlb_refill_handler() right after they were generated. We can do this as the cache handling is initialized just before creating the tlb handlers. This issue was introduced in 3d8bfdd0 ("MIPS: Use C0_KScratch (if present) to hold PGD pointer."). Signed-off-by: NJonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Jayachandran C <jchandra@broadcom.com> Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5539/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 22 6月, 2013 3 次提交
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由 Ralf Baechle 提交于
CC arch/mips/kernel/rtlx.o /home/ralf/src/linux/upstream-sfr/arch/mips/kernel/rtlx.c: In function ‘file_write’: /home/ralf/src/linux/upstream-sfr/arch/mips/kernel/rtlx.c:439:23: error: unused variable ‘rt’ [-Werror=unused-variable] /home/ralf/src/linux/upstream-sfr/arch/mips/kernel/rtlx.c: In function ‘rtlx_module_init’: /home/ralf/src/linux/upstream-sfr/arch/mips/kernel/rtlx.c:523:3: error: implicit declaration of function ‘set_vi_handler’ [-Werror=implicit-function-declaration] cc1: all warnings being treated as errors Caused by 496ad9aa [new helper: file_inode(file)]. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Paul Burton 提交于
Writing a value to a WatchLo* register creates an execution hazard, so if its value is then read before that hazard is cleared then said value may be invalid. The mips_probe_watch_registers function must therefore clear the execution hazard between setting the match bits in a WatchLo* register & reading the register back in order to check which are set. This fixes intermittent incorrect watchpoint register probing on some MIPS cores such as interAptiv & proAptiv. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Reviewed-by: NJames Hogan <james.hogan@imgtec.com> Acked-by: NSteven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/5474/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
It's IP27-specific and can only cause trouble in head.S. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 19 6月, 2013 1 次提交
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由 Viresh Kumar 提交于
Most of the stuff from kernel/sched.c was moved to kernel/sched/core.c long time back and the comments/Documentation never got updated. I figured it out when I was going through sched-domains.txt and so thought of fixing it globally. I haven't crossed check if the stuff that is referenced in sched/core.c by all these files is still present and hasn't changed as that wasn't the motive behind this patch. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NPeter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/cdff76a265326ab8d71922a1db5be599f20aad45.1370329560.git.viresh.kumar@linaro.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 13 6月, 2013 3 次提交
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由 Jayachandran C 提交于
XLR/XLP COP0 scratch is register 22, sel 0-7. Add a function c0_kscratch() which returns the scratch register for the platform, and use the return value while generating TLB handlers. Setup kscratch_mask to 0xf for XLR/XLP since the config4 register does not exist. This allows the kernel to allocate scratch registers 0-3 if needed. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5445/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
Kernel threads should be able to use COP2 if the platform needs it. Do not call die_if_kernel() for a coprocessor unusable exception if the exception due to COP2 usage. Instead, the default notifier for COP2 exceptions is updated to call die_if_kernel. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5415/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
Move the common code for saving and restoring platform specific COP2 registers to switch_to(). This will make supporting new platforms (like Netlogic XLP) easier. The platform specific COP2 definitions are to be specified in asm/processor.h and in asm/cop2.h. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5411/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 11 6月, 2013 5 次提交
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由 Markos Chandras 提交于
CONFIG_FRAME_POINTER is not selectable for MIPS so this codepath was never executed. Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com> Acked-by: NSteven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5440/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Markos Chandras 提交于
arch_ftrace_update_code and ftrace_modify_all_code are only available if CONFIG_DYNAMIC_FTRACE is selected. Fixes the following build problem on MIPS randconfig: arch/mips/kernel/ftrace.c: In function 'arch_ftrace_update_code': arch/mips/kernel/ftrace.c:31:2: error: implicit declaration of function 'ftrace_modify_all_code' [-Werror=implicit-function-declaration] Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com> Acked-by: NSteven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5435/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
This enables support for CONFIG_NO_HZ_FULL. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
This will simplify further modifications. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Chen Gang 提交于
Ensure strings are always '\0' terminated. Or in the next pr_info() shit may hit the fan. Signed-off-by: NChen Gang <gang.chen@asianux.com> Acked-by: NJohn Crispin <blogic@openwrt.org> Cc: david.daney@cavium.com Cc: linux-mips@linux-mips.org Cc: Linux-Arch <linux-arch@vger.kernel.org> Cc: linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/5331/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 10 6月, 2013 1 次提交
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由 Manuel Lauss 提交于
Only an interrupt can wake the core from 'wait', enable interrupts locally before executing 'wait'. [ralf@linux-mips.org: This leave the race between an interrupt that's setting TIF_NEED_RESCHEd and entering the WAIT status. but at least it's going to bring Alchemy back from the dead, so I'm going to apply this patch.] Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Cc: Maciej W. Rozycki <macro@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5408/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 06 6月, 2013 2 次提交
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由 Ralf Baechle 提交于
cputime_to_timeval() takes a struct timeval *as its second argument but a struct compat_timeval * will be passed resulting in: CC arch/mips/kernel/binfmt_elfn32.o In file included from arch/mips/kernel/binfmt_elfn32.c:122:0: arch/mips/kernel/../../../fs/binfmt_elf.c: In function ‘fill_prstatus’: arch/mips/kernel/../../../fs/binfmt_elf.c:1330:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfn32.c:55: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ In file included from arch/mips/kernel/binfmt_elfn32.c:122:0: arch/mips/kernel/../../../fs/binfmt_elf.c:1331:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfn32.c:55: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ In file included from arch/mips/kernel/binfmt_elfn32.c:122:0: arch/mips/kernel/../../../fs/binfmt_elf.c:1336:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfn32.c:55: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ In file included from arch/mips/kernel/binfmt_elfn32.c:122:0: arch/mips/kernel/../../../fs/binfmt_elf.c:1337:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfn32.c:55: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ In file included from arch/mips/kernel/binfmt_elfn32.c:122:0: arch/mips/kernel/../../../fs/binfmt_elf.c:1339:2: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfn32.c:55: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ In file included from arch/mips/kernel/binfmt_elfn32.c:122:0: arch/mips/kernel/../../../fs/binfmt_elf.c:1340:2: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfn32.c:55: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ AS arch/mips/kernel/scall64-n32.o CC arch/mips/kernel/signal_n32.o CC arch/mips/kernel/binfmt_elfo32.o In file included from arch/mips/kernel/binfmt_elfo32.c:165:0: arch/mips/kernel/../../../fs/binfmt_elf.c: In function ‘fill_prstatus’: arch/mips/kernel/../../../fs/binfmt_elf.c:1330:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfo32.c:78: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ In file included from arch/mips/kernel/binfmt_elfo32.c:165:0: arch/mips/kernel/../../../fs/binfmt_elf.c:1331:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfo32.c:78: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ In file included from arch/mips/kernel/binfmt_elfo32.c:165:0: arch/mips/kernel/../../../fs/binfmt_elf.c:1336:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfo32.c:78: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ In file included from arch/mips/kernel/binfmt_elfo32.c:165:0: arch/mips/kernel/../../../fs/binfmt_elf.c:1337:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfo32.c:78: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ In file included from arch/mips/kernel/binfmt_elfo32.c:165:0: arch/mips/kernel/../../../fs/binfmt_elf.c:1339:2: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfo32.c:78: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ In file included from arch/mips/kernel/binfmt_elfo32.c:165:0: arch/mips/kernel/../../../fs/binfmt_elf.c:1340:2: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default] In file included from include/asm-generic/cputime.h:12:0, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4, from include/linux/sched.h:28, from include/linux/ptrace.h:5, from include/uapi/linux/elfcore.h:7, from include/linux/elfcore.h:7, from arch/mips/kernel/binfmt_elfo32.c:78: include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’ Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Yoichi Yuasa 提交于
arch/mips/kernel/rtlx.c: In function 'rtlx_module_init': arch/mips/kernel/rtlx.c:523:3: error: implicit declaration of function 'set_vi_handler' [-Werror=implicit-function-declaration] Signed-off-by: NYoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5340/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 23 5月, 2013 1 次提交
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由 Maciej W. Rozycki 提交于
2a0b24f5 broke Trap exception handling in the standard MIPS mode. Additionally the microMIPS-mode trap code mask is wrong, as it's a 4-bit field. Here's a fix. Signed-off-by: NMaciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5309/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 22 5月, 2013 5 次提交
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由 Aron Xu 提交于
As a relatively new ABI, N64 only had getdents syscall while other modern architectures have getdents64. This was noticed when Python 3.3 shifted to the latter one for aarch64. [ralf@linux-mips.org: The history of getdents64 is a little complicated. Commit 1a1d77dd589de5a567fa95e36aa6999c704ceca4 [Merge with 2.4.0-test7.] added N64 getdents(2) to arch/mips64/kernel/scall_64.S as syscall 5213, then dropped again in 578720675c44e54e8aa7c68f6dce59ed37ce3d3b [Overhaul of the 64-bit syscall interface. Now heritage free.] for 2.5.18 in 2002.] Signed-off-by: NAron Xu <aron@debian.org> Acked-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5285/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Masami Hiramatsu 提交于
Fix to check double free of insn_slot at arch_remove_kprobe as other arches do. Signed-off-by: NMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: David Daney <ddaney@caviumnetworks.com> Cc: Maneesh Soni <manesoni@cisco.com> Cc: Victor Kamensky <kamensky@cisco.com> Cc: linux-mips@linux-mips.org Cc: Ingo Molnar <mingo@redhat.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: yrl.pp-manager.tt@hitachi.com Cc: systemtap@sourceware.org Patchwork: https://patchwork.linux-mips.org/patch/5293/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
local_irq_enable() may expand into very different code, so it rather should stay in C. Also this keeps the assembler code size constant which keeps the rollback code simple. So it's best to split r4k_wait into two parts, one C and one assembler. Finally add the local_irq_enable() to r4k_wait to ensure the WAIT instruction in __r4k_wait() will work properly. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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