The L2 RAM is in different power domain from the CPU cluster. So the
L2 content can be retained over CPU suspend/resume. To do that, we
need to disable L2 after the MMU is disabled, and enable L2 before
the MMU is enabled. But the L2 controller is in the same power domain
with the CPU cluster. We need to restore it's settings and re-enable
it after the power be resumed.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Acked-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This is a power gating idle mode. It support power gating vdd_cpu rail
after all cpu cores in "powered-down" status. For Tegra30, the CPU0 can
enter this state only when all secondary CPU is offline. We need to take
care and make sure whole secondary CPUs were offline and checking the
CPU power gate status. After that, the CPU0 can go into "powered-down"
state safely. Then shut off the CPU rail.

Be aware of that, you may see the legacy power state "LP2" in the code
which is exactly the same meaning of "CPU power down".

Base on the work by:
Scott Williams <scwilliams@nvidia.com>
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The flow controller can help CPU to go into suspend mode (powered-down
state). When CPU go into powered-down state, it needs some careful
settings before getting into and after leaving. The enter and exit
functions do that by configuring appropriate mode for flow controller.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Add suspend, resume and rail_off_ready API into tegra_cpu_car_ops. These
functions were used for CPU powered-down state maintenance. One thing
needs to notice the rail_off_ready API only availalbe for cpu_g cluster
not cpu_lp cluster.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Enable csite (debug and trace controller) clock at init to prevent it
be disabled. And this also the necessary clock for CPU be brought up or
resumed from a power-gating low power state.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This supports power-gated idle on secondary CPUs for Tegra30. The
secondary CPUs can go into powered-down state independently. When
CPU goes into this state, it saves it's contexts and puts itself
to flow controlled WFI state. After that, it will been power gated.

Be aware of that, you may see the legacy power state "LP2" in the
code which is exactly the same meaning of "CPU power down".

Based on the work by:
Scott Williams <scwilliams@nvidia.com>
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The CPU suspending on Tegra means CPU power gating. We add a resume
function for taking care the CPUs that resume from power gating status.
This function was been hooked to the reset handler. We take care
everything here before go into kernel.

Be aware of that, you may see the legacy power status "LP2" in the code
which is exactly the same meaning of "CPU power down".

Based on the work by:
Scott Williams <scwilliams@nvidia.com>
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The different Tegra chips may have different CPU idle states and data.
Individual CPU idle driver make it more easy to maintain.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

For the naming consistency under the mach-tegra, we re-name the file of
"sleep-tXX" to "sleep-tegraXX" (e.g., sleep-t30 to sleep-tegra30).
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The Tegra CPU idle LP3 state is doing ARM WFI only. So it's same with
the common ARM_CPUIDLE_WFI_STATE. Using it to replace LP3 now.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Setup the clock parents for the two display controllers and HDMI.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Add the OF_DEV_AUXDATA table entries required to associate the proper
names with host1x and its children. In turn, this allows the devices to
find the required clocks.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Extend the pll_d frequency table with a few entries to support common
HDMI and LVDS display modes and setup the clock parents for the two
display controllers and HDMI.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Add the OF_DEV_AUXDATA table entries required to associate the proper
names with host1x and its children. In turn, this allows the devices to
find the required clocks.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This patch adds speedo-based process identification support for Tegra30.
Signed-off-by: NDanny Huang <dahuang@nvidia.com>
[swarren s/Tegra3/Tegra30/ in log print,
s/T30/Tegra30/ in commit description]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Detect CPU and core process ID by checking speedo corner tables.
This can provide a more accurate process ID.
Signed-off-by: NDanny Huang <dahuang@nvidia.com>
[swarren s/Tegra2/Tegra20/ in log print]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Change the spare fuse base from a definition to a variable.
It provides flexibilty to read spare fuse on different chip.
Signed-off-by: NDanny Huang <dahuang@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This patch implements ARM linux patch 6395/1 for Tegra. See commit
1a8e41cd "ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache
controller) AuxCtlr register" for details.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
[swarren: added commit subject for referenced patch]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Add OF_DEV_AUXDATA for sflash controller driver for Tegra20
board dt files.
Set the parent clock of sflash controller to PLLP and configure
clock to 20MHz.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Enable the data prefetch on L2. The bit28 in aux ctrl register.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NPeter De Schrijver <pdeschrijver@nvidia.com>

Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30
board dt files.
Set the parent clock of slink controller to PLLP and configure
clock to 100MHz.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Moving L2 cache init to DT support.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Add L2 cache controller binding into DT for Tegra.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Adding the AHB and APB bus clock for Tegra30.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Set up the wlan clock tree for Tegra20 and Tegra30.
Signed-off-by: NWei Ni <wni@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Nothing outside mach-tegra uses this file, so there's no need for it to
be in <mach/>.

Since uncompress.h and debug-macro.S remain in include/mach, they need
to include "../../irammap.h" becaue of this change. Both these usages
will be removed shortly, when Tegra's DEBUG_LL implementation is updated
not to pass information through IRAM.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Nothing outside mach-tegra uses this file, so there's no need for it to
be in <mach/>.

Since uncompress.h and debug-macro.S remain in include/mach, they need
to include "../../iomap.h" becaue of this change. uncompress.h will soon
be deleted in later multi-platform/single-zImage patches. debug-macro.S
will need to continue to include this header using an explicit relative
path, to avoid duplicating the physical->virtual address mapping that
iomap.h dictates.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Remove includes of <mach/dma.h> from sound/soc; nothing from it is used.

Remove include of <mach/dma.h> from mach-tegra/apbio.c; since the DMA
transfers made by this file don't need flow-control with any peripheral,
there's no need to set any slave ID.

Once those changes are made, there are no remaining users of <mach/dma.h>
so remove it. Drivers should get this information from device tree. This
removal is necessary for single zImage.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

We wish to empty arch/arm/mach-tegra/include/mach/ as much as possible
to enable single zImage. Move tegra-ahb.h to a more central location
(suggested by Arnd, OK'd by Greg KH), and actually make tegra-ahb.c
include the header to ensure client and provider agree on the prototype.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This should make it easier to delete or move <mach/*.h>; something that
is useful for single-zImage.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Nothing from this file is used, and the file will hopefully be deleted
soon.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NJoerg Roedel <joerg.roedel@amd.com>

Nothing from this file is used, and the file will hopefully be deleted
soon.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-By: NMarc Dietrich <marvin24@gmx.de>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Nothing from this file is used, and the file will hopefully be deleted
soon.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NHerbert Xu <herbert@gondor.apana.org.au>

Commit 13511def "regulator: deprecate regulator-compatible DT property"
now allows for simpler content within the regulators node within a PMIC.
Modify all the Tegra device tree files to take advantage of this.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NThierry Reding <thierry.reding@avionic-design.de>

Almost nothing from this file is used, and the file will hopefully be
deleted soon. Copy the tiny portions that are used directly into
tegra_usb_phy.c. I believe that Venu Byravarasu is working on cleaning up
our USB driver, and those cleanups will remove the need for these
constants.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NVenu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Almost nothing from this file is used, and the file will hopefully be
deleted soon. Copy the tiny portions that are used directly into
ehci-tegra.c. I believe that Venu Byravarasu is working on cleaning up
our USB driver, and those cleanups will remove the need for these
constants.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NVenu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Pull NFS client bugfixes from Trond Myklebust:

 - Fix a bunch of deadlock situations:
   * State recovery can deadlock if we fail to release sequence ids
     before scheduling the recovery thread.
   * Calling deactivate_super() from an RPC workqueue thread can
     deadlock because of the call to rpc_shutdown_client.

 - Display the device name correctly in /proc/*/mounts

 - Fix a number of incorrect error return values:
   * When NFSv3 mounts fail due to a timeout.
   * On NFSv4.1 backchannel setup failure
   * On NFSv4 open access checks

 - pnfs_find_alloc_layout() must check the layout pointer for NULL

 - Fix a regression in the legacy DNS resolved

* tag 'nfs-for-3.7-4' of git://git.linux-nfs.org/projects/trondmy/linux-nfs:
  NFS4: nfs4_opendata_access should return errno
  NFSv4: Initialise the NFSv4.1 slot table highest_used_slotid correctly
  SUNRPC: return proper errno from backchannel_rqst
  NFS: add nfs_sb_deactive_async to avoid deadlock
  nfs: Show original device name verbatim in /proc/*/mount{s,info}
  nfsv3: Make v3 mounts fail with ETIMEDOUTs instead EIO on mountd timeouts
  nfs: Check whether a layout pointer is NULL before free it
  NFS: fix bug in legacy DNS resolver.
  NFSv4: nfs4_locku_done must release the sequence id
  NFSv4.1: We must release the sequence id when we fail to get a session slot
  NFS: Wait for session recovery to finish before returning

Pull thermal management & ACPI update from Zhang Rui,

Ho humm.  Normally these things go through Len.  But it's just three
small fixes, I guess I can pull directly too.

* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux:
  exynos4_tmu_driver_ids should be exynos_tmu_driver_ids.
  ACPI video: Ignore errors after _DOD evaluation.
  thermal: solve compilation errors in rcar_thermal

Pull i2c embedded fixes from Wolfram Sang:
 "Two patches are usual stuff.

  The bigger patch is needed to correct a wrong decision made in this
  merge window.  We hoped to get the PIOQUEUE mode in the mxs driver
  working with DMA, but it turned out to be too broken (leading to data
  loss), so we now think it is best to remove it entirely and work only
  with DMA now.  The patch should be in 3.7.  IMO, so users never get
  the chance to use both modes in parallel."

* 'i2c-embedded/for-current' of git://git.pengutronix.de/git/wsa/linux:
  i2c: tegra: set irq name as device name
  i2c-nomadik: Fixup clock handling
  i2c: mxs: remove broken PIOQUEUE support