- 20 2月, 2018 1 次提交
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由 Marcin Nowakowski 提交于
This module registers crc32 and crc32c algorithms that use the optional CRC32[bhwd] and CRC32C[bhwd] instructions in MIPSr6 cores. Signed-off-by: NMarcin Nowakowski <marcin.nowakowski@mips.com> Signed-off-by: NJames Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: linux-mips@linux-mips.org Cc: linux-crypto@vger.kernel.org Acked-by: NHerbert Xu <herbert@gondor.apana.org.au> Patchwork: https://patchwork.linux-mips.org/patch/18601/ [jhogan@kernel.org: Add CRYPTO_ALG_OPTIONAL_KEY flag on Eric Biggers' suggestion, due to commit a208fa8f ("crypto: hash - annotate algorithms taking optional key") in v4.16-rc1]
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- 06 2月, 2018 2 次提交
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由 Ralf Baechle 提交于
Maybe once upon a time the select of ARCH_MIGHT_HAVE_PC_SERIO used to make sense. These days MIPS platforms long have done away with i8042 or PS/2 style keyboard and mouse ports and embedded systems probably never had them anyway so push the select down to the level of individual platforms. Fixes: f2d0b0d5 ("MIPS: ranchu: Add Ranchu as a new generic-based board") Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Signed-off-by: NJames Hogan <jhogan@kernel.org>
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由 Ralf Baechle 提交于
Maybe once upon a time the select of ARCH_MIGHT_HAVE_PC_PARPORT used to make sense. These days MIPS platforms long have done away with parallel ports and embedded systems probably never had one anyway so push the select down to the level of individual platforms. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Signed-off-by: NJames Hogan <jhogan@kernel.org>
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- 02 2月, 2018 1 次提交
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由 Ulf Magnusson 提交于
Blank help texts are probably either a typo, a Kconfig misunderstanding, or some kind of half-committing to adding a help text (in which case a TODO comment would be clearer, if the help text really can't be added right away). Best to remove them, IMO. Signed-off-by: NUlf Magnusson <ulfalizer@gmail.com> Acked-by: NRandy Dunlap <rdunlap@infradead.org> Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 24 1月, 2018 1 次提交
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由 Aaro Koskinen 提交于
Enable ZBOOT support. The WRT54GL router's bootloader limits kernel size to 3 MB with the normal load address, which is a bit challenging vmlinux size with modern Linux. A compressed kernel allows booting much bigger kernels. Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18492/Signed-off-by: NJames Hogan <jhogan@kernel.org>
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- 19 1月, 2018 2 次提交
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由 Corentin Labbe 提交于
MIPS_GENERIC selects some options conditional on BIG_ENDIAN which does not exist. Replace BIG_ENDIAN with CPU_BIG_ENDIAN which is the correct kconfig name. Note that BMIPS_GENERIC does the same which confirms that this patch is needed. Fixes: eed0eabd ("MIPS: generic: Introduce generic DT-based board support") Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Reviewed-by: NJames Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 4.9+ Patchwork: https://patchwork.linux-mips.org/patch/18495/ [jhogan@kernel.org: Clean up commit message] Signed-off-by: NJames Hogan <jhogan@kernel.org>
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由 James Hogan 提交于
Since commit d41e6858 ("MIPS: Kconfig: Set default MIPS system type as generic") switched the default platform to the "generic" platform, allmodconfig has been failing with the following linker error (among other errors): arch/mips/kernel/vpe-mt.o In function `vpe_run': (.text+0x59c): undefined reference to `physical_memsize' The Lantiq platform already worked around the same issue in commit 9050d50e ("MIPS: lantiq: Set physical_memsize") by declaring physical_memsize with the initial value of 0 (on the assumption that the actual memory size will be hard-coded in the loaded VPE firmware), and the Malta platform already provided physical_memsize. Since all other platforms will fail to link with the VPE loader enabled, only allow Lantiq and Malta platforms to enable it, by way of a SYS_SUPPORTS_VPE_LOADER which is selected by those two platforms and which MIPS_VPE_LOADER depends on. SYS_SUPPORTS_MULTITHREADING is now a dependency of SYS_SUPPORTS_VPE_LOADER so that Kconfig emits a warning if SYS_SUPPORTS_VPE_LOADER is selected without SYS_SUPPORTS_MULTITHREADING. Fixes: d41e6858 ("MIPS: Kconfig: Set default MIPS system type as generic") Signed-off-by: NJames Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Crispin <john@phrozen.org> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Paul Burton <paul.burton@mips.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: linux-mips@linux-mips.org Tested-by: NGuenter Roeck <linux@roeck-us.net> Patchwork: https://patchwork.linux-mips.org/patch/18453/
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- 10 1月, 2018 2 次提交
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由 Matt Redfearn 提交于
Currently MIPS allnoconfig with CONFIG_BCM47XX=y fails to compile due to neither BCM47XX_BCMA nor BCM47XX_SSB being selected. This leads the enumeration in arch/mips/include/asm/mach-bcm47xx/bcm47xx.h to be empty, and compilation fails: In file included from arch/mips/bcm47xx/irq.c:32:0: ./arch/mips/include/asm/mach-bcm47xx/bcm47xx.h:34:1: error: expected identifier before '}' token }; ^ make[2]: *** [scripts/Makefile.build:314: arch/mips/bcm47xx/irq.o] Error 1 Fix this by ensuring that BCM47XX_SSB is selected if BCM47XX_BCMA is not. This allows us to select either system or both, but not neither. Signed-off-by: NMatt Redfearn <matt.redfearn@mips.com> Cc: James Hogan <james.hogan@mips.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17703/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Christoph Hellwig 提交于
phys_to_dma, dma_to_phys and dma_capable are helpers published by architecture code for use of swiotlb and xen-swiotlb only. Drivers are not supposed to use these directly, but use the DMA API instead. Move these to a new asm/dma-direct.h helper, included by a linux/dma-direct.h wrapper that provides the default linear mapping unless the architecture wants to override it. In the MIPS case the existing dma-coherent.h is reused for now as untangling it will take a bit of work. Signed-off-by: NChristoph Hellwig <hch@lst.de> Acked-by: NRobin Murphy <robin.murphy@arm.com>
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- 14 11月, 2017 2 次提交
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由 Ben Hutchings 提交于
__cmpxchg64_local_generic() is atomic only w.r.t tasks and interrupts on the same CPU (that's what the 'local' means). We can't use it to implement cmpxchg64() in SMP configurations. So, for 32-bit SMP configurations: - Don't define cmpxchg64() - Don't enable HAVE_VIRT_CPU_ACCOUNTING_GEN, which requires it Fixes: e2093c7b ("MIPS: Fall back to generic implementation of ...") Fixes: bb877e96 ("MIPS: Add support for full dynticks CPU time accounting") Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Deng-Cheng Zhu <dengcheng.zhu@mips.com> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 4.1+ Patchwork: https://patchwork.linux-mips.org/patch/17413/Signed-off-by: NJames Hogan <jhogan@kernel.org>
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由 Justin Chen 提交于
HW interrupts triggered when irq_disable() were being ignored. Enable resending HW interrupts as SW interrupts. This was causing an issue where the interrupts waking the system up from a suspend state were not calling their interrupt handlers. Signed-off-by: NJustin Chen <justinpopo6@gmail.com> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16116/Signed-off-by: NJames Hogan <jhogan@kernel.org>
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- 09 11月, 2017 2 次提交
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Use the generic platform code and remove arch/mips/xilfpga Signed-off-by: NZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15847/ [jhogan@kernel.org: Update arch/mips/Makefile snippet and move to end] Signed-off-by: NJames Hogan <jhogan@kernel.org>
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由 Matt Redfearn 提交于
The generic MIPS system type allows building a board agnostic kernel and should be the default starting point for users, so set it as the default system type in Kconfig. Since ip22 is no longer the default, update ip22_defconfig to select CONFIG_SGI_IP22. Signed-off-by: NMatt Redfearn <matt.redfearn@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Howells <dhowells@redhat.com> Cc: Borislav Petkov <bp@suse.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14714/Signed-off-by: NJames Hogan <jhogan@kernel.org>
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- 08 11月, 2017 2 次提交
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由 Jonas Gorski 提交于
Enable clkdev lookup support to allow us providing clocks under different names to devices more easily, so we don't need to care about clock name clashes anymore. Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NJonas Gorski <jonas.gorski@gmail.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Russell King <linux@armlinux.org.uk> Cc: linux-mips@linux-mips.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Patchwork: https://patchwork.linux-mips.org/patch/17325/Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Signed-off-by: NJames Hogan <jhogan@kernel.org>
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由 David Daney 提交于
In systems where the CPU id space is sparse, this allows a smaller NR_CPUS to be chosen, thus keeping internal data structures smaller. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NCarlos Munoz <cmunoz@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17388/ [jhogan@kernel.org: Add depends on SMP to fix "warning: symbol value '' invalid for MIPS_NR_CPU_NR_MAP"] Signed-off-by: NJames Hogan <jhogan@kernel.org>
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- 02 11月, 2017 1 次提交
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由 Greg Kroah-Hartman 提交于
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 30 8月, 2017 2 次提交
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由 Paul Burton 提交于
On systems that support MT ASE multithreading (ie. VPEs) we are very likely to want to include that support as default. Rather than setting it in various defconfigs, simply make CONFIG_MIPS_MT_SMP default y such that systems which select CONFIG_SYS_SUPPORTS_MULTITHREADING get it by default. As well as allowing us to remove the selection of CONFIG_MIPS_MT_SMP from various defconfigs, this also allows the generated generic defconfigs which derive from generic_defconfig to automatically gain support for MT ASE SMP when building for a suitable (pre-MIPSr6) ISA. For malta_kvm_guest_defconfig CONFIG_MIPS_MT_SMP is explicitly disabled since enabling SMP implicitly disables CONFIG_KVM_GUEST, which depends on CONFIG_BROKEN_ON_SMP. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16947/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Paul Burton 提交于
Modify the functions we use to read information about the topology of the system (the number of cores, VPs & IOCUs that it contains) in order to take into account multiple clusters, and provide a new function to determine the number of clusters in the system. Users of these functions are modified only such that they continue to build successfully - having them actually handle multiple clusters is left to further patches. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17016/ Patchwork: https://patchwork.linux-mips.org/patch/17218/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 29 8月, 2017 2 次提交
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由 Paul Burton 提交于
Move _save_fp(), _restore_fp(), _save_msa(), _restore_msa(), _init_msa_upper() & _init_fpu() out of r4k_switch.S & into r4k_fpu.S. This allows us to clean up the way in which Octeon includes the default r4k implementations of these FP functions despite replacing resume(), and makes CONFIG_R4K_FPU more straightforwardly represent all configurations that have an R4K-style FPU, including Octeon. Besides cleaning up this will be useful for later patches which disable FP support. [ralf@linux-mips.org: Fixed build issues reported by Arnd Bergmann <arnd@arndb.de>] Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16237/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Paul Burton 提交于
The kernel contains a small amount of incomplete code aimed at supporting old R6000 CPUs. This is: - Unused, as no machine selects CONFIG_SYS_HAS_CPU_R6000. - Broken, since there are glaring errors such as r6000_fpu.S moving the FCSR register to t1, then ignoring it & instead saving t0 into struct sigcontext... - A maintenance headache, since it's code that nobody can test which nevertheless imposes constraints on code which it shares with other machines. Remove this incomplete & broken R6000 CPU support in order to clean up and in preparation for changes which will no longer need to consider dragging the pretense of R6000 support along with them. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16236/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 08 8月, 2017 1 次提交
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由 Paul Burton 提交于
We don't currently support the MT ASE for microMIPS kernels, and there are no CPUs currently in existence that use both. They can however both be enabled in Kconfig, resulting in build failures such as: AS arch/mips/kernel/cps-vec.o arch/mips/kernel/cps-vec.S: Assembler messages: arch/mips/kernel/cps-vec.S:242: Warning: the 32-bit microMIPS architecture does not support the `mt' extension arch/mips/kernel/cps-vec.S:276: Error: unrecognized opcode `mttc0 $13,$2,2' arch/mips/kernel/cps-vec.S:282: Error: unrecognized opcode `mttc0 $8,$1,2' arch/mips/kernel/cps-vec.S:285: Error: unrecognized opcode `mttc0 $0,$2,1' ... Fix this by preventing MT from being enabled when targeting microMIPS. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16951/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 11 7月, 2017 1 次提交
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由 James Hogan 提交于
MIPS selects HAVE_SYSCALL_TRACEPOINTS twice. The first was added back in v3.13 by commit 2d7bf993e073 ("MIPS: ftrace: Add support for syscall tracepoints."), but then a second redundant one was added in v4.2 by commit fb59e394 ("MIPS: ftrace: Enable support for syscall tracepoints."). Drop the duplicate select. Fixes: fb59e394 ("MIPS: ftrace: Enable support for syscall tracepoints.") Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16654/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 29 6月, 2017 4 次提交
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由 Paul Burton 提交于
CONFIG_MIPS_PGD_C0_CONTEXT, which allows a pointer to the page directory to be stored in the cop0 Context register when enabled, was previously only allowed for MIPSr2. MIPSr6 is just as able to make use of it, so allow it there too. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16204/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Paul Burton 提交于
Prior to MIPSr6 multithreading is only supported if CONFIG_MIPS_MT_SMP is enabled, so CONFIG_MIPS_MT_SMP selects CONFIG_SYS_SUPPORTS_SCHED_SMT. With MIPSr6 the CONFIG_MIPS_CPS SMP implementation always supports multithreading, so have it select CONFIG_SYS_SUPPORTS_SCHED_SMT in order to allow the scheduler to make better informed decisions on multithreaded MIPSr6 systems (for example those using I6400 or I6500 CPUs). Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16195/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Paul Burton 提交于
This patch switches MIPS to make use of generically implemented queued spinlocks, rather than the ticket spinlocks used previously. This allows us to drop a whole load of inline assembly, share more generic code, and is also a performance win. Results from running the AIM7 short workload on a MIPS Creator Ci40 (ie. 2 core 2 thread interAptiv CPU clocked at 546MHz) with v4.12-rc4 pistachio_defconfig, with ftrace disabled due to a current bug, and both with & without use of queued rwlocks & spinlocks: Forks | v4.12-rc4 | +qlocks | Change -------|-----------|----------|-------- 10 | 52630.32 | 53316.31 | +1.01% 20 | 51777.80 | 52623.15 | +1.02% 30 | 51645.92 | 52517.26 | +1.02% 40 | 51634.88 | 52419.89 | +1.02% 50 | 51506.75 | 52307.81 | +1.02% 60 | 51500.74 | 52322.72 | +1.02% 70 | 51434.81 | 52288.60 | +1.02% 80 | 51423.22 | 52434.85 | +1.02% 90 | 51428.65 | 52410.10 | +1.02% The kernels used for these tests also had my "MIPS: Hardcode cpu_has_* where known at compile time due to ISA" patch applied, which allows the kernel_uses_llsc checks in cmpxchg() & xchg() to be optimised away at compile time. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16358/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Paul Burton 提交于
This patch switches MIPS to make use of generically implemented queued read/write locks, rather than the custom implementation used previously. This allows us to drop a whole load of inline assembly, share more generic code, and is also a performance win. Results from running the AIM7 short workload on a MIPS Creator Ci40 (ie. 2 core 2 thread interAptiv CPU clocked at 546MHz) with v4.12-rc4 pistachio_defconfig, with ftrace disabled due to a current bug, and both with & without use of queued rwlocks & spinlocks: Forks | v4.12-rc4 | +qlocks | Change -------|-----------|----------|-------- 10 | 52630.32 | 53316.31 | +1.01% 20 | 51777.80 | 52623.15 | +1.02% 30 | 51645.92 | 52517.26 | +1.02% 40 | 51634.88 | 52419.89 | +1.02% 50 | 51506.75 | 52307.81 | +1.02% 60 | 51500.74 | 52322.72 | +1.02% 70 | 51434.81 | 52288.60 | +1.02% 80 | 51423.22 | 52434.85 | +1.02% 90 | 51428.65 | 52410.10 | +1.02% The kernels used for these tests also had my "MIPS: Hardcode cpu_has_* where known at compile time due to ISA" patch applied, which allows the kernel_uses_llsc checks in cmpxchg() & xchg() to be optimised away at compile time. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16357/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 28 6月, 2017 1 次提交
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由 David Daney 提交于
Since the eBPF machine has 64-bit registers, we only support this in 64-bit kernels. As of the writing of this commit log test-bpf is showing: test_bpf: Summary: 316 PASSED, 0 FAILED, [308/308 JIT'ed] All current test cases are successfully compiled. Many examples in samples/bpf are usable, specifically tracex5 which uses tail calls works. Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Daniel Borkmann <daniel@iogearbox.net> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16369/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 27 6月, 2017 1 次提交
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由 Matt Redfearn 提交于
Sort the entries in config MIPS alphabetically so as to make entries easier to find. Signed-off-by: NMatt Redfearn <matt.redfearn@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16068/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 22 5月, 2017 1 次提交
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由 Paul Cercueil 提交于
There is a pinctrl driver for each of the Ingenic SoCs supported by the upstream Linux kernel. In order to switch away from the old GPIO platform code, we now enable the pinctrl drivers by default for the Ingenic SoCs. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 4月, 2017 2 次提交
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Al Viro 提交于
all architectures converted Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 13 4月, 2017 1 次提交
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由 Paul Burton 提交于
We declare CONFIG_ARCH_HAS_ILOG2_U32 & CONFIG_ARCH_HAS_ILOG2_U64 in Kconfig, but they are always false since nothing ever selects them. The generic fls-based implementation is efficient for MIPS anyway. Remove the redundant Kconfig entries. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15840/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 12 4月, 2017 1 次提交
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由 James Cowgill 提交于
This the mips version of commit c1bd55f9 ("x86: opt into HAVE_COPY_THREAD_TLS, for both 32-bit and 64-bit"). Simply use the tls system call argument instead of extracting the tls argument by magic from the pt_regs structure. See commit 3033f14a ("clone: support passing tls argument via C rather than pt_regs magic") for more background. Signed-off-by: NJames Cowgill <James.Cowgill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15855/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 10 4月, 2017 3 次提交
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由 Huacai Chen 提交于
Some newer Loongson-3 have 64 bytes cache lines, so select MIPS_L1_CACHE_SHIFT_6. Signed-off-by: NHuacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J . Hill <Steven.Hill@caviumnetworks.com> Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15755/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Alex Belits 提交于
Some users must have 4K pages while needing a 48-bit VA space size. The cleanest way do do this is to go to a 4-level page table for this case. Each page table level using order-0 pages adds 9 bits to the VA size (at 4K pages, so for four levels we get 9 * 4 + 12 == 48-bits. For the 4K page size case only we add support functions for the PUD level of the page table tree, also the TLB exception handlers get an extra level of tree walk. [david.daney@cavium.com: Forward port to v4.10.] [david.daney@cavium.com: Forward port to v4.11.] Signed-off-by: NAlex Belits <alex.belits@cavium.com> Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Alex Belits <alex.belits@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15312/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Marcin Nowakowski 提交于
Add missing macros and methods that are required by CONFIG_GENERIC_CPU_AUTOPROBE: MAX_CPU_FEATURES, cpu_have_feature(), cpu_feature(). Also set a default elf platform as currently it is not set for most MIPS platforms resulting in incorrectly specified modalias values in cpu autoprobe ("cpu:type:(null):feature:..."). Export 'elf_hwcap' symbol so that it can be accessed from modules that use module_cpu_feature_match() Signed-off-by: NMarcin Nowakowski <marcin.nowakowski@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15395/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 06 4月, 2017 1 次提交
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 28 3月, 2017 1 次提交
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由 James Hogan 提交于
Octeon III has VZ ASE support, so allow KVM to be enabled on Octeon CPUs as it should now be functional. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Daney <david.daney@cavium.com> Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org
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- 08 3月, 2017 1 次提交
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由 James Hogan 提交于
When a 32-bit kernel is configured to support MIPS64r6 (CPU_MIPS64_R6), MIPS_O32_FP64_SUPPORT won't be selected as it should be because MIPS32_O32 is disabled (o32 is already the default ABI available on 32-bit kernels). This results in userland FP breakage as CP0_Status.FR is read-only 1 since r6 (when an FPU is present) so __enable_fpu() will fail to clear FR. This causes the FPU emulator to get used which will incorrectly emulate 32-bit FPU registers. Force o32 fp64 support in this case by also selecting MIPS_O32_FP64_SUPPORT from CPU_MIPS64_R6 if 32BIT. Fixes: 4e9d324d ("MIPS: Require O32 FP64 support for MIPS64 with O32 compat") Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Reviewed-by: NPaul Burton <paul.burton@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 4.0.x- Patchwork: https://patchwork.linux-mips.org/patch/15310/Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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- 09 2月, 2017 1 次提交
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由 Markus Mayer 提交于
Turn on CPU_SUPPORTS_CPUFREQ and MIPS_EXTERNAL_TIMER for BMIPS. Signed-off-by: NMarkus Mayer <mmayer@broadcom.com> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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