Enables the ixp4xx platforms to use Generic time-of-day.
Signed-off-by: NKevin Hilman <khilman@mvista.com>
Acked-by: NJohn Stultz <johnstul@us.ibm.com>
Signed-off-by: NDeepak Saxena <dsaxena@plexity.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds Generic time-of-day support for the ARM architecture.

The support is currently added using #ifdef's so that it can support
sub-arches that do not (yet) have a clocksource added.  As sub-arches
add clocksource support, they should 'select GENERIC_TIME'
Signed-off-by: NDeepak Saxena <dsaxena@mvista.com>
Signed-off-by: NDaniel Walker <dwalker@mvista.com>
Signed-off-by: NKevin Hilman <khilman@mvista.com>
Acked-by: NJohn Stultz <johnstul@us.ibm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add names to all the irq_chip structes
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Apply consistant tabbing to the IRQ chip
structures in arch/arm/mach-s3c2410/irq.c
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The demux code for the IRQ EINTs above 3 was
using find last set instead of finding first
set.

Also fix it so that we only check EINT4..7
when the parent EINT4t7 goes off, and the
8..23 when EINT8t23 goes off.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

In nommu mode, the exception vector location depends on the platforms.
Some of the implementations may have some special exception control
forwarding method in their ROM/flash and for some of them has its own
re-mapping mechanism by the h/w.

This patch introduces a special configuration CONFIG_CPU_HIGH_VECTOR which
turns on the CR_V bit in nommu mode. The CR_V bit is turned off by default.
This feature depends on CP15 and does not supported by ARM740.
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

There is no FSR/FAR register on no-CP15 or MPU cores. This patch adds a
dummy abort handler which returns zero for the base restored Data Abort
model !CPU_CP15_MMU cores. The abort-lv4t.S is still used with the fix-up
for the base updated Data Abort model cores.
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch removes the static memory mapping for the currently-unused
peripherals [Synchronous Serial, Timer/Counter unit], and for those
drivers that already ioremap() their registers [UART].

Also, the Ethernet driver now uses the platform_device resources but
doesn't yet use ioremap() so we need to pass it the virtual address
instead of the physical address.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds support for the NAND flash on the Atmel AT91RM9200-DK
and KwikByte KB920x boards.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds the hardware register definitions for the TWI (I2C)
controller found on the AT91RM9200 and AT91SAM9xx processors.
It also defines the AIC Fast-Forcing registers added to the AT91SAM9's.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch makes the AT91 gpio.c support processor-generic (AT91RM9200
and AT91SAM9xxx).  The GPIO controllers supported by a particular AT91
processor are defined in the processor-specific file and are registered
with gpio.c at startup.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch makes the AT91 clock.c support processor-generic (AT91RM9200
and AT91SAM9xxx).  The clocks supported by a particular AT91 processor
are defined in the processor-specific file and are registered with
clock.c at startup.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This is more preparation for adding support for the new Atmel AT91SAM9
processors.

Changes include:
- Replace AT91_BASE_* with AT91RM9200_BASE_*
- Replace AT91_ID_* with AT91RM9200_ID_*
- ROM, SRAM and UHP address definitions moved to at91rm9200.h.
- The raw AT91_P[ABCD]_* definitions are now depreciated in favour of
the GPIO API.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

this patch registers the wakeup irq, sets a gpio pin to indicate the
status of system for suspend/resume operations, and adds the machine to
the supported machines for use with the simtec-pm
Signed-off-by: NDavid Anders <danders@amltd.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Switch arch/arm/kernel/apm.c from using kernel_thread - whose export
is deprecated - to kthread.
Signed-off-by: NSerge E. Hallyn <serue@us.ibm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

hi,

a quick find -iname \*.[ch] | xargs grep "> ARRAY_SIZE(", revealed
these in the icst drivers.
If i == ARRAY_SIZE, we get past the idx2s array.
Signed-off-by: NEric Sesterhenn <snakebyte@gmx.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds another hook into sharpsl_pm to notify the machine
specific driver immediately after resume. This is needed to support the Sharp SL-6000 (Tosa).
Signed-off-by: NDirk Opfer <Dirk@Opfer-Online.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Locomo chip has a SPI interface which is used for SD/MMC cards (only collie).
This patch adds the definition for the SPI device inside the Locomo chip.
Signed-off-by: NDirk Opfer <Dirk@Opfer-Online.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert LOMOMO to use struct device * for GPIOs instead of struct
locomo_dev. This enables access to the GPIOs from code which is not
a locomo device itself (such as audio). Access for gpio 31 is removed
for error handling (no such hardware exists).
Signed-off-by: NRichard Purdie <rpurdie@rpsys.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Three of the generic cache method options were using explicit CPU
types, whereas they could use the CPU_CACHE_* definitions instead.
Switch them over to use the CPU_CACHE_* definitions.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Don't offer non-MMU based CPUs for selection when CONFIG_MMU is
set.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds ARM946E-S core support which has typically 8KB I&D cache.
It has a MPU and supports ARMv5TE instruction set.

Because the ARM946E-S core can be synthesizable with various cache size,
CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations.
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds ARM940T core support which has 4KB D-cache, 4KB I-cache
and a MPU.
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds ARM9TDMI core support which has no cache and no CP15
register(no memory control unit).
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds ARM740T core support which has a MPU and 4KB or 8KB cache.
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds ARM7TDMI core support which has no cache and no CP15
register(no memory control unit).
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

All the current CP15 access codes in ARM arch can be categorized and
conditioned by the defines as follows:

     Related operation	Safe condition
  a. any CP15 access	!CPU_CP15
  b. alignment trap	CPU_CP15_MMU
  c. D-cache(C-bit)	CPU_CP15
  d. I-cache		CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 ||
				CPU_ARM720 || CPU_ARM740 ||
				CPU_XSCALE || CPU_XSC3 )
  e. alternate vector	CPU_CP15 && !CPU_ARM740
  f. TTB		CPU_CP15_MMU
  g. Domain		CPU_CP15_MMU
  h. FSR/FAR		CPU_CP15_MMU

For example, alternate vector is supported if and only if
"CPU_CP15 && !CPU_ARM740" is satisfied.
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

By merging of uClinux/ARM, we need to treat various CPU cores which have
MMU, MPU or even none for memory management. The memory management
coprocessors are controlled by CP15 register set and the ARM core family
can be categorized by 5 groups by the register ;
  G-a. CP15 is MMU : 610, 710, 720, 920, 922, 925, 926, 1020, 1020e, 1022,
		v6 and the derivations sa1100, sa110, xscale, xsc3.
  G-b. CP15 is MPU : 740, 940, 946, 996, 1156.
  G-c. CP15 is MPU or MMU : 1026 (selectable by schematic design)
  G-d. CP15 is exist, but nothing for memory managemnt : 966, 968.
  G-e. no-CP15 : 7tdmi, 9tdmi, 9e, 9ej

This patch defines CPU_CP15, CPU_CP15_MMU and CPU_CP15_MPU. Thus the
family can be defined as :
  - CPU_CP15 only : G-d
  - CPU_CP15_MMU(implies CPU_CP15) : G-a, G-c(selectable)
  - CPU_CP15_MPU(implies CPU_CP15) : G-b, G-c(selectable)
  - !CPU_CP15 : G-e
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

A simple patch to support module in nommu mode.
The vmalloc is used instead of __vmalloc_area which depends on CONFIG_MMU.
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Since do_bad_area() always takes the currently active task and
(supposed to) take the currently active MM, there's no point passing
them to this function.  Instead, obtain references to them inside
do_bad_area().
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add an empty setup_mm_for_reboot() function for nommu machines.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

mm-armv.c now only contains the pgd allocation/freeing code, so
rename it to have a more sensible filename.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

If we're going to have mmu.c for code which is specific to the MMU
machines, we might as well move the other MMU initialisation
specific code from mm-armv.c into this new file.  This also allows
us to make some functions static.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Move the MMU specific code from init.c into mmu.c, and add nommu
fixups to nommu.c
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

nommu does not require the page table manipulation code in the
bootmem initialisation paths.  Move this into separate inline
functions.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The ARM Versatile board PCI config space read routines are broken for byte
accesses.  The access uses a byte read, so masking the bottom two bits of the
address is wrong.

I guess this is a cut/paste error from the the halfword code which uses
aligned word access+shift+mask.
Signed-off-by: NPaul Brook <paul@codesourcery.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The ARM XIP_KERNEL map created in devicemaps_init() is wrong.
The map.pfn is rounded down to an even 1MiB section boundary
which results in va/pa translations errors when XIP_PHYS_ADDR
starts on an odd 1MiB boundary and this causes the kernel to
hang.  This patch fixes ARM XIP_KERNEL translation errors for
the odd 1MiB XIP_PHYS_ADDR boundary case.
Signed-off-by: NGeorge G. Davis <gdavis@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add S3C2412 power management code, and move the
core register saving in from s3c2412.c
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>