- 17 7月, 2014 1 次提交
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由 Thierry Reding 提交于
In order to not clutter the include/linux directory with SoC specific headers, move the Tegra-specific headers out into a separate directory. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 17 4月, 2014 1 次提交
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由 Lucas Stach 提交于
Use new OF interrupt mapping (of_irq_parse_and_map_pci()) when possible. This is the recommended method of doing the IRQ mapping. For old devicetrees we fall back to the previous practice. This allows interrupts to be remapped across bridges. Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 15 4月, 2014 1 次提交
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由 Lucas Stach 提交于
Use new OF interrupt mapping (of_irq_parse_and_map_pci()) when possible. This is the recommended method of doing the IRQ mapping. For old devicetrees we fall back to the previous practice. This allows interrupts to be remapped across bridges. Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 12 12月, 2013 2 次提交
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由 Stephen Warren 提交于
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Acked-By: NTerje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: NThierry Reding <treding@nvidia.com> Acked-by: NThierry Reding <treding@nvidia.com>
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由 Stephen Warren 提交于
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. The old Tegra-specific API used a struct clock to represent the module to reset. Some of the clocks retrieved during probe() were only used for reset purposes, and indeed aren't even true clocks. So, there's no need to get() them any more. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NThierry Reding <treding@nvidia.com> Acked-by: NThierry Reding <treding@nvidia.com>
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- 08 12月, 2013 1 次提交
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由 Eric Brower 提交于
Tegra20 and Tegra30 do not support gen2 PCIe, so correct the register setting to disable it. Signed-off-by: NEric Brower <ebrower@nvidia.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NThierry Reding <treding@nvidia.com>
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- 15 11月, 2013 1 次提交
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由 Bjorn Helgaas 提交于
Fix whitespace, capitalization, and spelling errors. No functional change. I know "busses" is not an error, but "buses" was more common, so I used it consistently. Signed-off-by: Marta Rybczynska <rybczynska@gmail.com> (pci_reset_bridge_secondary_bus()) Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 26 9月, 2013 1 次提交
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由 Jingoo Han 提交于
Added missing __iomem annotation in order to fix the following sparse warnings: drivers/pci/host/pci-tegra.c:411:41: warning: incorrect type in return expression (different address spaces) drivers/pci/host/pci-tegra.c:411:41: expected void [noderef] <asn:2>* drivers/pci/host/pci-tegra.c:411:41: got void *addr drivers/pci/host/pci-tegra.c:419:25: warning: incorrect type in return expression (different address spaces) drivers/pci/host/pci-tegra.c:419:25: expected void [noderef] <asn:2>* drivers/pci/host/pci-tegra.c:419:25: got void *addr Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NThierry Reding <treding@nvidia.com>
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- 30 8月, 2013 1 次提交
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由 Julia Lawall 提交于
Use devm_ioremap_resource instead of devm_request_and_ioremap. This was done using the semantic patch scripts/coccinelle/api/devm_ioremap_resource.cocci Error-handling code was manually removed from the associated calls to platform_get_resource. Adjust the comment at the third platform_get_resource_byname to make clear why ioremap is not done at this point. Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Acked-by: NThierry Reding <treding@nvidia.com> Tested-by: NThierry Reding <treding@nvidia.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 14 8月, 2013 4 次提交
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由 Stephen Warren 提交于
Tegra20 HW appears to have a bug such that PCIe device interrupts, whether they are legacy IRQs or MSI, are lost when LP2 is enabled. To work around this, simply disable LP2 if any PCIe devices with interrupts are present. Detect this via the IRQ domain map operation. This is slightly over-conservative; if a device with an interrupt is present but the driver does not actually use them, LP2 will still be disabled. However, this is a reasonable trade-off which enables a simpler workaround. Signed-off-by: NStephen Warren <swarren@nvidia.com> Tested-by: NThierry Reding <treding@nvidia.com> Acked-by: NThierry Reding <treding@nvidia.com>
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由 Stephen Warren 提交于
The registers PADS_REFCLK_CFG are an array of 16-bit data, one entry per PCIe root port. For Tegra30, we therefore need to write a 3rd entry in this array. Doing so makes the mini-PCIe slot on Beaver operate correctly. While we're at it, add some #defines to partially document the fields within these 16-bit values. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Jay Agarwal 提交于
Introduce a data structure to parameterize the driver according to SoC generation, add Tegra30 specific code and update the device tree binding document for Tegra30 support. Signed-off-by: NJay Agarwal <jagarwal@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Thierry Reding 提交于
Move the PCIe driver from arch/arm/mach-tegra into the drivers/pci/host directory. The motivation is to collect various host controller drivers in the same location in order to facilitate refactoring. The Tegra PCIe driver has been largely rewritten, both in order to turn it into a proper platform driver and to add MSI (based on code by Krishna Kishore <kthota@nvidia.com>) as well as device tree support. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> [swarren, split DT changes into a separate patch in another branch] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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