In order to not clutter the include/linux directory with SoC specific
headers, move the Tegra-specific headers out into a separate directory.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Merge quoted strings that are broken across lines into a single entity.
The compiler merges them anyway, but checkpatch complains about it, and
merging them makes it easier to grep for strings.

No functional change.

[bhelgaas: changelog, do the same for everything under drivers/pci]
Signed-off-by: NRyan Desfosses <ryan@desfo.org>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

Fix various whitespace errors.

No functional change.

[bhelgaas: fix other similar problems]
Signed-off-by: NRyan Desfosses <ryan@desfo.org>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

Add support for a generic PCI host controller, such as a
firmware-initialised device with static windows or an emulation by
something such as kvmtool.

The controller itself has no configuration registers and has its address
spaces described entirely by the device-tree (using the bindings from
ePAPR).  Both CAM and ECAM are supported for Config Space accesses.

Add corresponding documentation for the DT binding.

[bhelgaas: currently uses the ARM-specific pci_common_init_dev() interface]
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NLiviu Dudau <liviu.dudau@arm.com>

This patch adds support for Message Signaled Interrupts in the imx6-pcie
driver.
Signed-off-by: NHarro Haan <hrhaan@gmail.com>
Signed-off-by: NJuergen Beisert <jbe@pengutronix.de>
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NRichard Zhu <r65037@freescale.com>

On i.MX6 the host controller MSI IRQ is shared with PCI legacy INTD.  Make
sure we don't bail too early from the IRQ handler.

The issue is fairly theoretical as it would require a system setup with a
PCIe switch where one connected device is using legacy INTD and another one
using MSI, but better fix it now.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Acked-by: NRichard Zhu <r65037@freescale.com>

They are dropped with the new binding.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NRichard Zhu <r65037@freescale.com>

We don't need this anymore.  The IRQs are now properly mapped through the
DT.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NRichard Zhu <r65037@freescale.com>

As defined in the new binding.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NRichard Zhu <r65037@freescale.com>

imx6_add_pcie_port() is called only from from imx6_pcie_probe() which is
annotated with __init.  Thus it makes sense to annotate
imx6_add_pcie_port() with __init to avoid section mismatch warnings.

[bhelgaas: changelog]
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Cc: Sean Cross <xobs@kosagi.com>

add_pcie_port() is called only from exynos_pcie_probe(), which is annotated
with __init.  Thus it makes sense to annotate add_pcie_port() with __init
to avoid the following section mismatch warning:

  WARNING: drivers/pci/built-in.o(.text.unlikely+0xf8): Section mismatch in reference from the function add_pcie_port() to the function .init.text:dw_pcie_host_init()
    The function add_pcie_port() references
    the function __init dw_pcie_host_init().
    This is often because add_pcie_port lacks a __init
    annotation or the annotation of dw_pcie_host_init is wrong.

[bhelgaas: changelog]
Reported-by: Nkbuild test robot <fengguang.wu@intel.com>
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>

Add device tree probing support to the 'pci-rcar-gen2' driver.

[Sergei: numerous fixes/cleanups/additions]
[bhelgaas: whitespace fix]
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Add MSI support to the R-Car PCIe driver.
Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NLucas Stach <l.stach@pengutronix.de>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>

This PCIe Host driver currently does not support MSI, so cards fall back to
INTx interrupts.
Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>

The site-specific OOM messages are unnecessary, because they duplicate the
MM subsystem generic OOM message.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

Fix the following build warning that happens when building
multi_v7_defconfig with CONFIG_ARM_LPAE=y:

  drivers/pci/host/pci-mvebu.c:334:5: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'phys_addr_t' [-Wformat=]

Fix the warning by using '%pa' to printing 'phys_addr_t' type.  While at
it, also use the more standard notation [mem 0x-0x] for memory region.

[bhelgaas: make end address inclusive, remove extra spaces]
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Reviewed-by: NJingoo Han <jg1.han@samsung.com>

Serialization of configuration accesses is provided by 'pci_lock' in
drivers/pci/access.c thus making the driver's 'conf_lock' superfluous.
Signed-off-by: NAndrew Murray <amurray@embedded-bits.co.uk>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>

MBus windows are used on Marvell platforms to map certain peripherals
in the physical address space. In the PCIe context, MBus windows are
needed to map PCIe I/O and memory regions in the physical address.

However, those MBus windows can only have power of two sizes, while
PCIe BAR do not necessarily guarantee this. For this reason, the
current pci-mvebu breaks on platforms where PCIe devices have BARs
that don't sum up to a power of two size at the emulated bridge level.

This commit fixes this by allowing the pci-mvebu driver to create
multiple contiguous MBus windows (each having a power of two size) to
cover a given PCIe BAR.

To achieve this, two functions are added: mvebu_pcie_add_windows() and
mvebu_pcie_del_windows() to respectively add and remove all the MBus
windows that are needed to map the provided PCIe region base and
size. The emulated PCI bridge code now calls those functions, instead
of directly calling the mvebu-mbus driver functions.

Fixes: 45361a4f ('pci: PCIe driver for Marvell Armada 370/XP systems')
Cc: <stable@vger.kernel.org> # v3.11+
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397823593-1932-8-git-send-email-thomas.petazzoni@free-electrons.comTested-by: NNeil Greatorex <neil@fatboyfat.co.uk>
Acked-by: NBjorn Helgaas <bhelgaas@google.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

mvebu_pcie_handle_membase_change() and
mvebu_pcie_handle_iobase_change() do not correctly compute the window
size. PCI uses an inclusive start/end address pair, which requires a
+1 when converting to size.

This only worked because a bug in the mbus driver allowed it to
silently accept and round up bogus sizes.

Fix this by adding one to the computed size.

Fixes: 45361a4f ('PCIe driver for Marvell Armada 370/XP systems')
Cc: <stable@vger.kernel.org> # v3.11+
Signed-off-by: NWilly Tarreau <w@1wt.eu>
Reviewed-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397823593-1932-5-git-send-email-thomas.petazzoni@free-electrons.comTested-by: NNeil Greatorex <neil@fatboyfat.co.uk>
Acked-by: NBjorn Helgaas <bhelgaas@google.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Use new OF interrupt mapping (of_irq_parse_and_map_pci()) when possible.
This is the recommended method of doing the IRQ mapping.  For old
devicetrees we fall back to the previous practice.

This allows interrupts to be remapped across bridges.
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Use new OF interrupt mapping (of_irq_parse_and_map_pci()) when possible.
This is the recommended method of doing the IRQ mapping.  For old
devicetrees we fall back to the previous practice.

This allows interrupts to be remapped across bridges.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>

Use new OF interrupt mapping (of_irq_parse_and_map_pci()) when possible.
This is the recommended method of doing the IRQ mapping.  For old
devicetrees we fall back to the previous practice.

This makes INTB, INTC, and INTD work on i.MX.
Tested-by: NTim Harvey <tharvey@gateworks.com>
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NMarek Vasut <marex@denx.de>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NJingoo Han <jg1.han@samsung.com>

This patch corrects iATU programming for cfg1, io and mem viewport.  Enable
ATU only after configuring it.
Signed-off-by: NMohit Kumar <mohit.kumar@st.com>
Signed-off-by: NAjay Khandelwal <ajay.khandelwal@st.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Cc: stable@vger.kernel.org

Corrects comment for setting number of lanes.
Signed-off-by: NMohit Kumar <mohit.kumar@st.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>

Serialization of configuration accesses is provided by 'pci_lock' in
drivers/pci/access.c thus making the driver's 'conf_lock' superfluous.
Signed-off-by: NAndrew Murray <amurray@embedded-bits.co.uk>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Acked-by: NRichard Zhu <r65037@freescale.com>

Use new OF interrupt mapping (of_irq_parse_and_map_pci()) when possible.
This is the recommended method of doing the IRQ mapping.  For old
devicetrees we fall back to the previous practice.

This makes INTB, INTC, and INTD work on i.MX.
Tested-by: NTim Harvey <tharvey@gateworks.com>
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NMarek Vasut <marex@denx.de>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NJingoo Han <jg1.han@samsung.com>

This patch corrects iATU programming for cfg1, io and mem viewport.  Enable
ATU only after configuring it.
Signed-off-by: NMohit Kumar <mohit.kumar@st.com>
Signed-off-by: NAjay Khandelwal <ajay.khandelwal@st.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Cc: stable@vger.kernel.org

Corrects comment for setting number of lanes.
Signed-off-by: NMohit Kumar <mohit.kumar@st.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>

Use new OF interrupt mapping (of_irq_parse_and_map_pci()) when possible.
This is the recommended method of doing the IRQ mapping.  For old
devicetrees we fall back to the previous practice.

This allows interrupts to be remapped across bridges.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>

Use new OF interrupt mapping (of_irq_parse_and_map_pci()) when possible.
This is the recommended method of doing the IRQ mapping.  For old
devicetrees we fall back to the previous practice.

This allows interrupts to be remapped across bridges.
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>

There is no reason to care about irq_desc in that context, escpecially
as irq_data for that interrupt is retrieved as well.

Use the proper accessor for the msi descriptor
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Acked-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Cc: Mohit Kumar <mohit.kumar@st.com>
Cc: pci <linux-pci@vger.kernel.org>
Link: http://lkml.kernel.org/r/20140223212736.987803648@linutronix.deSigned-off-by: NThomas Gleixner <tglx@linutronix.de>

Update the R-Car Generation 2 PCI driver Kconfig dependencies to follow
same style as other drivers - no SoC dependencies.

Also, update the COMPILE_TEST bits to depend on ARM. This since the DMA
bounce buffer and dma_ops handling code is ARM specific.

[bhelgaas: adjust context after dropping DMABOUNCE patches]
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>

This patch handles the case where the PCIe link is up and running, yet
drops into the LTSSM training mode. The link spends short time in the LTSSM
training mode, but the current code can misinterpret it as the link being
stalled.  Waiting for the LTSSM training to complete fixes the issue.

Quoting Sascha:

  This is broken since commit 7f9f40c0 ('PCI: imx6: Report "link up"
  only after link training completes').

  The designware driver changes the PORT_LOGIC_SPEED_CHANGE bit in
  dw_pcie_host_init() which causes the link to be retrained. During the
  next call to dw_pcie_rd_conf() the link is then reported being down and
  the function returns PCIBIOS_DEVICE_NOT_FOUND resulting in nonfunctioning
  PCIe.

Fixes: 7f9f40c0 (PCI: imx6: Report "link up" only after link training completes)
Tested-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Tested-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>

The Synopsys PCIe core provides one pair of 32-bit BARs (BAR 0 and BAR 1).
The BARs can be configured as follows:

  - One 64-bit BAR: BARs 0 and 1 are combined to form a single 64-bit BAR
  - Two 32-bit BARs: BARs 0 and 1 are two independent 32-bit BARs

This patch corrects 64-bit, non-prefetchable memory BAR configuration
implemented in dw driver.
Signed-off-by: NMohit Kumar <mohit.kumar@st.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: stable@vger.kernel.org	# v3.12+

It is typical for host drivers to request a resource for the aperture; once
this is done the PCI core will properly populate resources for all BARs in
the system.

With this patch cat /proc/iomem will now show:

  e0000000-efffffff : PCI MEM 0000
    e0000000-e00fffff : PCI Bus 0000:01
      e0000000-e001ffff : 0000:01:00.0

Tested on Kirkwood.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>

Break out the hard coded window size code to allow dynamic setup. The
window size is still left at 1GiB but with this patch changing window size
is easy for testing.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>

Convert the code to allow per-device probe() like other device drivers.
This also delays driver registration due to change from subsys_initcall()
to regular module_platform_driver().
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>

The bridge logic at slot 0 only supports reads up to 0x40 and the rest of
the PCI configuration space for this slot is marked as reserved in the
manual.

Trying a read from offset 0x100 is producing an error from the bridge. With
error interrupts enabled, the following is printed:

  pci-rcar-gen2 ee0d0000.pci: error irq: status 00000014
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>

Add option to enable interrupts to report any errors from the AHB-PCI
bridge to help find any issues with the bridge when in use.
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>

The current code does not check the return from platform_get_irq() so add
an error check and return if this call does fail.
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>