1. 03 11月, 2007 3 次提交
  2. 30 10月, 2007 14 次提交
  3. 23 10月, 2007 3 次提交
  4. 20 10月, 2007 6 次提交
  5. 19 10月, 2007 3 次提交
  6. 18 10月, 2007 3 次提交
    • R
      [MIPS] Probe for usability of cp0 compare interrupt. · b0d4056d
      Ralf Baechle 提交于
      Some processors offer the option of using the interrupt on which
      normally the count / compare interrupt would be signaled as a normal
      interupt pin.  Previously this required some ugly hackery for each
      system which is much easier done by a quick and simple probe.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      b0d4056d
    • M
      [MIPS] SYNC emulation for MIPS I processors · 60b0d655
      Maciej W. Rozycki 提交于
      Userland, including the C library and the dynamic linker, is keen to use
      the SYNC instruction, even for "generic" MIPS I binaries these days.
      Which makes it less than useful on MIPS I processors.
      
      This change adds the emulation, but as our do_ri() infrastructure was not
      really prepared to take yet another instruction, I have rewritten it and
      its callees slightly as follows.
      
      Now there is only a single place a possible signal is thrown from.  The
      place is at the end of do_ri().  The instruction word is fetched in
      do_ri() and passed down to handlers.  The handlers are called in sequence
      and return a result that lets the caller decide upon further processing.
      If the result is positive, then the handler has picked the instruction,
      but a signal should be thrown and the result is the signal number.  If the
      result is zero, then the handler has successfully simulated the
      instruction.  If the result is negative, then the handler did not handle
      the instruction; to make it more obvious the calls do not follow the usual
      0/-Exxx result convention they now return -1 instead of -EFAULT.
      
      The calculation of the return EPC is now at the beginning.  The reason is
      it is easier to handle it there as emulation callees may modify a register
      and an instruction may be located in delay slot of a branch whose result
      depends on the register.  It has to be undone if a signal is to be raised,
      but it is not a problem as this is the slow-path case, and both actions
      are done in single places now rather than the former being scattered
      through emulation handlers.
      
      The part of do_cpu() being covered follows the changes to do_ri().
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      
      ---
      60b0d655
    • R
      [MIPS] Fix modpost warning in raw binary builds. · 396a2ae0
      Ralf Baechle 提交于
        MODPOST vmlinux.o
      WARNING: vmlinux.o(.text+0x478): Section mismatch: reference to .init.text:start_kernel (between '_stext' and 'run_init_process')
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      396a2ae0
  7. 17 10月, 2007 8 次提交