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  1. 16 2月, 2010 25 次提交
  3. 04 2月, 2010 2 次提交
  5. 30 1月, 2010 2 次提交
  7. 27 1月, 2010 11 次提交
    • K
      OMAP: hwmod: add API for slave idlemode setting · 46273e6f
      由 Kevin Hilman 提交于 
      Some HW blocks have errata which requires specific slave idle mode
under certain conditions.

This patch adds an hwmod API to allow setting slave idlemode
ensuring that any SYSCONFIG register updates go through hwmod.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      46273e6f
    • K
      OMAP: omap_device: optionally auto-adjust device activate/deactivate latencies · 9799aca2
      由 Kevin Hilman 提交于 
      First, this patch adds new worst-case latency values to the
omap_device_pm_latency struct.  Here the worst-case measured latencies
for the activate and deactivate hooks are stored.

In addition, add an option to auto-adjust the latency values used for
device activate/deactivate.

By setting a new 'OMAP_DEVICE_LATENCY_AUTO_ADJUST' flag in the
omap_device_pm_latency struct, the omap_device layer automatically
adjusts the activate/deactivate latencies to the worst-case measured
values.

Anytime a new worst-case value is found, it is printed to the console.
Here is an example log during boot using UART2 s an example.  After
boot, the OPP is manually changed to the 125MHz OPP:

[...]
Freeing init memory: 128K
omap_device: serial8250.2: new worst case deactivate latency 0: 30517
omap_device: serial8250.2: new worst case activate latency 0: 30517
omap_device: serial8250.2: new worst case activate latency 0: 218139648
omap_device: serial8250.2: new worst case deactivate latency 0: 61035
omap_device: serial8250.2: new worst case activate latency 0: 278076171
omap_device: serial8250.2: new worst case activate latency 0: 298614501
omap_device: serial8250.2: new worst case activate latency 0: 327331542

/ # echo 125000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed

omap_device: serial8250.2: new worst case deactivate latency 0: 91552

Motivation: this can be used as a technique to automatically determine
the worst case latency values.  The current method of printing a
warning on every violation is too noisy to actually interact the
console in order to set low OPP to discover latencies.

Another motivation for this patch is that the activate/deactivate
latenices can vary depending on the idlemode of the device.  While
working on the UARTs, I noticed that when using no-idle, the activate
latencies were as high as several hundred msecs as shown above.  When
the UARTs are in smart-idle, the max latency is well under 100 usecs.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      9799aca2
    • P
      OMAP clockdomain/powerdomain: improve documentation · f0271d65
      由 Paul Walmsley 提交于 
      This patch only affects documentation; no functional changes are
included.

Clean up comments in the current clockdomain, powerdomain code and
header files.  This mostly involves conversion to kerneldoc format,
although some clarifications are also included.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      f0271d65
    • P
      OMAP powerdomain: rearrange struct powerdomain to save some memory · e0594b44
      由 Paul Walmsley 提交于 
      This patch rearranges the order of structure members in struct powerdomain
to avoid wasting memory due to alignment restrictions.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      e0594b44
    • P
      OMAP clockdomains: add usecounting for wakeup and sleep dependencies · 369d5614
      由 Paul Walmsley 提交于 
      Add usecounting for wakeup and sleep dependencies.  In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.

Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow.  pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code.  This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.

N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched.  This has been tested by Kevin and confirmed to work.

The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences.  This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
      369d5614
    • P
      OMAP clockdomain/powerdomain: remove runtime register/unregister · e909d62a
      由 Paul Walmsley 提交于 
      OMAP clockdomains and powerdomains are currently defined statically,
only registered at boot, and never unregistered, so we can remove the
unregister function and the locking.   A variant of this was originally
suggested a while ago by Dmitry Baryshkov <dbaryshkov@gmail.com>.
This version of this patch contains an additional fix from Kevin Hilman
<khilman@deeprootsystems.com> to address one of the pwrdm_for_each_nolock()
users in mach-omap2/pm-debug.c.   Thanks Kevin.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Dmitry Baryshkov <dbaryshkov@gmail.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
      e909d62a
    • P
      OMAP2/3 clkdm/pwrdm: move wkdep/sleepdep handling from pwrdm to clkdm · 55ed9694
      由 Paul Walmsley 提交于 
      Move clockdomain wakeup dependency and sleep dependency data
structures from the powerdomain layer to the clockdomain layer, where
they belong.  These dependencies were originally placed in the
powerdomain layer due to unclear documentation; however, it is clear
now that these dependencies are between clockdomains.  For OMAP2/3,
this is not such a big problem, but for OMAP4 this needs to be fixed.

Thanks to Benoît Cousson <b-cousson@ti.com> for his advice on this
patch.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
      55ed9694
    • P
      OMAP clock: make the fixed divisor clock code available for all OMAPs · e9b98f60
      由 Paul Walmsley 提交于 
      One of the OMAP1 clocks can use the fixed divisor recalculation code
introduced in the OMAP2 clock code, so rename the
omap2_fixed_divisor_recalc() function to omap_fixed_divisor_recalc()
and make it available to all OMAPs.  A followup patch converts the OMAP1
clock.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      e9b98f60
    • P
      OMAP3 clock: reorganize CK_* platform flags · 2c8a177e
      由 Paul Walmsley 提交于 
      Add CK_* flags for the two new Sitara chips, AM3505 and AM3517, and
the OMAP34xx die shrink, OMAP36xx/OMAP37xx.  Introduce a new CK_*
flag, CK_3XXX, that marks all clocks that are common to OMAP3 family
chips.  CK_343X now refers to clocks that are available only on
OMAP34{1,2,3,4}0 (WTBU) and OMAP35{03,15,25,30} (any version).
At some point, the RATE_IN_* flags should be updated also.

While here, add some documentation describing the chip families
covered by these clock flags.

This patch is partially based on patches from Ranjith Lohithakshan
<ranjithl@ti.com> and Vishwanath Sripathy <vishwanath.bs@ti.com>.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Ranjith Lohithakshan <ranjithl@ti.com>
Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>
      2c8a177e
    • R
      AM35xx: Add AM35xx specific control module registers · 05842a32
      由 Ranjith Lohithakshan 提交于 
      AM3517/05 has a few additional control module registers defined mainly
to control the new IP's. This patch adds support for those new registers.
Signed-off-by: NRanjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      05842a32
    • A
      ARM: OMAP4: PM: Make OMAP3 Clock-domain framework compatible for OMAP4. · 84c0c39a
      由 Abhijit Pagare 提交于 
      Here the ".clkstctrl_reg" field is added to the clockdomain stucture
as the module offsets for OMAP4 do not map one to one for powerdomains
and clockdomains as it used to for OMAP3. Hence we need to use absolute
addresses to access the control registers. Some of the clock domains have
modules falling in the address space of PRM partition. Hence  necessitating
the use of absolute adresses.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
      84c0c39a