- 28 1月, 2016 3 次提交
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由 Peter Hung 提交于
Add F81866 GPIO supports Fintek F81866 is a SuperIO. It contains HWMON/GPIO/Serial Ports. and it has totally 72(9x8 sets) gpio pins. Here is the PDF spec: http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html The control method is the same with F7188x, but we should care the address of GPIO8x. GPIO address is below: GPIO0x based: 0xf0 GPIO1x based: 0xe0 GPIO2x based: 0xd0 GPIO3x based: 0xc0 GPIO4x based: 0xb0 GPIO5x based: 0xa0 GPIO6x based: 0x90 GPIO7x based: 0x80 GPIO8x based: 0x88 <-- not 0x70. Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com> Acked-by: NSimon Guinot <simon.guinot@sequanux.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 William Breathitt Gray 提交于
The ACCES 104-DIO-48E device provides 48 lines digital I/O via two Programmable Peripheral Interface (PPI) chips of type 82C55. Bit C3 at each 24-bit Group can be used as an external interrupt, triggered by a rising edge. This driver provides GPIO and IRQ support for these 48 channels of digital I/O. The base port address for the device may be configured via the dio_48e_base module parameter. The interrupt line number for the device may be configured via the dio_48e_irq module parameter. Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 William Breathitt Gray 提交于
The WinSystems WS16C48 device provides 48 lines of digital I/O. In addition, the first 24 lines may be used for interrupt-handled edge detection; rising edge detection and falling edge detection are supported. This driver provides GPIO and IRQ support for these 48 channels of digital I/O. The base port address for the device may be configured via the ws16c48_base module parameter. The interrupt line number for the device may be configured via the ws16c48_irq module parameter. Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 07 1月, 2016 1 次提交
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由 Florian Fainelli 提交于
BMIPS_GENERIC (arch/mips/bmips) is the Kconfig symbol associated with Broadcom MIPS-based STB chips. Since this driver is perfectly usable on these platforms as well, allow using it. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NGregory Fong <gregory.0xf0@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 12月, 2015 2 次提交
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由 Andrew F. Davis 提交于
The PCI/USB expander menus already depend on PCI/USB, drop subdependecies on individual drivers. Signed-off-by: NAndrew F. Davis <afd@ti.com> [Rebased to the GPIO tree] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Paul Burton 提交于
Allow the pch_gpio driver to be built for MIPS platforms, in preparation for use on the MIPS Boston board. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 02 12月, 2015 1 次提交
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由 Arnd Bergmann 提交于
The gpio-samsung driver is special in the sense that it interacts directly in multiple ways with the legacy platform code for the s3c24xx and s3c64xx platforms. In contrast, all devicetree based machines for Samsung, including the ones on those two SoC families use a different driver. The header files that define the interface between the platform code and the gpio driver are not visible when building a kernel for ARCH_MULTIPLATFORM, which prevents us from turning on this option for s3c64xx. To work around this, we now move the driver back into platform code, from where it was originally moved to as part of commit 1b39d5f2 ("gpio/samsung: gpio-samsung.c to support Samsung GPIOs"). The long-term plan for this driver would be to remove it entirely, after all Samsung machines have been converted over to boot from DT, but there is currently no timeline for when that might happen. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
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- 01 12月, 2015 1 次提交
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由 William Breathitt Gray 提交于
The ACCES 104-IDI-48 family of PC/104 utility boards feature 48 individually optically isolated digital inputs. Enabled inputs feature change-of-state detection capability; if change-of-state detection is enabled, an interrupt is fired off if a change of input level (low-to-high or high-to-low) is detected. Change-of-state IRQs are enabled/disabled on 8-bit boundaries, for a total of six boundaries. This driver provides GPIO and IRQ support for these 48 channels of digital input. The base port address for the device may be configured via the idi_48_base module parameter. The interrupt line number for the device may be configured via the idi_48_irq module parameter. Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 19 11月, 2015 1 次提交
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由 William Breathitt Gray 提交于
The ACCES 104-IDIO-16 series offers Change-of-State detection interrupt functionality; if Change-of-State detection is enabled, an interrupt is fired off if any input line changes state (i.e. goes from low to high, or from high to low). This patch adds support to handle these interrupts and allows the user to mask which GPIO lines are affected. The interrupt line number for the device may be set via the idio_16_irq module parameter. Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 11月, 2015 4 次提交
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由 Linus Walleij 提交于
- Relax dependencies on SPI_MASTER for drivers in the SPI menu that already has this dependency. - Move out the expander that would be hidden for I2C access if SPI_MASTER was not selected. Tentatively create a separate menu for this. - Move the ZX SoC driver to memory-mapped drivers, this must be a mistake and only worked because the system has an SPI master enabled at the same time. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
The I2C expander menu already depends on I2C, drop subdependecies on individual drivers. Keep the instances of depends on I2C=y though, so these are still restricted to the compiled-in case. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Port-mapped I/O depends on X86 already, so individual drivers need not specify this dependency. Suggested-by: NVivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Create a Kconfig submenu for drivers using X86 port-mapped I/O and depend on X86 for this. Suggested-by: NMika Westerberg <mika.westerberg@linux.intel.com> Cc: William Breathitt Gray <vilhelm.gray@gmail.com> Cc: Andreas Bofjall <andreas@gazonk.org> Cc: Diego Elio Pettenò <flameeyes@flameeyes.eu> Cc: Daniel Krueger <daniel.krueger@systec-electronic.com> Cc: Bruno Randolf <br1@einfach.org> Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Acked-by: NSimon Guinot <simon.guinot@sequanux.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 10月, 2015 2 次提交
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由 Soren Brinkmann 提交于
The driver does not have any real architecture dependencies. To avoid listing each architecture that might use this driver on some FPGA-enabled platform, drop these dependencies. Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: NMoritz Fischer <moritz.fischer@ettus.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 William Breathitt Gray 提交于
The ACCES 104-IDIO-16 family of PC/104 utility boards feature 16 optically isolated inputs and 16 optically isolated FET solid state outputs. This driver provides GPIO support for these 32 channels of digital I/O. Change-of-State detection interrupts are not supported. GPIO 0-15 correspond to digital outputs 0-15, while GPIO 16-31 correspond to digital inputs 0-15. The base port address for the device may be set via the idio_16_base module parameter. Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 26 10月, 2015 1 次提交
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由 YD Tseng 提交于
This patch adds a new GPIO driver for AMD Promontory chip. This GPIO controller is enumerated by ACPI and the ACPI compliant hardware ID is AMDF030. Change history: v2: 1. fix coding style 2. registers renaming v3: 1. change include file 2. fix coding style 3. remove module_init/exit, add module_platform_driver 4. remove MODULE_ALIAS v4: 1. change TOTAL_GPIO_PINS to PT_TOTAL_GPIO 2. remove PCI dependency in Kconfig 3. fix subject line Signed-off-by: NYD Tseng <Yd_Tseng@asmedia.com.tw> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 10月, 2015 1 次提交
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由 Kamlakant Patel 提交于
commit "325f0a (MIPS: Netlogic: Use chip_data for irq_chip methods)" Updates "mips/netlogic/common/irq.c" to use chip_data to store interrupt controller data pointer. Before this commit handler_data was used to store interrupt controller data which caused errors while using gpiochip_set_chained_irqchip. Update XLP GPIO driver to use the gpiolib irqchip helpers. And add missing depends on OF_GPIO in Kconfig. Signed-off-by: NKamlakant Patel <kamlakant.patel@broadcom.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 19 10月, 2015 1 次提交
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MIPSfpga uses the axi gpio controller. Enable the driver for MIPS. Signed-off-by: NZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 02 10月, 2015 2 次提交
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由 Diego Elio Pettenò 提交于
This patch adds support for the GPIOs found on the ITE super-I/O chips IT87xx. Signed-off-by: NDiego Elio Pettenò <flameeyes@flameeyes.eu> Signed-off-by: NChristophe Vu-Brugier <cvubrugier@fastmail.fm> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Stephen Boyd 提交于
Remove this driver now that Bjorn has introduced a pinctrl driver for msm8660 and the dts files have been updated with the pinctrl compatibles. Cc: Andy Gross <agross@codeaurora.org> Reviewed-by: NBjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 14 9月, 2015 1 次提交
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由 Kuninori Morimoto 提交于
8cd14702("gpio: rcar: Add r8a7795 (R-Car H3) support") added GPIO support for r8a7795. r8a7795 based on CONFIG_ARM64. OTOH, GPIO_RCAR driver can be compiled fine on non-ARM. This patch removed ARM dependency for it. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 13 8月, 2015 1 次提交
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由 Gregory Fong 提交于
Uses the gpiolib irqchip helpers. For this to work, the irq setup function is called once per bank instead of once per device. Note that all known uses of this block have a BCM7120 L2 interrupt controller as a parent. Supports interrupts for all GPIOs. In the IRQ handler, we check for raised IRQs for invalid GPIOs and warn (ratelimited) if they're encountered. Also, several drivers (e.g. gpio-keys) allow for GPIOs to be configured as wakeup sources, and this GPIO controller supports that through a separate interrupt path. The de-facto standard DT property "wakeup-source" is checked, since that indicates whether the GPIO controller hardware can wake. Uses the IRQCHIP_MASK_ON_SUSPEND irq_chip flag because UPG GIO doesn't have any of its own wakeup source configuration. Aside regarding gpiolib irqchip helpers: It wasn't obvious (to me) that you can have multiple chained irqchips and associated IRQ domains for a single parent IRQ, and as long as the xlate function is written correctly, a GPIO IRQ request end up checking the correct domain and will get associated with the correct IRQ. What helps make this clear is to read drivers/gpio/gpiolib-of.c: - of_gpiochip_find_and_xlate() - of_get_named_gpiod_flags() drivers/gpio/gpiolib.c: - gpiochip_find() Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 8月, 2015 1 次提交
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由 Rabin Vincent 提交于
On ETRAX FS, all pins on the first port (and only the first port) have interrupt support. On ARTPEC-3, all pins on all ports have interrupt support. However, there are only eight interrupts. Each of the interrupts is associated with a group of pins and for each interrupt the one pin from the group which will trigger it can be selected. Signed-off-by: NRabin Vincent <rabin@rab.in> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 7月, 2015 3 次提交
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由 Jun Nie 提交于
Add ZTE zx296702 GPIO controller support Signed-off-by: NJun Nie <jun.nie@linaro.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Masahiro Yamada 提交于
The driver gpio-mvebu.c does not depend on gpio-generic.c at all. Drop unneeded "select GPIO_GENERIC". Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Masahiro Yamada 提交于
The driver gpio-altera.c does not depend on gpio-generic.c at all. Drop unneeded "select GPIO_GENERIC". Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NTien Hock Loh <thloh@altera.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 6月, 2015 2 次提交
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由 Anurag Kumar Vulisha 提交于
Added support to Zynq Ultrascale+ MPSoC on the existing zynq gpio driver. Signed-off-by: NAnurag Kumar Vulisha <anuragku@xilinx.com> Acked-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Rabin Vincent 提交于
Add a GPIO driver for the General I/O block on Axis ETRAX FS SoCs. Signed-off-by: NRabin Vincent <rabin@rab.in> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 02 6月, 2015 1 次提交
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由 Gregory Fong 提交于
This adds support for the GPIO IP "UPG GIO" used on Broadcom STB SoCs (BCM7XXX and some others). Uses basic_mmio_gpio to instantiate a gpio_chip for each bank. The driver assumes that it handles the base set of GPIOs on the system and that it can start its numbering sequence from 0, so any GPIO expanders used with it must dynamically assign GPIO numbers after this driver has finished registering its GPIOs. Does not implement the interrupt-controller portion yet, will be done in a future commit. v2: - change include to use <linux/gpio/driver.h> instead of <linux/gpio.h> - get rid of unnecessary imask member in struct bank - rename GPIO_PER_BANK -> MAX_GPIO_PER_BANK - always have 32 GPIOs per bank and add 'width' member in struct bank to hold actual number of GPIOs in use - mark of_match table as const List-usage-fixed-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 06 5月, 2015 2 次提交
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由 Kamlakant Patel 提交于
Add GPIO controller driver for Netlogic XLP MIPS64 SOCs. This driver is instantiated by device tree and supports interrupts for GPIOs. Signed-off-by: NKamlakant Patel <kamlakant.patel@broadcom.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tony Lindgren 提交于
We currently get all kinds of errors building the omap gpio driver as a module starting with: undefined reference to `omap2_gpio_resume_after_idle' undefined reference to `omap2_gpio_prepare_for_idle' ... Let's fix the issue by adding inline functions to the header. Note that we can now also remove the two unused functions for omap_set_gpio_debounce and omap_set_gpio_debounce_time. Then doing rmmod on the module produces further warnings because of missing exit related functions. Let's add those. And finally, we can make the Kconfig entry just a tristate option that's selected for omaps. Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@linaro.org> Acked-by: NSantosh Shilimkar <ssantosh@kernel.org> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 5月, 2015 1 次提交
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由 Joachim Eastwood 提交于
Driver for the GPIO block found on NXP LPC18xx/43xx devices. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 4月, 2015 1 次提交
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由 Linus Walleij 提交于
The Synopsys DesignWare DWAPB GPIO block is popular to synthesize amongst many architectures: X86, ARM, ARC. The driver was restricted to only these archs due to using [read|write]l_relaxed() accessors that were not universally available in the past, but as of commit 9439eb3a "asm-generic: io: implement relaxed accessor macros as conditional wrappers" these accessors are available on all archs so this should not be a problem any more. Enable the driver for all archs. Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 4月, 2015 7 次提交
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由 Vineet Gupta 提交于
Synopsys SDP platform uses DW GPIO controller in design with ARC cores. So adding ARC to architectures that may select this GPIO controller. Even though support for Synopsys SDP is yet to be submitted we'll need this tiny option enabled at least for properly working interrupts (DW GPIO controller is used as interrupt controller). Signed-off-by: NVineet Gupta <vgupta@synopsys.com> Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Create Kconfig submenus for memory mapped, I2C, MFD, PCI, SPI and USB GPIO drivers to help navigate the forest of drivers in this subsystem. The I2C, SPI and USB menus get dependencies so we don't have to see them unless we have the required subsystem enabled in the first place. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Get rid of AC97, MODULbus and other weird subheadings for GPIO drivers. Move all MFD drivers out of I2C etc and in under the MFD comment. This is too weird as it is and makes no sense, if the dependent parent driver is MFD, group these as MFD GPIO drivers. Alphabetize and move this comment group inbetween "I2C" and "PCI" to also have the groups in alphabetic order. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Move the Kconfig option for the Broadcom BCM Kona up to the commin GPIO controllers, as it is currently grouped under MODULbus expanders which it definately is not. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Rearrange the SPI GPIO expanders in alphabetic order as already indicated by the comment in the file. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Rearrange PCI GPIO controllers in alphabetic order as already indicated by the comment in the file. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Rearrange the I2C GPIO expanders in alphabetic order as already indicated by the comment in the file. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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