This patch adds support System MMU which supports address transition
from virtual address to physical address. Basically, each hardware
block is connected System MMU block can use directly vitrual address
when it accesses physical memory not using physical address.
Signed-off-by: NDonguk Ryu <du.ryu@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
[kgene.kim@samsung.com: removed useless codes]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

There may be up to two MIPI CSI slave interfaces depending on the SoC version.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch modifies the following.

1. Moves the SROM controller mapping from S5PV210 specific code to
   S5P common code. The SROM controller mapping can be used for all
   S5P SoCs.

2. Define the SROM controller physical address for S5P64X0, S5P6442,
   S5PC100, S5PV210 and S5PV310.
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Some of the S5P platforms like S5PC100 and S5PV210 include SROM banks
4 and 5 in addition to SROM banks 0 to 3. This patch adds register
offsets for SROM bank 4 and 5.
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds shift macros for the SROM Bus width and control
register to represent the shift count for the 5th and 6th SROM
banks.  Some of the S5P SOCs have them.
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The SROM register difinitions of S5PV310/S5PC210 (mach/regs-srom.h)
can be used to other S5P SoCs such as S5PV210/S5PC110. So moved into
plat/regs-srom.h of plat-s5p directory.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support Power Domain for S5PV310 and S5PC210.

Signed-off-by: Changhwan Youn <chaos.youn at samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Kernel 2.6.37 adds new interrupt methods which take a struct irq_data
rather than an irq number. Begin converting Samsung platforms over to
these methods by converting s3c_irqext_wake() with a simple textual
substitution.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds initial map for GPIO2 and GPIO3.
S5PV310/S5PC210 has separated GPIO1, GPIO2 and GPIO3.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

S5P Samsung SoCs has a EPLL to support various PLL clock sources for other
H/W blocks. Until now, to control EPLL, each of SoCs make their own functions
in 'mach-s5pxxx/clock.c'. But some of functions, 'xxx_epll_get_rate()' and
'xxx_epll_enable()', are exactly same in all S5P SoCs, so this patch move
these duplicated codes to common EPLL functions that use platform wide.
Signed-off-by: NSeungwhan Youn <sw.youn@samsung.com>
Acked-by: NJassi Brar <jassi.brar@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Basically S5P SoCs use the Samsung common VA address mapping where
plat-samsung and use plat-s5p's mapping also. The later is a little
mess. So this patch cleans it up.

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

When merged patches, missed IRQ_EINT_BIT() definition from commit ea31fd43
(ARM: S5PV210: Add Power Management Support). The IRQ_EINT_BIT() is used
in the Power Management operation (plat-samsung/pm.c).
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds suspend-to-ram support for S5PV210.
Note. This patch is confirmed on SMDKV210 and SMDKC110 board.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Samsung S5P SoCs have the same interrupt type defines for both
external interrupts and gpio interrupts. This patch removes all
duplicates from S5PC100 and S5PV210 specific includes as well as
gpio interrupt code and put a common defines to plat/irqs.h
NOTE: Do not use this for S5P6440 and S5P6450.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: add note for S5P64X0]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds a common callback for gpio_to_irq() for external and
gpio interrupts for Samsung SoCs.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: moved samsung_gpiolib_to_irq() for s3c24xx build]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds common code to enable support of GPIO interrupt on
S5P SoCs.

The total number of GPIO pins is quite large on S5P SoCs. Registering
irq support for all of them would be a resource waste. Because of that
the interrupt support for standard GPIO pins is registered dynamically
by the s5p_register_gpio_interrupt() function.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title fixes]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add the necessary definitions and mapping information to enable the
s3c-hsotg gadget to build.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

All the S5P series SoCs use the 'struct clksrc_clk' type to represent the
armclk. So the clk_arm clock instance available in the plat-s5p clock code
is not used in any of the S5P series SoCs.
This patch removes the unused clk_arm instance from plat-s5p clock code.
Reported-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds DMC(DRAM Memory Controller) map_desc table.
Because some driver such as CPUFREQ need to access DMC register.
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds UART serial port support for S5P6450 SoC.
The S5P6450 has 6 UARTs, so adds resource of UART4 and UART5.
And to fix membase which is in serial/samsung.c is from Ben Dooks.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>

This patch updates regarding clock files for supporting S5P6440 and
S5P6450 with one kernel image. The mach-s5p64x0/clock.c is for common
of them and there are specific clock files for each SoCs.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds ARCH_S5P64X0 which can support S5P6440 and S5P6450 with
one kernel image. So moved some files of mach-s5p6440 into the new ARCH
directory mach-s5p64x0.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch updates the Kconfig and Makefile for the S5P6440 and S5P6450
machines. It also updates arch/arm/ Kconfig and Makefile to include for
support ARCH_S5P64X0 with one kernel image.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch moves some initial maps from plat-s5p to machine,
so that can merge mach-s5p6440 and mach-s5p6450.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch moves OneNAND device definitions from mach-s5pv210 to plat-s5p
so that can support it commonly.

Note: S5PC110 and S5PC210 have same OneNAND driver.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>

IO registers region size of all FIMC versions is less than 1kB so there
is no need to reserve 1M.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
[kgene.kim@samsung.com: minor title fix]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

FIMC driver uses DMA_coherent allocator, which requires proper dma mask
to be set.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title fix]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Following occurs on boot message without this patch.
    CPU1: processor failed to boot
    Brought up 1 CPUs
    SMP: Total of 1 processors activated...

This patch adds SYSRAM mapping for fixing Secondary CPU startup.
    CPU1: Booted secondary processor
    Brought up 2 CPUs
    SMP: Total of 2 processors activated...
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds CMU block for S5PV310/S5PC210 clock.
(CMU: Clock Management Unit)
Of course, changed current clock addresses for it together.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch fixes on missing S5P_DEV_FIMC in plat-s5p/Kconfig.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

FIMC (CAMIF) device is a camera interface embedded in S3C/S5P Samsung
SOC series. It supports ITU-R BT.601/656 and MIPI-CSI2 standards,
memory to memory operations, color conversion, resizing and rotation.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds the Kconfig and Makefile for the new S5PV310 SoC.
It also updates arch/arm Kconfig, Makefile and arch/arm/mm/Kconfig
to include support for the new S5PV310.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds timer support for S5PV310.  Until now, all S5P SoCs
use CONFIG_ARCH_USES_GETTIMEOFFSET macro as a default configuration.
Instead,S5PV310 implements clocksource and clock_event_device to
support the high resolution timer and tickless system.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NHyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds IRQ support for S5PV310.
ARM GIC is installed in S5PV310 instead of VIC which is in every other CPUs
in S5P series. Several irq combiners are used to resolve the lack of irq
lines in current implementation.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NHyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds clock and pll support for S5PV310.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds Samsung S5PV310/S5PC210 CPU support.
The S5PV310/S5PC210 integrates a ARM Cortex A9 multi-core.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NJiseong Oh <jiseong.oh@samsung.com>
[kgene.kim@samsung.com: fix build errors]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The uart offset between channels has been 0x400 for all S5P series
and to present virtual and physical offsets, both number 0x400 and
S3C_UART_OFFSET have been used together.
This patch removes the use of the number 0x400 and expands the virtual
mapping size of S3C_VA_UART from 4KB to 512KB to support the CPU with
S3C_UART_OFFSET being 0x10000.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds s5p_reset_hook() which includes software reset
by using SWRESET.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds system define for arch_reset() using Watchdog reset.
And adds IO mapping for using WDT.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>