In case of ep_disable and reset interrupt is received and, still there
was at least one request queued for dma transfer, then endpoint is
stopped first. Once endpoint is stopped, callback for all queued
request must be called.
Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

It is needed to enumerate recent cores like 2.10a.
Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

By the time we're disabling the endpoint, HW
could already have posted more events to our
event buffer. In that case, we will receive
endpoint events for a disabled endpoint.

In order to protect ourselves from that situation,
we simply ignore endpoint interrupts whenever
the endpoint is disabled.
Tested-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

In case we get disconnected, we will call gadget
driver's disconnect method, which should make
sure to disable all endpoints. At that point
we will call stop_active_transfers() to make
sure we didn't leave any pending request on the
controller.
Tested-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

That IRQ is causing way too much trouble. We have
a different handling which was agreed with IP
provider and has been tested with FPGA and OMAP5.
Tested-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

We never set CMDIOC bit for Start Transfer
command, so that code will never be used.
Tested-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

If event status says that its last completed TRB but TRB is still owned
by HW then break from the loop, because we are not going to get correct
TRB status from trb control/size register.
Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

If an IN transfer is missed on isoc endpoint, then driver must insure
that next ep_queue is properly handled.
This patch fixes this issue by starting a new transfer for next queued
request.
Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Currently in case of isoc, interrupt is programmed after each
TRB_NUM/4 ie 8th TRB. A TRB is programmed against each submitted
request from gadget. If we do not want to limit the minimum number of
necessary request to be submitted from gadget then we must receive
interrupt on each TRB submission. There can be such situation with a
gadget working with ping-pong buffer.

If a gadget does not want to receive interrupt after each request
completion then it may set no_interrupt flag.
Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

According to the databook, the DWC3 Core will
reset those bits to 0 on USB Bus Reset. This
means we must re-enable those bits on every
reset interrupt.

Because we will always get a Reset interrupt
after loading a gadget driver, we can, instead
of re-enabling something that was just lost,
move the handling of those bits to the Reset
Interrupt.

This patch fixes USB30CV U1/U2 Test.
Signed-off-by: NGerard CAUVY <g-cauvy1@ti.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

If we get a disconnect IRQ, we should take
the core out of low power mode so we can
reconnect afterwards.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

If we don't read out the contents of the register
(in order to reinitialize 'reg' variable) we will
be writing unknown contents to the DCTL register
whenever we try to use dwc3_gadget_wakeup() function.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Recent cores (>= 1.94a) have a set of new features,
commands and a slightly different programming model.

This patch aims to support those changes.
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

those two functions don't power PHYs, they simply
put them in suspend state. Rename to reflect better
what functions actually do.
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

retries is used twice without being reinitialized.
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

That semicolon doesn't do anything, it's not
needed and should be removed.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Remove redundant pointer to struct usb_endpoint_descriptor.
Signed-off-by: NIdo Shayevitz <idos@codeaurora.org>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

to avoid sprinkling magic constants on the driver
we define a constant to be used when allocating
setup_buffer and ep0_bounce buffer.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Issue an Update Transfer command after queuing a request to an isoc
EP with an active transfer. This is required according to the dwc3
databook. Pratyush Anand reports that this fixes a problem he was
having with Isoc IN transfers.

Tested-by: Pratyush Anand<pratyush.anand@st.com>
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

We want to re-use that buffer for other USB
requests, so let's increase it to biggest
wMaxPacketSize for ep0 so it works for everything
we have in mind.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

This will be used by the ep0 layer for implementing
Set SEL Standard Request.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

On device loading the driver enables LPM and the acceptance of U1 and U2
states. The [Set|Clear]Feature requests for "U1/U2" are forwarded
directly to the hardware and allow / forbid the initiation of the low
power links.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

All revisions prior to 2.20a have a known issue which
causes metastability state on Run/Stop bit if we
configure the core to work on any of the USB2-only
speeds.

The suggested workaround is just to never configure the
core to anything other than SuperSpeed.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Transfer resource index is cleared in hardware when XFERCOMPLETE
event is generated, so clear the driver's res_trans_idx variable
immediately after that event is received. The upcoming hibernation
patches depend on this change.
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

dwc3_gadget_ep_set_wedge() and dwc3_gadget_set_selfpowered() were
modifying dwc->flags/dwc->is_selfpowered without taking the lock.
Since those modifications are non-atomic, that could cause other
flags to be corrupted. Fix them both to take the lock.
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

The loop in dwc3_gadget_set_link_state() was using a udelay(500),
which is a long time to delay in interrupt context. Change it to
udelay(5) and increase the loop count to match.
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Zero is a valid value for a microframe number. So remove the bogus
test for non-zero in dwc3_gadget_start_isoc().

Cc: stable@vger.kernel.org
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

It's wrong to use the size of array as an argument for strncat.
Memory corruption is possible. strlcat is exactly what we need here.

Cc: stable@vger.kernel.org
Signed-off-by: NAnton Tikhomirov <av.tikhomirov@samsung.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

If we have a non-ISOC endpoint, we will not have a Link TRB
pointing to the beginning of the TRB pool. On such endpoints,
we don't want to let the driver wrap around the TRB pool
otherwise controller will hang waiting for a valid TRB.

Cc: stable@vger.kernel.org
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

trivial patch, no functional changes
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

those routines have everything we need to map/unmap
USB requests and it's better to use them.

In order to achieve that, we had to add a simple
change on how we allocate and use our setup buffer;
we cannot allocate it from coherent anymore otherwise
the generic map/unmap routines won't be able to easily
know that the GetStatus request already has a DMA
address.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

This fix a bug in f_serial, which expect the ep->desc to be NULL after
disabling an endpoint.

Cc: stable@vger.kernel.org
Signed-off-by: NIdo Shayevitz <idos@codeaurora.org>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

this will get rid of a useless memcpy on
IRQ handling, thus improving driver performance.

Tested with OMAP5430 running g_mass_storage on
SuperSpeed and HighSpeed.

Note that we are removing the little endian access
of the TRB and all accesses will be in System endianness,
if there happens to be a system in BE, bit 12 of GSBUSCFG0
should be set so that HW does byte invariant BE accesses
when fetching TRBs.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

When host requests us to enter a test mode,
we cannot directly enter the test mode before
Status Phase is completed, otherwise the core
will never be able to deliver the Status ZLP
to host, because it has already entered the
requested Test Mode.

In order to fix the error, we move the actual
start of Test Mode right after we receive
Transfer Complete event of the status phase.
Signed-off-by: NGerard Cauvy <g-cauvy1@ti.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Those transfer types are generally high bandwidth, so we
want to optimize transfers with those endpoints.

For that, databook suggests allocating 3 * wMaxPacketSize
of FIFO. Let's do that.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

We're only using the 4 byte events and memcpy()
will make us slower. We can easily avoid that.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

When we set Run/Stop bit, we also move the
core to Rx.Detect state so that USB3 handshake
can start from a known location.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

We need to dynamically re-size TxFifos for the
cases where default values will not do.

While at that, we create a simple function which,
for now, will just allocate one full packet fifo
space for each of the enabled endpoints.

This can be improved later in order to allow for
better throughput by allocating more space for
endpoints which could make good use of that like
isochronous and bulk.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

We hold that pointer for one reason. It just
looks nicer to use it.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Only bit 3 of the event status bitfield is valid
and the others should not be considered.

Make sure SW matches documentation on that case
to avoid bogus debugging prints which would
confuse an engineer.
Signed-off-by: NFelipe Balbi <balbi@ti.com>