- 23 1月, 2014 1 次提交
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由 Thierry Reding 提交于
The head number of a given display controller is fixed in hardware and required to program outputs appropriately. Relying on the driver probe order to determine this number will not work, since that could yield a situation where the second head was probed first and would be assigned head number 0 instead of 1. By explicitly specifying the head number in the device tree, it is no longer necessary to rely on these assumptions. As a fallback, if the property isn't available, derive the head number from the display controller node's position in the device tree. That's somewhat more reliable than the previous default but not a proper solution. Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 20 12月, 2013 1 次提交
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由 Thierry Reding 提交于
This commit adds support for both DSI outputs found on Tegra. Only very minimal functionality is implemented, so advanced features like ganged mode won't work. Due to the lack of other test hardware, some sections of the driver are hardcoded to work with Dalmore. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 18 12月, 2013 2 次提交
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由 Thierry Reding 提交于
The display controller primary clock was recently renamed to "dc", so update the example to reflect that. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Use the DRM panel framework to attach a panel to an output. If the panel attached to a connector supports supports the backlight brightness accessors, a property will be available to allow the brightness to be modified from userspace. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 12 12月, 2013 2 次提交
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由 Stephen Warren 提交于
Update all the Tegra DT bindings to require resets/reset-names properties where the HW module has reset inputs. Remove any entries from clocks or clock-names that were only required to identify reset inputs, rather than referring to real clocks. This is a DT-ABI-incompatible change. It is the first of two changes required for me to consider the Tegra DT bindings as stable, the other being conversion to the common DMA DT bindings. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-By: NTerje Bergstrom <tbergstrom@nvidia.com>
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由 Stephen Warren 提交于
Many of the Tegra DT binding documents say nothing about the clocks or clock-names properties, yet those are present and required in DT files. This patch simply updates the documentation file to match the implicit definition of the binding, based on real-world DT content. All Tegra bindings that mention clocks are updated to have consistent wording and formatting of the clock-related properties. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-By: NTerje Bergstrom <tbergstrom@nvidia.com>
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- 05 9月, 2013 1 次提交
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由 Chanho Park 提交于
The exynos4 platform is only dt-based since 3.10, we should convert driver data and ids to dt-based parsing methods. The rotator driver has a limit table to get size limit of input picture. Each SoCs has slightly different limit value compared with any others. For example, exynos4210's max_size of RGB888 is 16k x 16k. But, others have 8k x 8k. Another example the exynos5250 should have multiple of 2 pixel size for its X/Y axis. Thus, we should keep different tables for each of them. This patch also includes desciptions of each nodes for the rotator and specifies a example how to bind it. Signed-off-by: NChanho Park <chanho61.park@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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- 31 7月, 2013 1 次提交
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由 Sachin Kamat 提交于
Exynos5250 G2D IP requires only the gate clock. Update the binding documentation accordingly. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Cc: Inki Dae <inki.dae@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 12 6月, 2013 1 次提交
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由 Sachin Kamat 提交于
Added clock entry definitions to G2D bindings document. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 09 4月, 2013 1 次提交
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由 Sachin Kamat 提交于
Added documentaion about G2D bindings. Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Inki Dae <inki.dae@samsung.com> Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 20 11月, 2012 1 次提交
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由 Thierry Reding 提交于
This commit adds a KMS driver for the Tegra20 SoC. This includes basic support for host1x and the two display controllers found on the Tegra20 SoC. Each display controller can drive a separate RGB/LVDS output. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NMark Zhang <markz@nvidia.com> Reviewed-by: NMark Zhang <markz@nvidia.com> Tested-by: NMark Zhang <markz@nvidia.com> Tested-and-acked-by: NAlexandre Courbot <acourbot@nvidia.com> Acked-by: NTerje Bergstrom <tbergstrom@nvidia.com> Tested-by: NTerje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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