The head number of a given display controller is fixed in hardware and
required to program outputs appropriately. Relying on the driver probe
order to determine this number will not work, since that could yield a
situation where the second head was probed first and would be assigned
head number 0 instead of 1.

By explicitly specifying the head number in the device tree, it is no
longer necessary to rely on these assumptions. As a fallback, if the
property isn't available, derive the head number from the display
controller node's position in the device tree. That's somewhat more
reliable than the previous default but not a proper solution.
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The Chunghwa CLAA101WA01A is a 10.1" 1366x768 panel, which can be
supported by the simple panel driver.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The Samsung LNT101NT05 10.1" WXVGA panel can be supported by the simple panel
driver.

Cc: linux-fbdev@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: David Airlie <airlied@linux.ie>
Signed-off-by: NMarc Dietrich <marvin24@gmx.de>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This commit adds support for both DSI outputs found on Tegra. Only very
minimal functionality is implemented, so advanced features like ganged
mode won't work.

Due to the lack of other test hardware, some sections of the driver are
hardcoded to work with Dalmore.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Introduce device tree bindings for the MIPI pad calibration controller
found on Tegra SoCs. The controller can be used to perform calibration
of pads used for DSI and CSI peripherals.
Signed-off-by: NThierry Reding <treding@nvidia.com>

The display controller primary clock was recently renamed to "dc", so
update the example to reflect that.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Use the DRM panel framework to attach a panel to an output. If the panel
attached to a connector supports supports the backlight brightness
accessors, a property will be available to allow the brightness to be
modified from userspace.
Signed-off-by: NThierry Reding <treding@nvidia.com>

This binding specifies a set of common properties for display panels. It
can be used as a basis by bindings for specific panels.

Bindings for three specific panels are provided to show how the simple
panel binding can be used.
Acked-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Document the device tree bindings for the MIPI DSI bus. The MIPI Display
Serial Interface specifies a serial bus and a protocol for communication
between a host and up to four peripherals.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Tegra124 adds a number of extra modules into the configlink bus, which
must be taken out of reset before the bus is used. Update the AHUB
driver to know about these extra modules (the AHUB HW module hosts the
configlink bus).
Based-on-work-by: NArun Shamanna Lakshmi <aruns@nvidia.com>
Based-on-work-by: NSonghee Baek <sbaek@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NMark Brown <broonie@linaro.org>
---
This patch depends on "ASoC: tegra: use reset framework" to compile,
which is ack'd and slated to go through a (large) topic branch in the
Tegra tree. So, we can either:

a) Merge that Tegra topic branch into the ASoC tree, then apply this.
   Note that I haven't created the topic branch yet, since I'm still
   waiting for DMA dependencies to be applied.

b) Apply this change to the Tegra tree too. This change isn't directly
   related to the changes in the Tegra tree; it just makes use of the new
   reset controller feature that's introduced there.

Update all the Tegra DT bindings to require the standard dmas/dma-names
properties rather than non-standard nvidia,dma-request-selector property.

This is a DT-ABI-incompatible change. It is the second of two changes
required for me to consider the Tegra DT bindings as stable, the other
being the previous conversion to the common reset bindings.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Update all the Tegra DT bindings to require resets/reset-names properties
where the HW module has reset inputs. Remove any entries from clocks or
clock-names that were only required to identify reset inputs, rather than
referring to real clocks.

This is a DT-ABI-incompatible change. It is the first of two changes
required for me to consider the Tegra DT bindings as stable, the other
being conversion to the common DMA DT bindings.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-By: NTerje Bergstrom <tbergstrom@nvidia.com>

Many of the Tegra DT binding documents say nothing about the clocks or
clock-names properties, yet those are present and required in DT files.
This patch simply updates the documentation file to match the implicit
definition of the binding, based on real-world DT content.

All Tegra bindings that mention clocks are updated to have consistent
wording and formatting of the clock-related properties.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-By: NTerje Bergstrom <tbergstrom@nvidia.com>

Commit 89ce376c (drivers/net: Use of_match_ptr() macro in smc91x.c)
added minimal device tree support to smc91x, but it's not working on
many platforms because of the lack of some key configuration bits.

Fix the issue by parsing the necessary configuration like the
smc911x driver is doing. As most smc91x users seem to use 16-bit
access, let's default to that if no reg-io-width is specified.

Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: netdev@vger.kernel.org
Cc: devicetree@vger.kernel.org
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

When booted with device tree, we may still have platform data passed
as auxdata. For am3517 this is needed for passing the interrupt_enable
and interrupt_disable callbacks that access the omap system control module
registers. These callback functions will eventually go away when we have
a separate system control module driver.

Some of the things that are currently passed as platform data we don't need
to set up as device tree properties as they are always the same on am3517.
So let's use a new compatible flag for those so we can get those from
the device tree match data.

Also note that we need to fix setting of phy_dev to NULL instead of an empty
string as the code later on uses that to find the first phy on the mdio bus.
This seems to have been caused by 5d69e007 (net: davinci_emac: switch to
new mdio).
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

re-format and re-word the device tree binding documentation for MPC8xxx
and compatibles, reference the common document for interrupt controllers
and remove outdated duplicate SoC specific information

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <Pawel.Moll@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: <devicetree@vger.kernel.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NGerhard Sittig <gsi@denx.de>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

This binding shouldn't exist; Tegra20 has two forms of SPI controller
that are documented separately in nvidia,tegra20-sflash.txt and
nvidia,tegra20-slink.txt.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

This patch fix typo of property name from 'pullup-uV' to 'pullup-uv'.
The ntc_thermistor.c use 'pullup-uv' when parsing dt data.
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: NJingoo Han <jg1.han@samsung.com>
Acked-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Adding Global Mixed-mode Technology Inc. to the list
of devicetree vendor prefixes.
Signed-off-by: NWei Ni <wni@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NJean Delvare <khali@linux-fr.org>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

s/comptible/compatible/
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

phy-supply is an optional property of the fec driver, so add it to the binding
documentation.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

The binding and support for omap5-mpu which has a cortex-a15
smp core, gic and integrated L2 cache has been existing for sometime.
So Documenting the missing binding here.

Cc: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: NSricharan R <r.sricharan@ti.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Add missing "arm,armv8-pmuv3" compatible property for ARMv8 PMU.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>

Some features can be configured by the companion I2C chips,
which may not be available at the probe time. Fix the issue
by returning -EPROBE_DEFER when the MMC controller slots
are not configured.

While at it, let's also add minimal device tree support so
omap24xx platforms can use this driver without legacy mode
since we claim to support device tree for mach-omap2 based
systems.

Although adding the minimal device tree support is not strictly
a fix, it does remove one of the last blockers for dropping a
bunch of legacy platform data for mach-omap2.

Cc: linux-mmc@vger.kernel.org
Acked-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Implement clock support for Tegra124.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>

This was tested on a NETGEAR ReadyNAS 2120 device (Marvell Armada XP
based board, via DT).
Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>

Add device tree support to the DW watchdog timer.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Acked-by: NJamie Iles <jamie@jamieiles.com>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Reviewed-by: NPavel Machek <pavel@denx.de>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-watchdog@vger.kernel.org

On CSR SiRFprimaII and SiRFatlasVI, the 6th timer can act as a watchdog
timer when the Watchdog mode is enabled.

watchdog occur when TIMER watchdog counter matches the value software
pre-set, when this event occurs, the effect is the same as the system
software reset.
Signed-off-by: NXianglong Du <Xianglong.Du@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Cc: Romain Izard <romain.izard.pro@gmail.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

I accidently put the devicetree bindings for the MEN A21 watchdog driver in
Documentation/devicetree/bindings/gpio instead of
Documentation/devicetree/bindings/watchdog, this patch addresses this error.
Signed-off-by: NJohannes Thumshirn <johannes.thumshirn@men.de>
Acked-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Rob Landley <rob@landley.net>

Add a driver for the watchdog timer found on Ralink SoC
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
Cc: linux-watchdog@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org

This patch adds a watchdog driver for the main hardware watchdog timer
found on MOXA ART SoCs.

The MOXA ART SoC provides one writable timer register, restarting
the hardware once it reaches zero. The register is auto decremented
every APB clock cycle.
Signed-off-by: NJonas Jensen <jonas.jensen@gmail.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Introduce support for Broadcom Serial Controller (BSC) I2C bus found
in the Kona family of Mobile SoCs.  FIFO hardware is utilized but only
standard mode (100kHz), fast mode (400kHz), fast mode plus (1MHz), and
I2C high-speed (3.4 MHz) bus speeds are supported.
Signed-off-by: NTim Kryger <tim.kryger@linaro.org>
Reviewed-by: NMatt Porter <matt.porter@linaro.org>
Reviewed-by: NMarkus Mayer <markus.mayer@linaro.org>
[wsa: fixed Kconfig sorting, squashed broken out patches into one]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

As we claim to support device tree for mach-omap2, we
should have the necessary flags in the driver to make it
usable.

Cc: linux-i2c@vger.kernel.org
Acked-by: NWolfram Sang <wsa@the-dreams.de>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add documentation for the generic OMAP DES crypto modul describing the device
tree bindings.
Reviewed-by: NMark Rutland <mark.rutland@arm.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NJoel Fernandes <joelf@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

A new compatible property "ti,omap5-sham" is added to the omap-sham driver
recently to support SHA/MD5 for OMAP5,DRA7 and AM43XX. Documenting the
same.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add OF document for LM90 in Documentation/devicetree/.

[JD: Add this new file to the LM90 MAINTAINERS entry.]
Signed-off-by: NWei Ni <wni@nvidia.com>
Signed-off-by: NJean Delvare <khali@linux-fr.org>

Correct the SPI node compatible property items to match example code and
match current DTS usage.
Signed-off-by: NEric Witcher <ewitcher@mindspring.com>
Acked-by: NSourav Poddar <sourav.poddar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.

This IP is embedded in all ST SoCs for Set-top box platorms, and
supports I2C Standard and Fast modes.
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.
Signed-off-by: NHongbo Zhang <hongbo.zhang@freescale.com>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>