The pins from GPIO1A0 to GPIO1B1 are special, need to recalculate
iomux. And the register offset is larger than the u8 range, so changed
to u32.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some pins like i2c SCL/SDA need the schmitt input function
to avoid crosstalk problems.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There are 3 IP blocks pin routes need to be switched, that are
emmc-cmd, spi, i2s. And there are some pins need to be recalced,
which are gpio2c4~gpio2c7 and gpio2d0.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The other Socs also need the feature of recalced iomux, so
make it as a common interface like iomux route feature.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This reverts commit 88bb9421.

It introduced a new CONFIG_DEBUG_ATOMIC_SLEEP warning in v4.12-rc1:

[ 7226.716713] BUG: sleeping function called from invalid context at kernel/locking/mutex.c:238
[ 7226.716716] in_atomic(): 0, irqs_disabled(): 0, pid: 1708, name: bash
[ 7226.716722] CPU: 1 PID: 1708 Comm: bash Not tainted 4.12.0-rc6+ #1213
[ 7226.716724] Hardware name: Google Kevin (DT)
[ 7226.716726] Call trace:
[ 7226.716738] [<ffffff8008089928>] dump_backtrace+0x0/0x24c
[ 7226.716743] [<ffffff8008089b94>] show_stack+0x20/0x28
[ 7226.716749] [<ffffff8008371370>] dump_stack+0x90/0xb0
[ 7226.716755] [<ffffff80080cd2a0>] ___might_sleep+0x10c/0x124
[ 7226.716760] [<ffffff80080cd330>] __might_sleep+0x78/0x88
[ 7226.716765] [<ffffff800879e210>] mutex_lock+0x2c/0x64
[ 7226.716771] [<ffffff80083ad678>] rockchip_irq_bus_lock+0x30/0x3c
[ 7226.716777] [<ffffff80080f6d40>] __irq_get_desc_lock+0x78/0x98
[ 7226.716782] [<ffffff80080f7e6c>] irq_set_irq_wake+0x44/0x12c
[ 7226.716787] [<ffffff8008486e18>] dev_pm_arm_wake_irq+0x4c/0x58
[ 7226.716792] [<ffffff800848b80c>] device_wakeup_arm_wake_irqs+0x3c/0x58
[ 7226.716796] [<ffffff80084896fc>] dpm_suspend_noirq+0xf8/0x3a0
[ 7226.716800] [<ffffff80080f1384>] suspend_devices_and_enter+0x1a4/0x9a8
[ 7226.716803] [<ffffff80080f21ec>] pm_suspend+0x664/0x6a4
[ 7226.716807] [<ffffff80080f04d8>] state_store+0xd4/0xf8
...

It was reported on -rc1, and it's still not fixed in -rc6, so it should
just be reverted.

Cc: John Keeping <john@metanate.com>
Signed-off-by: NBrian Norris <briannorris@chromium.org>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There are 2 IP blocks pin routes need to be switched, that are
uart2dbg, pcie_clkreq.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There are 8 IP blocks pin routes need to be switched, that are
uart2dbg, gmac-m1-optimized, pdm, spi, i2s2, card, tsp, cif.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There are 9 IP blocks pin routes need to be switched, that are
pwm-0, pwm-1, pwm-2, pwm-3, sdio, spi, emmc, uart2, uart1.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

On the some rockchip SOCS, some things like rk3399 specific uart2 can use
multiple pins. Somewhere between the pin io-cells and the uart it seems
to have some sort of switch to decide to which pin to actually route the
data.

+-------+    +--------+  /- GPIO4_B0 (pinmux 2)

| uart2 | -- | switch | --- GPIO4_C0 (pinmux 2)

+-------+    +--------+  \- GPIO4_C3 (pinmux 2)
(switch selects one of the 3 pins base on the GRF_SOC_CON7[BIT0, BIT1])

The routing switch is determined by one pin of a specific group to be set
to its special pinmux function. If the pinmux setting is wrong for that
pin the ip block won't work correctly anyway.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

of_device_id::data is an opaque pointer.  No explicit cast is needed.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

With real-time preemption, regmap functions cannot be used in the
implementation of irq_chip since they use spinlocks which may sleep.

Move the setting of the mux for IRQs to an irq_bus_sync_unlock handler
where we are allowed to sleep.
Signed-off-by: NJohn Keeping <john@metanate.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

We need to avoid calling regmap functions from irq handlers, so the next
commit is going to move the call to rockchip_set_mux() into an
irq_bus_sync_unlock handler.  But we can't return an error from there so
we still need to check the settings from rockchip_irq_set_type() and we
will use this new rockchip_verify_mux() function from there.
Signed-off-by: NJohn Keeping <john@metanate.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This lock is used from rockchip_irq_set_type() which is part of the
irq_chip implementation and thus must use raw_spinlock_t as documented
in Documentation/gpio/driver.txt.
Signed-off-by: NJohn Keeping <john@metanate.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

regmap_update_bits does its own locking and everything else accessed
here is a local variable so there is no need to lock around it.
Signed-off-by: NJohn Keeping <john@metanate.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Rockchip finally named the SOC as RV1108, so change it.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
[adapted rk1108 dtsi to keep bisectability]
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Currently we are trying to enable/disable the clk of irq's gpio bank when
unmask/mask irq. But the kernel's "lazy disable approach" will skip masking
irq when the irq chip doesn't support irq_disable ops.

So we may hit this case:
	irq_enable-> enable clk
	irq_disable-> noop
	irq_enable-> enable clk again
	irq_disable-> noop
Signed-off-by: NJeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

To prevent external signal crosstalk, some pins need to
enable input schmitt, like i2c pins, 32k-input pin and so on.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Note, the iomux of following pins are special, need to
be recalculated specially.
 - gpio2_b4
 - gpio2_b7
 - gpio2_c7
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some pins are special at a bank so that add
IOMUX_RECALCED type to indicate which iomux source
of the bank need to be recalculated. If the mux
recalculateed callback and IOMUX_RECALCED type
were set, recalculate the pins' iomux by using
mux recalculated data struct.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch supports 3bit width iomux type.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The current pinconf packed format allows only 16-bit argument limiting
the maximum value 65535. For most types this is enough. However,
debounce time can be in range of hundreths of milliseconds in case of
mechanical switches so we cannot represent the worst case using the
current format.

In order to support larger values change the packed format so that the
lower 8 bits are used as type which leaves 24 bits for the argument.
This allows representing values up to 16777215 and debounce times up to
16 seconds.

We also convert the existing users to use 32-bit integer when extracting
argument from the packed configuration value.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This add pinctrl support for Rockchip RK1108 Soc.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>

Series-changes: 2
- add pull and drive-strength functionality

Series-changes: 3
- two minor CodingStyle fixes adviced by Heiko
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The Kconfig currently controlling compilation of this code is:

drivers/pinctrl/Kconfig:config PINCTRL_ROCKCHIP
drivers/pinctrl/Kconfig:        bool

...meaning that it currently is not being built as a module by anyone.

Lets remove the couple traces of modular infrastructure use, so that
when reading the driver there is no doubt it is builtin-only.

Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.

We also delete the MODULE_LICENSE tag etc. since all that information
is already contained at the top of the file in the comments.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-gpio@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The rockchip_irq_gc_mask_set_bit() function is not exported our used
outside of ppinctrl-rockchip.c so fix the following sparse error by
making it static:

drivers/pinctrl/pinctrl-rockchip.c:2010:6: warning:
  symbol 'rockchip_irq_gc_mask_set_bit' was not declared.
  Should it be static?
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

When building with 'make W=1', we get harmless warnings about
five drivers in drivers/pinctrl, which all contain a copy of
the same line:

drivers/pinctrl/freescale/pinctrl-imx1-core.c:160:1: error: 'inline' is not at beginning of declaration [-Werror=old-style-declaration]

This replaces the somewhat nonstandard 'static const inline'
with 'static inline const', which has the same meaning but
does not cause this warning.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch fixes the pinctrl pull bias setting, since the pull up/down
setting is the contrary for gpio0(just the gpio0a and gpio0b) and
gpio2(just the gpio2c and gpio2d).

From the TRM said, the gpio0a pull polarity setting:
gpio0a_p
GPIO0A PE/PS programmation section, every
GPIO bit corresponding to 2bits[PS:PE]
2'b00: Z(Normal operation);
2'b11: weak 1(pull-up);
2'b01: weak 0(pull-down);
2'b10: Z(Normal operation);

Then, the other gpios setting as the following:
gpio1a_p (e.g.: gpio1, gpio2a, gpio2b, gpio3...)
GPIO1A PU/PD programmation section, every
GPIO bit corresponding to 2bits
2'b00: Z(Normal operation);
2'b01: weak 1(pull-up);
2'b10: weak 0(pull-down);
2'b11: Z(Normal operation);

For example,(rk3399evb board)
sdmmc_cd --->gpio0_a7
localhost / # io -r -4 0xff320040
ff320040: 00004d5f
In general,the value should be 0x0000cd5f since the pin has been set
in the dts.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Signed-off-by: NCaesar Wang <wxt@rock-chips.com>
Cc: linux-gpio@vger.kernel.org
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use devm_pinctrl_register() for pin control registration.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds the get_direction to support the gpio
interface.

The gpio direction is not used on rockchip platform when use the gpio
debugfs.

Tested on kylin board. (RK3036 SoCs)
The repro steps:
$/sys/class/gpio/
echo 53 > export
$/sys/class/gpio/gpio53# cat direction
in
In general, the gpio53 should be out value, but the direction is the
default value 'in',  since the get_direction didn't supported in rockchip
pinctrl.

So, we should add this patch to support it.

Cc: linux-gpio@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Reported-by: NJeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: NCaesar Wang <wxt@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The pinctrl of rk3399 is much different from other's,
especially the 3bits of drive strength.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

for_each_child_of_node performs an of_node_get on each iteration, so a
return from the loop requires an of_node_put.

A simplified version of the semantic patch that fixes this problem is as
follows (http://coccinelle.lip6.fr):

// <smpl>
@@
local idexpression n;
expression e,e1;
@@

 for_each_child_of_node(e1,n) {
   ...
(
   of_node_put(n);
|
   e = n
|
   return n;
|
+  of_node_put(n);
?  return ...;
)
   ...
 }
// </smpl>
Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The pinctrl of rk3228 is much the same as rk3288's, but
without pmu.
Signed-off-by: NJeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The name .dev in a struct is normally reserved for a struct device
that is let us say a superclass to the thing described by the struct.
struct gpio_chip stands out by confusingly using a struct device *dev
to point to the parent device (such as a platform_device) that
represents the hardware. As we want to give gpio_chip:s real devices,
this is not working. We need to rename this member to parent.

This was done by two coccinelle scripts, I guess it is possible to
combine them into one, but I don't know such stuff. They look like
this:

@@
struct gpio_chip *var;
@@
-var->dev
+var->parent

and:

@@
struct gpio_chip var;
@@
-var.dev
+var.parent

and:

@@
struct bgpio_chip *var;
@@
-var->gc.dev
+var->gc.parent

Plus a few instances of bgpio that I couldn't figure out how
to teach Coccinelle to rewrite.

This patch hits all over the place, but I *strongly* prefer this
solution to any piecemal approaches that just exercise patch
mechanics all over the place. It mainly hits drivers/gpio and
drivers/pinctrl which is my own backyard anyway.

Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
Cc: Rafał Miłecki <zajec5@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Alek Du <alek.du@intel.com>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Takashi Iwai <tiwai@suse.com>
Acked-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NJiri Kosina <jkosina@suse.cz>
Acked-by: NHans-Christian Egtvedt <egtvedt@samfundet.no>
Acked-by: NJacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Replace all trivial request/free callbacks that do nothing but call into
pinctrl code with the generic versions.
Signed-off-by: NJonas Gorski <jogo@openwrt.org>
Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Acked-by: NEric Anholt <eric@anholt.net>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: NAndrew Bresticker <abrestic@chromium.org>
Acked-by: NBaruch Siach <baruch@tkos.co.il>
Acked-by: NMatthias Brugger <matthias.bgg@gmail.com>
Acked-by: NLee Jones <lee@kernel.org>
Acked-by: NLaxman Dewangan <ldewangan@nvidia.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Many parts of pinctrl rk3036 are similar to rk2928's.
Signed-off-by: NXing Zheng <zhengxing@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.

Remove the argument.

Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>

gpio can keep state even the clock disable, for save power
consumption, only enable gpio clock when it setting
Signed-off-by: NLin Huang <hl@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Tested-by: NDouglas Anderson <dianders@chromium.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.

Search and update was done with coccinelle and the invaluable help of
Julia Lawall.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org

Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.
Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>