- 04 4月, 2016 10 次提交
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由 Rajkumar Manoharan 提交于
Whenever htt rx indication i.e target to host messages are received on rx copy engine (CE5), the message will be freed after processing the response. Then CE 5 will be refilled with new descriptors at post rx processing. This memory alloc and free operations can be avoided by reusing the same descriptors. During CE pipe allocation, full ring is not initialized i.e n-1 entries are filled up. So for CE 5 full ring should be filled up to reuse descriptors. Moreover CE 5 write index will be updated in single shot instead of incremental access. This could avoid multiple pci_write and ce_ring access. From experiments, It improves CPU usage by ~3% in IPQ4019 platform. Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Rajkumar Manoharan 提交于
The physical address necessary to unmap DMA ('bufferp') is stored in ath10k_skb_cb as 'paddr'. For diag register read and write operations, 'paddr' is stored in transfer context. ath10k doesn't rely on the meta/transfer_id. So the unused output arguments {bufferp, nbytesp and transfer_idp} are removed from CE recv_next completion. Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Rajkumar Manoharan 提交于
Except qca61x4 family chips (qca6164, qca6174), copy engine 5 is used for receiving target to host htt messages. In follow up patch, CE5 descriptors will be reused. In such case, same API can not be used as htc layer callback where the response messages will be freed at the end. Hence register new API for HTC layer that free up received message and keep the message handler common for both HTC and HIF layers. Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Rajkumar Manoharan 提交于
In follow up patch, htt rx descriptors will be reused instead of dealloc and refill. To achieve that htt rx indication messages should not be deferred and should be processed in pci tasklet itself. Also from rx indication message, mpdu_count alone is used. So it is maintained as atomic variable and all rx amsdu handlers are done processed from txrx tasklet. This change get rid of rx_compl_q usage. Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Rajkumar Manoharan 提交于
Make amsdu handlers (i.e amsdu_pop and rx_h_handler) common to both rx_ind and frag_ind htt events. It is sufficient to hold rx_ring lock for amsdu_pop alone and no need to hold it until the packets are delivered to mac80211. This helps to reduce rx_lock contention as well. Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Rajkumar Manoharan 提交于
The fw descriptor was never used and probably never will be. It makes little sense to maintain support for it. Remove it and simplify rx processing. This will make it easier to optimize rx processing later as well. Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Rajkumar Manoharan 提交于
To optmize CPU usage htt rx descriptors will be reused instead of refilling it for htt rx copy engine (CE5). To support that all htt rx indications should be proecssed at same context. Instead of queueing actual indication message, queue copied message for txrx processing. Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Rajkumar Manoharan 提交于
To optimize CPU usage htt rx descriptors will be reused instead of refilling it for htt rx copy engine (CE5). To support that all htt rx indications should be processed at same context. FIFO queue is used to maintain tx completion status for each msdu. This helps to retain the order of tx completion. Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Mohammed Shafi Shajakhan 提交于
Rx duration support for per station is part of extended peer stats, enable provision to parse the same and provide backward compatibility based on the 'stats_id' event Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Raja Mani 提交于
Add API support for Extended Resource Configuration for 10.4. This is useful to enable new features like Peer Stats, LTEU etc if the firmware advertises support for the service. This is also done to provide backward compatibility with older firmware. Also for clarity send default host platform type as 'WMI_HOST_PLATFORM_HIGH_PERF', though this should not make any difference in functionality Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com> Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 23 3月, 2016 4 次提交
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由 Mohammed Shafi Shajakhan 提交于
Provide a debugfs entry to enable/ disable Peer Stats feature. Peer Stats feature is for developers/users who are more interested in studying in Rx/Tx stats with multiple clients connected, hence disable this by default. Enabling this feature by default results in unneccessary processing of Peer Stats event for every 500ms and updating peer_stats list (allocating memory) and cleaning it up ifexceeds the higher limit and this can be an unnecessary overhead during long run stress testing. Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Raja Mani 提交于
qca4019 calibration data is stored in the host memory and it's mandatory to download it even before reading board id and chip id from the target. Also, there is a need to execute otp (download and run) twice, one after cal data download and another one after board data download. Existing cal data file name 'cal-<bus>-<id>.bin' and device tree entry 'qcom,ath10k-calibration-data' used in ath10k has assumption that it carries other data (like board data) also along with the calibration data. But, qca4019 cal data contains pure calibration data (doesn't include any other info). So, using existing same cal file name and DT entry in qca4019 case would alter the purpose of it. To avoid this, new cal file name 'pre-cal-<bus>-<id>.bin' and new device tree entry name 'qcom,ath10k-pre-calibration-data are introduced. Overall qca4019's firmware download sequence would look like, 1) Download cal data (either from a file or device tree entry) at the address specified by target in the host interest area member "hi_board_data". 2) Download otp and run with 0x10 (PARAM_GET_EEPROM_BOARD_ID) as a argument. At this point, otp will take back up of downloaded cal data content in another location in the target and return valid board id and chip id to the host. 3) Download board data at the address specified by target in host interest area member "hi_board_data". 4) Download otp and run with 0x10000 (PARAM_FLASH_SECTION_ALL) as a argument. Now otp will apply cal data content from it's backup on top of board data download in step 3 and prepare final data base. 5) Download code swap and athwlan binary content. Above sequences are implemented (step 1 to step 4) in the name of pre calibration configuration. Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Raja Mani 提交于
ath10k_download_cal_dt() compares obtained cal data content length against QCA988X_CAL_DATA_LEN (2116 bytes). It was written by keeping qca988x in mind. In fact, cal data length is more chip specific. To make ath10k_download_cal_dt() more generic and reusable for other chipsets (like qca4019), cal data length is moved to hw_params. Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Raja Mani 提交于
Both ath10k_download_cal_file() and ath10k_download_cal_dt() uses hard coded file pointer (ar->cal_file) and device tree entry (qcom,ath10k-calibration-data) respectively to get calibration data content. There is a need to use those two functions in qca4019 calibration download sequence with different file pointer and device tree entry name. Modify those two functions to take cal data location as an argument. So that it can serve the purpose for other file pointer and device tree entry. This is just preparation before adding actual qca4019 calibration download sequence. No functional changes. Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 22 3月, 2016 4 次提交
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由 Raja Mani 提交于
There two things done in this patch, 1) Existing device tree entry 'qcom,ath10k-calibration-data' carries not only calibration data, it carries board specific data too. So, make appropriate update in doc. 2) ipq4019 wifi needs new devie tree entry to carry calibration data alone (called pre cal data, it doesn't include any other info). Using 'qcom,ath10k-calibration-data' for ipq4019 would alter the purpose of it. Hence, add new device tree entry called 'qcom,ath10k-pre-calibration-data' to carry only pre calibration data. Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
If device failed to init during early probing (which is quite rare) it triggered driver to compute crc before ar->firmware was ready causing an oops. Fixes: 3e58044b ("ath10k: print crc32 checksums for firmware and board files") Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
This prevents tx hangs or hiccups if pull-push supporting firmware defines per-txq thresholds or switches modes dynamically. Fixes: 29946878 ("ath10k: implement wake_tx_queue") Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
The wake_tx_queue/push_pending logic had a bug which could stop queues indefinitely effectivelly breaking traffic. Fixes: 29946878 ("ath10k: implement wake_tx_queue") Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 18 3月, 2016 5 次提交
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Results obtained from scan can be used for spectrum management by doing something like building information of preferred channel lists and sharing them with stations around. It is to be noted that traffic to the connected stations would be affected during the scan. Signed-off-by: NVasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Anilkumar Kolli 提交于
It is observed that, we are disabling the packet log if we write same value to the pktlog_filter for the second time. Always enable pktlogs on non zero filter. Fixes: 90174455 ("ath10k: add support to configure pktlog filter") Cc: stable@vger.kernel.org Signed-off-by: NAnilkumar Kolli <akolli@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Raja Mani 提交于
ath10k_core_probe_fw() simply returns error without freeing cached firmware file content when get board id operation fails. Free cached fw bin data in failure case to avoid memory leak. Fixes: db0984e5 ("ath10k: select board data based on BMI chip id and board id") Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Rajkumar Manoharan 提交于
Frames that are transmitted via MGMT_TX are using reserved descriptor slots in firmware. This limitation is for the htt_mgmt_tx path itself, not for mgmt frames per se. In 16 MBSSID scenario, these reserved slots will be easy exhausted due to frequent probe responses. So for 10.4 based solutions, probe responses are limited by a threshold (24). management tx path is separate for all except tlv based solutions. Since tlv solutions (qca6174 & qca9377) do not support 16 AP interfaces, it is safe to move management descriptor limitation check under mgmt_tx function. Though CPU improvement is negligible, unlikely conditions or never hit conditions in hot path can be avoided on data transmission. Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Rajkumar Manoharan 提交于
Whenever firmware is configuring operating channel during scan or home channel, channel change event will be indicated to host. In some cases (device probe/ last vdev down), target will be configured to default channel whereas host is unaware of target's operating channel. This leads to packet drop due to unknown channel and kernel log will be filled up with "no channel configured; ignoring frame(s)!". Fix that by handling HTT_T2H_MSG_TYPE_CHAN_CHANGE event. Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 11 3月, 2016 17 次提交
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由 Miaoqing Pan 提交于
Changes: - restrict only dump MAC registers - skip the register memory holes Data bus error, epc == 831d4040, ra == 831d403c Oops[#1]: CPU: 0 PID: 1536 Comm: cat Not tainted 3.14.0 #3 task: 82f87840 ti: 82f88000 task.ti: 82f88000 $ 0 : 00000000 00000001 deadc0de 1000fc03 $ 4 : b8100200 00000200 831e0000 80218788 $ 8 : 00000030 00000003 00000001 09524547 $12 : 00000000 810594f4 00000000 3a206d61 $16 : 831dd3c0 00000081 00000a00 c05ff000 $20 : 00005af6 00000200 00071b39 00071139 $24 : 00000001 80217760 $28 : 82f88000 82f89c60 c05ffa00 831d403c Hi : 00000000 Lo : 453c0000 epc : 831d4040 ath_ahb_exit+0x2198/0x2904 [ath9k] Not tainted ra : 831d403c ath_ahb_exit+0x2194/0x2904 [ath9k] Status: 1000fc03 KERNEL EXL IE Cause : 4080801c PrId : 00019374 (MIPS 24Kc) Stack : 00000001 00000000 0000000e 80475c60 0000000e 800a8ebc 00000000 00000000 00000001 00000007 00000000 800a9678 00000000 00000004 00000002 00000010 00000000 00000000 00000000 00000000 80475c60 0000000e 000009ec c05ff000 831dd3c0 00000080 00000a00 c05ff000 00005af6 00000200 00071b39 0007114d c05ff9ec 800a9904 831dd3c0 82f89d10 00000001 81082194 831d8f0c 82f89d14 ... Call Trace: [<831d4040>] ath_ahb_exit+0x2198/0x2904 [ath9k] [<831d403c>] ath_ahb_exit+0x2194/0x2904 [ath9k] Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Steve deRosier 提交于
Certain 6004 firmware releases redefine the WMI_TXE_NOTIFY_EVENTID event number and sends the new event frequently. However it doesn't have the tx-err-notify feature and thus this firmware capability flag isn't set on the firmware package. By guarding the processing of this event by the same method we guard the sending of the WMI_SET_TXE_NOTIFY_CMDID command, we can ignore the spurious event that we don't know how to process. Without this change we call cfg80211_cqm_txe_notify() with possibly bad data. Signed-off-by: NSteve deRosier <steve.derosier@lairdtech.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
Allow to set wl_active_time and wl_qc_time for SOC chips, also adjust bt_time_extend and bt_first_slot_time. Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
The registers of AR_GPIO_INPUT_MUX1 and AR_GPIO_PDPU were removed from SOC chips, fix invalid accessing Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
Add bits definition for AR_BT_COEX_MODE2 and AR_BT_COEX_MODE3, which needed by SOC chips (AR9340, AR9531, AR9550, AR9561). Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
Add new platform data to allow override BTCoex default pin. Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
Make ath_init_leds() and ath_deinit_leds() pairs as the only API to set leds, also removed direction configuration from ath9k_start() and ath9k_stop(). So the initial is more clear now. Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
For SOC GPIOs, should call ath9k_hw_gpio_free() to release the GPIO resource. Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
commit 61b559de ("ath9k: add extra GPIO led support") added ath9k to support access SOC's GPIOs, but implemented in a separated API: ath9k_hw_request_gpio(). So this patch make the APIs more common, to support both of WMAC and SOC GPIOs. The new APIs as below, void ath9k_hw_gpio_request_in(); void ath9k_hw_gpio_request_out(); void ath9k_hw_gpio_free(); NOTE, the BSP of the SOC chips(AR9340, AR9531, AR9550, AR9561) should set the corresponding MUX registers correctly. Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
Define correct GPIO numbers and MASK bits to indicate the WMAC GPIO resource. Allow SOC chips(AR9340, AR9531, AR9550, AR9561) to access all GPIOs which rely on gpiolib framework. But restrict SOC AR9330 only to access WMAC GPIO which has the same design with the old chips. Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Bob Copeland 提交于
Use tabs here. Found by smatch. Signed-off-by: NBob Copeland <me@bobcopeland.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Bob Copeland 提交于
These lines belong inside the if-statement above, not in the main body of the switch. Found by smatch. Signed-off-by: NBob Copeland <me@bobcopeland.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Bob Copeland 提交于
smatch said: drivers/net/wireless/ath/ath5k/phy.c:1449 ath5k_hw_channel() warn: inconsistent indenting drivers/net/wireless/ath/ath5k/reset.c:637 ath5k_hw_on_hold() warn: inconsistent indenting drivers/net/wireless/ath/ath5k/reset.c:702 ath5k_hw_nic_wakeup() warn: inconsistent indenting All of these lines were indented a tabstop too far. Signed-off-by: NBob Copeland <me@bobcopeland.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
Set QCA9561 peak detect threshold to 11. Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
commit f49c90db ("ath9k: Add a macro to identify PCOEM chips") defined AR_SREV_9003_PCOEM macro, its more clear to use the macro instead of checking one by one. Also removed PCOEM chips checking in the callback of ar9003_hw_do_pcoem_manual_peak_cal() which only for PCOEM chips. Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
HW peak detect calibration would fail, enable all ar9300 chips manual peak calibration instead. Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Miaoqing Pan 提交于
HW peak detect calibration would fail for AR9300 chips and we went for implementing the SW way of doing it instead of HW doing the peak detect calibration. Signed-off-by: NMiaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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