Currently the enabled MMC controllers on Pine H64 do not have bus-width
set, which make them fall back to 1-bit mode and become quite slow.

Fix this by add the corresponding bus-width properties.

Fixes: ecbd6118 ("arm64: allwinner: h6: enable MMC0/2 on Pine H64")
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The Pine H64 board have a MicroSD slot connected to MMC0 controller of
the H6 SoC and a eMMC slot connected to MMC2.

Enable them in the device tree.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The Allwinner H6 SoC have 3 MMC controllers.

Add device tree nodes for them.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

address-cells/size-cells is unnecessary for dwmac-sun8i node.
It was in early days, but since a mdio node is used, it could be
removed.

This patch fix the following DT warning:
Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: NCorentin Labbe <clabbe@baylibre.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Pine H64 board has an AXP805 PMIC on it, wired up in standalone, or
self-working, mode.

Enable it in the device tree.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Reviewed-by: NIcenowy Zheng <icenowy@aosc.io>
Tested-by: NIcenowy Zheng <icenowy@aosc.io>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>

Now that the device tree binding headers for the R_CCU have been merged,
we can use the macros, instead of raw numbers.

Switch to R_CCU macros for clock and reset indices.
Reviewed-by: NIcenowy Zheng <icenowy@aosc.io>
Tested-by: NIcenowy Zheng <icenowy@aosc.io>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>

On usual A64 board design the power of HDMI controller is connected to
DLDO1 of the AXP803 PMIC. If this regulator is shut down, the HDMI
output will be blank. Therefore the simplefb driver should keep this
regulator on.

Add the regulator to all currently available A64 boards' simplefb_hdmi
device node, if the board is capable of outputing HDMI.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

As the U-Boot bootloader now is also capable of initialize the HDMI on
A64 boards, add a simplefb device tree node for accessing the HDMI
framebuffer initialized by the bootloader.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

As we have all necessary parts to enable the DE2 CCU on the Allwinner
A64 SoC, add the needed device tree nodes, including the DE2 CCU itself
and the DE2 bus.

The "mixer0-lcd0" simplefb device node is updated to use the DE2 CCU.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The Pine H64 has 3 GPIO-controlled LEDs, which are labeled "heartbeat",
"link", and "status".

Add device nodes for them.
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>

Currently all ARM kernels will have s2idle enabled if CONFIG_SUSPEND is
present. In this case if the lid is closed, systemd-logind will enter
s2idle mode by default; however there's no possible wakeup source
defined, so the system will enter a forever idle.

Add the lid itself as a wakeup source, thus the system can wakeup when
the lid is opened.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Originally the name of the DLDO3 regulator on TERES-I is "eDP12", which
is not consistent with other regulator names.

Change it to "vdd-edp", in order to make it more consistent.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The card detect GPIO for Sopine and Pine64-LTS is PF6.
Add this to the dts.
Signed-off-by: NEmmanuel Vadot <manu@freebsd.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Allwinner A64 has a SRAM controller, and in the device tree currently
we have a syscon node to enable EMAC driver to access the EMAC clock
register. As SRAM controller driver can now export regmap for this
register, replace the syscon node to the SRAM controller device node,
and let EMAC driver to acquire its EMAC clock regmap.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
[wens@csie.org: Updated compatible string]
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>

Pinebook is a A64-based laptop produced by Pine64, with the following
peripherals:

USB:
- Two external USB ports (one is directly connected to A64's OTG
controller, the other is under a internal hub connected to the host-only
controller.)
- USB HID keyboard and touchpad connected to the internal hub.
- USB UVC camera connected to the internal hub.

Power-related:
- A DC IN jack connected to AXP803's DCIN pin.
- A Li-Polymer battery connected to AXP803's battery pins.

Storage:
- An eMMC by Foresee on the main board (in the product revision of the
main board it's designed to be switchable).
- An external MicroSD card slot.

Display:
- An eDP LCD panel (1366x768) connected via an ANX6345 RGB-eDP bridge.
- A mini HDMI port.

Misc:
- A Hall sensor designed to detect the status of lid, connected to GPIO PL12.
- A headphone jack connected to the SoC's internal codec.
- A debug UART port muxed with headphone jack.

This commit adds basical support for it.

[vasily: squashed several commits into one, added simplefb node, added usbphy
	 to ehci0 and ohci0 nodes and other cosmetic changes to dts]
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The Allwinner A64 SoC features two PWM controllers, which are fully
compatible to the one used in the A13 and H3 chips.

Add the nodes for the devices (one for the "normal" PWM, the other for
the one in the CPUS domain) and the pins their outputs are connected to.

On the A64 the "normal" PWM is muxed together with one of the MDIO pins
used to communicate with the Ethernet PHY, so it won't be usable on many
boards. But the Pinebook laptop uses this pin for controlling the LCD
backlight.

On Pine64 the CPUS PWM pin however is routed to the "RPi2" header,
at the same location as the PWM pin on the RaspberryPi.

Tested on Pinebook and Teres-I

[vasily: fixed comment message as requested by Stefan Bruens, added default
         muxing options to pwm and r_pwm nodes]
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
Tested-by: NHarald Geyer <harald@ccbib.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
two groups of pinmuxes on PL bank, so it's called R_I2C.

Add support for this I2C controller and the pinmux which doesn't conflict
with RSB.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Enable AP6330 WiFi/BT combo chip on Amarula A64-Relic board:
- WiFi SDIO interface is connected to MMC1
- WiFi WL-PMU-EN pin connected to gpio PL2: attach to mmc-pwrseq
- WiFi WL-WAKE-AP pin connected to gpio PL3
- 32kHz external oscillator gate clock from RTC
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Outside of SOC few chips need external clock source
through RTC example Wifi chip. So RTC clock nodes to
phandle 32kHz external oscillator.

prefix rtc- with clock-output-names defined in
dt-binding to avoid confusion with existing osc32k name.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Amarula A64-Relic is Allwinner A64 based IoT device, which support
- Allwinner A64 Cortex-A53
- Mali-400MP2 GPU
- AXP803 PMIC
- 1GB DDR3 RAM
- 8GB eMMC
- AP6330 Wifi/BLE
- MIPI-DSI
- CSI: OV5640 sensor
- USB OTG
- 12V DC power supply
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The OrangePi PC2 have an mx25l1606e spi flash.
Add a node for it.
Signed-off-by: NEmmanuel Vadot <manu@freebsd.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The Sopine and Pine64-LTS have a winbond w25q128 spi flash on spi0.
Add a node for it.
Signed-off-by: NEmmanuel Vadot <manu@freebsd.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Pine H64 board has a PCF8563 dedicated RTC connected to its R_I2C bus.

Enable the R_I2C bus and add the RTC to the device tree.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Allwinner H6 SoC has a R_I2C controller wired to the PL0/PL1 pins, which
are used in the reference design to connect AXP805 PMIC.

Add support for it.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Allwinner H6 SoC has also a R_INTC interrupt controller like Allwinner
A64 SoC, but has its base address changed due to the memory map change
in H6.

Add it into the device tree.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Allwinner H6 SoC has a R_PIO pin controller which controls PL and PM
GPIO banks.

Add support for it.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Allwinner H6 has also a PRCM CCU.

Add its device node into the device tree.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The Libre Computer Board ALL-H3-CC from Libre Technology is a Raspberry
Pi B+ form factor single board computer based on the Allwinner H2+, H3,
or H5 SoCs with the same PCB.
The board has 2GB DDR3 SDRAM, provided by 4 2Gb chips. The mounting holes
and connectors are in the exact same position as on the Raspberry Pi B+.

This patch enables the H5 variant using the H3 board definition moved to
a common dtsi in an earlier patch. The dts simply include the common dtsi
and declares the correct compatible and model of the H5 variant.
Suggested-by: NCorentin Labbe <clabbe@baylibre.com>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The dtb entries for NanoPi boards in the device tree makefile somehow
ended up after the Orange Pi boards.

Move them so the list is properly sorted.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

At the board level, we want to be able to specify what regulator
supplies power to the cpu domain.

Add a label to the first cpu node so we can reference it later.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Add usb otg support for bananapi-m64 board,
- USB-ID connected with PH9
- USB-DRVVBUS controlled by N_VBUSEN pin from PMIC
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>

Add reg_drivevbus regualtor for boards which are using
external regulator to drive the OTG VBus through N_VBUSEN
PMIC pin.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>

As the definition of CCU slice macros are already merged into the source
tree, restore the usage of the macros now.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The Xunlong Orange Pi Zero Plus is single board computer.
- H5 Quad-core 64-bit Cortex-A53
- 512MB DDR3
- microSD slot
- Debug TTL UART
- 1000M/100M/10M Ethernet RJ45
- Realtek RTL8189FTV
- Spi flash (2MB)
- One USB 2.0 HOST, One USB 2.0 OTG

This is based on a patch from armbian:
https://github.com/armbian/build/blob/master/patch/kernel/sunxi-next/sunxi-add-orangepi-zero-plus.patchSigned-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The TERES-I is an open hardware laptop built by Olimex using the
Allwinner A64 SoC.

Add the board specific .dts file, which includes the A64 .dtsi and
enables the peripherals that we support so far.
Signed-off-by: NHarald Geyer <harald@ccbib.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The A64 SoC features two display pipelines, one has a LCD output, the
other has a HDMI output.

Add support for simplefb for the LCD output. Tested on Teres I.

This patch was inspired by work of Icenowy Zheng.
Signed-off-by: NHarald Geyer <harald@ccbib.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Add a watchdog node for the A64, automatically enabled on all boards.
Since the device is compatible with an existing driver, we only reserve
a new compatible string to be used together with the fall back.
Tested on Olimex Teres-I.
Signed-off-by: NHarald Geyer <harald@ccbib.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Add the proper pin group node to reference in board files.
Reviewed-by: NAndre Przywara <andre.przywara@arm.com>
Signed-off-by: NHarald Geyer <harald@ccbib.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Pine H64 is an Allwinner H6-based SBC from Pine64, with the following
features:

- 1GiB/2GiB/4GiB LPDDR3 DRAM (in 4GiB situation only 3GiB is
accessible)
- AXP805 PMIC
- Raspberry-Pi-compatible GPIO header, "Euler" GPIO header (not
compatible with the "Euler" on Pine A64) and "Expansion" pin header
- 2 USB 2.0 ports and 1 USB 3.0 ports
- Audio jack
- MicroSD slot and eMMC module slot
- on-board SPI NOR flash
- 1Gbps Ethernet port (via RTL8211E PHY)
- HDMI port

Adds initial support for it, including the UART on the Expansion pin
header.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Reviewed-by: NAndre Przywara <andre.przywara@arm.com>
Tested-by: NAndre Przywara <andre.przywara@arm.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Allwinner H6 is a new SoC with Cortex-A53 cores from Allwinner, with its
memory map fully reworked and some high-speed peripherals (PCIe, USB
3.0) introduced.

This commit adds the basical DTSI file of it, including the clock
support and UART support.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Reviewed-by: NAndre Przywara <andre.przywara@arm.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>