Currently the enabled MMC controllers on Pine H64 do not have bus-width
set, which make them fall back to 1-bit mode and become quite slow.

Fix this by add the corresponding bus-width properties.

Fixes: ecbd6118 ("arm64: allwinner: h6: enable MMC0/2 on Pine H64")
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

The idle-states binding documentation[1] mentions that the
'entry-method' property is required on 64-bit platforms and must be
set to "psci".

commit a13f18f5 ("Documentation: arm: Fix typo in the idle-states
bindings examples") attempted to fix this earlier but clearly more is
needed.

Fix the cpu-capacity.txt documentation that uses the incorrect value so
we don't get copy-paste errors like these. Clarify the language in
idle-states.txt by removing the reference to the psci bindings that
might be causing this confusion.

Finally, fix devicetrees of various boards to reflect current
documentation.

[1] Documentation/devicetree/bindings/arm/idle-states.txt (see
idle-states node)
Signed-off-by: NAmit Kucheria <amit.kucheria@linaro.org>
Acked-by: NSudeep Holla <sudeep.holla@arm.com>
Acked-by: NLi Yang <leoyang.li@nxp.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This patch is to add clocks property for fman ptp timer node.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Enable all 4 SEC units available on d05 boards.
Signed-off-by: NJonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Modify the base address of the mdio mux driver to point to the
start of the mdio mux block's register address space.
Signed-off-by: NArun Parameswaran <arun.parameswaran@broadcom.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

SDM845 has two tsens blocks, one with 13 sensors and the other with 8
sensors. It uses version 2 of the TSENS IP, so use the fallback property to
allow more common code.
Signed-off-by: NAmit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: NMatthias Kaehlcke <mka@chromium.org>
Reviewed-by: NMatthias Kaehlcke <mka@chromium.org>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

We also split up the regmap address space into two, for the TM and SROT
registers. This was required to deal with different address offsets for the
TM and SROT registers across different SoC families.

8996 has two TSENS IP blocks, initialise the second one too.

Since tsens-common.c/init_common() currently only registers one address
space, the order is important (TM before SROT). This is OK since the code
doesn't really use the SROT functionality yet.
Signed-off-by: NAmit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: NMatthias Kaehlcke <mka@chromium.org>
Reviewed-by: NMatthias Kaehlcke <mka@chromium.org>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

On Spreadtrum platform, the current clocksource for timekeeping will be
stopped in suspend state, thus add one always-on timer to calculate the
suspend time.
Signed-off-by: NBaolin Wang <baolin.wang@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add the Spreadtrum SC27XX PMICs ADC device node which contains 32 channels.
Signed-off-by: NBaolin Wang <baolin.wang@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This patch adds the eFuse device node for Spreadtrum SC27XX PMICs.
The SC27XX eFuse contains 32 blocks and each block's data width is
16 bits.
Signed-off-by: NBaolin Wang <baolin.wang@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This patch adds the vibrator device node for Spreadtrum SC27XX PMICs.
Signed-off-by: NBaolin Wang <baolin.wang@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The SC27xx breathing light controller can support 3 outputs:
red LED, green LED and blue LED.
Signed-off-by: NBaolin Wang <baolin.wang@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add the SPDIF playback codec to the axg s400 board
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add the es7154 digital to analog converter which supplies the
lienout jack of the s400
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add the es7241 analog to digital converter which is fed by the
lienin jack of the s400
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add the devices reponsible for managing the i2s/tdm clocks and pads
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add the tdm devices responsible for serializing audio samples
for i2s/tdm interfaces
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add the tdm devices responsible for decoding the data provided
through audio serial interface.
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add the SPDIF output device of the axg audio subsystem
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

This commit adds led support for the Firefly-RK3399. The board has two
leds, this commit enables them.
Signed-off-by: NShohei Maruyama <cheat.sc.linux@outlook.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Commit 0fbc47d9 ("phy: rockchip-typec: deprecate some DT properties
for various register fields.") deprecates some Rockchip Type-C
properties. As these are now not needed, remove from the device tree
file.
Signed-off-by: NEnric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

This commit adds power button support for the Firefly-RK3399.
Signed-off-by: NShohei Maruyama <cheat.sc.linux@outlook.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Add the audio memory arbiter which control the access of the audio
fifos to the DDR.
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

The usb power regulator is supplied by the vcc 5v regulator and
controlled by a GPIO. This will be needed to enable usb.
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

This regulator is controlled by a GPIO and supplies various devices
on the board, such as the lineout codec, the usb supply or the lcd
controller.
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add the parent supply of the s400 power supplies.
Also add 'regulator-always-on' property on the regulators which can't
be disabled
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Current LED trigger, 'bt', is not known/used by any existing driver.
Fix this by renaming it to 'bluetooth-power' trigger which is
controlled by the Bluetooth subsystem.

Fixes: 9943230c ("arm64: dts: qcom: Add apq8016-sbc board LED's related device nodes")
Signed-off-by: NLoic Poulain <loic.poulain@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

In commit 8e4947ee477d ("arm64: dts: qcom: sdm845: Add I2C, SPI, and
UART9 nodes") I accidentally forgot to add the line:

  status = "disabled";

to qupv3_id_0 to match qupv3_id_1.  Add it now.  NOTE: right now the
only sdm845 board with a device tree in mainline is MTP and that board
currently doesn't have any peripherals under qupv3_id_0.  If any board
was currently using peripherals under qupv3_id_0 then that board would
need to add this snippet to their board dts file:

  &qupv3_id_0 {
     status = "okay";
  };
Signed-off-by: NDouglas Anderson <dianders@chromium.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Drop legacy suffix for clocks used by MSM DRM driver.

The _clk suffix has been deprecated since commit 20c3bb80235 ("drm/msm:
drop _clk suffix from clk names").

Fixes: 720c3bb8 (drm/msm: drop _clk suffix from clk names)

The following warnings during boot have been seen since the referenced
fixes commit:

msm_dsi_phy 1a98300.dsi-phy: Using legacy clk name binding.  Use "iface" instead of "iface_clk"
msm 1a00000.mdss: Using legacy clk name binding.  Use "iface" instead of "iface_clk"
msm 1a00000.mdss: Using legacy clk name binding.  Use "bus" instead of "bus_clk"
msm 1a00000.mdss: Using legacy clk name binding.  Use "vsync" instead of "vsync_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding.  Use "bus" instead of "bus_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding.  Use "iface" instead of "iface_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding.  Use "core" instead of "core_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding.  Use "vsync" instead of "vsync_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding.  Use "mdp_core" instead of "mdp_core_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding.  Use "iface" instead of "iface_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding.  Use "bus" instead of "bus_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding.  Use "byte" instead of "byte_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding.  Use "pixel" instead of "pixel_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding.  Use "core" instead of "core_clk"
Signed-off-by: NNiklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: NNicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add gpio-line-names property for Dragonboard820c based on APQ8096 SoC.
There are 4 gpio-controllers present on this board, including the
APQ8096 SoC, PM8994 (GPIO and MPP) and PMI8994 (GPIO).

Lines names are derived from 96Boards CE Specification 1.0, Appendix
"Expansion Connector Signal Description". Line names for PMI8994 MPP
pins are not added due to the absence of the gpio-controller support.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This adds the rpmh-clk node to sdm845 based on the examples in the
bindings.
Signed-off-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This adds the rpmh-rsc node to sdm845 based on the examples in the
bindings.
Signed-off-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NLina Iyer <ilina@codeaurora.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The debug UART is very useful to have.  I2C10 is enabled as an example
of a I2C port we can talk on for now.  Eventually we'll want to put
peripherals under it.
Signed-off-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This adds nodes to SDM845-dtsi for all the I2C ports, all the SPI
ports, and UART9.  Note that I2C / SPI / UART are a bit strange on
sdm845 because each "serial engine" has 4 pins associated with it and
depending on which firmware has been loaded into the serial engine
(loaded by the BIOS) the serial engine can behave like an I2C port, a
SPI port, or a UART.  As per the landed bindings that means that we
need to create one node for each possible mode that the port could be
in.  With 16 serial engines that means 16 x 3 = 48 nodes.

We get away with only creating 33 nodes for now because it seems very
likely that SDM845-based boards will actually all use the same UART
(UART 9) for debug purposes.  While another UART could be used for
something like Bluetooth communication we can cross that path when we
come to it.  Some documentation that I saw implied that using a UART
for "high speed" communications actually needs yet another different
serial engine firmware anyway.

Note that quick measurements adding all these nodes adds <10k of extra
space per dtb that they're included with.  If this becomes a problem
we may need to think of a different way to structure this so that
boards only get the nodes they need (or figure out how to get dtc to
strip 'disabled' nodes).  For now it seems OK.

These nodes were programmatically generated with a fairly dumb python
script.  See http://crosreview.com/1091631 for the source.

NOTE: at the moment SPI chip select doesn't appear to work in my tests
with the latest posted SPI driver.  All testing of SPI with this patch
has been done by hacking SPI to GPIO chip select.
Signed-off-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add basic support for the pm8005 and pm8998 PMICs. For now just support
the GPIO controllers.
Signed-off-by: NStephen Boyd <swboyd@chromium.org>
Reviewed-by: NEvan Green <evgreen@chromium.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add the CPU PMU on sdm845 to get perf support for hardware events.
Signed-off-by: NStephen Boyd <swboyd@chromium.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The Tanix TX3 Mini is a TV box based on the Amlogic S905W chipset.
There are two variants:
- 1 GiB or 2 GiB of DDR3 memory
- 8 GB or 16 GB eMMC flash

Both variants come with:
- 802.11 b/g/n wifi (Silicon Valley Microelectronics SSV6051, does not
  support Bluetooth)
- an LED 7 segment display with an FD628 controller
- HDMI and AV (CVBS) output
- 2x USB (utilizing both USB ports provided by the SoC)
- micro SD card slot
- serial console (uart_AO) has to be soldered after opening the case

The board seems to be very similar to the P23x and Q20x reference
boards, which is why it includes meson-gx-p23x-q20x.dtsi:
- eMMC reset routed to BOOT_9
- the SDIO wifi chip's reset line is routed to GPIOX_6 and the reference
  clock is 32.768KHz on PWM_E
- SD card detection is routed to CARD_6
- vqmmc of all MMC controllers is hard-wired to 1.8V (VDDIO_BOOT)
- uart_AO can be accessed after opening the case and soldering RX, TX
  and GND lines onto the exposed solder points (marked with RX, TX and
  GND)
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

S905W is a new SoC from the GXL series. It is a cost-reduced version of
the S905X.
The P281 development board from Amlogic uses the same layout as the P231
(S905D development board). Thus the new P281 board inherits
meson-gx-p23x-q20x.dtsi to avoid code-duplication.
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add the audio clock controller which is part of the audio bus
This controller takes 8 input plls, and the usual clock gate, from the
main clock controller. It provides the clocs for the all the devices of
the audio subsystem, such as tdms, spdif, pdm, etc.
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add initial device tree support for Mediatek X20 Development Board
based on MT6797 Deca core SoC. This board is one of the 96Boards
Consumer Edition platform.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>