Commit 9a1091ef ("irqchip: gic: Support hierarchy irq domain")
changed the GIC driver to use a non-legacy IRQ domain on DT
platforms. This patch assumes that DT-driven systems are getting
all of their interrupts from device tree.

Turns out that OMAP has quite a few hidden gems, and still uses
hardcoded interrupts despite having fairly complete DTs.

This patch attempts to work around these by offering a translation
method that can be called directly from the hwmod code, if present.
The same hack is sprinkled over PRCM and TWL.

It isn't pretty, but it seems to do the job without having to add
more hacks to the interrupt controller code.

Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432).
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Acked-by: NNishanth Menon <nm@ti.com>
[tony@atomide.com: updated to fix make randconfig issue]
Signed-off-by: NTony Lindgren <tony@atomide.com>

This helps to make the PRM registration modular, and also gets rid of a
cpu type check done later.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Some of the includes are totally unnecessary, remove some others in
preparation to make the PRCM its own driver.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
[paul@pwsan.com: updated to apply; fixed build error on OMAP2xxx-only configs]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Done in preparation to move cm/prm to drivers. These will still use
omap_test_timeout, but will not have access to common.h header under
mach-omap2 anymore.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch adds alwon powerdomain support for TI81XX, which is required
for stable functioning of a big number of TI81XX subsystems.
Signed-off-by: NAida Mynzhasova <aida.mynzhasova@skitlab.ru>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch adds required structures for powerdomain initialization on
the ti816x. It is impossible to use omap3430 structures in order to
initialize powerdomains on ti816x, because there are big differences
between PRCM module base address offsets on these CPUs.
Signed-off-by: NAida Mynzhasova <aida.mynzhasova@skitlab.ru>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Consolidate all of the copies of MAX_MODULE_HARDRESET_WAIT and
MAX_MODULE_SOFTRESET_WAIT into one place, arch/arm/mach-omap2/prm.h.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NVaibhav Hiremath <hvaibhav@ti.com>

Split omap2_set_globals_prcm() into PRM, CM, and PRCM_MPU variants, since
these are all separate IP blocks.  This should make it easier to move the
PRM, CM, PRCM_MPU code into drivers/ in future patchsets.

At this point arch/arm/plat-omap/include/plat/prcm.h is empty; a
subsequent patch will remove it, and remove the #include from all the
files that #include it.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NVaibhav Hiremath <hvaibhav@ti.com>

Add gpmc hwmod and associated interconnect data
Signed-off-by: NAfzal Mohammed <afzal@ti.com>
[paul@pwsan.com: added comments to the use of HWMOD_INIT_NO_RESET]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP
architecture. It's a dual core SOC with GIC used for interrupt
handling and with an integrated L2 cache controller.

OMAP5432 is another variant of OMAP5430, with a
memory controller supporting DDR3 and SATA.

Patch includes:
 - The machine specific headers and sources updates.
 - Platform header updates.
 - Minimum initialisation support for serial.
 - IO table init
Signed-off-by: NR Sricharan <r.sricharan@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>

Add missing terminators to the arrays of IRQ, DMA, and address space
structure records in the AM35xx UART4 hwmod data.  Without these
terminators, the following warnings appear on boot:

omap_uart.3: failed to claim resource 58
omap_device: omap_uart: build failed (-16)
WARNING: at /home/paul/linux/arch/arm/mach-omap2/serial.c:375 omap_serial_init_port+0x198/0x284()
Could not build omap_device for omap_uart: uart4.

Also, AM35xx uart4_fck has an incorrect parent clock pointer.  Fix it
and clean up a whitespace issue.

Fix some incorrectly-named macros related to AM35xx UART4.

Cc: Kyle Manna <kyle.manna@fuel7.com>
Cc: Mark A. Greer <mgreer@animalcreek.com>
Cc: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NMark A. Greer <mgreer@animalcreek.com>

Since IO Daisychain modifies only PRM registers, it makes sense to move
it to PRM File. Also changed the timeout value for IO chain enable to
100us and added a wait for status disable at the end.

Thanks to Nishanth Menon <nm@ti.com> for contributing a fix to the
timeout code waiting for WUCLKOUT to go high.
Signed-off-by: NVishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Reviewed-by: NRajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: renamed omap3_trigger_io_chain() to better describe the
 end result and to match other PRM functions; removed
 omap3_disable_io_chain(); moved MAX_IOPAD_LATCH_TIME to prcm-common as it
 will also be used by the OMAP4 code; removed unnecessary barrier;
 added kerneldoc; added credit for fix from Nishanth]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Instead of statically defining seperate arrays for every OMAP4+ archs,
have a generic init function to populate the arrays. This avoids the
need for creating new array for every arch added in the future that
reuses the prm and cm registers read/write code.

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NR Sricharan <r.sricharan@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add missing idle_st bit for 32k-sync timer into the prcm-common
header file, required for hwmod data.
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

PRCM chain handler needs to disable forwarding of interrupts during
suspend, because runtime PM is disabled and most of the drivers
are potentially not able to handle interrupts coming at this time.

This patch masks all the PRCM interrupt events if a PRCM interrupt
occurs during suspend, but does not ack them. Once suspend finish
is called, all the masked events will be re-enabled, which causes
immediate PRCM interrupt and handles the postponed event.

The suspend prepare and complete  callbacks will be called from
pm34xx.c / pm44xx.c files in the following patches.

The functions defined in this patch should eventually be moved to
suspend->prepare and suspend->finish driver hooks, once the PRCM
chain handler will be made as its own driver.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Tested-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
[paul@pwsan.com: add kerneldoc, add omap_prcm_irq_setup.saved_mask, add fn
 ptrs for save_and_clear_irqen() and restore_irqen()]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing PRCM event
names, which are then matched to the particular PRCM interrupt bit
depending on the specific OMAP SoC being used.

PRCM interrupts have two priority levels, high or normal. High priority
is needed for IO event handling, so that we can be sure that IO events
are processed before other events. This reduces latency for IO event
customers and also prevents incorrect ack sequence on OMAP3.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Avinash.H.M <avinashhm@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
Tested-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
[paul@pwsan.com: drop some dead code; use SoC-specific pending IRQ
 detection; move code to prm_common.c; add lots of documentation;
 remove saved_mask; add OCP barrier on ISR exit; improved error
 handling; split out per-SoC initialization to a separate patch]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add hwmod support to enable access to UART4 of the AM35xx series of
chips.  The UART4 device referenced from the TRM will show up as ttyO3.

This was tested on an AM3505.
Signed-off-by: NKyle Manna <kyle.manna@fuel7.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Update the omap3 hwmod data with the HSMMC info.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NKishore Kadiyala <kishore.kadiyala@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add McBSP hwmod data for OMAP2420.

Also add macros in prcm-common.h for idlest bit of OMAP24XX McBSP devices
Signed-off-by: NCharulatha V <charu@ti.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

In preparation for adding OMAP4-specific PRCM accessor/mutator
functions, split the existing OMAP2/3 PRCM code into OMAP2/3-specific
files.  Most of what was in mach-omap2/{cm,prm}.{c,h} has now been
moved into mach-omap2/{cm,prm}2xxx_3xxx.{c,h}, since it was
OMAP2xxx/3xxx-specific.

This process also requires the #includes in each of these files to be
changed to reference the new file name.  As part of doing so, add some
comments into plat-omap/sram.c and plat-omap/mcbsp.c, which use
"sideways includes", to indicate that these users of the PRM/CM includes
should not be doing so.

Thanks to Felipe Contreras <felipe.contreras@gmail.com> for comments on this
patch.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
Acked-by: NOmar Ramirez Luna <omar.ramirez@ti.com>
Cc: Felipe Contreras <felipe.contreras@gmail.com>
Acked-by: NFelipe Contreras <felipe.contreras@gmail.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Reviewed-by: NKevin Hilman <khilman@deeprootsystems.com>
Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
Tested-by: NRajendra Nayak <rnayak@ti.com>
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>

Split the existing cm44xx.h file into cm1_44xx.h and cm2_44xx.h files
so they match their underlying OMAP hardware modules.  Add clockdomain
offset information.

Add header files for the MPU local PRCM, prcm_mpu44xx.h, and for the
SCRM, scrm44xx.h.  SCRM register offsets still need to be added; TI
should do this.

Move the "_MOD" macros out of the prcm-common.h header file, into the
header file of the hardware module that they belong to.  For example,
OMAP4430_PRM_*_MOD macros have been moved into the prm44xx.h header.

Adjust #includes of all files that used the old PRCM header file names
to point to the new filenames.

The autogeneration scripts have been updated accordingly.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: NKevin Hilman <khilman@deeprootsystems.com>
Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
Tested-by: NRajendra Nayak <rnayak@ti.com>
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>

After Charu's GPIO hwmod patches, GPIO initialization on N800 emits
the following messages for all GPIO banks:

omap_hwmod: gpio1: cannot be enabled (3)

This is due to OMAP24XX_ST_GPIOS_SHIFT being defined as a bitmask.
Fix this and also fix two other macros that had the same problem.

Thanks to Tony Lindgren <tony@atomide.com> for originally reporting
this bug.

Signed-off-by: Paul Walmsley <paul@pwsan.com
Cc: Charulatha Varadarajan <charu@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

To standarize among other uarts (1 to 3), we shall now:

 - Enable uart4 autodile bit.
 - Enable uart4 wakeup in PER.
 - Allow uart4 to wakeup the MPU.
Signed-off-by: NSergio Aguirre <saaguirre@ti.com>
Signed-off-by: NGovindraj.R <govindraj.raja@ti.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

This patch adds omap_hwmod data for UARTs on OMAP2 and OMAP3
platforms.

UART4 support for 3630 and OMAP2 hwmod data added by Govindraj R.
Signed-off-by: NGovindraj.R <govindraj.raja@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

CM1, CM2, PRM, SCRM and MPU_PRCM are already defined in omap44xx.h
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>

The MPU subsystem was named based on internal code name (CHIRON).
This patch will remove all the occurences of the chiron name
are replace it with PRCM_MPU in order to differentiate
the MPU local PRCM to the global one.

Remove PDA_ from PRCM_MPU registers names to stick to the global
PRM naming convention.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>

Fix all of the remaining PRCM register shift/bitmask macros that did not
use the _SHIFT/_MASK suffixes to use them.  This makes the use of these
macros consistent.  It is intended to reduce error, as code can be inspected
visually by reviewers to ensure that bitshifts and bitmasks are used in
the appropriate places.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

Module offsets were same for OMAP2 and OMAP3 while they differ for OMAP4.
Hence we need different macros for identifying platform specific offsets.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

This patch adds OMAP4 specific PRM register bit field
shifts and masks. Auto generated using a python script
(gen_prm_shifts_and_mask.py) developed by Benoit Cousson,
Paul Walmsley and Rajendra Nayak.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds the offsets for new modules in PRM
and CM for OMAP4
These are autogenerated using a python script (gen_prcm44xx_h.py)
developed by Paul Walmsley and Benoit Cousson.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch is to sync the core linux-omap PM code with mainline.  This
code has evolved and been used for a while the linux-omap tree, but
the attempt here is to finally get this into mainline.

Following this will be a series of patches from the 'PM branch' of the
linux-omap tree to add full PM hardware support from the linux-omap
tree.

Much of this PM core code was written by Jouni Hogander with
significant contributions from Paul Walmsley as well as many others
from Nokia, Texas Instruments and linux-omap community.
Signed-off-by: NJouni Hogander <jouni.hogander@nokia.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

This patch fixes a few OMAP2xxx CM_IDLEST bits that were incorrectly
marked as being OMAP2xxx-wide, when they were actually 2420-specific.

Also, originally when the PRCM register macros were defined, bit shift
macros used a "_SHIFT" suffix, and mask macros used none.  This became
a source of bugs and confusion, as the mask macros were mistakenly
used for shift values.  Gradually, the mask macros have been updated,
piece by piece, to add a "_MASK" suffix on the end to clarify.  This
patch applies this change to the CM_IDLEST_* register bits.

The patch also adds a few bits that were missing, mostly from the 3430ES1
to ES2 revisions.

linux-omap source commits are d18eff5b5fa15e170794397a6a94486d1f774f77,
e1f1a5cc24615fb790cc763c96d1c5cfe6296f5b, and part of
9fe6b6cf8d9e0cbb429fd64553a4b3160a9e99e1
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add OMAP3-specific powerdomains.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Split sram24xx.S into sram242x.S and sram243x.S
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds common register access for 24xx and 34xx power
and clock management in order to share code between 24xx and 34xx.

Only change USB platform init code to use new register access, other
access will be changed in later patches.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>