1. 28 8月, 2015 8 次提交
  2. 22 1月, 2015 7 次提交
    • B
      drm/nouveau/device: namespace + nvidia gpu names (no binary change) · 9719047b
      Ben Skeggs 提交于
      The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
      which will be used for the DRM part of the driver.  This is being
      done in order to make it very clear as to what part of the driver a
      given symbol belongs to, and as a minor step towards splitting the
      DRM driver out to be able to stand on its own (for virt).
      
      Because there's already a large amount of churn here anyway, this is
      as good a time as any to also switch to NVIDIA's device and chipset
      naming to ease collaboration with them.
      
      A comparison of objdump disassemblies proves no code changes.
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      9719047b
    • B
      drm/nouveau/sw: rename from software (no binary change) · 8700287b
      Ben Skeggs 提交于
      Shorter device name, make consistent with our engine enums.
      
      The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
      which will be used for the DRM part of the driver.  This is being
      done in order to make it very clear as to what part of the driver a
      given symbol belongs to, and as a minor step towards splitting the
      DRM driver out to be able to stand on its own (for virt).
      
      Because there's already a large amount of churn here anyway, this is
      as good a time as any to also switch to NVIDIA's device and chipset
      naming to ease collaboration with them.
      
      A comparison of objdump disassemblies proves no code changes.
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      8700287b
    • B
      drm/nouveau/pm: rename from perfmon (no binary change) · d5752b9b
      Ben Skeggs 提交于
      Switch to NVIDIA's name for the device.
      
      The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
      which will be used for the DRM part of the driver.  This is being
      done in order to make it very clear as to what part of the driver a
      given symbol belongs to, and as a minor step towards splitting the
      DRM driver out to be able to stand on its own (for virt).
      
      Because there's already a large amount of churn here anyway, this is
      as good a time as any to also switch to NVIDIA's device and chipset
      naming to ease collaboration with them.
      
      A comparison of objdump disassemblies proves no code changes.
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      d5752b9b
    • B
      drm/nouveau/gr: rename from graph (no binary change) · b8bf04e1
      Ben Skeggs 提交于
      Shorter device name, match Tegra and our existing enums.
      
      The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
      which will be used for the DRM part of the driver.  This is being
      done in order to make it very clear as to what part of the driver a
      given symbol belongs to, and as a minor step towards splitting the
      DRM driver out to be able to stand on its own (for virt).
      
      Because there's already a large amount of churn here anyway, this is
      as good a time as any to also switch to NVIDIA's device and chipset
      naming to ease collaboration with them.
      
      A comparison of objdump disassemblies proves no code changes.
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      b8bf04e1
    • B
      drm/nouveau/mmu: rename from vmmgr (no binary change) · 5ce3bf3c
      Ben Skeggs 提交于
      Switch to NVIDIA's name for the device.
      
      The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
      which will be used for the DRM part of the driver.  This is being
      done in order to make it very clear as to what part of the driver a
      given symbol belongs to, and as a minor step towards splitting the
      DRM driver out to be able to stand on its own (for virt).
      
      Because there's already a large amount of churn here anyway, this is
      as good a time as any to also switch to NVIDIA's device and chipset
      naming to ease collaboration with them.
      
      A comparison of objdump disassemblies proves no code changes.
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      5ce3bf3c
    • B
      drm/nouveau/clk: rename from clock (no binary change) · f3867f43
      Ben Skeggs 提交于
      Rename to match the Linux subsystem responsible for the same kind of
      things.  Will be investigating how feasible it will be to expose the
      GPU clock trees with it at some point.
      
      The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
      which will be used for the DRM part of the driver.  This is being
      done in order to make it very clear as to what part of the driver a
      given symbol belongs to, and as a minor step towards splitting the
      DRM driver out to be able to stand on its own (for virt).
      
      Because there's already a large amount of churn here anyway, this is
      as good a time as any to also switch to NVIDIA's device and chipset
      naming to ease collaboration with them.
      
      A comparison of objdump disassemblies proves no code changes.
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      f3867f43
    • B
      drm/nouveau: remove symlinks, move core/ to nvkm/ (no code changes) · c39f472e
      Ben Skeggs 提交于
      The symlinks were annoying some people, and they're not used anywhere
      else in the kernel tree.  The include directory structure has been
      changed so that symlinks aren't needed anymore.
      
      NVKM has been moved from core/ to nvkm/ to make it more obvious as to
      what the directory is for, and as some minor prep for when NVKM gets
      split out into its own module (virt) at a later date.
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      c39f472e
  3. 10 8月, 2014 1 次提交
  4. 11 6月, 2014 2 次提交
  5. 26 3月, 2014 1 次提交
  6. 18 2月, 2014 1 次提交
  7. 23 1月, 2014 2 次提交
  8. 08 11月, 2013 9 次提交
  9. 26 4月, 2013 1 次提交
  10. 20 2月, 2013 2 次提交
    • B
    • M
      drm/nouveau/pbus: add a PBUS subdev that hands IRQs to the right subdevs · a10220bb
      Martin Peres 提交于
      We are going to use PTHERM's IRQs for thermal monitoring but we need to route
      them first.
      
      On nv31-50, PBUS's IRQ line is shared with GPIOs IRQs.
      
      It seems like nv10-31 GPIO interruptions aren't well handled. I kept the
      original behaviour but it is wrong and may lead to an IRQ storm.
      
      Since we enable all PBUS IRQs, we need a way to avoid being stormed if we
      don't handle them. The solution I used was to mask the IRQs that have not been
      handled. This will also print one message in the logs to let us know.
      
      v2: drop the shared intr handler because of was racy
      v3: style fixes
      v4: drop a useless construct in the chipset-dependent INTR
      v5: add BUS to the disable mask
      v6 (Ben Skeggs):
      - general tidy to match the rest of the driver's style
      - nva3->nvc0, nva3 can be serviced just fine with nv50.c, rnndb even notes
        that the THERM_ALARM bit got left in the hw until fermi anyway.. so, it's
        not going to conflict
      - removed the peephole and user stuff, for the moment.. will handle them
        later if we find a good reason to actually care..
      - limited INTR_EN to just what we can handle for now, mostly to prevent
        spam of unknown status bits (seen on at least nv4x)
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      Signed-off-by: NMartin Peres <martin.peres@labri.fr>
      a10220bb
  11. 29 11月, 2012 1 次提交
  12. 03 10月, 2012 5 次提交
    • B
      drm/nv41/vm: fix and enable use of "real" pciegart · 002d0c73
      Ben Skeggs 提交于
      Hopefully fixed the tlb flush timeout issue.  Was able to observe this
      condition occur occasionally, and it appears the binary driver doesn't
      wait on the old condition either..
      
      Should give 39-bit DMA addressing on the relevant chipsets.
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      002d0c73
    • B
      drm/nv44/vm: fix and enable use of "real" pciegart · e5f186c4
      Ben Skeggs 提交于
      Something seems to be missing in regards to flushing specific ranges of
      the TLB.  For the moment, flushing the entire thing seems to make it
      work alright.
      
      Should give 39-bit DMA addressing on the relevant chipsets.
      
      v2: allocate contig 16KiB for dummy pages, reported by mwk on irc
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      e5f186c4
    • M
      drm/nouveau/therm: move thermal-related functions to the therm subdev · aa1b9b48
      Martin Peres 提交于
      It looks scary because of the size, but I tried to keep the differences minimal.
      Further patches will fix the actual "driver" code and add new features.
      
      v2: change filenames, split to submodules
      
      v3: add a missing include
      
      v4: Ben Skeggs <bskeggs@redhat.com>
      - fixed set_defaults() to allow min_duty < 30 (thermal table will
        override this if it's actually necessary)
      - fixed set_defaults() to not provide pwm_freq so nv4x (which only has
        pwm_div) can actually work.  the boards using pwm_freq will have a
        thermal table entry to provide us the value.
      - removed unused files
      Signed-off-by: NMartin Peres <martin.peres@labri.fr>
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      aa1b9b48
    • B
      drm/nouveau/device: include the official chipset names · 2094dd82
      Ben Skeggs 提交于
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      2094dd82
    • B
      drm/nouveau: port all engines to new engine module format · ebb945a9
      Ben Skeggs 提交于
      This is a HUGE commit, but it's not nearly as bad as it looks - any problems
      can be isolated to a particular chipset and engine combination.  It was
      simply too difficult to port each one at a time, the compat layers are
      *already* ridiculous.
      
      Most of the changes here are simply to the glue, the process for each of the
      engine modules was to start with a standard skeleton and copy+paste the old
      code into the appropriate places, fixing up variable names etc as needed.
      
      v2: Marcin Slusarz <marcin.slusarz@gmail.com>
      - fix find/replace bug in license header
      
      v3: Ben Skeggs <bskeggs@redhat.com>
      - bump indirect pushbuf size to 8KiB, 4KiB barely enough for userspace and
        left no space for kernel's requirements during GEM pushbuf submission.
      - fix duplicate assignments noticed by clang
      
      v4: Marcin Slusarz <marcin.slusarz@gmail.com>
      - add sparse annotations to nv04_fifo_pause/nv04_fifo_start
      - use ioread32_native/iowrite32_native for fifo control registers
      
      v5: Ben Skeggs <bskeggs@redhat.com>
      - rebase on v3.6-rc4, modified to keep copy engine fix intact
      - nv10/fence: unmap fence bo before destroying
      - fixed fermi regression when using nvidia gr fuc
      - fixed typo in supported dma_mask checking
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      ebb945a9