Not every arch has io memory nor can this driver ever work
on UML/i386.
So, unbreak the build by fixing the dependencies.
Signed-off-by: NRichard Weinberger <richard@nod.at>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Not every arch has io memory.
So, unbreak the build by fixing the dependencies.
Signed-off-by: NRichard Weinberger <richard@nod.at>
Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The NAND core layer is already taking care of ecclayout propagation. Remove
this useless assignment.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

According to the ECC layout description the actual ecc.size is 512 bytes
and not mtd->writesize.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This field is not set in any board file and can thus be dropped.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

->ecc_layout is not used by any board file. Kill this field to avoid any
confusion. New boards are encouraged to use the default ECC layout defined
in NAND core.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The s3c2410 is allowing board data to overload the default ECC layout
defined inside the driver, but this feature is not used by board
specific definitions.
Kill this field so that we can easily move to a model where ecclayout
are dynamically allocated by the NAND controller driver.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The extended flash address needs to be subtracted from bcm_tag flash
image offsets. Move this value to the bcm_tag header file.

Renamed define name to consistently use bcm963xx for flash layout
which should be considered a property of the board and not the SoC
(i.e. bcm63xx could theoretically be used on a board without CFE
or any flash).
Signed-off-by: NSimon Arlott <simon@fire.lp0.eu>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: MTD Maling List <linux-mtd@lists.infradead.org>
Patchwork: https://patchwork.linux-mips.org/patch/11833/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Move Broadcom BCM963xx image tag data structure to include/linux/
so that drivers outside of mach-bcm63xx can use it.
Signed-off-by: NSimon Arlott <simon@fire.lp0.eu>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: MTD Maling List <linux-mtd@lists.infradead.org>
Patchwork: https://patchwork.linux-mips.org/patch/11832/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Remove the need for forward declaration and the risk for a null pointer
when accessing the private part of the compatible match table, by using
the newly introduced of_device_get_match_data function.
Signed-off-by: NRomain Izard <romain.izard.pro@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The error messages when the ECC controller is misconfigured through the
device tree are very precise. As a result they can (and will) get
obsolete when new revisions of the controller appear.

Simplify them before adding the support for the new revision.
Signed-off-by: NRomain Izard <romain.izard.pro@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

By default NAND driver will choose the highest ecc strength that oob
could contain, in this case, for some 8K+744 NAND flash, the ecc
strength will be up to 52bit, which beyonds the i.MX6QDL BCH capability
(40bit).

This patch allows the NAND driver try to use minimum required ecc
strength if it failed to use the highest ecc, even without explicitly
claiming "fsl,use-minimum-ecc" in dts.
Signed-off-by: NHan Xu <b45815@freescale.com>
Acked-by: NHuang Shijie <shijie.huang@arm.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

i.MX6SX supports deep sleep mode(DSM) that may turn off GPMI/BCH power
during suspend, add gpmi nand suspend/resume function to release DMA
channel in suspend function and re-init GPMI/BCH controller during
resume function.

Although it is not necessary to restore GPMI/BCH registers value for
i.MX6QDL, the code doesn't distinguish different platforms to keep the
code simple.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NHan Xu <han.xu@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Bit-flip errors may occur on NAND flashes and are harmless. Handle them
gracefully as read content is still reliable and can be parsed.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

We allowed using bcm47xxpart on BCM5301X arch with commit:
9e3afa5f ("mtd: bcm47xxpart: allow enabling on ARCH_BCM_5301X")

BCM5301X devices may contain some partitions in higher memory, e.g.
Netgear R8000 has board_data at 0x2600000. To detect them we should
use size limit on MIPS only.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The onenand_default_bbt() function is only used by the OneNAND core
and not by drivers, so there is no real need to export
it. Additionally, the corresponding nand_default_bbt() for regular
NANDs is not exported either, so for consistency reasons, this commit
removes the EXPORT_SYMBOL on onenand_default_bbt().
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Like was done in commit 17799359
("mtd: nand_bbt: make nand_scan_bbt() static") for the NAND code, this
commit makes the onenand_scan_bbt() function static in the OneNAND
code, since it is only used in onenand_bbt.c itself.

Consequently, the EXPORT_SYMBOL() and declaration in bbm.h are also
removed.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Since commit 17799359 ("mtd: nand_bbt:
make nand_scan_bbt() static"), the nand_scan_bbt() function is marked
as static but is still exported using EXPORT_SYMBOL(), which doesn't
make much sense.

This commit gets rid of the useless EXPORT_SYMBOL.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Suggested-by: NRichard Weinberger <richard@nod.at>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

When using multi-bit ECC, it is normal for the NAND Flash driver to
correct bit errors during the life of the product. Those errors will
only be cleared once a threshold has been reached, and corrections can
occur regularly before this.

Use only dev_dbg and not dev_info to report the bitflips, to keep the
system log clean when everything works correctly.
Signed-off-by: NRomain Izard <romain.izard.pro@gmail.com>
Acked-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Add support for the randomizer engine available in Allwinner's NFC IP.

Randomization is useful to support modern NAND chips which are sensitive to
repeated patterns. On such NANDs you might experience an unexpectedly high
number of bitflips when you repeat the same pattern all over a given NAND
block.
Randomizing input data mitigate this problem by avoiding such repeated
patterns.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The H27UCG8T2ATR-BC requires an external data scrambler. Reflect this
constraint in the nand_flash_ids definition.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The current code is the same as 'of_machine_is_compatible'.
So use it in order to remove a few lines of code and to be more
consistent with other parts of the kernel.
Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

parallel to mutex_{lock,unlock,trylock,is_locked,lock_nested},
inode_foo(inode) being mutex_foo(&inode->i_mutex).

Please, use those for access to ->i_mutex; over the coming cycle
->i_mutex will become rwsem, with ->lookup() done with it held
only shared.
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

The nuc900_nand driver has always passed an incorrect register
address in its nuc900_check_rb() function, which cannot possibly
work, and in some configurations gives us a build warning:

drivers/mtd/nand/nuc900_nand.c: In function 'nuc900_check_rb':
drivers/mtd/nand/nuc900_nand.c:27:23: warning: passing argument 1 of '__raw_readl' makes pointer from integer without a cast [-Wint-conversion]
 #define REG_SMISR     0xac
drivers/mtd/nand/nuc900_nand.c:118:20: note: in expansion of macro 'REG_SMISR'
  val = __raw_readl(REG_SMISR);

This makes sure we actually read from the register rather than
from (void *)0x000000ac in user space.

I suspect nobody noticed this before because the nuc900_nand_devready()
function never gets called, or nobody uses this driver on an upstream
kernel. Possibly even both.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

WARNING: drivers/mtd/spi-nor/mtk-quadspi.o(.text+0x77e): Section mismatch in reference from the function mtk_nor_drv_probe() to the function .init.text:mtk_nor_init()
The function mtk_nor_drv_probe() references
the function __init mtk_nor_init().
This is often because mtk_nor_drv_probe lacks a __init
annotation or the annotation of mtk_nor_init is wrong.

Drop the bogus __init from mtk_nor_init() to kill this warning.
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

wear_leveling_worker() currently unconditionally puts a PEB on erase in
the error case even it just been taken from the free_list and never
used.
In case the PEB was never used it can be put back on the free list
saving a precious erase cycle.

v1…v2:
	- to_leb_clean -> dst_leb_clean
	- use the nested option for ensure_wear_leveling()
	- do_sync_erase() can't go -ENOMEM so we can just go into
	  RO-mode now.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NRichard Weinberger <richard@nod.at>

Using switch/case helps make this logic more clear and more robust. With
this structure:

 * it's clear that this driver only support ECC_{HW,SOFT,SOFT_BCH}; and

 * we can sanely handle new ECC unsupported modes (right now, this code
   makes incorrect assumptions about the possible values in the
   nand_ecc_modes_t enum; e.g., what happens with NAND_ECC_HW_OOB_FIRST?)
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Cc: Alex Smith <alex@alex-smith.me.uk>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: NHarvey Hunt <harvey.hunt@imgtec.com>
Acked-by: NHarvey Hunt <harvey.hunt@imgtec.com>

Update jz4780_bch_ecc_correct's return codes with appropriate values,
as specified in /include/linux/mtd/nand.h.
Signed-off-by: NHarvey Hunt <harvey.hunt@imgtec.com>
Cc: Alex Smith <alex@alex-smith.me.uk>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: linux-kernel@vger.kernel.org
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Commit d699ed25 ("mtd: nand: make use of
nand_set/get_controller_data() helpers") overlooked some uses of
nand_chip::priv.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

As of commit 2d3b77ba ("mtd: nand: update mtd_to_nand()"), this
assignment isn't necessary, since struct mtd_info is embedded in struct
nand_chip.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Cc: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: Alex Smith <alex@alex-smith.me.uk>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

New helpers have been added to avoid directly accessing chip->field. Use
them where appropriate.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
[Brian: fixed a few rebase conflicts]
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as
well as the hardware BCH controller. DMA is not currently implemented.

While older 47xx SoCs also have a BCH controller, they are incompatible
with the one in the 4780 due to differing register/bit positions, which
would make implementing a common driver for them quite messy.
Signed-off-by: NAlex Smith <alex.smith@imgtec.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: linux-mtd@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: NHarvey Hunt <harvey.hunt@imgtec.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
[Brian: fixed a few small mistakes]
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The jz4740 driver is manually checking for 'erased pages' while
correcting ECC bytes.
This logic can now done by the core infrastructure, and can thus be removed
from this driver.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The diskonchip driver is manually checking for 'erased pages' while
correcting ECC bytes.
This logic can now done by the core infrastructure, and can thus be removed
from this driver.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The davinci driver is manually checking for 'erased pages' while
correcting ECC bytes.
This logic can now done by the core infrastructure, and can thus be removed
from this driver.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: NFranklin S Cooper Jr. <fcooper@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The default NAND read functions are relying on the underlying controller
driver to correct bitflips, but some of those controllers cannot properly
fix bitflips in erased pages.
Check for bitflips in erased pages in default core functions if the driver
delegated the this check by setting the NAND_ECC_GENERIC_ERASED_CHECK flag.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: NFranklin S Cooper Jr. <fcooper@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The error code returned by the ecc.correct() are not consistent over the
all implementations.

Document the expected behavior in include/linux/mtd/nand.h and fix
offending implementations.

[Brian: this looks like a bugfix for the ECC reporting in the bf5xx_nand
driver, but we haven't seen any testing results for it]
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: NFranklin S Cooper Jr. <fcooper@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

kmalloc needs to be handled when failing in memory pressure.
Also, it has memory leak in error routine.
Signed-off-by: NInsu Yun <wuninsu@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

On Micron and Numonyx devices, the status register write command
(WRSR), raises a work-in-progress bit (WIP) on the status register.
The datasheets for these devices specify that while the status
register write is in progress, the status register WIP bit can still
be read to check the end of the operation.

This commit adds a wait_till_ready call on lock/unlock operations,
which is required for Micron and Numonyx but should be harmless for
others. This is needed to prevent applications from issuing erase or
program operations before the unlock operation is completed.
Reported-by: NStas Sergeev <stsp@list.ru>
Signed-off-by: NEzequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>