- 05 12月, 2016 1 次提交
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由 Steven King 提交于
These changes based on work by Steven King <sfking@fdwdc.com> to support the i2c hardware modules on ColdFire SoC family devices. This is the per SoC hardware support. Contains a common platform device setup. Each of the SoC family members tends to have some minor local setup required to initialize the module. But all ColdFire family members use the same i2c hardware module. This i2c hardware module is the same as used in the Freescale iMX ARM based family of SoC devices. Steven's original patches were based on using a new and different i2c-coldfire.c driver. But this is not neccessary as we can use the existing Linux i2c-imx.c driver with no change required to it. And this patch is now based on using the existing i2c-imx driver. This patch only contains the ColdFire platform changes. Signed-off-by: NGreg Ungerer <gerg@uclinux.org> Tested-by: NAngelo Dureghello <angelo@sysam.it>
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- 27 9月, 2012 1 次提交
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由 Greg Ungerer 提交于
There is a bunch of old unused and ugly register definitions in the ColdFire 5282 header. Remove them. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 16 7月, 2012 1 次提交
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由 Steven King 提交于
use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1 so we can support those parts that have the pit1 interrupt on other than the first interrupt controller. Signed-off-by: NSteven King <sfking@fdwdc.com> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 12 6月, 2012 1 次提交
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由 Steven King 提交于
The consolidation of the qspi code missed a definition for 528x. Signed-off-by: NSteven King <sfking@fdwdc.com> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 20 5月, 2012 1 次提交
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由 Greg Ungerer 提交于
Modify the GPIO setup table to use the mcfgpio.h macros for table init. Simplifies code and reduces line count significantly. We also need to rename some of the GPIO registers to be consistent with all other ColdFire parts (we can't use the new GPIO macros otherwise). Signed-off-by: NGreg Ungerer <gerg@uclinux.org> Acked-by: NSteven King <sfking@fdwdc.com>
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- 05 3月, 2012 4 次提交
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由 Greg Ungerer 提交于
If we make all MCF_RCR (CPU reset register) addressing consistent across all ColdFire CPU family members that use it then we will be able to remove the duplicated copies of the code that use it. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and code and use a single setup for all. So modify the ColdFire 528x QSPI addressing so that: . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used . move chip select definitions (CS) to appropriate header Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
If we make all FEC (ethernet) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 528x FEC addressing so that: . FECs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 528x UART addressing so that: . UARTs are numbered from 0 up . use a common name for IRQs used Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 15 3月, 2011 6 次提交
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由 Greg Ungerer 提交于
The reality is that you do not need the abiltity to configure the clock divider for ColdFire CPUs. It is a fixed ratio on any given ColdFire family member. It is not the same for all ColdFire parts, but it is always the same in a model range. So hard define the divider for each supported ColdFire CPU type and remove the Kconfig option. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
In some of the RAM size autodetection code on ColdFire CPU startup we reference DRAM registers relative to the MBAR register. Not all of the supported ColdFire CPUs have an MBAR, and currently this works because we fake an MBAR address on those registers. In an effort to clean this up, and eventually remove the fake MBAR setting make the DRAM register address definitions actually contain the MBAR (or IPSBAR as appropriate) value as required. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The base addresses of the ColdFire DMA unit registers belong with all the other address definitions in the per-cpu headers. The current definitions assume they are relative to an MBAR register. Not all ColdFire CPUs have an MBAR register. A clean address define can only be acheived in the per-cpu headers along with all the other chips peripheral base addresses. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The ColdFire 528x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The PIT hardware timer module used in some ColdFire CPU's is not always addressed relative to an IPSBAR register. Parts like the ColdFire 5207 and 5208 have fixed peripheral addresses. So lets not define the register addresses of the PIT relative to an IPSBAR definition. Move the base address definitions into the per-part headers. This is a lot more consistent since all the other peripheral base addresses are defined in the per-part header files already. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The ColdFire 54xx family shares the same interrupt controller used on the 523x, 527x and 528x ColdFire parts, but it isn't offset relative to the IPSBAR register. The 54xx doesn't have an IPSBAR register. By including the base address of the peripheral registers in the register definitions (MCFICM_INTC0 and MCFICM_INTC1 in this case) we can avoid having to define a fake IPSBAR for the 54xx. And this makes the register address definitions of these more consistent, the majority of the other register address defines include the peripheral base address already. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 05 1月, 2011 4 次提交
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由 Greg Ungerer 提交于
The version 2 ColdFire CPU based cores all contain a similar cache controller unit. Create a set of bit flag definitions for the supporting registers. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The ColdFire UART base addresses varies between the different ColdFire family members. Instead of keeping the base addresses with the UART definitions keep them with the other addresses definitions for each ColdFire part. The motivation for this move is so that when we add new ColdFire part definitions, they are all in a single file (and we shouldn't normally need to modify the UART definitions in mcfuart.h at all). Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The instruction timings of the ColdFire 54xx family parts are different to other version 4 parts (or version 2 or 3 parts for that matter too). Move the instruction timing setting into the ColdFire part specific headers, and set the 54xx value appropriately. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
Move the ColdFire CPU names out of setup.c and into their repsective headers. That way when we add new ones we won't need to modify setup.c any more. Add the missing 548x CPU name. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 17 5月, 2010 1 次提交
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由 Steven King 提交于
Since Grant has added the coldfire-qspi driver to next-spi, here is the platform support for the parts that have qspi hardware. This sets up gpio to do the spi chip select using the default chip select pins; it should be trivial for boards that require different or additional spi chip selects to use other gpios as needed. Signed-off-by: NSteven King <sfking@fdwdc.com> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 10 9月, 2009 1 次提交
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由 sfking@fdwdc.com 提交于
Add support for the 528x. Signed-off-by: NSteven King <sfking@fdwdc.com> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 11 6月, 2009 1 次提交
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由 Greg Ungerer 提交于
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 16 1月, 2009 1 次提交
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由 Sam Ravnborg 提交于
Merge header files for m68k and m68knommu to the single location: arch/m68k/include/asm The majority of this patch was the result of the script that is included in the changelog below. The script was originally written by Arnd Bergman and exten by me to cover a few more files. When the header files differed the script uses the following: The original m68k file is named <file>_mm.h [mm for memory manager] The m68knommu file is named <file>_no.h [no for no memory manager] The files uses the following include guard: This include gaurd works as the m68knommu toolchain set the __uClinux__ symbol - so this should work in userspace too. Merging the header files for m68k and m68knommu exposes the (unexpected?) ABI differences thus it is easier to actually identify these and thus to fix them. The commit has been build tested with both a m68k and a m68knommu toolchain - with success. The commit has also been tested with "make headers_check" and this patch fixes make headers_check for m68knommu. The script used: TARGET=arch/m68k/include/asm SOURCE=arch/m68knommu/include/asm INCLUDE="cachectl.h errno.h fcntl.h hwtest.h ioctls.h ipcbuf.h \ linkage.h math-emu.h md.h mman.h movs.h msgbuf.h openprom.h \ oplib.h poll.h posix_types.h resource.h rtc.h sembuf.h shmbuf.h \ shm.h shmparam.h socket.h sockios.h spinlock.h statfs.h stat.h \ termbits.h termios.h tlb.h types.h user.h" EQUAL="auxvec.h cputime.h device.h emergency-restart.h futex.h \ ioctl.h irq_regs.h kdebug.h local.h mutex.h percpu.h \ sections.h topology.h" NOMUUFILES="anchor.h bootstd.h coldfire.h commproc.h dbg.h \ elia.h flat.h m5206sim.h m520xsim.h m523xsim.h m5249sim.h \ m5272sim.h m527xsim.h m528xsim.h m5307sim.h m532xsim.h \ m5407sim.h m68360_enet.h m68360.h m68360_pram.h m68360_quicc.h \ m68360_regs.h MC68328.h MC68332.h MC68EZ328.h MC68VZ328.h \ mcfcache.h mcfdma.h mcfmbus.h mcfne.h mcfpci.h mcfpit.h \ mcfsim.h mcfsmc.h mcftimer.h mcfuart.h mcfwdebug.h \ nettel.h quicc_simple.h smp.h" FILES="atomic.h bitops.h bootinfo.h bug.h bugs.h byteorder.h cache.h \ cacheflush.h checksum.h current.h delay.h div64.h \ dma-mapping.h dma.h elf.h entry.h fb.h fpu.h hardirq.h hw_irq.h io.h \ irq.h kmap_types.h machdep.h mc146818rtc.h mmu.h mmu_context.h \ module.h page.h page_offset.h param.h pci.h pgalloc.h \ pgtable.h processor.h ptrace.h scatterlist.h segment.h \ setup.h sigcontext.h siginfo.h signal.h string.h system.h swab.h \ thread_info.h timex.h tlbflush.h traps.h uaccess.h ucontext.h \ unaligned.h unistd.h" mergefile() { BASE=${1%.h} git mv ${SOURCE}/$1 ${TARGET}/${BASE}_no.h git mv ${TARGET}/$1 ${TARGET}/${BASE}_mm.h cat << EOF > ${TARGET}/$1 EOF git add ${TARGET}/$1 } set -e mkdir -p ${TARGET} git mv include/asm-m68k/* ${TARGET} rmdir include/asm-m68k git rm ${SOURCE}/Kbuild for F in $INCLUDE $EQUAL; do git rm ${SOURCE}/$F done for F in $NOMUUFILES; do git mv ${SOURCE}/$F ${TARGET}/$F done for F in $FILES ; do mergefile $F done rmdir arch/m68knommu/include/asm rmdir arch/m68knommu/include Cc: Arnd Bergmann <arnd@arndb.de> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 07 8月, 2008 1 次提交
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由 Greg Ungerer 提交于
With the current kbuild infrastructure in place no other changes are required for this to work. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 07 3月, 2007 1 次提交
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由 Greg Ungerer 提交于
For the Freescale M5282 ColdFire, Port UA Pin Assignment Register should set to UART mode. Patch submitted by David Wu <davidwu@arcturusnetworks.com>. Signed-off-by: NGreg Ungerer <gerg@uclinux.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 26 4月, 2006 1 次提交
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 12 9月, 2005 1 次提交
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由 Greg Ungerer 提交于
Add QSPI register definitions of ColdFIre 528x processor SPI controller. Patch originally submitted by Derek Cheung <derek.cheung@sympatico.ca> Signed-off-by: NGreg Ungerer <gerg@uclinux.com> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 17 4月, 2005 1 次提交
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由 Linus Torvalds 提交于
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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