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提交 22b15436 编写于 作者: L Linus Torvalds
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Merge tag 'renesas-pinctrl-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC pinctrl changes for Renesas from Olof Johansson:
 "This is yet another driver change, which is split out just because of
  its size.  As already in 3.9, a lot of changes are going on here, as
  the shmobile platform gets converted from its own pin control API to
  the generic drivers/pinctrl subsystem.

  Based on agreements with Paul Mundt, we are merging the sh-arch-side
  changes here as well"

* tag 'renesas-pinctrl-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (142 commits)
  ARM: shmobile: r8a7779: Remove INTC function GPIOs
  ARM: shmobile: r8a7779: Remove LBSC function GPIOs
  ARM: shmobile: r8a7779: Remove USB function GPIOs
  ARM: shmobile: r8a7779: Remove HSPI function GPIOs
  ARM: shmobile: r8a7779: Remove SCIF function GPIOs
  ARM: shmobile: r8a7779: Remove SDHI and MMCIF function GPIOs
  ARM: shmobile: r8a7779: Remove DU function GPIOs
  ARM: shmobile: r8a7779: Remove DU1_DOTCLKOUT1 GPIO
  ARM: shmobile: r8a7740: Remove SDHI and MMCIF function GPIOs
  ARM: shmobile: r8a7740: Remove LCD0 and LCD1 function GPIOs
  ARM: shmobile: sh73a0: Remove IrDA function GPIOs
  ARM: shmobile: sh73a0: Remove USB function GPIOs
  ARM: shmobile: sh73a0: Remove BSC function GPIOs
  ARM: shmobile: sh73a0: Remove KEYSC function GPIOs
  ARM: shmobile: sh73a0: Remove pull-up function GPIOS
  ARM: shmobile: sh73a0: Remove FSI function GPIOs
  ARM: shmobile: sh73a0: Remove I2C function GPIOs
  ARM: shmobile: sh73a0: Remove SCIFA and SCIFB function GPIOs
  ARM: shmobile: sh73a0: Remove LCDC and LCDC2 function GPIOs
  ARM: shmobile: sh7372: Remove SDHI and MMCIF function GPIOs
  ...
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Showing with 8367 addition and 5340 deletion
arch/arm/mach-shmobile/board-ag5evm.c
浏览文件 @ 22b15436
......@@ -23,6 +23,8 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/io.h>
......@@ -304,9 +306,9 @@ static int lcd_backlight_set_brightness(int brightness)
if (brightness == 0) {
/* Reset the chip */
gpio_set_value(GPIO_PORT235, 0);
gpio_set_value(235, 0);
mdelay(24);
gpio_set_value(GPIO_PORT235, 1);
gpio_set_value(235, 1);
return 0;
}
......@@ -406,7 +408,7 @@ static struct sh_mobile_sdhi_info sdhi0_info = {
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
.tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
.cd_gpio = GPIO_PORT251,
.cd_gpio = 251,
};
static struct resource sdhi0_resources[] = {
......@@ -461,7 +463,7 @@ static struct regulator_init_data cn4_power_init_data = {
static struct fixed_voltage_config cn4_power_info = {
.supply_name = "CN4 SD/MMC Vdd",
.microvolts = 3300000,
.gpio = GPIO_PORT114,
.gpio = 114,
.enable_high = 1,
.init_data = &cn4_power_init_data,
};
......@@ -479,10 +481,10 @@ static void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
static int power_gpio = -EINVAL;
if (power_gpio < 0) {
int ret = gpio_request_one(GPIO_PORT114, GPIOF_OUT_INIT_LOW,
int ret = gpio_request_one(114, GPIOF_OUT_INIT_LOW,
"sdhi1_power");
if (!ret)
power_gpio = GPIO_PORT114;
power_gpio = 114;
}
/*
......@@ -493,7 +495,7 @@ static void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
* regulator driver. We have to live with the race in case the driver
* gets unloaded and the GPIO freed between these two steps.
*/
gpio_set_value(GPIO_PORT114, state);
gpio_set_value(114, state);
}
static struct sh_mobile_sdhi_info sh_sdhi1_info = {
......@@ -550,6 +552,77 @@ static struct platform_device *ag5evm_devices[] __initdata = {
&sdhi1_device,
};
static unsigned long pin_pullup_conf[] = {
PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
};
static const struct pinctrl_map ag5evm_pinctrl_map[] = {
/* FSIA */
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_mclk_in", "fsia"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_sclk_in", "fsia"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_data_in", "fsia"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_data_out", "fsia"),
/* I2C2 & I2C3 */
PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.2", "pfc-sh73a0",
"i2c2_0", "i2c2"),
PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0",
"i2c3_0", "i2c3"),
/* IrDA */
PIN_MAP_MUX_GROUP_DEFAULT("sh_irda.0", "pfc-sh73a0",
"irda_0", "irda"),
/* KEYSC */
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_in8", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out04", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out5", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out6_0", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out7_0", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out8_0", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out9_2", "keysc"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_in8", pin_pullup_conf),
/* MMCIF */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_data8_0", "mmc0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_ctrl_0", "mmc0"),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"PORT279", pin_pullup_conf),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_data8_0", pin_pullup_conf),
/* SCIFA2 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
"scifa2_data_0", "scifa2"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
"scifa2_ctrl_0", "scifa2"),
/* SDHI0 (CN15 [SD I/F]) */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_wp", "sdhi0"),
/* SDHI1 (CN4 [WLAN I/F]) */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_data4", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_ctrl", "sdhi1"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_data4", pin_pullup_conf),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"PORT263", pin_pullup_conf),
};
static void __init ag5evm_init(void)
{
regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
......@@ -558,96 +631,27 @@ static void __init ag5evm_init(void)
ARRAY_SIZE(fixed2v8_power_consumers), 3300000);
regulator_register_fixed(3, dummy_supplies, ARRAY_SIZE(dummy_supplies));
pinctrl_register_mappings(ag5evm_pinctrl_map,
ARRAY_SIZE(ag5evm_pinctrl_map));
sh73a0_pinmux_init();
/* enable SCIFA2 */
gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
gpio_request(GPIO_FN_SCIFA2_RTS1_, NULL);
gpio_request(GPIO_FN_SCIFA2_CTS1_, NULL);
/* enable KEYSC */
gpio_request(GPIO_FN_KEYIN0_PU, NULL);
gpio_request(GPIO_FN_KEYIN1_PU, NULL);
gpio_request(GPIO_FN_KEYIN2_PU, NULL);
gpio_request(GPIO_FN_KEYIN3_PU, NULL);
gpio_request(GPIO_FN_KEYIN4_PU, NULL);
gpio_request(GPIO_FN_KEYIN5_PU, NULL);
gpio_request(GPIO_FN_KEYIN6_PU, NULL);
gpio_request(GPIO_FN_KEYIN7_PU, NULL);
gpio_request(GPIO_FN_KEYOUT0, NULL);
gpio_request(GPIO_FN_KEYOUT1, NULL);
gpio_request(GPIO_FN_KEYOUT2, NULL);
gpio_request(GPIO_FN_KEYOUT3, NULL);
gpio_request(GPIO_FN_KEYOUT4, NULL);
gpio_request(GPIO_FN_KEYOUT5, NULL);
gpio_request(GPIO_FN_PORT59_KEYOUT6, NULL);
gpio_request(GPIO_FN_PORT58_KEYOUT7, NULL);
gpio_request(GPIO_FN_KEYOUT8, NULL);
gpio_request(GPIO_FN_PORT149_KEYOUT9, NULL);
/* enable I2C channel 2 and 3 */
gpio_request(GPIO_FN_PORT236_I2C_SDA2, NULL);
gpio_request(GPIO_FN_PORT237_I2C_SCL2, NULL);
gpio_request(GPIO_FN_PORT248_I2C_SCL3, NULL);
gpio_request(GPIO_FN_PORT249_I2C_SDA3, NULL);
/* enable MMCIF */
gpio_request(GPIO_FN_MMCCLK0, NULL);
gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
gpio_request_one(GPIO_PORT208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */
gpio_request_one(208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */
/* enable SMSC911X */
gpio_request_one(GPIO_PORT144, GPIOF_IN, NULL); /* PINTA2 */
gpio_request_one(GPIO_PORT145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */
/* FSI A */
gpio_request(GPIO_FN_FSIACK, NULL);
gpio_request(GPIO_FN_FSIAILR, NULL);
gpio_request(GPIO_FN_FSIAIBT, NULL);
gpio_request(GPIO_FN_FSIAISLD, NULL);
gpio_request(GPIO_FN_FSIAOSLD, NULL);
/* IrDA */
gpio_request(GPIO_FN_PORT241_IRDA_OUT, NULL);
gpio_request(GPIO_FN_PORT242_IRDA_IN, NULL);
gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
gpio_request_one(144, GPIOF_IN, NULL); /* PINTA2 */
gpio_request_one(145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */
/* LCD panel */
gpio_request_one(GPIO_PORT217, GPIOF_OUT_INIT_LOW, NULL); /* RESET */
gpio_request_one(217, GPIOF_OUT_INIT_LOW, NULL); /* RESET */
mdelay(1);
gpio_set_value(GPIO_PORT217, 1);
gpio_set_value(217, 1);
mdelay(100);
/* LCD backlight controller */
gpio_request_one(GPIO_PORT235, GPIOF_OUT_INIT_LOW, NULL); /* RESET */
gpio_request_one(235, GPIOF_OUT_INIT_LOW, NULL); /* RESET */
lcd_backlight_set_brightness(0);
/* enable SDHI0 on CN15 [SD I/F] */
gpio_request(GPIO_FN_SDHIWP0, NULL);
gpio_request(GPIO_FN_SDHICMD0, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
gpio_request(GPIO_FN_SDHID0_3, NULL);
gpio_request(GPIO_FN_SDHID0_2, NULL);
gpio_request(GPIO_FN_SDHID0_1, NULL);
gpio_request(GPIO_FN_SDHID0_0, NULL);
/* enable SDHI1 on CN4 [WLAN I/F] */
gpio_request(GPIO_FN_SDHICLK1, NULL);
gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
gpio_request(GPIO_FN_SDHID1_3_PU, NULL);
gpio_request(GPIO_FN_SDHID1_2_PU, NULL);
gpio_request(GPIO_FN_SDHID1_1_PU, NULL);
gpio_request(GPIO_FN_SDHID1_0_PU, NULL);
#ifdef CONFIG_CACHE_L2X0
/* Shared attribute override enable, 64K*8way */
l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff);
......
arch/arm/mach-shmobile/board-ap4evb.c
浏览文件 @ 22b15436
......@@ -34,6 +34,7 @@
#include <linux/i2c.h>
#include <linux/i2c/tsc2007.h>
#include <linux/io.h>
#include <linux/pinctrl/machine.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
......@@ -273,11 +274,11 @@ static struct platform_device smc911x_device = {
/*
* The card detect pin of the top SD/MMC slot (CN7) is active low and is
* connected to GPIO A22 of SH7372 (GPIO_PORT41).
* connected to GPIO A22 of SH7372 (GPIO 41).
*/
static int slot_cn7_get_cd(struct platform_device *pdev)
{
return !gpio_get_value(GPIO_PORT41);
return !gpio_get_value(41);
}
/* MERAM */
static struct sh_mobile_meram_info meram_info = {
......@@ -838,22 +839,22 @@ static struct platform_device fsi_hdmi_device = {
static struct gpio_led ap4evb_leds[] = {
{
.name = "led4",
.gpio = GPIO_PORT185,
.gpio = 185,
.default_state = LEDS_GPIO_DEFSTATE_ON,
},
{
.name = "led2",
.gpio = GPIO_PORT186,
.gpio = 186,
.default_state = LEDS_GPIO_DEFSTATE_ON,
},
{
.name = "led3",
.gpio = GPIO_PORT187,
.gpio = 187,
.default_state = LEDS_GPIO_DEFSTATE_ON,
},
{
.name = "led1",
.gpio = GPIO_PORT188,
.gpio = 188,
.default_state = LEDS_GPIO_DEFSTATE_ON,
}
};
......@@ -1026,10 +1027,10 @@ static void __init hdmi_init_pm_clock(void)
/* TouchScreen */
#ifdef CONFIG_AP4EVB_QHD
# define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
# define GPIO_TSC_PORT GPIO_PORT123
# define GPIO_TSC_PORT 123
#else /* WVGA */
# define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
# define GPIO_TSC_PORT GPIO_PORT40
# define GPIO_TSC_PORT 40
#endif
#define IRQ28 evt2irq(0x3380) /* IRQ28A */
......@@ -1084,6 +1085,28 @@ static struct i2c_board_info i2c1_devices[] = {
};
static const struct pinctrl_map ap4evb_pinctrl_map[] = {
/* MMCIF */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
"mmc0_data8_0", "mmc0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
"mmc0_ctrl_0", "mmc0"),
/* SDHI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
"sdhi0_cd", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
"sdhi0_wp", "sdhi0"),
/* SDHI1 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
"sdhi1_data4", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
"sdhi1_ctrl", "sdhi1"),
};
#define GPIO_PORT9CR IOMEM(0xE6051009)
#define GPIO_PORT10CR IOMEM(0xE605100A)
#define USCCR1 IOMEM(0xE6058144)
......@@ -1110,6 +1133,8 @@ static void __init ap4evb_init(void)
/* External clock source */
clk_set_rate(&sh7372_dv_clki_clk, 27000000);
pinctrl_register_mappings(ap4evb_pinctrl_map,
ARRAY_SIZE(ap4evb_pinctrl_map));
sh7372_pinmux_init();
/* enable SCIFA0 */
......@@ -1121,40 +1146,10 @@ static void __init ap4evb_init(void)
gpio_request(GPIO_FN_IRQ6_39, NULL);
/* enable Debug switch (S6) */
gpio_request_one(GPIO_PORT32, GPIOF_IN | GPIOF_EXPORT, NULL);
gpio_request_one(GPIO_PORT33, GPIOF_IN | GPIOF_EXPORT, NULL);
gpio_request_one(GPIO_PORT34, GPIOF_IN | GPIOF_EXPORT, NULL);
gpio_request_one(GPIO_PORT35, GPIOF_IN | GPIOF_EXPORT, NULL);
/* SDHI0 */
gpio_request(GPIO_FN_SDHICD0, NULL);
gpio_request(GPIO_FN_SDHIWP0, NULL);
gpio_request(GPIO_FN_SDHICMD0, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
gpio_request(GPIO_FN_SDHID0_3, NULL);
gpio_request(GPIO_FN_SDHID0_2, NULL);
gpio_request(GPIO_FN_SDHID0_1, NULL);
gpio_request(GPIO_FN_SDHID0_0, NULL);
/* SDHI1 */
gpio_request(GPIO_FN_SDHICMD1, NULL);
gpio_request(GPIO_FN_SDHICLK1, NULL);
gpio_request(GPIO_FN_SDHID1_3, NULL);
gpio_request(GPIO_FN_SDHID1_2, NULL);
gpio_request(GPIO_FN_SDHID1_1, NULL);
gpio_request(GPIO_FN_SDHID1_0, NULL);
/* MMCIF */
gpio_request(GPIO_FN_MMCD0_0, NULL);
gpio_request(GPIO_FN_MMCD0_1, NULL);
gpio_request(GPIO_FN_MMCD0_2, NULL);
gpio_request(GPIO_FN_MMCD0_3, NULL);
gpio_request(GPIO_FN_MMCD0_4, NULL);
gpio_request(GPIO_FN_MMCD0_5, NULL);
gpio_request(GPIO_FN_MMCD0_6, NULL);
gpio_request(GPIO_FN_MMCD0_7, NULL);
gpio_request(GPIO_FN_MMCCMD0, NULL);
gpio_request(GPIO_FN_MMCCLK0, NULL);
gpio_request_one(32, GPIOF_IN | GPIOF_EXPORT, NULL);
gpio_request_one(33, GPIOF_IN | GPIOF_EXPORT, NULL);
gpio_request_one(34, GPIOF_IN | GPIOF_EXPORT, NULL);
gpio_request_one(35, GPIOF_IN | GPIOF_EXPORT, NULL);
/* USB enable */
gpio_request(GPIO_FN_VBUS0_1, NULL);
......@@ -1172,15 +1167,15 @@ static void __init ap4evb_init(void)
gpio_request(GPIO_FN_FSIAILR, NULL);
gpio_request(GPIO_FN_FSIAISLD, NULL);
gpio_request(GPIO_FN_FSIAOSLD, NULL);
gpio_request_one(GPIO_PORT161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
gpio_request(GPIO_PORT9, NULL);
gpio_request(GPIO_PORT10, NULL);
gpio_request(9, NULL);
gpio_request(10, NULL);
gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
/* card detect pin for MMC slot (CN7) */
gpio_request_one(GPIO_PORT41, GPIOF_IN, NULL);
gpio_request_one(41, GPIOF_IN, NULL);
/* setup FSI2 port B (HDMI) */
gpio_request(GPIO_FN_FSIBCK, NULL);
......@@ -1268,8 +1263,8 @@ static void __init ap4evb_init(void)
gpio_request(GPIO_FN_LCDDISP, NULL);
gpio_request(GPIO_FN_LCDDCK, NULL);
gpio_request_one(GPIO_PORT189, GPIOF_OUT_INIT_HIGH, NULL); /* backlight */
gpio_request_one(GPIO_PORT151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
gpio_request_one(189, GPIOF_OUT_INIT_HIGH, NULL); /* backlight */
gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
lcdc_info.clock_source = LCDC_CLK_BUS;
lcdc_info.ch[0].interface_type = RGB18;
......
arch/arm/mach-shmobile/board-armadillo800eva.c
浏览文件 @ 22b15436
......@@ -29,6 +29,7 @@
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/pinctrl/machine.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/sh_eth.h>
......@@ -230,7 +231,7 @@ static int usbhsf_power_ctrl(struct platform_device *pdev,
static int usbhsf_get_vbus(struct platform_device *pdev)
{
return gpio_get_value(GPIO_PORT209);
return gpio_get_value(209);
}
static irqreturn_t usbhsf_interrupt(int irq, void *data)
......@@ -540,10 +541,10 @@ static struct platform_device hdmi_lcdc_device = {
{ .code = c, .gpio = g, .desc = d, .active_low = 1, __VA_ARGS__ }
static struct gpio_keys_button gpio_buttons[] = {
GPIO_KEY(KEY_POWER, GPIO_PORT99, "SW3", .wakeup = 1),
GPIO_KEY(KEY_BACK, GPIO_PORT100, "SW4"),
GPIO_KEY(KEY_MENU, GPIO_PORT97, "SW5"),
GPIO_KEY(KEY_HOME, GPIO_PORT98, "SW6"),
GPIO_KEY(KEY_POWER, 99, "SW3", .wakeup = 1),
GPIO_KEY(KEY_BACK, 100, "SW4"),
GPIO_KEY(KEY_MENU, 97, "SW5"),
GPIO_KEY(KEY_HOME, 98, "SW6"),
};
static struct gpio_keys_platform_data gpio_key_info = {
......@@ -661,6 +662,17 @@ static struct platform_device sdhi1_device = {
.resource = sdhi1_resources,
};
static const struct pinctrl_map eva_sdhi1_pinctrl_map[] = {
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7740",
"sdhi1_data4", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7740",
"sdhi1_ctrl", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7740",
"sdhi1_cd", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7740",
"sdhi1_wp", "sdhi1"),
};
/* MMCIF */
static struct sh_mmcif_plat_data sh_mmcif_plat = {
.sup_pclk = 0,
......@@ -713,9 +725,9 @@ static int mt9t111_power(struct device *dev, int mode)
/* video1 (= CON1 camera) expect 24MHz */
clk_set_rate(mclk, clk_round_rate(mclk, 24000000));
clk_enable(mclk);
gpio_set_value(GPIO_PORT158, 1);
gpio_set_value(158, 1);
} else {
gpio_set_value(GPIO_PORT158, 0);
gpio_set_value(158, 0);
clk_disable(mclk);
}
......@@ -869,8 +881,8 @@ static struct platform_device fsi_hdmi_device = {
/* RTC: RTC connects i2c-gpio. */
static struct i2c_gpio_platform_data i2c_gpio_data = {
.sda_pin = GPIO_PORT208,
.scl_pin = GPIO_PORT91,
.sda_pin = 208,
.scl_pin = 91,
.udelay = 5, /* 100 kHz */
};
......@@ -924,6 +936,28 @@ static struct platform_device *eva_devices[] __initdata = {
&i2c_gpio_device,
};
static const struct pinctrl_map eva_pinctrl_map[] = {
/* LCD0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
"lcd0_data24_0", "lcd0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
"lcd0_lclk_1", "lcd0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
"lcd0_sync", "lcd0"),
/* MMCIF */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a7740",
"mmc0_data8_1", "mmc0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a7740",
"mmc0_ctrl_1", "mmc0"),
/* SDHI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740",
"sdhi0_wp", "sdhi0"),
};
static void __init eva_clock_init(void)
{
struct clk *system = clk_get(NULL, "system_clk");
......@@ -971,6 +1005,8 @@ static void __init eva_init(void)
regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
r8a7740_pinmux_init();
r8a7740_meram_workaround();
......@@ -980,38 +1016,9 @@ static void __init eva_init(void)
/* LCDC0 */
gpio_request(GPIO_FN_LCDC0_SELECT, NULL);
gpio_request(GPIO_FN_LCD0_D0, NULL);
gpio_request(GPIO_FN_LCD0_D1, NULL);
gpio_request(GPIO_FN_LCD0_D2, NULL);
gpio_request(GPIO_FN_LCD0_D3, NULL);
gpio_request(GPIO_FN_LCD0_D4, NULL);
gpio_request(GPIO_FN_LCD0_D5, NULL);
gpio_request(GPIO_FN_LCD0_D6, NULL);
gpio_request(GPIO_FN_LCD0_D7, NULL);
gpio_request(GPIO_FN_LCD0_D8, NULL);
gpio_request(GPIO_FN_LCD0_D9, NULL);
gpio_request(GPIO_FN_LCD0_D10, NULL);
gpio_request(GPIO_FN_LCD0_D11, NULL);
gpio_request(GPIO_FN_LCD0_D12, NULL);
gpio_request(GPIO_FN_LCD0_D13, NULL);
gpio_request(GPIO_FN_LCD0_D14, NULL);
gpio_request(GPIO_FN_LCD0_D15, NULL);
gpio_request(GPIO_FN_LCD0_D16, NULL);
gpio_request(GPIO_FN_LCD0_D17, NULL);
gpio_request(GPIO_FN_LCD0_D18_PORT40, NULL);
gpio_request(GPIO_FN_LCD0_D19_PORT4, NULL);
gpio_request(GPIO_FN_LCD0_D20_PORT3, NULL);
gpio_request(GPIO_FN_LCD0_D21_PORT2, NULL);
gpio_request(GPIO_FN_LCD0_D22_PORT0, NULL);
gpio_request(GPIO_FN_LCD0_D23_PORT1, NULL);
gpio_request(GPIO_FN_LCD0_DCK, NULL);
gpio_request(GPIO_FN_LCD0_VSYN, NULL);
gpio_request(GPIO_FN_LCD0_HSYN, NULL);
gpio_request(GPIO_FN_LCD0_DISP, NULL);
gpio_request(GPIO_FN_LCD0_LCLK_PORT165, NULL);
gpio_request_one(GPIO_PORT61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
gpio_request_one(GPIO_PORT202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
/* Touchscreen */
gpio_request(GPIO_FN_IRQ10, NULL); /* TP_INT */
......@@ -1037,12 +1044,12 @@ static void __init eva_init(void)
gpio_request(GPIO_FN_ET_RX_DV, NULL);
gpio_request(GPIO_FN_ET_RX_CLK, NULL);
gpio_request_one(GPIO_PORT18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
/* USB */
gpio_request_one(GPIO_PORT159, GPIOF_IN, NULL); /* USB_DEVICE_MODE */
gpio_request_one(159, GPIOF_IN, NULL); /* USB_DEVICE_MODE */
if (gpio_get_value(GPIO_PORT159)) {
if (gpio_get_value(159)) {
/* USB Host */
} else {
/* USB Func */
......@@ -1051,47 +1058,22 @@ static void __init eva_init(void)
* OTOH, usbhs interrupt needs its value (HI/LOW) to decide
* USB connection/disconnection (usbhsf_get_vbus()).
* This means we needs to select GPIO_FN_IRQ7_PORT209 first,
* and select GPIO_PORT209 here
* and select GPIO 209 here
*/
gpio_request(GPIO_FN_IRQ7_PORT209, NULL);
gpio_request_one(GPIO_PORT209, GPIOF_IN, NULL);
gpio_request_one(209, GPIOF_IN, NULL);
platform_device_register(&usbhsf_device);
usb = &usbhsf_device;
}
/* SDHI0 */
gpio_request(GPIO_FN_SDHI0_CMD, NULL);
gpio_request(GPIO_FN_SDHI0_CLK, NULL);
gpio_request(GPIO_FN_SDHI0_D0, NULL);
gpio_request(GPIO_FN_SDHI0_D1, NULL);
gpio_request(GPIO_FN_SDHI0_D2, NULL);
gpio_request(GPIO_FN_SDHI0_D3, NULL);
gpio_request(GPIO_FN_SDHI0_WP, NULL);
gpio_request_one(GPIO_PORT17, GPIOF_OUT_INIT_LOW, NULL); /* SDHI0_18/33_B */
gpio_request_one(GPIO_PORT74, GPIOF_OUT_INIT_HIGH, NULL); /* SDHI0_PON */
gpio_request_one(GPIO_PORT75, GPIOF_OUT_INIT_HIGH, NULL); /* SDSLOT1_PON */
gpio_request_one(17, GPIOF_OUT_INIT_LOW, NULL); /* SDHI0_18/33_B */
gpio_request_one(74, GPIOF_OUT_INIT_HIGH, NULL); /* SDHI0_PON */
gpio_request_one(75, GPIOF_OUT_INIT_HIGH, NULL); /* SDSLOT1_PON */
/* we can use GPIO_FN_IRQ31_PORT167 here for SDHI0 CD irq */
/*
* MMCIF
*
* Here doesn't care SW1.4 status,
* since CON2 is not mounted.
*/
gpio_request(GPIO_FN_MMC1_CLK_PORT103, NULL);
gpio_request(GPIO_FN_MMC1_CMD_PORT104, NULL);
gpio_request(GPIO_FN_MMC1_D0_PORT149, NULL);
gpio_request(GPIO_FN_MMC1_D1_PORT148, NULL);
gpio_request(GPIO_FN_MMC1_D2_PORT147, NULL);
gpio_request(GPIO_FN_MMC1_D3_PORT146, NULL);
gpio_request(GPIO_FN_MMC1_D4_PORT145, NULL);
gpio_request(GPIO_FN_MMC1_D5_PORT144, NULL);
gpio_request(GPIO_FN_MMC1_D6_PORT143, NULL);
gpio_request(GPIO_FN_MMC1_D7_PORT142, NULL);
/* CEU0 */
gpio_request(GPIO_FN_VIO0_D7, NULL);
gpio_request(GPIO_FN_VIO0_D6, NULL);
......@@ -1108,10 +1090,10 @@ static void __init eva_init(void)
gpio_request(GPIO_FN_VIO_CKO, NULL);
/* CON1/CON15 Camera */
gpio_request_one(GPIO_PORT173, GPIOF_OUT_INIT_LOW, NULL); /* STANDBY */
gpio_request_one(GPIO_PORT172, GPIOF_OUT_INIT_HIGH, NULL); /* RST */
gpio_request_one(173, GPIOF_OUT_INIT_LOW, NULL); /* STANDBY */
gpio_request_one(172, GPIOF_OUT_INIT_HIGH, NULL); /* RST */
/* see mt9t111_power() */
gpio_request_one(GPIO_PORT158, GPIOF_OUT_INIT_LOW, NULL); /* CAM_PON */
gpio_request_one(158, GPIOF_OUT_INIT_LOW, NULL); /* CAM_PON */
/* FSI-WM8978 */
gpio_request(GPIO_FN_FSIAIBT, NULL);
......@@ -1120,8 +1102,8 @@ static void __init eva_init(void)
gpio_request(GPIO_FN_FSIAOSLD, NULL);
gpio_request(GPIO_FN_FSIAISLD_PORT5, NULL);
gpio_request(GPIO_PORT7, NULL);
gpio_request(GPIO_PORT8, NULL);
gpio_request(7, NULL);
gpio_request(8, NULL);
gpio_direction_none(GPIO_PORT7CR); /* FSIAOBT needs no direction */
gpio_direction_none(GPIO_PORT8CR); /* FSIAOLR needs no direction */
......@@ -1138,28 +1120,22 @@ static void __init eva_init(void)
* DBGMD/LCDC0/FSIA MUX
* DBGMD_SELECT_B should be set after setting PFC Function.
*/
gpio_request_one(GPIO_PORT176, GPIOF_OUT_INIT_HIGH, NULL);
gpio_request_one(176, GPIOF_OUT_INIT_HIGH, NULL);
/*
* We can switch CON8/CON14 by SW1.5,
* but it needs after DBGMD_SELECT_B
*/
gpio_request_one(GPIO_PORT6, GPIOF_IN, NULL);
if (gpio_get_value(GPIO_PORT6)) {
gpio_request_one(6, GPIOF_IN, NULL);
if (gpio_get_value(6)) {
/* CON14 enable */
} else {
/* CON8 (SDHI1) enable */
gpio_request(GPIO_FN_SDHI1_CLK, NULL);
gpio_request(GPIO_FN_SDHI1_CMD, NULL);
gpio_request(GPIO_FN_SDHI1_D0, NULL);
gpio_request(GPIO_FN_SDHI1_D1, NULL);
gpio_request(GPIO_FN_SDHI1_D2, NULL);
gpio_request(GPIO_FN_SDHI1_D3, NULL);
gpio_request(GPIO_FN_SDHI1_CD, NULL);
gpio_request(GPIO_FN_SDHI1_WP, NULL);
pinctrl_register_mappings(eva_sdhi1_pinctrl_map,
ARRAY_SIZE(eva_sdhi1_pinctrl_map));
/* SDSLOT2_PON */
gpio_request_one(GPIO_PORT16, GPIOF_OUT_INIT_HIGH, NULL);
gpio_request_one(16, GPIOF_OUT_INIT_HIGH, NULL);
platform_device_register(&sdhi1_device);
}
......
arch/arm/mach-shmobile/board-bonito.c
浏览文件 @ 22b15436
......@@ -24,6 +24,7 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/regulator/fixed.h>
......@@ -288,6 +289,16 @@ static struct platform_device lcdc0_device = {
},
};
static const struct pinctrl_map lcdc0_pinctrl_map[] = {
/* LCD0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
"lcd0_data24_1", "lcd0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
"lcd0_lclk_1", "lcd0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
"lcd0_sync", "lcd0"),
};
/*
* SMSC 9221
*/
......@@ -392,8 +403,8 @@ static void __init bonito_init(void)
/*
* base board settings
*/
gpio_request_one(GPIO_PORT176, GPIOF_IN, NULL);
if (!gpio_get_value(GPIO_PORT176)) {
gpio_request_one(176, GPIOF_IN, NULL);
if (!gpio_get_value(176)) {
u16 bsw2;
u16 bsw3;
u16 bsw4;
......@@ -430,38 +441,11 @@ static void __init bonito_init(void)
*/
if (BIT_ON(bsw2, 3) && /* S38.1 = OFF */
BIT_ON(bsw2, 2)) { /* S38.2 = OFF */
gpio_request(GPIO_FN_LCDC0_SELECT, NULL);
gpio_request(GPIO_FN_LCD0_D0, NULL);
gpio_request(GPIO_FN_LCD0_D1, NULL);
gpio_request(GPIO_FN_LCD0_D2, NULL);
gpio_request(GPIO_FN_LCD0_D3, NULL);
gpio_request(GPIO_FN_LCD0_D4, NULL);
gpio_request(GPIO_FN_LCD0_D5, NULL);
gpio_request(GPIO_FN_LCD0_D6, NULL);
gpio_request(GPIO_FN_LCD0_D7, NULL);
gpio_request(GPIO_FN_LCD0_D8, NULL);
gpio_request(GPIO_FN_LCD0_D9, NULL);
gpio_request(GPIO_FN_LCD0_D10, NULL);
gpio_request(GPIO_FN_LCD0_D11, NULL);
gpio_request(GPIO_FN_LCD0_D12, NULL);
gpio_request(GPIO_FN_LCD0_D13, NULL);
gpio_request(GPIO_FN_LCD0_D14, NULL);
gpio_request(GPIO_FN_LCD0_D15, NULL);
gpio_request(GPIO_FN_LCD0_D16, NULL);
gpio_request(GPIO_FN_LCD0_D17, NULL);
gpio_request(GPIO_FN_LCD0_D18_PORT163, NULL);
gpio_request(GPIO_FN_LCD0_D19_PORT162, NULL);
gpio_request(GPIO_FN_LCD0_D20_PORT161, NULL);
gpio_request(GPIO_FN_LCD0_D21_PORT158, NULL);
gpio_request(GPIO_FN_LCD0_D22_PORT160, NULL);
gpio_request(GPIO_FN_LCD0_D23_PORT159, NULL);
gpio_request(GPIO_FN_LCD0_DCK, NULL);
gpio_request(GPIO_FN_LCD0_VSYN, NULL);
gpio_request(GPIO_FN_LCD0_HSYN, NULL);
gpio_request(GPIO_FN_LCD0_DISP, NULL);
gpio_request(GPIO_FN_LCD0_LCLK_PORT165, NULL);
gpio_request_one(GPIO_PORT61, GPIOF_OUT_INIT_HIGH,
pinctrl_register_mappings(lcdc0_pinctrl_map,
ARRAY_SIZE(lcdc0_pinctrl_map));
gpio_request(GPIO_FN_LCDC0_SELECT, NULL);
gpio_request_one(61, GPIOF_OUT_INIT_HIGH,
NULL); /* LCDDON */
/* backlight on */
......
arch/arm/mach-shmobile/board-kota2.c
浏览文件 @ 22b15436
......@@ -24,6 +24,8 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/io.h>
......@@ -135,17 +137,17 @@ static struct platform_device keysc_device = {
#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
static struct gpio_keys_button gpio_buttons[] = {
GPIO_KEY(KEY_VOLUMEUP, GPIO_PORT56, "+"), /* S2: VOL+ [IRQ9] */
GPIO_KEY(KEY_VOLUMEDOWN, GPIO_PORT54, "-"), /* S3: VOL- [IRQ10] */
GPIO_KEY(KEY_MENU, GPIO_PORT27, "Menu"), /* S4: MENU [IRQ30] */
GPIO_KEY(KEY_HOMEPAGE, GPIO_PORT26, "Home"), /* S5: HOME [IRQ31] */
GPIO_KEY(KEY_BACK, GPIO_PORT11, "Back"), /* S6: BACK [IRQ0] */
GPIO_KEY(KEY_PHONE, GPIO_PORT238, "Tel"), /* S7: TEL [IRQ11] */
GPIO_KEY(KEY_POWER, GPIO_PORT239, "C1"), /* S8: CAM [IRQ13] */
GPIO_KEY(KEY_MAIL, GPIO_PORT224, "Mail"), /* S9: MAIL [IRQ3] */
/* Omitted button "C3?": GPIO_PORT223 - S10: CUST [IRQ8] */
GPIO_KEY(KEY_CAMERA, GPIO_PORT164, "C2"), /* S11: CAM_HALF [IRQ25] */
/* Omitted button "?": GPIO_PORT152 - S12: CAM_FULL [No IRQ] */
GPIO_KEY(KEY_VOLUMEUP, 56, "+"), /* S2: VOL+ [IRQ9] */
GPIO_KEY(KEY_VOLUMEDOWN, 54, "-"), /* S3: VOL- [IRQ10] */
GPIO_KEY(KEY_MENU, 27, "Menu"), /* S4: MENU [IRQ30] */
GPIO_KEY(KEY_HOMEPAGE, 26, "Home"), /* S5: HOME [IRQ31] */
GPIO_KEY(KEY_BACK, 11, "Back"), /* S6: BACK [IRQ0] */
GPIO_KEY(KEY_PHONE, 238, "Tel"), /* S7: TEL [IRQ11] */
GPIO_KEY(KEY_POWER, 239, "C1"), /* S8: CAM [IRQ13] */
GPIO_KEY(KEY_MAIL, 224, "Mail"), /* S9: MAIL [IRQ3] */
/* Omitted button "C3?": 223 - S10: CUST [IRQ8] */
GPIO_KEY(KEY_CAMERA, 164, "C2"), /* S11: CAM_HALF [IRQ25] */
/* Omitted button "?": 152 - S12: CAM_FULL [No IRQ] */
};
static struct gpio_keys_platform_data gpio_key_info = {
......@@ -165,9 +167,9 @@ static struct platform_device gpio_keys_device = {
#define GPIO_LED(n, g) { .name = n, .gpio = g }
static struct gpio_led gpio_leds[] = {
GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */
GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */
GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */
GPIO_LED("G", 20), /* PORT20 [GPO0] -> LED7 -> "G" */
GPIO_LED("H", 21), /* PORT21 [GPO1] -> LED8 -> "H" */
GPIO_LED("J", 22), /* PORT22 [GPO2] -> LED9 -> "J" */
};
static struct gpio_led_platform_data gpio_leds_info = {
......@@ -187,7 +189,7 @@ static struct platform_device gpio_leds_device = {
static struct led_renesas_tpu_config led_renesas_tpu12_pdata = {
.name = "V2513",
.pin_gpio_fn = GPIO_FN_TPU1TO2,
.pin_gpio = GPIO_PORT153,
.pin_gpio = 153,
.channel_offset = 0x90,
.timer_bit = 2,
.max_brightness = 1000,
......@@ -215,7 +217,7 @@ static struct platform_device leds_tpu12_device = {
static struct led_renesas_tpu_config led_renesas_tpu41_pdata = {
.name = "V2514",
.pin_gpio_fn = GPIO_FN_TPU4TO1,
.pin_gpio = GPIO_PORT199,
.pin_gpio = 199,
.channel_offset = 0x50,
.timer_bit = 1,
.max_brightness = 1000,
......@@ -243,7 +245,7 @@ static struct platform_device leds_tpu41_device = {
static struct led_renesas_tpu_config led_renesas_tpu21_pdata = {
.name = "V2515",
.pin_gpio_fn = GPIO_FN_TPU2TO1,
.pin_gpio = GPIO_PORT197,
.pin_gpio = 197,
.channel_offset = 0x50,
.timer_bit = 1,
.max_brightness = 1000,
......@@ -271,7 +273,7 @@ static struct platform_device leds_tpu21_device = {
static struct led_renesas_tpu_config led_renesas_tpu30_pdata = {
.name = "KEYLED",
.pin_gpio_fn = GPIO_FN_TPU3TO0,
.pin_gpio = GPIO_PORT163,
.pin_gpio = 163,
.channel_offset = 0x10,
.timer_bit = 0,
.max_brightness = 1000,
......@@ -433,6 +435,85 @@ static struct platform_device *kota2_devices[] __initdata = {
&sdhi1_device,
};
static unsigned long pin_pullup_conf[] = {
PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
};
static const struct pinctrl_map kota2_pinctrl_map[] = {
/* KEYSC */
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_in8", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out04", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out5", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out6_0", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out7_0", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out8_0", "keysc"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_in8", pin_pullup_conf),
/* MMCIF */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_data8_0", "mmc0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_ctrl_0", "mmc0"),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"PORT279", pin_pullup_conf),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_data8_0", pin_pullup_conf),
/* SCIFA2 (UART2) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
"scifa2_data_0", "scifa2"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
"scifa2_ctrl_0", "scifa2"),
/* SCIFA4 (UART1) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
"scifa4_data", "scifa4"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
"scifa4_ctrl", "scifa4"),
/* SCIFB (BT) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
"scifb_data_0", "scifb"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
"scifb_clk_0", "scifb"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
"scifb_ctrl_0", "scifb"),
/* SDHI0 (microSD) */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_cd", "sdhi0"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_data4", pin_pullup_conf),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"PORT256", pin_pullup_conf),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"PORT251", pin_pullup_conf),
/* SDHI1 (BCM4330) */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_data4", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_ctrl", "sdhi1"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_data4", pin_pullup_conf),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"PORT263", pin_pullup_conf),
/* SMSC911X */
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_data_0_7", "bsc"),
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_data_8_15", "bsc"),
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_cs5_a", "bsc"),
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_we0", "bsc"),
};
static void __init kota2_init(void)
{
regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
......@@ -441,97 +522,16 @@ static void __init kota2_init(void)
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
pinctrl_register_mappings(kota2_pinctrl_map,
ARRAY_SIZE(kota2_pinctrl_map));
sh73a0_pinmux_init();
/* SCIFA2 (UART2) */
gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
gpio_request(GPIO_FN_SCIFA2_RTS1_, NULL);
gpio_request(GPIO_FN_SCIFA2_CTS1_, NULL);
/* SCIFA4 (UART1) */
gpio_request(GPIO_FN_SCIFA4_TXD, NULL);
gpio_request(GPIO_FN_SCIFA4_RXD, NULL);
gpio_request(GPIO_FN_SCIFA4_RTS_, NULL);
gpio_request(GPIO_FN_SCIFA4_CTS_, NULL);
/* SMSC911X */
gpio_request(GPIO_FN_D0_NAF0, NULL);
gpio_request(GPIO_FN_D1_NAF1, NULL);
gpio_request(GPIO_FN_D2_NAF2, NULL);
gpio_request(GPIO_FN_D3_NAF3, NULL);
gpio_request(GPIO_FN_D4_NAF4, NULL);
gpio_request(GPIO_FN_D5_NAF5, NULL);
gpio_request(GPIO_FN_D6_NAF6, NULL);
gpio_request(GPIO_FN_D7_NAF7, NULL);
gpio_request(GPIO_FN_D8_NAF8, NULL);
gpio_request(GPIO_FN_D9_NAF9, NULL);
gpio_request(GPIO_FN_D10_NAF10, NULL);
gpio_request(GPIO_FN_D11_NAF11, NULL);
gpio_request(GPIO_FN_D12_NAF12, NULL);
gpio_request(GPIO_FN_D13_NAF13, NULL);
gpio_request(GPIO_FN_D14_NAF14, NULL);
gpio_request(GPIO_FN_D15_NAF15, NULL);
gpio_request(GPIO_FN_CS5A_, NULL);
gpio_request(GPIO_FN_WE0__FWE, NULL);
gpio_request_one(GPIO_PORT144, GPIOF_IN, NULL); /* PINTA2 */
gpio_request_one(GPIO_PORT145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */
/* KEYSC */
gpio_request(GPIO_FN_KEYIN0_PU, NULL);
gpio_request(GPIO_FN_KEYIN1_PU, NULL);
gpio_request(GPIO_FN_KEYIN2_PU, NULL);
gpio_request(GPIO_FN_KEYIN3_PU, NULL);
gpio_request(GPIO_FN_KEYIN4_PU, NULL);
gpio_request(GPIO_FN_KEYIN5_PU, NULL);
gpio_request(GPIO_FN_KEYIN6_PU, NULL);
gpio_request(GPIO_FN_KEYIN7_PU, NULL);
gpio_request(GPIO_FN_KEYOUT0, NULL);
gpio_request(GPIO_FN_KEYOUT1, NULL);
gpio_request(GPIO_FN_KEYOUT2, NULL);
gpio_request(GPIO_FN_KEYOUT3, NULL);
gpio_request(GPIO_FN_KEYOUT4, NULL);
gpio_request(GPIO_FN_KEYOUT5, NULL);
gpio_request(GPIO_FN_PORT59_KEYOUT6, NULL);
gpio_request(GPIO_FN_PORT58_KEYOUT7, NULL);
gpio_request(GPIO_FN_KEYOUT8, NULL);
gpio_request_one(144, GPIOF_IN, NULL); /* PINTA2 */
gpio_request_one(145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */
/* MMCIF */
gpio_request(GPIO_FN_MMCCLK0, NULL);
gpio_request(GPIO_FN_MMCD0_0, NULL);
gpio_request(GPIO_FN_MMCD0_1, NULL);
gpio_request(GPIO_FN_MMCD0_2, NULL);
gpio_request(GPIO_FN_MMCD0_3, NULL);
gpio_request(GPIO_FN_MMCD0_4, NULL);
gpio_request(GPIO_FN_MMCD0_5, NULL);
gpio_request(GPIO_FN_MMCD0_6, NULL);
gpio_request(GPIO_FN_MMCD0_7, NULL);
gpio_request(GPIO_FN_MMCCMD0, NULL);
gpio_request_one(GPIO_PORT208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */
/* SDHI0 (microSD) */
gpio_request(GPIO_FN_SDHICD0_PU, NULL);
gpio_request(GPIO_FN_SDHICMD0_PU, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
gpio_request(GPIO_FN_SDHID0_3_PU, NULL);
gpio_request(GPIO_FN_SDHID0_2_PU, NULL);
gpio_request(GPIO_FN_SDHID0_1_PU, NULL);
gpio_request(GPIO_FN_SDHID0_0_PU, NULL);
/* SCIFB (BT) */
gpio_request(GPIO_FN_PORT159_SCIFB_SCK, NULL);
gpio_request(GPIO_FN_PORT160_SCIFB_TXD, NULL);
gpio_request(GPIO_FN_PORT161_SCIFB_CTS_, NULL);
gpio_request(GPIO_FN_PORT162_SCIFB_RXD, NULL);
gpio_request(GPIO_FN_PORT163_SCIFB_RTS_, NULL);
/* SDHI1 (BCM4330) */
gpio_request(GPIO_FN_SDHICLK1, NULL);
gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
gpio_request(GPIO_FN_SDHID1_3_PU, NULL);
gpio_request(GPIO_FN_SDHID1_2_PU, NULL);
gpio_request(GPIO_FN_SDHID1_1_PU, NULL);
gpio_request(GPIO_FN_SDHID1_0_PU, NULL);
gpio_request_one(208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */
#ifdef CONFIG_CACHE_L2X0
/* Early BRESP enable, Shared attribute override enable, 64K*8way */
......
arch/arm/mach-shmobile/board-kzm9g.c
浏览文件 @ 22b15436
......@@ -30,6 +30,8 @@
#include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/mfd/tmio.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/platform_device.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
......@@ -437,7 +439,7 @@ static struct sh_mobile_sdhi_info sdhi2_info = {
TMIO_MMC_WRPROTECT_DISABLE,
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
.tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
.cd_gpio = GPIO_PORT13,
.cd_gpio = 13,
};
static struct resource sdhi2_resources[] = {
......@@ -603,6 +605,64 @@ static struct platform_device *kzm_devices[] __initdata = {
&fsi_ak4648_device,
};
static unsigned long pin_pullup_conf[] = {
PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
};
static const struct pinctrl_map kzm_pinctrl_map[] = {
/* FSIA (AK4648) */
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_mclk_in", "fsia"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_sclk_in", "fsia"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_data_in", "fsia"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_data_out", "fsia"),
/* I2C3 */
PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0",
"i2c3_1", "i2c3"),
/* LCD */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh73a0",
"lcd_data24", "lcd"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh73a0",
"lcd_sync", "lcd"),
/* MMCIF */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_data8_0", "mmc0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_ctrl_0", "mmc0"),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"PORT279", pin_pullup_conf),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_data8_0", pin_pullup_conf),
/* SCIFA4 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
"scifa4_data", "scifa4"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
"scifa4_ctrl", "scifa4"),
/* SDHI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_cd", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_wp", "sdhi0"),
/* SDHI2 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh73a0",
"sdhi2_data4", "sdhi2"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh73a0",
"sdhi2_ctrl", "sdhi2"),
/* SMSC */
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_cs4", "bsc"),
/* USB */
PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-sh73a0",
"usb_vbus", "usb"),
};
/*
* FIXME
*
......@@ -664,100 +724,26 @@ static void __init kzm_init(void)
ARRAY_SIZE(fixed2v8_power_consumers), 2800000);
regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
sh73a0_pinmux_init();
/* enable SCIFA4 */
gpio_request(GPIO_FN_SCIFA4_TXD, NULL);
gpio_request(GPIO_FN_SCIFA4_RXD, NULL);
gpio_request(GPIO_FN_SCIFA4_RTS_, NULL);
gpio_request(GPIO_FN_SCIFA4_CTS_, NULL);
pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));
/* CS4 for SMSC/USB */
gpio_request(GPIO_FN_CS4_, NULL); /* CS4 */
sh73a0_pinmux_init();
/* SMSC */
gpio_request_one(GPIO_PORT224, GPIOF_IN, NULL); /* IRQ3 */
gpio_request_one(224, GPIOF_IN, NULL); /* IRQ3 */
/* LCDC */
gpio_request(GPIO_FN_LCDD23, NULL);
gpio_request(GPIO_FN_LCDD22, NULL);
gpio_request(GPIO_FN_LCDD21, NULL);
gpio_request(GPIO_FN_LCDD20, NULL);
gpio_request(GPIO_FN_LCDD19, NULL);
gpio_request(GPIO_FN_LCDD18, NULL);
gpio_request(GPIO_FN_LCDD17, NULL);
gpio_request(GPIO_FN_LCDD16, NULL);
gpio_request(GPIO_FN_LCDD15, NULL);
gpio_request(GPIO_FN_LCDD14, NULL);
gpio_request(GPIO_FN_LCDD13, NULL);
gpio_request(GPIO_FN_LCDD12, NULL);
gpio_request(GPIO_FN_LCDD11, NULL);
gpio_request(GPIO_FN_LCDD10, NULL);
gpio_request(GPIO_FN_LCDD9, NULL);
gpio_request(GPIO_FN_LCDD8, NULL);
gpio_request(GPIO_FN_LCDD7, NULL);
gpio_request(GPIO_FN_LCDD6, NULL);
gpio_request(GPIO_FN_LCDD5, NULL);
gpio_request(GPIO_FN_LCDD4, NULL);
gpio_request(GPIO_FN_LCDD3, NULL);
gpio_request(GPIO_FN_LCDD2, NULL);
gpio_request(GPIO_FN_LCDD1, NULL);
gpio_request(GPIO_FN_LCDD0, NULL);
gpio_request(GPIO_FN_LCDDISP, NULL);
gpio_request(GPIO_FN_LCDDCK, NULL);
gpio_request_one(GPIO_PORT222, GPIOF_OUT_INIT_HIGH, NULL); /* LCDCDON */
gpio_request_one(GPIO_PORT226, GPIOF_OUT_INIT_HIGH, NULL); /* SC */
gpio_request_one(222, GPIOF_OUT_INIT_HIGH, NULL); /* LCDCDON */
gpio_request_one(226, GPIOF_OUT_INIT_HIGH, NULL); /* SC */
/* Touchscreen */
gpio_request_one(GPIO_PORT223, GPIOF_IN, NULL); /* IRQ8 */
/* enable MMCIF */
gpio_request(GPIO_FN_MMCCLK0, NULL);
gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
gpio_request_one(223, GPIOF_IN, NULL); /* IRQ8 */
/* enable SD */
gpio_request(GPIO_FN_SDHIWP0, NULL);
gpio_request(GPIO_FN_SDHICD0, NULL);
gpio_request(GPIO_FN_SDHICMD0, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
gpio_request(GPIO_FN_SDHID0_3, NULL);
gpio_request(GPIO_FN_SDHID0_2, NULL);
gpio_request(GPIO_FN_SDHID0_1, NULL);
gpio_request(GPIO_FN_SDHID0_0, NULL);
gpio_request(GPIO_FN_SDHI0_VCCQ_MC0_ON, NULL);
gpio_request_one(GPIO_PORT15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
/* enable Micro SD */
gpio_request(GPIO_FN_SDHID2_0, NULL);
gpio_request(GPIO_FN_SDHID2_1, NULL);
gpio_request(GPIO_FN_SDHID2_2, NULL);
gpio_request(GPIO_FN_SDHID2_3, NULL);
gpio_request(GPIO_FN_SDHICMD2, NULL);
gpio_request(GPIO_FN_SDHICLK2, NULL);
gpio_request_one(GPIO_PORT14, GPIOF_OUT_INIT_HIGH, NULL); /* power */
/* I2C 3 */
gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL);
gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL);
/* enable FSI2 port A (ak4648) */
gpio_request(GPIO_FN_FSIACK, NULL);
gpio_request(GPIO_FN_FSIAILR, NULL);
gpio_request(GPIO_FN_FSIAIBT, NULL);
gpio_request(GPIO_FN_FSIAISLD, NULL);
gpio_request(GPIO_FN_FSIAOSLD, NULL);
/* enable USB */
gpio_request(GPIO_FN_VBUS_0, NULL);
gpio_request_one(14, GPIOF_OUT_INIT_HIGH, NULL); /* power */
#ifdef CONFIG_CACHE_L2X0
/* Early BRESP enable, Shared attribute override enable, 64K*8way */
......
arch/arm/mach-shmobile/board-mackerel.c
浏览文件 @ 22b15436
......@@ -40,6 +40,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/sh_flctl.h>
#include <linux/pinctrl/machine.h>
#include <linux/pm_clock.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
......@@ -363,7 +364,7 @@ static struct fb_videomode mackerel_lcdc_modes[] = {
static int mackerel_set_brightness(int brightness)
{
gpio_set_value(GPIO_PORT31, brightness);
gpio_set_value(31, brightness);
return 0;
}
......@@ -825,22 +826,22 @@ static struct platform_device usbhs1_device = {
static struct gpio_led mackerel_leds[] = {
{
.name = "led0",
.gpio = GPIO_PORT0,
.gpio = 0,
.default_state = LEDS_GPIO_DEFSTATE_ON,
},
{
.name = "led1",
.gpio = GPIO_PORT1,
.gpio = 1,
.default_state = LEDS_GPIO_DEFSTATE_ON,
},
{
.name = "led2",
.gpio = GPIO_PORT2,
.gpio = 2,
.default_state = LEDS_GPIO_DEFSTATE_ON,
},
{
.name = "led3",
.gpio = GPIO_PORT159,
.gpio = 159,
.default_state = LEDS_GPIO_DEFSTATE_ON,
}
};
......@@ -970,11 +971,11 @@ static struct platform_device nand_flash_device = {
/*
* The card detect pin of the top SD/MMC slot (CN7) is active low and is
* connected to GPIO A22 of SH7372 (GPIO_PORT41).
* connected to GPIO A22 of SH7372 (GPIO 41).
*/
static int slot_cn7_get_cd(struct platform_device *pdev)
{
return !gpio_get_value(GPIO_PORT41);
return !gpio_get_value(41);
}
/* SDHI0 */
......@@ -983,7 +984,7 @@ static struct sh_mobile_sdhi_info sdhi0_info = {
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
.tmio_flags = TMIO_MMC_USE_GPIO_CD,
.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
.cd_gpio = GPIO_PORT172,
.cd_gpio = 172,
};
static struct resource sdhi0_resources[] = {
......@@ -1066,11 +1067,11 @@ static struct platform_device sdhi1_device = {
/*
* The card detect pin of the top SD/MMC slot (CN23) is active low and is
* connected to GPIO SCIFB_SCK of SH7372 (GPIO_PORT162).
* connected to GPIO SCIFB_SCK of SH7372 (162).
*/
static int slot_cn23_get_cd(struct platform_device *pdev)
{
return !gpio_get_value(GPIO_PORT162);
return !gpio_get_value(162);
}
/* SDHI2 */
......@@ -1334,6 +1335,33 @@ static struct i2c_board_info i2c1_devices[] = {
},
};
static const struct pinctrl_map mackerel_pinctrl_map[] = {
/* MMCIF */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
"mmc0_data8_0", "mmc0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
"mmc0_ctrl_0", "mmc0"),
/* SDHI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
"sdhi0_wp", "sdhi0"),
/* SDHI1 */
#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
"sdhi1_data4", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
"sdhi1_ctrl", "sdhi1"),
#endif
/* SDHI2 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372",
"sdhi2_data4", "sdhi2"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372",
"sdhi2_ctrl", "sdhi2"),
};
#define GPIO_PORT9CR IOMEM(0xE6051009)
#define GPIO_PORT10CR IOMEM(0xE605100A)
#define GPIO_PORT167CR IOMEM(0xE60520A7)
......@@ -1370,6 +1398,8 @@ static void __init mackerel_init(void)
/* External clock source */
clk_set_rate(&sh7372_dv_clki_clk, 27000000);
pinctrl_register_mappings(mackerel_pinctrl_map,
ARRAY_SIZE(mackerel_pinctrl_map));
sh7372_pinmux_init();
/* enable SCIFA0 */
......@@ -1409,9 +1439,9 @@ static void __init mackerel_init(void)
gpio_request(GPIO_FN_LCDDCK, NULL);
/* backlight, off by default */
gpio_request_one(GPIO_PORT31, GPIOF_OUT_INIT_LOW, NULL);
gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL);
gpio_request_one(GPIO_PORT151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
/* USBHS0 */
gpio_request(GPIO_FN_VBUS0_0, NULL);
......@@ -1427,10 +1457,10 @@ static void __init mackerel_init(void)
gpio_request(GPIO_FN_FSIAILR, NULL);
gpio_request(GPIO_FN_FSIAISLD, NULL);
gpio_request(GPIO_FN_FSIAOSLD, NULL);
gpio_request_one(GPIO_PORT161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
gpio_request(GPIO_PORT9, NULL);
gpio_request(GPIO_PORT10, NULL);
gpio_request(9, NULL);
gpio_request(10, NULL);
gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
......@@ -1459,52 +1489,14 @@ static void __init mackerel_init(void)
gpio_request(GPIO_FN_IRQ21, NULL);
irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
/* enable SDHI0 */
gpio_request(GPIO_FN_SDHIWP0, NULL);
gpio_request(GPIO_FN_SDHICMD0, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
gpio_request(GPIO_FN_SDHID0_3, NULL);
gpio_request(GPIO_FN_SDHID0_2, NULL);
gpio_request(GPIO_FN_SDHID0_1, NULL);
gpio_request(GPIO_FN_SDHID0_0, NULL);
/* SDHI0 PORT172 card-detect IRQ26 */
gpio_request(GPIO_FN_IRQ26_172, NULL);
#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
/* enable SDHI1 */
gpio_request(GPIO_FN_SDHICMD1, NULL);
gpio_request(GPIO_FN_SDHICLK1, NULL);
gpio_request(GPIO_FN_SDHID1_3, NULL);
gpio_request(GPIO_FN_SDHID1_2, NULL);
gpio_request(GPIO_FN_SDHID1_1, NULL);
gpio_request(GPIO_FN_SDHID1_0, NULL);
#endif
/* card detect pin for MMC slot (CN7) */
gpio_request_one(GPIO_PORT41, GPIOF_IN, NULL);
/* enable SDHI2 */
gpio_request(GPIO_FN_SDHICMD2, NULL);
gpio_request(GPIO_FN_SDHICLK2, NULL);
gpio_request(GPIO_FN_SDHID2_3, NULL);
gpio_request(GPIO_FN_SDHID2_2, NULL);
gpio_request(GPIO_FN_SDHID2_1, NULL);
gpio_request(GPIO_FN_SDHID2_0, NULL);
gpio_request_one(41, GPIOF_IN, NULL);
/* card detect pin for microSD slot (CN23) */
gpio_request_one(GPIO_PORT162, GPIOF_IN, NULL);
/* MMCIF */
gpio_request(GPIO_FN_MMCD0_0, NULL);
gpio_request(GPIO_FN_MMCD0_1, NULL);
gpio_request(GPIO_FN_MMCD0_2, NULL);
gpio_request(GPIO_FN_MMCD0_3, NULL);
gpio_request(GPIO_FN_MMCD0_4, NULL);
gpio_request(GPIO_FN_MMCD0_5, NULL);
gpio_request(GPIO_FN_MMCD0_6, NULL);
gpio_request(GPIO_FN_MMCD0_7, NULL);
gpio_request(GPIO_FN_MMCCMD0, NULL);
gpio_request(GPIO_FN_MMCCLK0, NULL);
gpio_request_one(162, GPIOF_IN, NULL);
/* FLCTL */
gpio_request(GPIO_FN_D0_NAF0, NULL);
......
arch/arm/mach-shmobile/board-marzen.c
浏览文件 @ 22b15436
......@@ -25,8 +25,8 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/dma-mapping.h>
#include <linux/pinctrl/machine.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
......@@ -327,6 +327,41 @@ void __init marzen_init_late(void)
ARRAY_SIZE(marzen_late_devices));
}
static const struct pinctrl_map marzen_pinctrl_map[] = {
/* HSPI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7779",
"hspi0", "hspi0"),
/* SCIF2 (CN18: DEBUG0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-r8a7779",
"scif2_data_c", "scif2"),
/* SCIF4 (CN19: DEBUG1) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-r8a7779",
"scif4_data", "scif4"),
/* SDHI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
"sdhi0_cd", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
"sdhi0_wp", "sdhi0"),
/* SMSC */
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
"intc_irq1_b", "intc"),
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
"lbsc_ex_cs0", "lbsc"),
/* USB0 */
PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform.0", "pfc-r8a7779",
"usb0", "usb0"),
/* USB1 */
PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform.0", "pfc-r8a7779",
"usb1", "usb1"),
/* USB2 */
PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform.1", "pfc-r8a7779",
"usb2", "usb2"),
};
static void __init marzen_init(void)
{
regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
......@@ -334,44 +369,10 @@ static void __init marzen_init(void)
regulator_register_fixed(1, dummy_supplies,
ARRAY_SIZE(dummy_supplies));
pinctrl_register_mappings(marzen_pinctrl_map,
ARRAY_SIZE(marzen_pinctrl_map));
r8a7779_pinmux_init();
/* SCIF2 (CN18: DEBUG0) */
gpio_request(GPIO_FN_TX2_C, NULL);
gpio_request(GPIO_FN_RX2_C, NULL);
/* SCIF4 (CN19: DEBUG1) */
gpio_request(GPIO_FN_TX4, NULL);
gpio_request(GPIO_FN_RX4, NULL);
/* LAN89218 */
gpio_request(GPIO_FN_EX_CS0, NULL); /* nCS */
gpio_request(GPIO_FN_IRQ1_B, NULL); /* IRQ + PME */
/* SD0 (CN20) */
gpio_request(GPIO_FN_SD0_CLK, NULL);
gpio_request(GPIO_FN_SD0_CMD, NULL);
gpio_request(GPIO_FN_SD0_DAT0, NULL);
gpio_request(GPIO_FN_SD0_DAT1, NULL);
gpio_request(GPIO_FN_SD0_DAT2, NULL);
gpio_request(GPIO_FN_SD0_DAT3, NULL);
gpio_request(GPIO_FN_SD0_CD, NULL);
gpio_request(GPIO_FN_SD0_WP, NULL);
/* HSPI 0 */
gpio_request(GPIO_FN_HSPI_CLK0, NULL);
gpio_request(GPIO_FN_HSPI_CS0, NULL);
gpio_request(GPIO_FN_HSPI_TX0, NULL);
gpio_request(GPIO_FN_HSPI_RX0, NULL);
/* USB (CN21) */
gpio_request(GPIO_FN_USB_OVC0, NULL);
gpio_request(GPIO_FN_USB_OVC1, NULL);
gpio_request(GPIO_FN_USB_OVC2, NULL);
/* USB (CN22) */
gpio_request(GPIO_FN_USB_PENC2, NULL);
r8a7779_add_standard_devices();
platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
}
......
arch/arm/mach-shmobile/include/mach/r8a7740.h
浏览文件 @ 22b15436
......@@ -241,48 +241,9 @@ enum {
/* LCD0 */
GPIO_FN_LCDC0_SELECT,
GPIO_FN_LCD0_D0, GPIO_FN_LCD0_D1, GPIO_FN_LCD0_D2,
GPIO_FN_LCD0_D3, GPIO_FN_LCD0_D4, GPIO_FN_LCD0_D5,
GPIO_FN_LCD0_D6, GPIO_FN_LCD0_D7, GPIO_FN_LCD0_D8,
GPIO_FN_LCD0_D9, GPIO_FN_LCD0_D10, GPIO_FN_LCD0_D11,
GPIO_FN_LCD0_D12, GPIO_FN_LCD0_D13, GPIO_FN_LCD0_D14,
GPIO_FN_LCD0_D15, GPIO_FN_LCD0_D16, GPIO_FN_LCD0_D17,
GPIO_FN_LCD0_DON, GPIO_FN_LCD0_VCPWC, GPIO_FN_LCD0_VEPWC,
GPIO_FN_LCD0_DCK, GPIO_FN_LCD0_VSYN, /* for RGB */
GPIO_FN_LCD0_HSYN, GPIO_FN_LCD0_DISP, /* for RGB */
GPIO_FN_LCD0_WR, GPIO_FN_LCD0_RD, /* for SYS */
GPIO_FN_LCD0_CS, GPIO_FN_LCD0_RS, /* for SYS */
GPIO_FN_LCD0_D18_PORT163, GPIO_FN_LCD0_D19_PORT162,
GPIO_FN_LCD0_D20_PORT161, GPIO_FN_LCD0_D21_PORT158,
GPIO_FN_LCD0_D22_PORT160, GPIO_FN_LCD0_D23_PORT159,
GPIO_FN_LCD0_LCLK_PORT165, /* MSEL5CR_6_1 */
GPIO_FN_LCD0_D18_PORT40, GPIO_FN_LCD0_D19_PORT4,
GPIO_FN_LCD0_D20_PORT3, GPIO_FN_LCD0_D21_PORT2,
GPIO_FN_LCD0_D22_PORT0, GPIO_FN_LCD0_D23_PORT1,
GPIO_FN_LCD0_LCLK_PORT102, /* MSEL5CR_6_0 */
/* LCD1 */
GPIO_FN_LCDC1_SELECT,
GPIO_FN_LCD1_D0, GPIO_FN_LCD1_D1, GPIO_FN_LCD1_D2,
GPIO_FN_LCD1_D3, GPIO_FN_LCD1_D4, GPIO_FN_LCD1_D5,
GPIO_FN_LCD1_D6, GPIO_FN_LCD1_D7, GPIO_FN_LCD1_D8,
GPIO_FN_LCD1_D9, GPIO_FN_LCD1_D10, GPIO_FN_LCD1_D11,
GPIO_FN_LCD1_D12, GPIO_FN_LCD1_D13, GPIO_FN_LCD1_D14,
GPIO_FN_LCD1_D15, GPIO_FN_LCD1_D16, GPIO_FN_LCD1_D17,
GPIO_FN_LCD1_D18, GPIO_FN_LCD1_D19, GPIO_FN_LCD1_D20,
GPIO_FN_LCD1_D21, GPIO_FN_LCD1_D22, GPIO_FN_LCD1_D23,
GPIO_FN_LCD1_DON, GPIO_FN_LCD1_VCPWC,
GPIO_FN_LCD1_LCLK, GPIO_FN_LCD1_VEPWC,
GPIO_FN_LCD1_DCK, GPIO_FN_LCD1_VSYN, /* for RGB */
GPIO_FN_LCD1_HSYN, GPIO_FN_LCD1_DISP, /* for RGB */
GPIO_FN_LCD1_WR, GPIO_FN_LCD1_RD, /* for SYS */
GPIO_FN_LCD1_CS, GPIO_FN_LCD1_RS, /* for SYS */
/* RSPI */
GPIO_FN_RSPI_SSL0_A, GPIO_FN_RSPI_SSL1_A,
......@@ -346,26 +307,6 @@ enum {
GPIO_FN_SIM_D_PORT22, /* SIM_D Port 22/199 */
GPIO_FN_SIM_D_PORT199,
/* SDHI0 */
GPIO_FN_SDHI0_D0, GPIO_FN_SDHI0_D1, GPIO_FN_SDHI0_D2,
GPIO_FN_SDHI0_D3, GPIO_FN_SDHI0_CD, GPIO_FN_SDHI0_WP,
GPIO_FN_SDHI0_CMD, GPIO_FN_SDHI0_CLK,
/* SDHI1 */
GPIO_FN_SDHI1_D0, GPIO_FN_SDHI1_D1, GPIO_FN_SDHI1_D2,
GPIO_FN_SDHI1_D3, GPIO_FN_SDHI1_CD, GPIO_FN_SDHI1_WP,
GPIO_FN_SDHI1_CMD, GPIO_FN_SDHI1_CLK,
/* SDHI2 */
GPIO_FN_SDHI2_D0, GPIO_FN_SDHI2_D1, GPIO_FN_SDHI2_D2,
GPIO_FN_SDHI2_D3, GPIO_FN_SDHI2_CLK, GPIO_FN_SDHI2_CMD,
GPIO_FN_SDHI2_CD_PORT24, /* MSEL5CR_19_0 */
GPIO_FN_SDHI2_WP_PORT25,
GPIO_FN_SDHI2_WP_PORT177, /* MSEL5CR_19_1 */
GPIO_FN_SDHI2_CD_PORT202,
/* MSIOF2 */
GPIO_FN_MSIOF2_TXD, GPIO_FN_MSIOF2_RXD, GPIO_FN_MSIOF2_TSCK,
GPIO_FN_MSIOF2_SS2, GPIO_FN_MSIOF2_TSYNC, GPIO_FN_MSIOF2_SS1,
......@@ -417,21 +358,6 @@ enum {
GPIO_FN_MEMC_DREQ1,
GPIO_FN_MEMC_A0,
/* MMC */
GPIO_FN_MMC0_D0_PORT68, GPIO_FN_MMC0_D1_PORT69,
GPIO_FN_MMC0_D2_PORT70, GPIO_FN_MMC0_D3_PORT71,
GPIO_FN_MMC0_D4_PORT72, GPIO_FN_MMC0_D5_PORT73,
GPIO_FN_MMC0_D6_PORT74, GPIO_FN_MMC0_D7_PORT75,
GPIO_FN_MMC0_CLK_PORT66,
GPIO_FN_MMC0_CMD_PORT67, /* MSEL4CR_15_0 */
GPIO_FN_MMC1_D0_PORT149, GPIO_FN_MMC1_D1_PORT148,
GPIO_FN_MMC1_D2_PORT147, GPIO_FN_MMC1_D3_PORT146,
GPIO_FN_MMC1_D4_PORT145, GPIO_FN_MMC1_D5_PORT144,
GPIO_FN_MMC1_D6_PORT143, GPIO_FN_MMC1_D7_PORT142,
GPIO_FN_MMC1_CLK_PORT103,
GPIO_FN_MMC1_CMD_PORT104, /* MSEL4CR_15_1 */
/* MSIOF0 */
GPIO_FN_MSIOF0_SS1, GPIO_FN_MSIOF0_SS2,
GPIO_FN_MSIOF0_RXD, GPIO_FN_MSIOF0_TXD,
......
arch/arm/mach-shmobile/include/mach/r8a7779.h
浏览文件 @ 22b15436
......@@ -71,128 +71,125 @@ enum {
GPIO_FN_A19,
/* IPSR0 */
GPIO_FN_USB_PENC2, GPIO_FN_SCK0, GPIO_FN_PWM1, GPIO_FN_PWMFSW0,
GPIO_FN_SCIF_CLK, GPIO_FN_TCLK0_C, GPIO_FN_BS, GPIO_FN_SD1_DAT2,
GPIO_FN_MMC0_D2, GPIO_FN_FD2, GPIO_FN_ATADIR0, GPIO_FN_SDSELF,
GPIO_FN_HCTS1, GPIO_FN_TX4_C, GPIO_FN_A0, GPIO_FN_SD1_DAT3,
GPIO_FN_MMC0_D3, GPIO_FN_FD3, GPIO_FN_A20, GPIO_FN_TX5_D,
GPIO_FN_HSPI_TX2_B, GPIO_FN_A21, GPIO_FN_SCK5_D, GPIO_FN_HSPI_CLK2_B,
GPIO_FN_A22, GPIO_FN_RX5_D, GPIO_FN_HSPI_RX2_B, GPIO_FN_VI1_R0,
GPIO_FN_A23, GPIO_FN_FCLE, GPIO_FN_HSPI_CLK2, GPIO_FN_VI1_R1,
GPIO_FN_A24, GPIO_FN_SD1_CD, GPIO_FN_MMC0_D4, GPIO_FN_FD4,
GPIO_FN_HSPI_CS2, GPIO_FN_VI1_R2, GPIO_FN_SSI_WS78_B, GPIO_FN_A25,
GPIO_FN_SD1_WP, GPIO_FN_MMC0_D5, GPIO_FN_FD5, GPIO_FN_HSPI_RX2,
GPIO_FN_VI1_R3, GPIO_FN_TX5_B, GPIO_FN_SSI_SDATA7_B, GPIO_FN_CTS0_B,
GPIO_FN_CLKOUT, GPIO_FN_TX3C_IRDA_TX_C, GPIO_FN_PWM0_B, GPIO_FN_CS0,
GPIO_FN_HSPI_CS2_B, GPIO_FN_CS1_A26, GPIO_FN_HSPI_TX2,
GPIO_FN_PWM1, GPIO_FN_PWMFSW0,
GPIO_FN_SCIF_CLK, GPIO_FN_TCLK0_C, GPIO_FN_BS,
GPIO_FN_FD2, GPIO_FN_ATADIR0, GPIO_FN_SDSELF,
GPIO_FN_HCTS1, GPIO_FN_A0,
GPIO_FN_FD3, GPIO_FN_A20,
GPIO_FN_A21,
GPIO_FN_A22, GPIO_FN_VI1_R0,
GPIO_FN_A23, GPIO_FN_FCLE, GPIO_FN_VI1_R1,
GPIO_FN_A24, GPIO_FN_FD4,
GPIO_FN_VI1_R2, GPIO_FN_SSI_WS78_B, GPIO_FN_A25,
GPIO_FN_FD5,
GPIO_FN_VI1_R3, GPIO_FN_SSI_SDATA7_B,
GPIO_FN_CLKOUT, GPIO_FN_PWM0_B,
GPIO_FN_SDSELF_B, GPIO_FN_RD_WR, GPIO_FN_FWE, GPIO_FN_ATAG0,
GPIO_FN_VI1_R7, GPIO_FN_HRTS1, GPIO_FN_RX4_C,
GPIO_FN_VI1_R7, GPIO_FN_HRTS1,
/* IPSR1 */
GPIO_FN_EX_CS0, GPIO_FN_RX3_C_IRDA_RX_C, GPIO_FN_MMC0_D6,
GPIO_FN_FD6, GPIO_FN_EX_CS1, GPIO_FN_MMC0_D7, GPIO_FN_FD7,
GPIO_FN_EX_CS2, GPIO_FN_SD1_CLK, GPIO_FN_MMC0_CLK, GPIO_FN_FALE,
GPIO_FN_ATACS00, GPIO_FN_EX_CS3, GPIO_FN_SD1_CMD, GPIO_FN_MMC0_CMD,
GPIO_FN_FRE, GPIO_FN_ATACS10, GPIO_FN_VI1_R4, GPIO_FN_RX5_B,
GPIO_FN_HSCK1, GPIO_FN_SSI_SDATA8_B, GPIO_FN_RTS0_B_TANS_B,
GPIO_FN_SSI_SDATA9, GPIO_FN_EX_CS4, GPIO_FN_SD1_DAT0, GPIO_FN_MMC0_D0,
GPIO_FN_FD0, GPIO_FN_ATARD0, GPIO_FN_VI1_R5, GPIO_FN_SCK5_B,
GPIO_FN_HTX1, GPIO_FN_TX2_E, GPIO_FN_TX0_B, GPIO_FN_SSI_SCK9,
GPIO_FN_EX_CS5, GPIO_FN_SD1_DAT1, GPIO_FN_MMC0_D1, GPIO_FN_FD1,
GPIO_FN_ATAWR0, GPIO_FN_VI1_R6, GPIO_FN_HRX1, GPIO_FN_RX2_E,
GPIO_FN_RX0_B, GPIO_FN_SSI_WS9, GPIO_FN_MLB_CLK, GPIO_FN_PWM2,
GPIO_FN_SCK4, GPIO_FN_MLB_SIG, GPIO_FN_PWM3, GPIO_FN_TX4,
GPIO_FN_MLB_DAT, GPIO_FN_PWM4, GPIO_FN_RX4, GPIO_FN_HTX0,
GPIO_FN_TX1, GPIO_FN_SDATA, GPIO_FN_CTS0_C, GPIO_FN_SUB_TCK,
GPIO_FN_FD6, GPIO_FN_FD7,
GPIO_FN_FALE,
GPIO_FN_ATACS00,
GPIO_FN_FRE, GPIO_FN_ATACS10, GPIO_FN_VI1_R4,
GPIO_FN_HSCK1, GPIO_FN_SSI_SDATA8_B,
GPIO_FN_SSI_SDATA9,
GPIO_FN_FD0, GPIO_FN_ATARD0, GPIO_FN_VI1_R5,
GPIO_FN_HTX1, GPIO_FN_SSI_SCK9,
GPIO_FN_FD1,
GPIO_FN_ATAWR0, GPIO_FN_VI1_R6, GPIO_FN_HRX1,
GPIO_FN_SSI_WS9, GPIO_FN_MLB_CLK, GPIO_FN_PWM2,
GPIO_FN_MLB_SIG, GPIO_FN_PWM3,
GPIO_FN_MLB_DAT, GPIO_FN_PWM4, GPIO_FN_HTX0,
GPIO_FN_SDATA, GPIO_FN_SUB_TCK,
GPIO_FN_CC5_STATE2, GPIO_FN_CC5_STATE10, GPIO_FN_CC5_STATE18,
GPIO_FN_CC5_STATE26, GPIO_FN_CC5_STATE34,
/* IPSR2 */
GPIO_FN_HRX0, GPIO_FN_RX1, GPIO_FN_SCKZ, GPIO_FN_RTS0_C_TANS_C,
GPIO_FN_HRX0, GPIO_FN_SCKZ,
GPIO_FN_SUB_TDI, GPIO_FN_CC5_STATE3, GPIO_FN_CC5_STATE11,
GPIO_FN_CC5_STATE19, GPIO_FN_CC5_STATE27, GPIO_FN_CC5_STATE35,
GPIO_FN_HSCK0, GPIO_FN_SCK1, GPIO_FN_MTS, GPIO_FN_PWM5,
GPIO_FN_SCK0_C, GPIO_FN_SSI_SDATA9_B, GPIO_FN_SUB_TDO,
GPIO_FN_HSCK0, GPIO_FN_MTS, GPIO_FN_PWM5,
GPIO_FN_SSI_SDATA9_B, GPIO_FN_SUB_TDO,
GPIO_FN_CC5_STATE0, GPIO_FN_CC5_STATE8, GPIO_FN_CC5_STATE16,
GPIO_FN_CC5_STATE24, GPIO_FN_CC5_STATE32, GPIO_FN_HCTS0, GPIO_FN_CTS1,
GPIO_FN_STM, GPIO_FN_PWM0_D, GPIO_FN_RX0_C, GPIO_FN_SCIF_CLK_C,
GPIO_FN_CC5_STATE24, GPIO_FN_CC5_STATE32, GPIO_FN_HCTS0,
GPIO_FN_STM, GPIO_FN_PWM0_D, GPIO_FN_SCIF_CLK_C,
GPIO_FN_SUB_TRST, GPIO_FN_TCLK1_B, GPIO_FN_CC5_OSCOUT, GPIO_FN_HRTS0,
GPIO_FN_RTS1_TANS, GPIO_FN_MDATA, GPIO_FN_TX0_C, GPIO_FN_SUB_TMS,
GPIO_FN_MDATA, GPIO_FN_SUB_TMS,
GPIO_FN_CC5_STATE1, GPIO_FN_CC5_STATE9, GPIO_FN_CC5_STATE17,
GPIO_FN_CC5_STATE25, GPIO_FN_CC5_STATE33, GPIO_FN_DU0_DR0,
GPIO_FN_CC5_STATE25, GPIO_FN_CC5_STATE33,
GPIO_FN_LCDOUT0, GPIO_FN_DREQ0, GPIO_FN_GPS_CLK_B, GPIO_FN_AUDATA0,
GPIO_FN_TX5_C, GPIO_FN_DU0_DR1, GPIO_FN_LCDOUT1, GPIO_FN_DACK0,
GPIO_FN_DRACK0, GPIO_FN_GPS_SIGN_B, GPIO_FN_AUDATA1, GPIO_FN_RX5_C,
GPIO_FN_DU0_DR2, GPIO_FN_LCDOUT2, GPIO_FN_DU0_DR3, GPIO_FN_LCDOUT3,
GPIO_FN_DU0_DR4, GPIO_FN_LCDOUT4, GPIO_FN_DU0_DR5, GPIO_FN_LCDOUT5,
GPIO_FN_DU0_DR6, GPIO_FN_LCDOUT6, GPIO_FN_DU0_DR7, GPIO_FN_LCDOUT7,
GPIO_FN_DU0_DG0, GPIO_FN_LCDOUT8, GPIO_FN_DREQ1, GPIO_FN_SCL2,
GPIO_FN_LCDOUT1, GPIO_FN_DACK0,
GPIO_FN_DRACK0, GPIO_FN_GPS_SIGN_B, GPIO_FN_AUDATA1,
GPIO_FN_LCDOUT2, GPIO_FN_LCDOUT3,
GPIO_FN_LCDOUT4, GPIO_FN_LCDOUT5,
GPIO_FN_LCDOUT6, GPIO_FN_LCDOUT7,
GPIO_FN_LCDOUT8, GPIO_FN_DREQ1, GPIO_FN_SCL2,
GPIO_FN_AUDATA2,
/* IPSR3 */
GPIO_FN_DU0_DG1, GPIO_FN_LCDOUT9, GPIO_FN_DACK1, GPIO_FN_SDA2,
GPIO_FN_AUDATA3, GPIO_FN_DU0_DG2, GPIO_FN_LCDOUT10, GPIO_FN_DU0_DG3,
GPIO_FN_LCDOUT11, GPIO_FN_DU0_DG4, GPIO_FN_LCDOUT12, GPIO_FN_DU0_DG5,
GPIO_FN_LCDOUT13, GPIO_FN_DU0_DG6, GPIO_FN_LCDOUT14, GPIO_FN_DU0_DG7,
GPIO_FN_LCDOUT15, GPIO_FN_DU0_DB0, GPIO_FN_LCDOUT16, GPIO_FN_EX_WAIT1,
GPIO_FN_SCL1, GPIO_FN_TCLK1, GPIO_FN_AUDATA4, GPIO_FN_DU0_DB1,
GPIO_FN_LCDOUT9, GPIO_FN_DACK1, GPIO_FN_SDA2,
GPIO_FN_AUDATA3, GPIO_FN_LCDOUT10,
GPIO_FN_LCDOUT11, GPIO_FN_LCDOUT12,
GPIO_FN_LCDOUT13, GPIO_FN_LCDOUT14,
GPIO_FN_LCDOUT15, GPIO_FN_LCDOUT16, GPIO_FN_EX_WAIT1,
GPIO_FN_SCL1, GPIO_FN_TCLK1, GPIO_FN_AUDATA4,
GPIO_FN_LCDOUT17, GPIO_FN_EX_WAIT2, GPIO_FN_SDA1, GPIO_FN_GPS_MAG_B,
GPIO_FN_AUDATA5, GPIO_FN_SCK5_C, GPIO_FN_DU0_DB2, GPIO_FN_LCDOUT18,
GPIO_FN_DU0_DB3, GPIO_FN_LCDOUT19, GPIO_FN_DU0_DB4, GPIO_FN_LCDOUT20,
GPIO_FN_DU0_DB5, GPIO_FN_LCDOUT21, GPIO_FN_DU0_DB6, GPIO_FN_LCDOUT22,
GPIO_FN_DU0_DB7, GPIO_FN_LCDOUT23, GPIO_FN_DU0_DOTCLKIN,
GPIO_FN_QSTVA_QVS, GPIO_FN_TX3_D_IRDA_TX_D, GPIO_FN_SCL3_B,
GPIO_FN_DU0_DOTCLKOUT0, GPIO_FN_QCLK, GPIO_FN_DU0_DOTCLKOUT1,
GPIO_FN_QSTVB_QVE, GPIO_FN_RX3_D_IRDA_RX_D, GPIO_FN_SDA3_B,
GPIO_FN_AUDATA5, GPIO_FN_LCDOUT18,
GPIO_FN_LCDOUT19, GPIO_FN_LCDOUT20,
GPIO_FN_LCDOUT21, GPIO_FN_LCDOUT22,
GPIO_FN_LCDOUT23,
GPIO_FN_QSTVA_QVS, GPIO_FN_SCL3_B,
GPIO_FN_QCLK,
GPIO_FN_QSTVB_QVE, GPIO_FN_SDA3_B,
GPIO_FN_SDA2_C, GPIO_FN_DACK0_B, GPIO_FN_DRACK0_B,
GPIO_FN_DU0_EXHSYNC_DU0_HSYNC, GPIO_FN_QSTH_QHS,
GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_QSTB_QHE,
GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,
GPIO_FN_CAN1_TX, GPIO_FN_TX2_C, GPIO_FN_SCL2_C, GPIO_FN_REMOCON,
GPIO_FN_QSTH_QHS,
GPIO_FN_QSTB_QHE,
GPIO_FN_QCPV_QDE,
GPIO_FN_CAN1_TX, GPIO_FN_SCL2_C, GPIO_FN_REMOCON,
/* IPSR4 */
GPIO_FN_DU0_DISP, GPIO_FN_QPOLA, GPIO_FN_CAN_CLK_C, GPIO_FN_SCK2_C,
GPIO_FN_DU0_CDE, GPIO_FN_QPOLB, GPIO_FN_CAN1_RX, GPIO_FN_RX2_C,
GPIO_FN_DREQ0_B, GPIO_FN_SSI_SCK78_B, GPIO_FN_SCK0_B, GPIO_FN_DU1_DR0,
GPIO_FN_VI2_DATA0_VI2_B0, GPIO_FN_PWM6, GPIO_FN_SD3_CLK,
GPIO_FN_TX3_E_IRDA_TX_E, GPIO_FN_AUDCK, GPIO_FN_PWMFSW0_B,
GPIO_FN_DU1_DR1, GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_PWM0,
GPIO_FN_SD3_CMD, GPIO_FN_RX3_E_IRDA_RX_E, GPIO_FN_AUDSYNC,
GPIO_FN_CTS0_D, GPIO_FN_DU1_DR2, GPIO_FN_VI2_G0, GPIO_FN_DU1_DR3,
GPIO_FN_VI2_G1, GPIO_FN_DU1_DR4, GPIO_FN_VI2_G2, GPIO_FN_DU1_DR5,
GPIO_FN_VI2_G3, GPIO_FN_DU1_DR6, GPIO_FN_VI2_G4, GPIO_FN_DU1_DR7,
GPIO_FN_VI2_G5, GPIO_FN_DU1_DG0, GPIO_FN_VI2_DATA2_VI2_B2,
GPIO_FN_SCL1_B, GPIO_FN_SD3_DAT2, GPIO_FN_SCK3_E, GPIO_FN_AUDATA6,
GPIO_FN_TX0_D, GPIO_FN_DU1_DG1, GPIO_FN_VI2_DATA3_VI2_B3,
GPIO_FN_SDA1_B, GPIO_FN_SD3_DAT3, GPIO_FN_SCK5, GPIO_FN_AUDATA7,
GPIO_FN_RX0_D, GPIO_FN_DU1_DG2, GPIO_FN_VI2_G6, GPIO_FN_DU1_DG3,
GPIO_FN_VI2_G7, GPIO_FN_DU1_DG4, GPIO_FN_VI2_R0, GPIO_FN_DU1_DG5,
GPIO_FN_VI2_R1, GPIO_FN_DU1_DG6, GPIO_FN_VI2_R2, GPIO_FN_DU1_DG7,
GPIO_FN_VI2_R3, GPIO_FN_DU1_DB0, GPIO_FN_VI2_DATA4_VI2_B4,
GPIO_FN_SCL2_B, GPIO_FN_SD3_DAT0, GPIO_FN_TX5, GPIO_FN_SCK0_D,
GPIO_FN_QPOLA, GPIO_FN_CAN_CLK_C,
GPIO_FN_QPOLB, GPIO_FN_CAN1_RX,
GPIO_FN_DREQ0_B, GPIO_FN_SSI_SCK78_B,
GPIO_FN_VI2_DATA0_VI2_B0, GPIO_FN_PWM6,
GPIO_FN_AUDCK, GPIO_FN_PWMFSW0_B,
GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_PWM0,
GPIO_FN_AUDSYNC,
GPIO_FN_VI2_G0,
GPIO_FN_VI2_G1, GPIO_FN_VI2_G2,
GPIO_FN_VI2_G3, GPIO_FN_VI2_G4,
GPIO_FN_VI2_G5, GPIO_FN_VI2_DATA2_VI2_B2,
GPIO_FN_SCL1_B, GPIO_FN_AUDATA6,
GPIO_FN_VI2_DATA3_VI2_B3,
GPIO_FN_SDA1_B, GPIO_FN_AUDATA7,
GPIO_FN_VI2_G6,
GPIO_FN_VI2_G7, GPIO_FN_VI2_R0,
GPIO_FN_VI2_R1, GPIO_FN_VI2_R2,
GPIO_FN_VI2_R3, GPIO_FN_VI2_DATA4_VI2_B4,
GPIO_FN_SCL2_B,
/* IPSR5 */
GPIO_FN_DU1_DB1, GPIO_FN_VI2_DATA5_VI2_B5, GPIO_FN_SDA2_B,
GPIO_FN_SD3_DAT1, GPIO_FN_RX5, GPIO_FN_RTS0_D_TANS_D,
GPIO_FN_DU1_DB2, GPIO_FN_VI2_R4, GPIO_FN_DU1_DB3, GPIO_FN_VI2_R5,
GPIO_FN_DU1_DB4, GPIO_FN_VI2_R6, GPIO_FN_DU1_DB5, GPIO_FN_VI2_R7,
GPIO_FN_DU1_DB6, GPIO_FN_SCL2_D, GPIO_FN_DU1_DB7, GPIO_FN_SDA2_D,
GPIO_FN_DU1_DOTCLKIN, GPIO_FN_VI2_CLKENB, GPIO_FN_HSPI_CS1,
GPIO_FN_SCL1_D, GPIO_FN_DU1_DOTCLKOUT, GPIO_FN_VI2_FIELD,
GPIO_FN_SDA1_D, GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_VI2_HSYNC,
GPIO_FN_VI3_HSYNC, GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, GPIO_FN_VI2_VSYNC,
GPIO_FN_VI3_VSYNC, GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE,
GPIO_FN_VI2_CLK, GPIO_FN_TX3_B_IRDA_TX_B, GPIO_FN_SD3_CD,
GPIO_FN_HSPI_TX1, GPIO_FN_VI1_CLKENB, GPIO_FN_VI3_CLKENB,
GPIO_FN_AUDIO_CLKC, GPIO_FN_TX2_D, GPIO_FN_SPEEDIN,
GPIO_FN_GPS_SIGN_D, GPIO_FN_DU1_DISP, GPIO_FN_VI2_DATA6_VI2_B6,
GPIO_FN_TCLK0, GPIO_FN_QSTVA_B_QVS_B, GPIO_FN_HSPI_CLK1,
GPIO_FN_SCK2_D, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_GPS_MAG_D,
GPIO_FN_DU1_CDE, GPIO_FN_VI2_DATA7_VI2_B7, GPIO_FN_RX3_B_IRDA_RX_B,
GPIO_FN_SD3_WP, GPIO_FN_HSPI_RX1, GPIO_FN_VI1_FIELD, GPIO_FN_VI3_FIELD,
GPIO_FN_AUDIO_CLKOUT, GPIO_FN_RX2_D, GPIO_FN_GPS_CLK_C,
GPIO_FN_VI2_DATA5_VI2_B5, GPIO_FN_SDA2_B,
GPIO_FN_VI2_R4, GPIO_FN_VI2_R5,
GPIO_FN_VI2_R6, GPIO_FN_VI2_R7,
GPIO_FN_SCL2_D, GPIO_FN_SDA2_D,
GPIO_FN_VI2_CLKENB,
GPIO_FN_SCL1_D, GPIO_FN_VI2_FIELD,
GPIO_FN_SDA1_D, GPIO_FN_VI2_HSYNC,
GPIO_FN_VI3_HSYNC, GPIO_FN_VI2_VSYNC,
GPIO_FN_VI3_VSYNC,
GPIO_FN_VI2_CLK,
GPIO_FN_VI1_CLKENB, GPIO_FN_VI3_CLKENB,
GPIO_FN_AUDIO_CLKC, GPIO_FN_SPEEDIN,
GPIO_FN_GPS_SIGN_D, GPIO_FN_VI2_DATA6_VI2_B6,
GPIO_FN_TCLK0, GPIO_FN_QSTVA_B_QVS_B,
GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_GPS_MAG_D,
GPIO_FN_VI2_DATA7_VI2_B7,
GPIO_FN_VI1_FIELD, GPIO_FN_VI3_FIELD,
GPIO_FN_AUDIO_CLKOUT, GPIO_FN_GPS_CLK_C,
GPIO_FN_GPS_CLK_D, GPIO_FN_AUDIO_CLKA, GPIO_FN_CAN_TXCLK,
GPIO_FN_AUDIO_CLKB, GPIO_FN_USB_OVC2, GPIO_FN_CAN_DEBUGOUT0,
GPIO_FN_AUDIO_CLKB, GPIO_FN_CAN_DEBUGOUT0,
GPIO_FN_MOUT0,
/* IPSR6 */
......@@ -208,85 +205,84 @@ enum {
GPIO_FN_CAN_CLK_B, GPIO_FN_IECLK, GPIO_FN_SCIF_CLK_B, GPIO_FN_TCLK0_B,
GPIO_FN_SSI_SDATA4, GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_SDATA9_C,
GPIO_FN_SSI_SCK5, GPIO_FN_ADICLK, GPIO_FN_CAN_DEBUGOUT10,
GPIO_FN_SCK3, GPIO_FN_TCLK0_D, GPIO_FN_SSI_WS5, GPIO_FN_ADICS_SAMP,
GPIO_FN_CAN_DEBUGOUT11, GPIO_FN_TX3_IRDA_TX, GPIO_FN_SSI_SDATA5,
GPIO_FN_ADIDATA, GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_RX3_IRDA_RX,
GPIO_FN_TCLK0_D, GPIO_FN_SSI_WS5, GPIO_FN_ADICS_SAMP,
GPIO_FN_CAN_DEBUGOUT11, GPIO_FN_SSI_SDATA5,
GPIO_FN_ADIDATA, GPIO_FN_CAN_DEBUGOUT12,
GPIO_FN_SSI_SCK6, GPIO_FN_ADICHS0, GPIO_FN_CAN0_TX, GPIO_FN_IERX_B,
/* IPSR7 */
GPIO_FN_SSI_WS6, GPIO_FN_ADICHS1, GPIO_FN_CAN0_RX, GPIO_FN_IETX_B,
GPIO_FN_SSI_SDATA6, GPIO_FN_ADICHS2, GPIO_FN_CAN_CLK, GPIO_FN_IECLK_B,
GPIO_FN_SSI_SCK78, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_IRQ0_B,
GPIO_FN_SSI_SCK9_B, GPIO_FN_HSPI_CLK1_C, GPIO_FN_SSI_WS78,
GPIO_FN_CAN_DEBUGOUT14, GPIO_FN_IRQ1_B, GPIO_FN_SSI_WS9_B,
GPIO_FN_HSPI_CS1_C, GPIO_FN_SSI_SDATA7, GPIO_FN_CAN_DEBUGOUT15,
GPIO_FN_IRQ2_B, GPIO_FN_TCLK1_C, GPIO_FN_HSPI_TX1_C,
GPIO_FN_SSI_SDATA8, GPIO_FN_VSP, GPIO_FN_IRQ3_B, GPIO_FN_HSPI_RX1_C,
GPIO_FN_SD0_CLK, GPIO_FN_ATACS01, GPIO_FN_SCK1_B, GPIO_FN_SD0_CMD,
GPIO_FN_ATACS11, GPIO_FN_TX1_B, GPIO_FN_CC5_TDO, GPIO_FN_SD0_DAT0,
GPIO_FN_ATADIR1, GPIO_FN_RX1_B, GPIO_FN_CC5_TRST, GPIO_FN_SD0_DAT1,
GPIO_FN_ATAG1, GPIO_FN_SCK2_B, GPIO_FN_CC5_TMS, GPIO_FN_SD0_DAT2,
GPIO_FN_ATARD1, GPIO_FN_TX2_B, GPIO_FN_CC5_TCK, GPIO_FN_SD0_DAT3,
GPIO_FN_ATAWR1, GPIO_FN_RX2_B, GPIO_FN_CC5_TDI, GPIO_FN_SD0_CD,
GPIO_FN_DREQ2, GPIO_FN_RTS1_B_TANS_B, GPIO_FN_SD0_WP, GPIO_FN_DACK2,
GPIO_FN_CTS1_B,
GPIO_FN_SSI_SCK78, GPIO_FN_CAN_DEBUGOUT13,
GPIO_FN_SSI_SCK9_B, GPIO_FN_SSI_WS78,
GPIO_FN_CAN_DEBUGOUT14, GPIO_FN_SSI_WS9_B,
GPIO_FN_SSI_SDATA7, GPIO_FN_CAN_DEBUGOUT15,
GPIO_FN_TCLK1_C,
GPIO_FN_SSI_SDATA8, GPIO_FN_VSP,
GPIO_FN_ATACS01,
GPIO_FN_ATACS11, GPIO_FN_CC5_TDO,
GPIO_FN_ATADIR1, GPIO_FN_CC5_TRST,
GPIO_FN_ATAG1, GPIO_FN_CC5_TMS,
GPIO_FN_ATARD1, GPIO_FN_CC5_TCK,
GPIO_FN_ATAWR1, GPIO_FN_CC5_TDI,
GPIO_FN_DREQ2, GPIO_FN_DACK2,
/* IPSR8 */
GPIO_FN_HSPI_CLK0, GPIO_FN_CTS0, GPIO_FN_USB_OVC0, GPIO_FN_AD_CLK,
GPIO_FN_AD_CLK,
GPIO_FN_CC5_STATE4, GPIO_FN_CC5_STATE12, GPIO_FN_CC5_STATE20,
GPIO_FN_CC5_STATE28, GPIO_FN_CC5_STATE36, GPIO_FN_HSPI_CS0,
GPIO_FN_RTS0_TANS, GPIO_FN_USB_OVC1, GPIO_FN_AD_DI,
GPIO_FN_CC5_STATE28, GPIO_FN_CC5_STATE36,
GPIO_FN_AD_DI,
GPIO_FN_CC5_STATE5, GPIO_FN_CC5_STATE13, GPIO_FN_CC5_STATE21,
GPIO_FN_CC5_STATE29, GPIO_FN_CC5_STATE37, GPIO_FN_HSPI_TX0,
GPIO_FN_TX0, GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_AD_DO,
GPIO_FN_CC5_STATE29, GPIO_FN_CC5_STATE37,
GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_AD_DO,
GPIO_FN_CC5_STATE6, GPIO_FN_CC5_STATE14, GPIO_FN_CC5_STATE22,
GPIO_FN_CC5_STATE30, GPIO_FN_CC5_STATE38, GPIO_FN_HSPI_RX0,
GPIO_FN_RX0, GPIO_FN_CAN_STEP0, GPIO_FN_AD_NCS, GPIO_FN_CC5_STATE7,
GPIO_FN_CC5_STATE30, GPIO_FN_CC5_STATE38,
GPIO_FN_CAN_STEP0, GPIO_FN_AD_NCS, GPIO_FN_CC5_STATE7,
GPIO_FN_CC5_STATE15, GPIO_FN_CC5_STATE23, GPIO_FN_CC5_STATE31,
GPIO_FN_CC5_STATE39, GPIO_FN_FMCLK, GPIO_FN_RDS_CLK, GPIO_FN_PCMOE,
GPIO_FN_BPFCLK, GPIO_FN_PCMWE, GPIO_FN_FMIN, GPIO_FN_RDS_DATA,
GPIO_FN_VI0_CLK, GPIO_FN_MMC1_CLK, GPIO_FN_VI0_CLKENB, GPIO_FN_TX1_C,
GPIO_FN_HTX1_B, GPIO_FN_MT1_SYNC, GPIO_FN_VI0_FIELD, GPIO_FN_RX1_C,
GPIO_FN_VI0_CLK, GPIO_FN_VI0_CLKENB,
GPIO_FN_HTX1_B, GPIO_FN_MT1_SYNC, GPIO_FN_VI0_FIELD,
GPIO_FN_HRX1_B, GPIO_FN_VI0_HSYNC, GPIO_FN_VI0_DATA0_B_VI0_B0_B,
GPIO_FN_CTS1_C, GPIO_FN_TX4_D, GPIO_FN_MMC1_CMD, GPIO_FN_HSCK1_B,
GPIO_FN_HSCK1_B,
GPIO_FN_VI0_VSYNC, GPIO_FN_VI0_DATA1_B_VI0_B1_B,
GPIO_FN_RTS1_C_TANS_C, GPIO_FN_RX4_D, GPIO_FN_PWMFSW0_C,
GPIO_FN_PWMFSW0_C,
/* IPSR9 */
GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_HRTS1_B, GPIO_FN_MT1_VCXO,
GPIO_FN_VI0_DATA1_VI0_B1, GPIO_FN_HCTS1_B, GPIO_FN_MT1_PWM,
GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_MMC1_D0, GPIO_FN_VI0_DATA3_VI0_B3,
GPIO_FN_MMC1_D1, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_MMC1_D2,
GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_MMC1_D3, GPIO_FN_VI0_DATA6_VI0_B6,
GPIO_FN_MMC1_D4, GPIO_FN_ARM_TRACEDATA_0, GPIO_FN_VI0_DATA7_VI0_B7,
GPIO_FN_MMC1_D5, GPIO_FN_ARM_TRACEDATA_1, GPIO_FN_VI0_G0,
GPIO_FN_SSI_SCK78_C, GPIO_FN_IRQ0, GPIO_FN_ARM_TRACEDATA_2,
GPIO_FN_VI0_G1, GPIO_FN_SSI_WS78_C, GPIO_FN_IRQ1,
GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_VI0_DATA3_VI0_B3,
GPIO_FN_VI0_DATA4_VI0_B4,
GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_VI0_DATA6_VI0_B6,
GPIO_FN_ARM_TRACEDATA_0, GPIO_FN_VI0_DATA7_VI0_B7,
GPIO_FN_ARM_TRACEDATA_1, GPIO_FN_VI0_G0,
GPIO_FN_SSI_SCK78_C, GPIO_FN_ARM_TRACEDATA_2,
GPIO_FN_VI0_G1, GPIO_FN_SSI_WS78_C,
GPIO_FN_ARM_TRACEDATA_3, GPIO_FN_VI0_G2, GPIO_FN_ETH_TXD1,
GPIO_FN_MMC1_D6, GPIO_FN_ARM_TRACEDATA_4, GPIO_FN_TS_SPSYNC0,
GPIO_FN_VI0_G3, GPIO_FN_ETH_CRS_DV, GPIO_FN_MMC1_D7,
GPIO_FN_ARM_TRACEDATA_4, GPIO_FN_TS_SPSYNC0,
GPIO_FN_VI0_G3, GPIO_FN_ETH_CRS_DV,
GPIO_FN_ARM_TRACEDATA_5, GPIO_FN_TS_SDAT0, GPIO_FN_VI0_G4,
GPIO_FN_ETH_TX_EN, GPIO_FN_SD2_DAT0_B, GPIO_FN_ARM_TRACEDATA_6,
GPIO_FN_VI0_G5, GPIO_FN_ETH_RX_ER, GPIO_FN_SD2_DAT1_B,
GPIO_FN_ETH_TX_EN, GPIO_FN_ARM_TRACEDATA_6,
GPIO_FN_VI0_G5, GPIO_FN_ETH_RX_ER,
GPIO_FN_ARM_TRACEDATA_7, GPIO_FN_VI0_G6, GPIO_FN_ETH_RXD0,
GPIO_FN_SD2_DAT2_B, GPIO_FN_ARM_TRACEDATA_8, GPIO_FN_VI0_G7,
GPIO_FN_ETH_RXD1, GPIO_FN_SD2_DAT3_B, GPIO_FN_ARM_TRACEDATA_9,
GPIO_FN_ARM_TRACEDATA_8, GPIO_FN_VI0_G7,
GPIO_FN_ETH_RXD1, GPIO_FN_ARM_TRACEDATA_9,
/* IPSR10 */
GPIO_FN_VI0_R0, GPIO_FN_SSI_SDATA7_C, GPIO_FN_SCK1_C, GPIO_FN_DREQ1_B,
GPIO_FN_VI0_R0, GPIO_FN_SSI_SDATA7_C, GPIO_FN_DREQ1_B,
GPIO_FN_ARM_TRACEDATA_10, GPIO_FN_DREQ0_C, GPIO_FN_VI0_R1,
GPIO_FN_SSI_SDATA8_C, GPIO_FN_DACK1_B, GPIO_FN_ARM_TRACEDATA_11,
GPIO_FN_DACK0_C, GPIO_FN_DRACK0_C, GPIO_FN_VI0_R2, GPIO_FN_ETH_LINK,
GPIO_FN_SD2_CLK_B, GPIO_FN_IRQ2, GPIO_FN_ARM_TRACEDATA_12,
GPIO_FN_VI0_R3, GPIO_FN_ETH_MAGIC, GPIO_FN_SD2_CMD_B, GPIO_FN_IRQ3,
GPIO_FN_ARM_TRACEDATA_12,
GPIO_FN_VI0_R3, GPIO_FN_ETH_MAGIC,
GPIO_FN_ARM_TRACEDATA_13, GPIO_FN_VI0_R4, GPIO_FN_ETH_REFCLK,
GPIO_FN_SD2_CD_B, GPIO_FN_HSPI_CLK1_B, GPIO_FN_ARM_TRACEDATA_14,
GPIO_FN_ARM_TRACEDATA_14,
GPIO_FN_MT1_CLK, GPIO_FN_TS_SCK0, GPIO_FN_VI0_R5, GPIO_FN_ETH_TXD0,
GPIO_FN_SD2_WP_B, GPIO_FN_HSPI_CS1_B, GPIO_FN_ARM_TRACEDATA_15,
GPIO_FN_ARM_TRACEDATA_15,
GPIO_FN_MT1_D, GPIO_FN_TS_SDEN0, GPIO_FN_VI0_R6, GPIO_FN_ETH_MDC,
GPIO_FN_DREQ2_C, GPIO_FN_HSPI_TX1_B, GPIO_FN_TRACECLK,
GPIO_FN_DREQ2_C, GPIO_FN_TRACECLK,
GPIO_FN_MT1_BEN, GPIO_FN_PWMFSW0_D, GPIO_FN_VI0_R7, GPIO_FN_ETH_MDIO,
GPIO_FN_DACK2_C, GPIO_FN_HSPI_RX1_B, GPIO_FN_SCIF_CLK_D,
GPIO_FN_DACK2_C, GPIO_FN_SCIF_CLK_D,
GPIO_FN_TRACECTL, GPIO_FN_MT1_PEN, GPIO_FN_VI1_CLK, GPIO_FN_SIM_D,
GPIO_FN_SDA3, GPIO_FN_VI1_HSYNC, GPIO_FN_VI3_CLK, GPIO_FN_SSI_SCK4,
GPIO_FN_GPS_SIGN_C, GPIO_FN_PWMFSW0_E, GPIO_FN_VI1_VSYNC,
......@@ -294,35 +290,35 @@ enum {
GPIO_FN_GPS_MAG_C, GPIO_FN_SPV_TRST, GPIO_FN_SCL3,
/* IPSR11 */
GPIO_FN_VI1_DATA0_VI1_B0, GPIO_FN_SD2_DAT0, GPIO_FN_SIM_RST,
GPIO_FN_VI1_DATA0_VI1_B0, GPIO_FN_SIM_RST,
GPIO_FN_SPV_TCK, GPIO_FN_ADICLK_B, GPIO_FN_VI1_DATA1_VI1_B1,
GPIO_FN_SD2_DAT1, GPIO_FN_MT0_CLK, GPIO_FN_SPV_TMS,
GPIO_FN_ADICS_B_SAMP_B, GPIO_FN_VI1_DATA2_VI1_B2, GPIO_FN_SD2_DAT2,
GPIO_FN_MT0_CLK, GPIO_FN_SPV_TMS,
GPIO_FN_ADICS_B_SAMP_B, GPIO_FN_VI1_DATA2_VI1_B2,
GPIO_FN_MT0_D, GPIO_FN_SPVTDI, GPIO_FN_ADIDATA_B,
GPIO_FN_VI1_DATA3_VI1_B3, GPIO_FN_SD2_DAT3, GPIO_FN_MT0_BEN,
GPIO_FN_VI1_DATA3_VI1_B3, GPIO_FN_MT0_BEN,
GPIO_FN_SPV_TDO, GPIO_FN_ADICHS0_B, GPIO_FN_VI1_DATA4_VI1_B4,
GPIO_FN_SD2_CLK, GPIO_FN_MT0_PEN, GPIO_FN_SPA_TRST,
GPIO_FN_HSPI_CLK1_D, GPIO_FN_ADICHS1_B, GPIO_FN_VI1_DATA5_VI1_B5,
GPIO_FN_SD2_CMD, GPIO_FN_MT0_SYNC, GPIO_FN_SPA_TCK,
GPIO_FN_HSPI_CS1_D, GPIO_FN_ADICHS2_B, GPIO_FN_VI1_DATA6_VI1_B6,
GPIO_FN_SD2_CD, GPIO_FN_MT0_VCXO, GPIO_FN_SPA_TMS, GPIO_FN_HSPI_TX1_D,
GPIO_FN_VI1_DATA7_VI1_B7, GPIO_FN_SD2_WP, GPIO_FN_MT0_PWM,
GPIO_FN_SPA_TDI, GPIO_FN_HSPI_RX1_D, GPIO_FN_VI1_G0, GPIO_FN_VI3_DATA0,
GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_TS_SCK1, GPIO_FN_DREQ2_B, GPIO_FN_TX2,
GPIO_FN_MT0_PEN, GPIO_FN_SPA_TRST,
GPIO_FN_ADICHS1_B, GPIO_FN_VI1_DATA5_VI1_B5,
GPIO_FN_MT0_SYNC, GPIO_FN_SPA_TCK,
GPIO_FN_ADICHS2_B, GPIO_FN_VI1_DATA6_VI1_B6,
GPIO_FN_MT0_VCXO, GPIO_FN_SPA_TMS,
GPIO_FN_VI1_DATA7_VI1_B7, GPIO_FN_MT0_PWM,
GPIO_FN_SPA_TDI, GPIO_FN_VI1_G0, GPIO_FN_VI3_DATA0,
GPIO_FN_TS_SCK1, GPIO_FN_DREQ2_B,
GPIO_FN_SPA_TDO, GPIO_FN_HCTS0_B, GPIO_FN_VI1_G1, GPIO_FN_VI3_DATA1,
GPIO_FN_SSI_SCK1, GPIO_FN_TS_SDEN1, GPIO_FN_DACK2_B, GPIO_FN_RX2,
GPIO_FN_SSI_SCK1, GPIO_FN_TS_SDEN1, GPIO_FN_DACK2_B,
GPIO_FN_HRTS0_B,
/* IPSR12 */
GPIO_FN_VI1_G2, GPIO_FN_VI3_DATA2, GPIO_FN_SSI_WS1, GPIO_FN_TS_SPSYNC1,
GPIO_FN_SCK2, GPIO_FN_HSCK0_B, GPIO_FN_VI1_G3, GPIO_FN_VI3_DATA3,
GPIO_FN_HSCK0_B, GPIO_FN_VI1_G3, GPIO_FN_VI3_DATA3,
GPIO_FN_SSI_SCK2, GPIO_FN_TS_SDAT1, GPIO_FN_SCL1_C, GPIO_FN_HTX0_B,
GPIO_FN_VI1_G4, GPIO_FN_VI3_DATA4, GPIO_FN_SSI_WS2, GPIO_FN_SDA1_C,
GPIO_FN_SIM_RST_B, GPIO_FN_HRX0_B, GPIO_FN_VI1_G5, GPIO_FN_VI3_DATA5,
GPIO_FN_GPS_CLK, GPIO_FN_FSE, GPIO_FN_TX4_B, GPIO_FN_SIM_D_B,
GPIO_FN_GPS_CLK, GPIO_FN_FSE, GPIO_FN_SIM_D_B,
GPIO_FN_VI1_G6, GPIO_FN_VI3_DATA6, GPIO_FN_GPS_SIGN, GPIO_FN_FRB,
GPIO_FN_RX4_B, GPIO_FN_SIM_CLK_B, GPIO_FN_VI1_G7, GPIO_FN_VI3_DATA7,
GPIO_FN_GPS_MAG, GPIO_FN_FCE, GPIO_FN_SCK4_B,
GPIO_FN_SIM_CLK_B, GPIO_FN_VI1_G7, GPIO_FN_VI3_DATA7,
GPIO_FN_GPS_MAG, GPIO_FN_FCE,
};
struct platform_device;
......
arch/arm/mach-shmobile/include/mach/sh7372.h
浏览文件 @ 22b15436
......@@ -294,21 +294,6 @@ enum {
GPIO_FN_D12_NAF12, GPIO_FN_D13_NAF13, GPIO_FN_D14_NAF14,
GPIO_FN_D15_NAF15,
/*
* MMCIF(1) (PORT 84, 85, 86, 87, 88, 89,
* 90, 91, 92, 99)
*/
GPIO_FN_MMCD0_0, GPIO_FN_MMCD0_1, GPIO_FN_MMCD0_2,
GPIO_FN_MMCD0_3, GPIO_FN_MMCD0_4, GPIO_FN_MMCD0_5,
GPIO_FN_MMCD0_6, GPIO_FN_MMCD0_7,
GPIO_FN_MMCCMD0, GPIO_FN_MMCCLK0,
/* MMCIF(2) (PORT 54, 55, 56, 57, 58, 59, 60, 61, 66, 67) */
GPIO_FN_MMCD1_0, GPIO_FN_MMCD1_1, GPIO_FN_MMCD1_2,
GPIO_FN_MMCD1_3, GPIO_FN_MMCD1_4, GPIO_FN_MMCD1_5,
GPIO_FN_MMCD1_6, GPIO_FN_MMCD1_7,
GPIO_FN_MMCCLK1, GPIO_FN_MMCCMD1,
/* SPU2 (PORT 65) */
GPIO_FN_VINT_I,
......@@ -416,20 +401,6 @@ enum {
/* HDMI (PORT 169, 170) */
GPIO_FN_HDMI_HPD, GPIO_FN_HDMI_CEC,
/* SDHI0 (PORT 171, 172, 173, 174, 175, 176, 177, 178) */
GPIO_FN_SDHICLK0, GPIO_FN_SDHICD0,
GPIO_FN_SDHICMD0, GPIO_FN_SDHIWP0,
GPIO_FN_SDHID0_0, GPIO_FN_SDHID0_1,
GPIO_FN_SDHID0_2, GPIO_FN_SDHID0_3,
/* SDHI1 (PORT 179, 180, 181, 182, 183, 184) */
GPIO_FN_SDHICLK1, GPIO_FN_SDHICMD1, GPIO_FN_SDHID1_0,
GPIO_FN_SDHID1_1, GPIO_FN_SDHID1_2, GPIO_FN_SDHID1_3,
/* SDHI2 (PORT 185, 186, 187, 188, 189, 190) */
GPIO_FN_SDHICLK2, GPIO_FN_SDHICMD2, GPIO_FN_SDHID2_0,
GPIO_FN_SDHID2_1, GPIO_FN_SDHID2_2, GPIO_FN_SDHID2_3,
/* SDENC see MSEL4CR 19 */
GPIO_FN_SDENC_CPG,
GPIO_FN_SDENC_DV_CLKI,
......
arch/arm/mach-shmobile/include/mach/sh73a0.h
浏览文件 @ 22b15436
......@@ -94,8 +94,7 @@ enum {
GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309,
/* Table 25-1 (Function 0-7) */
GPIO_FN_VBUS_0,
GPIO_FN_GPI0,
GPIO_FN_GPI0 = 310,
GPIO_FN_GPI1,
GPIO_FN_GPI2,
GPIO_FN_GPI3,
......@@ -103,15 +102,11 @@ enum {
GPIO_FN_GPI5,
GPIO_FN_GPI6,
GPIO_FN_GPI7,
GPIO_FN_SCIFA7_RXD,
GPIO_FN_SCIFA7_CTS_,
GPIO_FN_GPO7, GPIO_FN_MFG0_OUT2,
GPIO_FN_GPO6, GPIO_FN_MFG1_OUT2,
GPIO_FN_GPO5, GPIO_FN_SCIFA0_SCK, GPIO_FN_FSICOSLDT3, \
GPIO_FN_GPO5,
GPIO_FN_PORT16_VIO_CKOR,
GPIO_FN_SCIFA0_TXD,
GPIO_FN_SCIFA7_TXD,
GPIO_FN_SCIFA7_RTS_, GPIO_FN_PORT19_VIO_CKO2,
GPIO_FN_PORT19_VIO_CKO2,
GPIO_FN_GPO0,
GPIO_FN_GPO1,
GPIO_FN_GPO2, GPIO_FN_STATUS0,
......@@ -119,83 +114,44 @@ enum {
GPIO_FN_GPO4, GPIO_FN_STATUS2,
GPIO_FN_VINT,
GPIO_FN_TCKON,
GPIO_FN_XDVFS1, GPIO_FN_PORT27_I2C_SCL2, GPIO_FN_PORT27_I2C_SCL3, \
GPIO_FN_XDVFS1,
GPIO_FN_MFG0_OUT1, GPIO_FN_PORT27_IROUT,
GPIO_FN_XDVFS2, GPIO_FN_PORT28_I2C_SDA2, GPIO_FN_PORT28_I2C_SDA3, \
GPIO_FN_XDVFS2,
GPIO_FN_PORT28_TPU1TO1,
GPIO_FN_SIM_RST, GPIO_FN_PORT29_TPU1TO1,
GPIO_FN_SIM_CLK, GPIO_FN_PORT30_VIO_CKOR,
GPIO_FN_SIM_D, GPIO_FN_PORT31_IROUT,
GPIO_FN_SCIFA4_TXD,
GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,
GPIO_FN_SCIFA4_RTS_,
GPIO_FN_SCIFA4_CTS_,
GPIO_FN_FSIBOBT, GPIO_FN_FSIBIBT,
GPIO_FN_FSIBOLR, GPIO_FN_FSIBILR,
GPIO_FN_FSIBOSLD,
GPIO_FN_FSIBISLD,
GPIO_FN_XWUP,
GPIO_FN_VACK,
GPIO_FN_XTAL1L,
GPIO_FN_SCIFA0_RTS_, GPIO_FN_FSICOSLDT2,
GPIO_FN_SCIFA0_RXD,
GPIO_FN_SCIFA0_CTS_, GPIO_FN_FSICOSLDT1,
GPIO_FN_FSICOBT, GPIO_FN_FSICIBT, GPIO_FN_FSIDOBT, GPIO_FN_FSIDIBT,
GPIO_FN_FSICOLR, GPIO_FN_FSICILR, GPIO_FN_FSIDOLR, GPIO_FN_FSIDILR,
GPIO_FN_FSICOSLD, GPIO_FN_PORT47_FSICSPDIF,
GPIO_FN_FSICISLD, GPIO_FN_FSIDISLD,
GPIO_FN_FSIACK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT, \
GPIO_FN_FSIAOMC,
GPIO_FN_FSIAOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_FSIAILR,
GPIO_FN_FSIAOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_FSIAIBT,
GPIO_FN_FSIAOSLD, GPIO_FN_BBIF2_TXD2,
GPIO_FN_FSIASPDIF, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3, \
GPIO_FN_FSIBSPDIF, GPIO_FN_PORT53_FSICSPDIF,
GPIO_FN_FSIBCK, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2, \
GPIO_FN_FSIBOMC, GPIO_FN_FSICCK, GPIO_FN_FSICOMC,
GPIO_FN_FSIAISLD, GPIO_FN_TPU0TO0,
GPIO_FN_PORT49_IROUT,
GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2,
GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3,
GPIO_FN_BBIF2_TXD2,
GPIO_FN_TPU3TO3,
GPIO_FN_TPU3TO2,
GPIO_FN_TPU0TO0,
GPIO_FN_A0, GPIO_FN_BS_,
GPIO_FN_A12, GPIO_FN_PORT58_KEYOUT7, GPIO_FN_TPU4TO2,
GPIO_FN_A13, GPIO_FN_PORT59_KEYOUT6, GPIO_FN_TPU0TO1,
GPIO_FN_A14, GPIO_FN_KEYOUT5,
GPIO_FN_A15, GPIO_FN_KEYOUT4,
GPIO_FN_A16, GPIO_FN_KEYOUT3, GPIO_FN_MSIOF0_SS1,
GPIO_FN_A17, GPIO_FN_KEYOUT2, GPIO_FN_MSIOF0_TSYNC,
GPIO_FN_A18, GPIO_FN_KEYOUT1, GPIO_FN_MSIOF0_TSCK,
GPIO_FN_A19, GPIO_FN_KEYOUT0, GPIO_FN_MSIOF0_TXD,
GPIO_FN_A20, GPIO_FN_KEYIN0, GPIO_FN_MSIOF0_RSCK,
GPIO_FN_A21, GPIO_FN_KEYIN1, GPIO_FN_MSIOF0_RSYNC,
GPIO_FN_A22, GPIO_FN_KEYIN2, GPIO_FN_MSIOF0_MCK0,
GPIO_FN_A23, GPIO_FN_KEYIN3, GPIO_FN_MSIOF0_MCK1,
GPIO_FN_A24, GPIO_FN_KEYIN4, GPIO_FN_MSIOF0_RXD,
GPIO_FN_A25, GPIO_FN_KEYIN5, GPIO_FN_MSIOF0_SS2,
GPIO_FN_A26, GPIO_FN_KEYIN6,
GPIO_FN_KEYIN7,
GPIO_FN_D0_NAF0,
GPIO_FN_D1_NAF1,
GPIO_FN_D2_NAF2,
GPIO_FN_D3_NAF3,
GPIO_FN_D4_NAF4,
GPIO_FN_D5_NAF5,
GPIO_FN_D6_NAF6,
GPIO_FN_D7_NAF7,
GPIO_FN_D8_NAF8,
GPIO_FN_D9_NAF9,
GPIO_FN_D10_NAF10,
GPIO_FN_D11_NAF11,
GPIO_FN_D12_NAF12,
GPIO_FN_D13_NAF13,
GPIO_FN_D14_NAF14,
GPIO_FN_D15_NAF15,
GPIO_FN_CS4_,
GPIO_FN_CS5A_, GPIO_FN_PORT91_RDWR,
GPIO_FN_CS5B_, GPIO_FN_FCE1_,
GPIO_FN_CS6B_, GPIO_FN_DACK0,
GPIO_FN_FCE0_, GPIO_FN_CS6A_,
GPIO_FN_A12, GPIO_FN_TPU4TO2,
GPIO_FN_A13, GPIO_FN_TPU0TO1,
GPIO_FN_A14,
GPIO_FN_A15,
GPIO_FN_A16, GPIO_FN_MSIOF0_SS1,
GPIO_FN_A17, GPIO_FN_MSIOF0_TSYNC,
GPIO_FN_A18, GPIO_FN_MSIOF0_TSCK,
GPIO_FN_A19, GPIO_FN_MSIOF0_TXD,
GPIO_FN_A20, GPIO_FN_MSIOF0_RSCK,
GPIO_FN_A21, GPIO_FN_MSIOF0_RSYNC,
GPIO_FN_A22, GPIO_FN_MSIOF0_MCK0,
GPIO_FN_A23, GPIO_FN_MSIOF0_MCK1,
GPIO_FN_A24, GPIO_FN_MSIOF0_RXD,
GPIO_FN_A25, GPIO_FN_MSIOF0_SS2,
GPIO_FN_A26,
GPIO_FN_FCE1_,
GPIO_FN_DACK0,
GPIO_FN_FCE0_,
GPIO_FN_WAIT_, GPIO_FN_DREQ0,
GPIO_FN_RD__FSC,
GPIO_FN_WE0__FWE, GPIO_FN_RDWR_FWE,
GPIO_FN_WE1_,
GPIO_FN_FRB,
GPIO_FN_CKO,
GPIO_FN_NBRSTOUT_,
......@@ -204,145 +160,118 @@ enum {
GPIO_FN_BBIF2_RXD,
GPIO_FN_BBIF2_SYNC,
GPIO_FN_BBIF2_SCK,
GPIO_FN_SCIFA3_CTS_, GPIO_FN_MFG3_IN2,
GPIO_FN_SCIFA3_RXD, GPIO_FN_MFG3_IN1,
GPIO_FN_BBIF1_SS2, GPIO_FN_SCIFA3_RTS_, GPIO_FN_MFG3_OUT1,
GPIO_FN_SCIFA3_TXD,
GPIO_FN_MFG3_IN2,
GPIO_FN_MFG3_IN1,
GPIO_FN_BBIF1_SS2, GPIO_FN_MFG3_OUT1,
GPIO_FN_HSI_RX_DATA, GPIO_FN_BBIF1_RXD,
GPIO_FN_HSI_TX_WAKE, GPIO_FN_BBIF1_TSCK,
GPIO_FN_HSI_TX_DATA, GPIO_FN_BBIF1_TSYNC,
GPIO_FN_HSI_TX_READY, GPIO_FN_BBIF1_TXD,
GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK, GPIO_FN_PORT115_I2C_SCL2, \
GPIO_FN_PORT115_I2C_SCL3,
GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC, GPIO_FN_PORT116_I2C_SDA2, \
GPIO_FN_PORT116_I2C_SDA3,
GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK,
GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC,
GPIO_FN_HSI_RX_FLAG, GPIO_FN_BBIF1_SS1, GPIO_FN_BBIF1_FLOW,
GPIO_FN_HSI_TX_FLAG,
GPIO_FN_VIO_VD, GPIO_FN_PORT128_LCD2VSYN, GPIO_FN_VIO2_VD, \
GPIO_FN_LCD2D0,
GPIO_FN_VIO_HD, GPIO_FN_PORT129_LCD2HSYN, GPIO_FN_PORT129_LCD2CS_, \
GPIO_FN_VIO2_HD, GPIO_FN_LCD2D1,
GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD, GPIO_FN_LCD2D10,
GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT6, GPIO_FN_PORT131_MSIOF2_SS1, \
GPIO_FN_PORT131_KEYOUT11, GPIO_FN_LCD2D11,
GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT7, GPIO_FN_PORT132_MSIOF2_SS2, \
GPIO_FN_PORT132_KEYOUT10, GPIO_FN_LCD2D12,
GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC, GPIO_FN_LCD2D13,
GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD, GPIO_FN_LCD2D14,
GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK, GPIO_FN_LCD2D15,
GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYOUT8, GPIO_FN_LCD2D16,
GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYOUT9, GPIO_FN_LCD2D17,
GPIO_FN_VIO_D8, GPIO_FN_PORT138_KEYOUT8, GPIO_FN_VIO2_D0, \
GPIO_FN_LCD2D6,
GPIO_FN_VIO_D9, GPIO_FN_PORT139_KEYOUT9, GPIO_FN_VIO2_D1, \
GPIO_FN_LCD2D7,
GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2, GPIO_FN_LCD2D8,
GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3, GPIO_FN_LCD2D9,
GPIO_FN_VIO_D12, GPIO_FN_PORT142_KEYOUT10, GPIO_FN_VIO2_D4, \
GPIO_FN_LCD2D2,
GPIO_FN_VIO_D13, GPIO_FN_PORT143_KEYOUT11, GPIO_FN_PORT143_KEYOUT6, \
GPIO_FN_VIO2_D5, GPIO_FN_LCD2D3,
GPIO_FN_VIO_D14, GPIO_FN_PORT144_KEYOUT7, GPIO_FN_VIO2_D6, \
GPIO_FN_LCD2D4,
GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_LCD2DISP, \
GPIO_FN_PORT145_LCD2RS, GPIO_FN_VIO2_D7, GPIO_FN_LCD2D5,
GPIO_FN_VIO_CLK, GPIO_FN_LCD2DCK, GPIO_FN_PORT146_LCD2WR_, \
GPIO_FN_VIO2_CLK, GPIO_FN_LCD2D18,
GPIO_FN_VIO_FIELD, GPIO_FN_LCD2RD_, GPIO_FN_VIO2_FIELD, GPIO_FN_LCD2D19,
GPIO_FN_VIO_VD, GPIO_FN_VIO2_VD,
GPIO_FN_VIO_HD,
GPIO_FN_VIO2_HD,
GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD,
GPIO_FN_VIO_D1, GPIO_FN_PORT131_MSIOF2_SS1,
GPIO_FN_VIO_D2, GPIO_FN_PORT132_MSIOF2_SS2,
GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC,
GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD,
GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK,
GPIO_FN_VIO_D6,
GPIO_FN_VIO_D7,
GPIO_FN_VIO_D8, GPIO_FN_VIO2_D0,
GPIO_FN_VIO_D9, GPIO_FN_VIO2_D1,
GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2,
GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3,
GPIO_FN_VIO_D12, GPIO_FN_VIO2_D4,
GPIO_FN_VIO_D13,
GPIO_FN_VIO2_D5,
GPIO_FN_VIO_D14, GPIO_FN_VIO2_D6,
GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3,
GPIO_FN_VIO2_D7,
GPIO_FN_VIO_CLK,
GPIO_FN_VIO2_CLK,
GPIO_FN_VIO_FIELD, GPIO_FN_VIO2_FIELD,
GPIO_FN_VIO_CKO,
GPIO_FN_A27, GPIO_FN_PORT149_RDWR, GPIO_FN_MFG0_IN1, \
GPIO_FN_PORT149_KEYOUT9,
GPIO_FN_A27, GPIO_FN_MFG0_IN1,
GPIO_FN_MFG0_IN2,
GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,
GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,
GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,
GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0,
GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1,
GPIO_FN_SCIFA2_RTS1_, GPIO_FN_PORT156_MSIOF2_SS2,
GPIO_FN_SCIFA2_CTS1_, GPIO_FN_PORT157_MSIOF2_RXD,
GPIO_FN_DINT_, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,
GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI,
GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD,
GPIO_FN_PORT161_SCIFB_CTS_, GPIO_FN_PORT161_SCIFA5_CTS_,
GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD,
GPIO_FN_PORT163_SCIFB_RTS_, GPIO_FN_PORT163_SCIFA5_RTS_, \
GPIO_FN_MSIOF2_MCK0,
GPIO_FN_MSIOF2_MCK1,
GPIO_FN_PORT156_MSIOF2_SS2,
GPIO_FN_PORT157_MSIOF2_RXD,
GPIO_FN_DINT_, GPIO_FN_TS_SCK3,
GPIO_FN_NMI,
GPIO_FN_TPU3TO0,
GPIO_FN_LCDD0,
GPIO_FN_LCDD1, GPIO_FN_PORT193_SCIFA5_CTS_, GPIO_FN_BBIF2_TSYNC1,
GPIO_FN_LCDD2, GPIO_FN_PORT194_SCIFA5_RTS_, GPIO_FN_BBIF2_TSCK1,
GPIO_FN_LCDD3, GPIO_FN_PORT195_SCIFA5_RXD, GPIO_FN_BBIF2_TXD1,
GPIO_FN_LCDD4, GPIO_FN_PORT196_SCIFA5_TXD,
GPIO_FN_LCDD5, GPIO_FN_PORT197_SCIFA5_SCK, GPIO_FN_MFG2_OUT2, \
GPIO_FN_BBIF2_TSYNC1,
GPIO_FN_BBIF2_TSCK1,
GPIO_FN_BBIF2_TXD1,
GPIO_FN_MFG2_OUT2,
GPIO_FN_TPU2TO1,
GPIO_FN_LCDD6,
GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2,
GPIO_FN_LCDD8, GPIO_FN_D16,
GPIO_FN_LCDD9, GPIO_FN_D17,
GPIO_FN_LCDD10, GPIO_FN_D18,
GPIO_FN_LCDD11, GPIO_FN_D19,
GPIO_FN_LCDD12, GPIO_FN_D20,
GPIO_FN_LCDD13, GPIO_FN_D21,
GPIO_FN_LCDD14, GPIO_FN_D22,
GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23,
GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24,
GPIO_FN_LCDD17, GPIO_FN_D25,
GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,
GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27,
GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,
GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,
GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,
GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,
GPIO_FN_LCDDCK, GPIO_FN_LCDWR_,
GPIO_FN_LCDRD_, GPIO_FN_DACK2, GPIO_FN_PORT217_LCD2RS, \
GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3, GPIO_FN_PORT217_LCD2DISP,
GPIO_FN_LCDHSYN, GPIO_FN_LCDCS_, GPIO_FN_LCDCS2_, GPIO_FN_DACK3, \
GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2,
GPIO_FN_D16,
GPIO_FN_D17,
GPIO_FN_D18,
GPIO_FN_D19,
GPIO_FN_D20,
GPIO_FN_D21,
GPIO_FN_D22,
GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23,
GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24,
GPIO_FN_D25,
GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,
GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27,
GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,
GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,
GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,
GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,
GPIO_FN_DACK2,
GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3,
GPIO_FN_DACK3,
GPIO_FN_PORT218_VIO_CKOR,
GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_PORT219_LCD2WR_, \
GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, GPIO_FN_VIO2_CLK3, \
GPIO_FN_LCD2DCK_2,
GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2,
GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PORT221_LCD2CS_, \
GPIO_FN_DREQ1,
GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, GPIO_FN_VIO2_HD3, \
GPIO_FN_PORT221_LCD2HSYN,
GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN, \
GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3, GPIO_FN_PORT222_LCD2VSYN,
GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2,
GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_PORT226_VIO_CKO2,
GPIO_FN_SCIFA1_RTS_, GPIO_FN_IDIN,
GPIO_FN_SCIFA1_RXD,
GPIO_FN_SCIFA1_CTS_, GPIO_FN_MFG1_IN1,
GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2,
GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2_,
GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2,
GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2,
GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2_, GPIO_FN_VIO2_CLK2, \
GPIO_FN_LCD2D20,
GPIO_FN_DACK1, GPIO_FN_OVCN,
GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3,
GPIO_FN_OVCN2,
GPIO_FN_EXTLP, GPIO_FN_PORT226_VIO_CKO2,
GPIO_FN_IDIN,
GPIO_FN_MFG1_IN1,
GPIO_FN_MSIOF1_TXD,
GPIO_FN_MSIOF1_TSYNC,
GPIO_FN_MSIOF1_TSCK,
GPIO_FN_MSIOF1_RXD,
GPIO_FN_MSIOF1_RSCK, GPIO_FN_VIO2_CLK2,
GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MFG1_IN2, GPIO_FN_VIO2_VD2, \
GPIO_FN_LCD2D21,
GPIO_FN_MSIOF1_MCK0, GPIO_FN_PORT236_I2C_SDA2,
GPIO_FN_MSIOF1_MCK1, GPIO_FN_PORT237_I2C_SCL2,
GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2, GPIO_FN_LCD2D22,
GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2, GPIO_FN_LCD2D23,
GPIO_FN_SCIFA6_TXD,
GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \
GPIO_FN_MSIOF1_MCK0,
GPIO_FN_MSIOF1_MCK1,
GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2,
GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2,
GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \
GPIO_FN_TPU4TO0,
GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2,
GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2,
GPIO_FN_PORT244_SCIFA5_CTS_, GPIO_FN_MFG2_IN1, \
GPIO_FN_PORT244_SCIFB_CTS_, GPIO_FN_MSIOF2R_RXD,
GPIO_FN_PORT245_SCIFA5_RTS_, GPIO_FN_MFG2_IN2, \
GPIO_FN_PORT245_SCIFB_RTS_, GPIO_FN_MSIOF2R_TXD,
GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1, \
GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0,
GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2, \
GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1,
GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1, \
GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0, \
GPIO_FN_PORT248_I2C_SCL3, GPIO_FN_MSIOF2R_TSCK,
GPIO_FN_MFG4_IN2,
GPIO_FN_PORT243_VIO_CKO2,
GPIO_FN_MFG2_IN1,
GPIO_FN_MSIOF2R_RXD,
GPIO_FN_MFG2_IN2,
GPIO_FN_MSIOF2R_TXD,
GPIO_FN_MFG1_OUT1,
GPIO_FN_TPU1TO0,
GPIO_FN_MFG3_OUT2,
GPIO_FN_TPU3TO1,
GPIO_FN_MFG2_OUT1,
GPIO_FN_TPU2TO0,
GPIO_FN_MSIOF2R_TSCK,
GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, \
GPIO_FN_PORT249_I2C_SDA3, GPIO_FN_MSIOF2R_TSYNC,
GPIO_FN_MSIOF2R_TSYNC,
GPIO_FN_SDHICLK0,
GPIO_FN_SDHICD0,
GPIO_FN_SDHID0_0,
......@@ -435,54 +364,12 @@ enum {
GPIO_FN_IRQ9_MEM_INT,
GPIO_FN_IRQ9_MCP_INT,
GPIO_FN_A11,
GPIO_FN_KEYOUT8,
GPIO_FN_TPU4TO3,
GPIO_FN_RESETA_N_PU_ON,
GPIO_FN_RESETA_N_PU_OFF,
GPIO_FN_EDBGREQ_PD,
GPIO_FN_EDBGREQ_PU,
/* Functions with pull-ups */
GPIO_FN_KEYIN0_PU,
GPIO_FN_KEYIN1_PU,
GPIO_FN_KEYIN2_PU,
GPIO_FN_KEYIN3_PU,
GPIO_FN_KEYIN4_PU,
GPIO_FN_KEYIN5_PU,
GPIO_FN_KEYIN6_PU,
GPIO_FN_KEYIN7_PU,
GPIO_FN_SDHICD0_PU,
GPIO_FN_SDHID0_0_PU,
GPIO_FN_SDHID0_1_PU,
GPIO_FN_SDHID0_2_PU,
GPIO_FN_SDHID0_3_PU,
GPIO_FN_SDHICMD0_PU,
GPIO_FN_SDHIWP0_PU,
GPIO_FN_SDHID1_0_PU,
GPIO_FN_SDHID1_1_PU,
GPIO_FN_SDHID1_2_PU,
GPIO_FN_SDHID1_3_PU,
GPIO_FN_SDHICMD1_PU,
GPIO_FN_SDHID2_0_PU,
GPIO_FN_SDHID2_1_PU,
GPIO_FN_SDHID2_2_PU,
GPIO_FN_SDHID2_3_PU,
GPIO_FN_SDHICMD2_PU,
GPIO_FN_MMCCMD0_PU,
GPIO_FN_MMCCMD1_PU,
GPIO_FN_MMCD0_0_PU,
GPIO_FN_MMCD0_1_PU,
GPIO_FN_MMCD0_2_PU,
GPIO_FN_MMCD0_3_PU,
GPIO_FN_MMCD0_4_PU,
GPIO_FN_MMCD0_5_PU,
GPIO_FN_MMCD0_6_PU,
GPIO_FN_MMCD0_7_PU,
GPIO_FN_FSIACK_PU,
GPIO_FN_FSIAILR_PU,
GPIO_FN_FSIAIBT_PU,
GPIO_FN_FSIAISLD_PU,
/* end of GPIO */
GPIO_NR,
};
......
arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c
浏览文件 @ 22b15436
......@@ -8,12 +8,23 @@
* for more details.
*/
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <cpu/pfc.h>
static struct resource sh7203_pfc_resources[] = {
[0] = {
.start = 0xfffe3800,
.end = 0xfffe3a9f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-sh7203", NULL, 0);
return sh_pfc_register("pfc-sh7203", sh7203_pfc_resources,
ARRAY_SIZE(sh7203_pfc_resources));
}
arch_initcall(plat_pinmux_setup);
arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c
浏览文件 @ 22b15436
......@@ -8,12 +8,23 @@
* for more details.
*/
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <cpu/pfc.h>
static struct resource sh7264_pfc_resources[] = {
[0] = {
.start = 0xfffe3800,
.end = 0xfffe393f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-sh7264", NULL, 0);
return sh_pfc_register("pfc-sh7264", sh7264_pfc_resources,
ARRAY_SIZE(sh7264_pfc_resources));
}
arch_initcall(plat_pinmux_setup);
arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c
浏览文件 @ 22b15436
......@@ -13,8 +13,17 @@
#include <linux/kernel.h>
#include <cpu/pfc.h>
static struct resource sh7269_pfc_resources[] = {
[0] = {
.start = 0xfffe3800,
.end = 0xfffe391f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-sh7269", NULL, 0);
return sh_pfc_register("pfc-sh7269", sh7269_pfc_resources,
ARRAY_SIZE(sh7269_pfc_resources));
}
arch_initcall(plat_pinmux_setup);
arch/sh/kernel/cpu/sh3/pinmux-sh7720.c
浏览文件 @ 22b15436
......@@ -8,13 +8,23 @@
* for more details.
*/
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <cpu/pfc.h>
static struct resource sh7720_pfc_resources[] = {
[0] = {
.start = 0xa4050100,
.end = 0xa405016f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-sh7720", NULL, 0);
return sh_pfc_register("pfc-sh7720", sh7720_pfc_resources,
ARRAY_SIZE(sh7720_pfc_resources));
}
arch_initcall(plat_pinmux_setup);
arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
浏览文件 @ 22b15436
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <cpu/pfc.h>
static struct resource sh7722_pfc_resources[] = {
[0] = {
.start = 0xa4050100,
.end = 0xa405018f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-sh7722", NULL, 0);
return sh_pfc_register("pfc-sh7722", sh7722_pfc_resources,
ARRAY_SIZE(sh7722_pfc_resources));
}
arch_initcall(plat_pinmux_setup);
arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c
浏览文件 @ 22b15436
......@@ -8,13 +8,23 @@
* for more details.
*/
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <cpu/pfc.h>
static struct resource sh7723_pfc_resources[] = {
[0] = {
.start = 0xa4050100,
.end = 0xa405016f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-sh7723", NULL, 0);
return sh_pfc_register("pfc-sh7723", sh7723_pfc_resources,
ARRAY_SIZE(sh7723_pfc_resources));
}
arch_initcall(plat_pinmux_setup);
arch/sh/kernel/cpu/sh4a/pinmux-sh7724.c
浏览文件 @ 22b15436
......@@ -13,12 +13,23 @@
* for more details.
*/
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <cpu/pfc.h>
static struct resource sh7724_pfc_resources[] = {
[0] = {
.start = 0xa4050100,
.end = 0xa405016f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-sh7724", NULL, 0);
return sh_pfc_register("pfc-sh7724", sh7724_pfc_resources,
ARRAY_SIZE(sh7724_pfc_resources));
}
arch_initcall(plat_pinmux_setup);
arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
浏览文件 @ 22b15436
......@@ -13,12 +13,23 @@
* for more details.
*/
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <cpu/pfc.h>
static struct resource sh7757_pfc_resources[] = {
[0] = {
.start = 0xffec0000,
.end = 0xffec008f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-sh7757", NULL, 0);
return sh_pfc_register("pfc-sh7757", sh7757_pfc_resources,
ARRAY_SIZE(sh7757_pfc_resources));
}
arch_initcall(plat_pinmux_setup);
arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c
浏览文件 @ 22b15436
......@@ -8,13 +8,23 @@
* for more details.
*/
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <cpu/pfc.h>
static struct resource sh7785_pfc_resources[] = {
[0] = {
.start = 0xffe70000,
.end = 0xffe7008f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-sh7785", NULL, 0);
return sh_pfc_register("pfc-sh7785", sh7785_pfc_resources,
ARRAY_SIZE(sh7785_pfc_resources));
}
arch_initcall(plat_pinmux_setup);
arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
浏览文件 @ 22b15436
......@@ -13,13 +13,23 @@
* for more details.
*/
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <cpu/pfc.h>
static struct resource sh7786_pfc_resources[] = {
[0] = {
.start = 0xffcc0000,
.end = 0xffcc008f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-sh7786", NULL, 0);
return sh_pfc_register("pfc-sh7786", sh7786_pfc_resources,
ARRAY_SIZE(sh7786_pfc_resources));
}
arch_initcall(plat_pinmux_setup);
arch/sh/kernel/cpu/sh4a/pinmux-shx3.c
浏览文件 @ 22b15436
......@@ -7,12 +7,23 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <cpu/pfc.h>
static int __init shx3_pinmux_setup(void)
static struct resource shx3_pfc_resources[] = {
[0] = {
.start = 0xffc70000,
.end = 0xffc7001f,
.flags = IORESOURCE_MEM,
},
};
static int __init plat_pinmux_setup(void)
{
return sh_pfc_register("pfc-shx3", NULL, 0);
return sh_pfc_register("pfc-shx3", shx3_pfc_resources,
ARRAY_SIZE(shx3_pfc_resources));
}
arch_initcall(shx3_pinmux_setup);
arch_initcall(plat_pinmux_setup);
drivers/pinctrl/sh-pfc/Kconfig
浏览文件 @ 22b15436
......@@ -10,6 +10,7 @@ config PINCTRL_SH_PFC
select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB
select PINMUX
select PINCONF
select GENERIC_PINCONF
def_bool y
help
This enables pin control drivers for SH and SH Mobile platforms
......
drivers/pinctrl/sh-pfc/core.c
浏览文件 @ 22b15436
......@@ -10,7 +10,6 @@
*/
#define DRV_NAME "sh-pfc"
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/bitops.h>
#include <linux/err.h>
......@@ -30,10 +29,8 @@ static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
struct resource *res;
int k;
if (pdev->num_resources == 0) {
pfc->num_windows = 0;
return 0;
}
if (pdev->num_resources == 0)
return -EINVAL;
pfc->window = devm_kzalloc(pfc->dev, pdev->num_resources *
sizeof(*pfc->window), GFP_NOWAIT);
......@@ -59,11 +56,11 @@ static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
unsigned long address)
{
struct sh_pfc_window *window;
int k;
unsigned int i;
/* scan through physical windows and convert address */
for (k = 0; k < pfc->num_windows; k++) {
window = pfc->window + k;
for (i = 0; i < pfc->num_windows; i++) {
window = pfc->window + i;
if (address < window->phys)
continue;
......@@ -74,11 +71,32 @@ static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
return window->virt + (address - window->phys);
}
/* no windows defined, register must be 1:1 mapped virt:phys */
return (void __iomem *)address;
BUG();
}
static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin)
{
unsigned int offset;
unsigned int i;
if (pfc->info->ranges == NULL)
return pin;
for (i = 0, offset = 0; i < pfc->info->nr_ranges; ++i) {
const struct pinmux_range *range = &pfc->info->ranges[i];
if (pin <= range->end)
return pin >= range->begin
? offset + pin - range->begin : -1;
offset += range->end - range->begin + 1;
}
return -EINVAL;
}
static int sh_pfc_enum_in_range(pinmux_enum_t enum_id,
const struct pinmux_range *r)
{
if (enum_id < r->begin)
return 0;
......@@ -89,8 +107,8 @@ static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
return 1;
}
static unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
unsigned long reg_width)
unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
unsigned long reg_width)
{
switch (reg_width) {
case 8:
......@@ -105,8 +123,8 @@ static unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
return 0;
}
static void sh_pfc_write_raw_reg(void __iomem *mapped_reg,
unsigned long reg_width, unsigned long data)
void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
unsigned long data)
{
switch (reg_width) {
case 8:
......@@ -123,39 +141,8 @@ static void sh_pfc_write_raw_reg(void __iomem *mapped_reg,
BUG();
}
int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos)
{
unsigned long pos;
pos = dr->reg_width - (in_pos + 1);
pr_debug("read_bit: addr = %lx, pos = %ld, "
"r_width = %ld\n", dr->reg, pos, dr->reg_width);
return (sh_pfc_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
}
void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
unsigned long value)
{
unsigned long pos;
pos = dr->reg_width - (in_pos + 1);
pr_debug("write_bit addr = %lx, value = %d, pos = %ld, "
"r_width = %ld\n",
dr->reg, !!value, pos, dr->reg_width);
if (value)
set_bit(pos, &dr->reg_shadow);
else
clear_bit(pos, &dr->reg_shadow);
sh_pfc_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
}
static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
struct pinmux_cfg_reg *crp,
const struct pinmux_cfg_reg *crp,
unsigned long in_pos,
void __iomem **mapped_regp,
unsigned long *maskp,
......@@ -176,24 +163,8 @@ static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
}
}
static int sh_pfc_read_config_reg(struct sh_pfc *pfc,
struct pinmux_cfg_reg *crp,
unsigned long field)
{
void __iomem *mapped_reg;
unsigned long mask, pos;
sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
pr_debug("read_reg: addr = %lx, field = %ld, "
"r_width = %ld, f_width = %ld\n",
crp->reg, field, crp->reg_width, crp->field_width);
return (sh_pfc_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
}
static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
struct pinmux_cfg_reg *crp,
const struct pinmux_cfg_reg *crp,
unsigned long field, unsigned long value)
{
void __iomem *mapped_reg;
......@@ -201,9 +172,9 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
pr_debug("write_reg addr = %lx, value = %ld, field = %ld, "
"r_width = %ld, f_width = %ld\n",
crp->reg, value, field, crp->reg_width, crp->field_width);
dev_dbg(pfc->dev, "write_reg addr = %lx, value = %ld, field = %ld, "
"r_width = %ld, f_width = %ld\n",
crp->reg, value, field, crp->reg_width, crp->field_width);
mask = ~(mask << pos);
value = value << pos;
......@@ -220,83 +191,11 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
}
static int sh_pfc_setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
{
struct pinmux_gpio *gpiop = &pfc->info->gpios[gpio];
struct pinmux_data_reg *data_reg;
int k, n;
if (!sh_pfc_enum_in_range(gpiop->enum_id, &pfc->info->data))
return -1;
k = 0;
while (1) {
data_reg = pfc->info->data_regs + k;
if (!data_reg->reg_width)
break;
data_reg->mapped_reg = sh_pfc_phys_to_virt(pfc, data_reg->reg);
for (n = 0; n < data_reg->reg_width; n++) {
if (data_reg->enum_ids[n] == gpiop->enum_id) {
gpiop->flags &= ~PINMUX_FLAG_DREG;
gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
gpiop->flags &= ~PINMUX_FLAG_DBIT;
gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
return 0;
}
}
k++;
}
BUG();
return -1;
}
static void sh_pfc_setup_data_regs(struct sh_pfc *pfc)
{
struct pinmux_data_reg *drp;
int k;
for (k = pfc->info->first_gpio; k <= pfc->info->last_gpio; k++)
sh_pfc_setup_data_reg(pfc, k);
k = 0;
while (1) {
drp = pfc->info->data_regs + k;
if (!drp->reg_width)
break;
drp->reg_shadow = sh_pfc_read_raw_reg(drp->mapped_reg,
drp->reg_width);
k++;
}
}
int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
struct pinmux_data_reg **drp, int *bitp)
{
struct pinmux_gpio *gpiop = &pfc->info->gpios[gpio];
int k, n;
if (!sh_pfc_enum_in_range(gpiop->enum_id, &pfc->info->data))
return -1;
k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
*drp = pfc->info->data_regs + k;
*bitp = n;
return 0;
}
static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
struct pinmux_cfg_reg **crp, int *fieldp,
int *valuep, unsigned long **cntp)
const struct pinmux_cfg_reg **crp, int *fieldp,
int *valuep)
{
struct pinmux_cfg_reg *config_reg;
const struct pinmux_cfg_reg *config_reg;
unsigned long r_width, f_width, curr_width, ncomb;
int k, m, n, pos, bit_pos;
......@@ -324,7 +223,6 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
*crp = config_reg;
*fieldp = m;
*valuep = n;
*cntp = &config_reg->cnt[m];
return 0;
}
}
......@@ -334,47 +232,39 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
k++;
}
return -1;
return -EINVAL;
}
int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
pinmux_enum_t *enum_idp)
static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos,
pinmux_enum_t *enum_idp)
{
pinmux_enum_t enum_id = pfc->info->gpios[gpio].enum_id;
pinmux_enum_t *data = pfc->info->gpio_data;
const pinmux_enum_t *data = pfc->info->gpio_data;
int k;
if (!sh_pfc_enum_in_range(enum_id, &pfc->info->data)) {
if (!sh_pfc_enum_in_range(enum_id, &pfc->info->mark)) {
pr_err("non data/mark enum_id for gpio %d\n", gpio);
return -1;
}
}
if (pos) {
*enum_idp = data[pos + 1];
return pos + 1;
}
for (k = 0; k < pfc->info->gpio_data_size; k++) {
if (data[k] == enum_id) {
if (data[k] == mark) {
*enum_idp = data[k + 1];
return k + 1;
}
}
pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
return -1;
dev_err(pfc->dev, "cannot locate data/mark enum_id for mark %d\n",
mark);
return -EINVAL;
}
int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
int cfg_mode)
int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
{
struct pinmux_cfg_reg *cr = NULL;
const struct pinmux_cfg_reg *cr = NULL;
pinmux_enum_t enum_id;
struct pinmux_range *range;
const struct pinmux_range *range;
int in_range, pos, field, value;
unsigned long *cntp;
int ret;
switch (pinmux_type) {
......@@ -399,7 +289,7 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
break;
default:
goto out_err;
return -EINVAL;
}
pos = 0;
......@@ -407,9 +297,9 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
field = 0;
value = 0;
while (1) {
pos = sh_pfc_gpio_to_enum(pfc, gpio, pos, &enum_id);
if (pos <= 0)
goto out_err;
pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id);
if (pos < 0)
return pos;
if (!enum_id)
break;
......@@ -452,44 +342,22 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
if (!in_range)
continue;
if (sh_pfc_get_config_reg(pfc, enum_id, &cr,
&field, &value, &cntp) != 0)
goto out_err;
switch (cfg_mode) {
case GPIO_CFG_DRYRUN:
if (!*cntp ||
(sh_pfc_read_config_reg(pfc, cr, field) != value))
continue;
break;
case GPIO_CFG_REQ:
sh_pfc_write_config_reg(pfc, cr, field, value);
*cntp = *cntp + 1;
break;
ret = sh_pfc_get_config_reg(pfc, enum_id, &cr, &field, &value);
if (ret < 0)
return ret;
case GPIO_CFG_FREE:
*cntp = *cntp - 1;
break;
}
sh_pfc_write_config_reg(pfc, cr, field, value);
}
return 0;
out_err:
return -1;
}
static int sh_pfc_probe(struct platform_device *pdev)
{
struct sh_pfc_soc_info *info;
const struct sh_pfc_soc_info *info;
struct sh_pfc *pfc;
int ret;
/*
* Ensure that the type encoding fits
*/
BUILD_BUG_ON(PINMUX_FLAG_TYPE > ((1 << PINMUX_FLAG_DBIT_SHIFT) - 1));
info = pdev->id_entry->driver_data
? (void *)pdev->id_entry->driver_data : pdev->dev.platform_data;
if (info == NULL)
......@@ -509,7 +377,6 @@ static int sh_pfc_probe(struct platform_device *pdev)
spin_lock_init(&pfc->lock);
pinctrl_provide_dummies();
sh_pfc_setup_data_regs(pfc);
/*
* Initialize pinctrl bindings first
......@@ -529,13 +396,13 @@ static int sh_pfc_probe(struct platform_device *pdev)
* PFC state as it is, given that there are already
* extant users of it that have succeeded by this point.
*/
pr_notice("failed to init GPIO chip, ignoring...\n");
dev_notice(pfc->dev, "failed to init GPIO chip, ignoring...\n");
}
#endif
platform_set_drvdata(pdev, pfc);
pr_info("%s support registered\n", info->name);
dev_info(pfc->dev, "%s support registered\n", info->name);
return 0;
}
......
drivers/pinctrl/sh-pfc/core.h
浏览文件 @ 22b15436
......@@ -26,13 +26,17 @@ struct sh_pfc_pinctrl;
struct sh_pfc {
struct device *dev;
struct sh_pfc_soc_info *info;
const struct sh_pfc_soc_info *info;
spinlock_t lock;
unsigned int num_windows;
struct sh_pfc_window *window;
unsigned int nr_pins;
struct sh_pfc_chip *gpio;
struct sh_pfc_chip *func;
struct sh_pfc_pinctrl *pinctrl;
};
......@@ -42,31 +46,29 @@ int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc);
int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc);
int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos);
void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
unsigned long value);
int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
struct pinmux_data_reg **drp, int *bitp);
int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
pinmux_enum_t *enum_idp);
int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
int cfg_mode);
unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
unsigned long reg_width);
void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
unsigned long data);
int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
extern struct sh_pfc_soc_info r8a7740_pinmux_info;
extern struct sh_pfc_soc_info r8a7779_pinmux_info;
extern struct sh_pfc_soc_info sh7203_pinmux_info;
extern struct sh_pfc_soc_info sh7264_pinmux_info;
extern struct sh_pfc_soc_info sh7269_pinmux_info;
extern struct sh_pfc_soc_info sh7372_pinmux_info;
extern struct sh_pfc_soc_info sh73a0_pinmux_info;
extern struct sh_pfc_soc_info sh7720_pinmux_info;
extern struct sh_pfc_soc_info sh7722_pinmux_info;
extern struct sh_pfc_soc_info sh7723_pinmux_info;
extern struct sh_pfc_soc_info sh7724_pinmux_info;
extern struct sh_pfc_soc_info sh7734_pinmux_info;
extern struct sh_pfc_soc_info sh7757_pinmux_info;
extern struct sh_pfc_soc_info sh7785_pinmux_info;
extern struct sh_pfc_soc_info sh7786_pinmux_info;
extern struct sh_pfc_soc_info shx3_pinmux_info;
extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
extern const struct sh_pfc_soc_info sh7203_pinmux_info;
extern const struct sh_pfc_soc_info sh7264_pinmux_info;
extern const struct sh_pfc_soc_info sh7269_pinmux_info;
extern const struct sh_pfc_soc_info sh7372_pinmux_info;
extern const struct sh_pfc_soc_info sh73a0_pinmux_info;
extern const struct sh_pfc_soc_info sh7720_pinmux_info;
extern const struct sh_pfc_soc_info sh7722_pinmux_info;
extern const struct sh_pfc_soc_info sh7723_pinmux_info;
extern const struct sh_pfc_soc_info sh7724_pinmux_info;
extern const struct sh_pfc_soc_info sh7734_pinmux_info;
extern const struct sh_pfc_soc_info sh7757_pinmux_info;
extern const struct sh_pfc_soc_info sh7785_pinmux_info;
extern const struct sh_pfc_soc_info sh7786_pinmux_info;
extern const struct sh_pfc_soc_info shx3_pinmux_info;
#endif /* __SH_PFC_CORE_H__ */
drivers/pinctrl/sh-pfc/gpio.c
浏览文件 @ 22b15436
......@@ -9,8 +9,6 @@
* for more details.
*/
#define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt
#include <linux/device.h>
#include <linux/gpio.h>
#include <linux/init.h>
......@@ -21,9 +19,23 @@
#include "core.h"
struct sh_pfc_gpio_data_reg {
const struct pinmux_data_reg *info;
unsigned long shadow;
};
struct sh_pfc_gpio_pin {
u8 dbit;
u8 dreg;
};
struct sh_pfc_chip {
struct sh_pfc *pfc;
struct gpio_chip gpio_chip;
struct sh_pfc *pfc;
struct gpio_chip gpio_chip;
struct sh_pfc_window *mem;
struct sh_pfc_gpio_data_reg *regs;
struct sh_pfc_gpio_pin *pins;
};
static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
......@@ -36,143 +48,358 @@ static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
return gpio_to_pfc_chip(gc)->pfc;
}
static int sh_gpio_request(struct gpio_chip *gc, unsigned offset)
static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int gpio,
struct sh_pfc_gpio_data_reg **reg,
unsigned int *bit)
{
return pinctrl_request_gpio(offset);
int idx = sh_pfc_get_pin_index(chip->pfc, gpio);
struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
*reg = &chip->regs[gpio_pin->dreg];
*bit = gpio_pin->dbit;
}
static void sh_gpio_free(struct gpio_chip *gc, unsigned offset)
static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
const struct pinmux_data_reg *dreg)
{
pinctrl_free_gpio(offset);
void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
return sh_pfc_read_raw_reg(mem, dreg->reg_width);
}
static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
static void gpio_write_data_reg(struct sh_pfc_chip *chip,
const struct pinmux_data_reg *dreg,
unsigned long value)
{
struct pinmux_data_reg *dr = NULL;
int bit = 0;
void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
BUG();
else
sh_pfc_write_bit(dr, bit, value);
sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
}
static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned gpio)
{
struct sh_pfc *pfc = chip->pfc;
struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[gpio];
const struct sh_pfc_pin *pin = &pfc->info->pins[gpio];
const struct pinmux_data_reg *dreg;
unsigned int bit;
unsigned int i;
for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
for (bit = 0; bit < dreg->reg_width; bit++) {
if (dreg->enum_ids[bit] == pin->enum_id) {
gpio_pin->dreg = i;
gpio_pin->dbit = bit;
return;
}
}
}
BUG();
}
static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
{
struct sh_pfc *pfc = chip->pfc;
unsigned long addr = pfc->info->data_regs[0].reg;
const struct pinmux_data_reg *dreg;
unsigned int i;
/* Find the window that contain the GPIO registers. */
for (i = 0; i < pfc->num_windows; ++i) {
struct sh_pfc_window *window = &pfc->window[i];
if (addr >= window->phys && addr < window->phys + window->size)
break;
}
if (i == pfc->num_windows)
return -EINVAL;
/* GPIO data registers must be in the first memory resource. */
chip->mem = &pfc->window[i];
/* Count the number of data registers, allocate memory and initialize
* them.
*/
for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
;
chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs),
GFP_KERNEL);
if (chip->regs == NULL)
return -ENOMEM;
for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
chip->regs[i].info = dreg;
chip->regs[i].shadow = gpio_read_data_reg(chip, dreg);
}
for (i = 0; i < pfc->info->nr_pins; i++) {
if (pfc->info->pins[i].enum_id == 0)
continue;
gpio_setup_data_reg(chip, i);
}
return 0;
}
static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
/* -----------------------------------------------------------------------------
* Pin GPIOs
*/
static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
{
struct pinmux_data_reg *dr = NULL;
int bit = 0;
struct sh_pfc *pfc = gpio_to_pfc(gc);
int idx = sh_pfc_get_pin_index(pfc, offset);
if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
return -EINVAL;
return sh_pfc_read_bit(dr, bit);
return pinctrl_request_gpio(offset);
}
static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
{
return pinctrl_free_gpio(offset);
}
static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
int value)
{
struct sh_pfc_gpio_data_reg *reg;
unsigned long pos;
unsigned int bit;
gpio_get_data_reg(chip, offset, &reg, &bit);
pos = reg->info->reg_width - (bit + 1);
if (value)
set_bit(pos, &reg->shadow);
else
clear_bit(pos, &reg->shadow);
gpio_write_data_reg(chip, reg->info, reg->shadow);
}
static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
{
return pinctrl_gpio_direction_input(offset);
}
static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
int value)
{
sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
return pinctrl_gpio_direction_output(offset);
}
static int sh_gpio_get(struct gpio_chip *gc, unsigned offset)
static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
{
return sh_gpio_get_value(gpio_to_pfc(gc), offset);
struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
struct sh_pfc_gpio_data_reg *reg;
unsigned long pos;
unsigned int bit;
gpio_get_data_reg(chip, offset, &reg, &bit);
pos = reg->info->reg_width - (bit + 1);
return (gpio_read_data_reg(chip, reg->info) >> pos) & 1;
}
static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
{
sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
}
static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
{
struct sh_pfc *pfc = gpio_to_pfc(gc);
pinmux_enum_t enum_id;
pinmux_enum_t *enum_ids;
int i, k, pos;
pos = 0;
enum_id = 0;
while (1) {
pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id);
if (pos <= 0 || !enum_id)
break;
int i, k;
for (i = 0; i < pfc->info->gpio_irq_size; i++) {
enum_ids = pfc->info->gpio_irq[i].enum_ids;
for (k = 0; enum_ids[k]; k++) {
if (enum_ids[k] == enum_id)
return pfc->info->gpio_irq[i].irq;
}
for (i = 0; i < pfc->info->gpio_irq_size; i++) {
unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
for (k = 0; gpios[k]; k++) {
if (gpios[k] == offset)
return pfc->info->gpio_irq[i].irq;
}
}
return -ENOSYS;
}
static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
static int gpio_pin_setup(struct sh_pfc_chip *chip)
{
struct sh_pfc *pfc = chip->pfc;
struct gpio_chip *gc = &chip->gpio_chip;
int ret;
chip->pins = devm_kzalloc(pfc->dev, pfc->nr_pins * sizeof(*chip->pins),
GFP_KERNEL);
if (chip->pins == NULL)
return -ENOMEM;
gc->request = sh_gpio_request;
gc->free = sh_gpio_free;
gc->direction_input = sh_gpio_direction_input;
gc->get = sh_gpio_get;
gc->direction_output = sh_gpio_direction_output;
gc->set = sh_gpio_set;
gc->to_irq = sh_gpio_to_irq;
ret = gpio_setup_data_regs(chip);
if (ret < 0)
return ret;
WARN_ON(pfc->info->first_gpio != 0); /* needs testing */
gc->request = gpio_pin_request;
gc->free = gpio_pin_free;
gc->direction_input = gpio_pin_direction_input;
gc->get = gpio_pin_get;
gc->direction_output = gpio_pin_direction_output;
gc->set = gpio_pin_set;
gc->to_irq = gpio_pin_to_irq;
gc->label = pfc->info->name;
gc->dev = pfc->dev;
gc->owner = THIS_MODULE;
gc->base = pfc->info->first_gpio;
gc->ngpio = (pfc->info->last_gpio - pfc->info->first_gpio) + 1;
gc->base = 0;
gc->ngpio = pfc->nr_pins;
return 0;
}
int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
/* -----------------------------------------------------------------------------
* Function GPIOs
*/
static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
{
static bool __print_once;
struct sh_pfc *pfc = gpio_to_pfc(gc);
unsigned int mark = pfc->info->func_gpios[offset].enum_id;
unsigned long flags;
int ret;
if (!__print_once) {
dev_notice(pfc->dev,
"Use of GPIO API for function requests is deprecated."
" Convert to pinctrl\n");
__print_once = true;
}
if (mark == 0)
return -EINVAL;
spin_lock_irqsave(&pfc->lock, flags);
ret = sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION);
spin_unlock_irqrestore(&pfc->lock, flags);
return ret;
}
static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
{
}
static int gpio_function_setup(struct sh_pfc_chip *chip)
{
struct sh_pfc *pfc = chip->pfc;
struct gpio_chip *gc = &chip->gpio_chip;
gc->request = gpio_function_request;
gc->free = gpio_function_free;
gc->label = pfc->info->name;
gc->owner = THIS_MODULE;
gc->base = pfc->nr_pins;
gc->ngpio = pfc->info->nr_func_gpios;
return 0;
}
/* -----------------------------------------------------------------------------
* Register/unregister
*/
static struct sh_pfc_chip *
sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *))
{
struct sh_pfc_chip *chip;
int ret;
chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
if (unlikely(!chip))
return -ENOMEM;
return ERR_PTR(-ENOMEM);
chip->pfc = pfc;
sh_pfc_gpio_setup(chip);
ret = setup(chip);
if (ret < 0)
return ERR_PTR(ret);
ret = gpiochip_add(&chip->gpio_chip);
if (unlikely(ret < 0))
return ret;
return ERR_PTR(ret);
dev_info(pfc->dev, "%s handling gpio %u -> %u\n",
chip->gpio_chip.label, chip->gpio_chip.base,
chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
return chip;
}
int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
{
const struct pinmux_range *ranges;
struct pinmux_range def_range;
struct sh_pfc_chip *chip;
unsigned int nr_ranges;
unsigned int i;
int ret;
/* Register the real GPIOs chip. */
chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup);
if (IS_ERR(chip))
return PTR_ERR(chip);
pfc->gpio = chip;
pr_info("%s handling gpio %d -> %d\n",
pfc->info->name, pfc->info->first_gpio,
pfc->info->last_gpio);
/* Register the GPIO to pin mappings. */
if (pfc->info->ranges == NULL) {
def_range.begin = 0;
def_range.end = pfc->info->nr_pins - 1;
ranges = &def_range;
nr_ranges = 1;
} else {
ranges = pfc->info->ranges;
nr_ranges = pfc->info->nr_ranges;
}
for (i = 0; i < nr_ranges; ++i) {
const struct pinmux_range *range = &ranges[i];
ret = gpiochip_add_pin_range(&chip->gpio_chip,
dev_name(pfc->dev),
range->begin, range->begin,
range->end - range->begin + 1);
if (ret < 0)
return ret;
}
/* Register the function GPIOs chip. */
chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup);
if (IS_ERR(chip))
return PTR_ERR(chip);
pfc->func = chip;
return 0;
}
int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
{
struct sh_pfc_chip *chip = pfc->gpio;
int err;
int ret;
ret = gpiochip_remove(&chip->gpio_chip);
if (unlikely(ret < 0))
return ret;
ret = gpiochip_remove(&pfc->gpio->gpio_chip);
err = gpiochip_remove(&pfc->func->gpio_chip);
pfc->gpio = NULL;
return 0;
return ret < 0 ? ret : err;
}
drivers/pinctrl/sh-pfc/pfc-sh7203.c
浏览文件 @ 22b15436
......@@ -272,7 +272,7 @@ enum {
PINMUX_MARK_END,
};
static pinmux_enum_t pinmux_data[] = {
static const pinmux_enum_t pinmux_data[] = {
/* PA */
PINMUX_DATA(PA7_DATA, PA7_IN),
......@@ -703,7 +703,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct sh_pfc_pin pinmux_pins[] = {
/* PA */
PINMUX_GPIO(GPIO_PA7, PA7_DATA),
......@@ -815,265 +815,269 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PF2, PF2_DATA),
PINMUX_GPIO(GPIO_PF1, PF1_DATA),
PINMUX_GPIO(GPIO_PF0, PF0_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static const struct pinmux_func pinmux_func_gpios[] = {
/* INTC */
PINMUX_GPIO(GPIO_FN_PINT7_PB, PINT7_PB_MARK),
PINMUX_GPIO(GPIO_FN_PINT6_PB, PINT6_PB_MARK),
PINMUX_GPIO(GPIO_FN_PINT5_PB, PINT5_PB_MARK),
PINMUX_GPIO(GPIO_FN_PINT4_PB, PINT4_PB_MARK),
PINMUX_GPIO(GPIO_FN_PINT3_PB, PINT3_PB_MARK),
PINMUX_GPIO(GPIO_FN_PINT2_PB, PINT2_PB_MARK),
PINMUX_GPIO(GPIO_FN_PINT1_PB, PINT1_PB_MARK),
PINMUX_GPIO(GPIO_FN_PINT0_PB, PINT0_PB_MARK),
PINMUX_GPIO(GPIO_FN_PINT7_PD, PINT7_PD_MARK),
PINMUX_GPIO(GPIO_FN_PINT6_PD, PINT6_PD_MARK),
PINMUX_GPIO(GPIO_FN_PINT5_PD, PINT5_PD_MARK),
PINMUX_GPIO(GPIO_FN_PINT4_PD, PINT4_PD_MARK),
PINMUX_GPIO(GPIO_FN_PINT3_PD, PINT3_PD_MARK),
PINMUX_GPIO(GPIO_FN_PINT2_PD, PINT2_PD_MARK),
PINMUX_GPIO(GPIO_FN_PINT1_PD, PINT1_PD_MARK),
PINMUX_GPIO(GPIO_FN_PINT0_PD, PINT0_PD_MARK),
PINMUX_GPIO(GPIO_FN_IRQ7_PB, IRQ7_PB_MARK),
PINMUX_GPIO(GPIO_FN_IRQ6_PB, IRQ6_PB_MARK),
PINMUX_GPIO(GPIO_FN_IRQ5_PB, IRQ5_PB_MARK),
PINMUX_GPIO(GPIO_FN_IRQ4_PB, IRQ4_PB_MARK),
PINMUX_GPIO(GPIO_FN_IRQ3_PB, IRQ3_PB_MARK),
PINMUX_GPIO(GPIO_FN_IRQ2_PB, IRQ2_PB_MARK),
PINMUX_GPIO(GPIO_FN_IRQ1_PB, IRQ1_PB_MARK),
PINMUX_GPIO(GPIO_FN_IRQ0_PB, IRQ0_PB_MARK),
PINMUX_GPIO(GPIO_FN_IRQ7_PD, IRQ7_PD_MARK),
PINMUX_GPIO(GPIO_FN_IRQ6_PD, IRQ6_PD_MARK),
PINMUX_GPIO(GPIO_FN_IRQ5_PD, IRQ5_PD_MARK),
PINMUX_GPIO(GPIO_FN_IRQ4_PD, IRQ4_PD_MARK),
PINMUX_GPIO(GPIO_FN_IRQ3_PD, IRQ3_PD_MARK),
PINMUX_GPIO(GPIO_FN_IRQ2_PD, IRQ2_PD_MARK),
PINMUX_GPIO(GPIO_FN_IRQ1_PD, IRQ1_PD_MARK),
PINMUX_GPIO(GPIO_FN_IRQ0_PD, IRQ0_PD_MARK),
PINMUX_GPIO(GPIO_FN_IRQ7_PE, IRQ7_PE_MARK),
PINMUX_GPIO(GPIO_FN_IRQ6_PE, IRQ6_PE_MARK),
PINMUX_GPIO(GPIO_FN_IRQ5_PE, IRQ5_PE_MARK),
PINMUX_GPIO(GPIO_FN_IRQ4_PE, IRQ4_PE_MARK),
PINMUX_GPIO(GPIO_FN_IRQ3_PE, IRQ3_PE_MARK),
PINMUX_GPIO(GPIO_FN_IRQ2_PE, IRQ2_PE_MARK),
PINMUX_GPIO(GPIO_FN_IRQ1_PE, IRQ1_PE_MARK),
PINMUX_GPIO(GPIO_FN_IRQ0_PE, IRQ0_PE_MARK),
PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK),
PINMUX_GPIO(GPIO_FN_IRQOUT_REFOUT, IRQOUT_REFOUT_MARK),
PINMUX_GPIO(GPIO_FN_UBCTRG, UBCTRG_MARK),
GPIO_FN(PINT7_PB),
GPIO_FN(PINT6_PB),
GPIO_FN(PINT5_PB),
GPIO_FN(PINT4_PB),
GPIO_FN(PINT3_PB),
GPIO_FN(PINT2_PB),
GPIO_FN(PINT1_PB),
GPIO_FN(PINT0_PB),
GPIO_FN(PINT7_PD),
GPIO_FN(PINT6_PD),
GPIO_FN(PINT5_PD),
GPIO_FN(PINT4_PD),
GPIO_FN(PINT3_PD),
GPIO_FN(PINT2_PD),
GPIO_FN(PINT1_PD),
GPIO_FN(PINT0_PD),
GPIO_FN(IRQ7_PB),
GPIO_FN(IRQ6_PB),
GPIO_FN(IRQ5_PB),
GPIO_FN(IRQ4_PB),
GPIO_FN(IRQ3_PB),
GPIO_FN(IRQ2_PB),
GPIO_FN(IRQ1_PB),
GPIO_FN(IRQ0_PB),
GPIO_FN(IRQ7_PD),
GPIO_FN(IRQ6_PD),
GPIO_FN(IRQ5_PD),
GPIO_FN(IRQ4_PD),
GPIO_FN(IRQ3_PD),
GPIO_FN(IRQ2_PD),
GPIO_FN(IRQ1_PD),
GPIO_FN(IRQ0_PD),
GPIO_FN(IRQ7_PE),
GPIO_FN(IRQ6_PE),
GPIO_FN(IRQ5_PE),
GPIO_FN(IRQ4_PE),
GPIO_FN(IRQ3_PE),
GPIO_FN(IRQ2_PE),
GPIO_FN(IRQ1_PE),
GPIO_FN(IRQ0_PE),
GPIO_FN(WDTOVF),
GPIO_FN(IRQOUT),
GPIO_FN(REFOUT),
GPIO_FN(IRQOUT_REFOUT),
GPIO_FN(UBCTRG),
/* CAN */
PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK),
PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),
PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),
PINMUX_GPIO(GPIO_FN_CTX0_CTX1, CTX0_CTX1_MARK),
PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),
PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK),
GPIO_FN(CTX1),
GPIO_FN(CRX1),
GPIO_FN(CTX0),
GPIO_FN(CTX0_CTX1),
GPIO_FN(CRX0),
GPIO_FN(CRX0_CRX1),
/* IIC3 */
PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK),
PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK),
PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
GPIO_FN(SDA3),
GPIO_FN(SCL3),
GPIO_FN(SDA2),
GPIO_FN(SCL2),
GPIO_FN(SDA1),
GPIO_FN(SCL1),
GPIO_FN(SDA0),
GPIO_FN(SCL0),
/* DMAC */
PINMUX_GPIO(GPIO_FN_TEND0_PD, TEND0_PD_MARK),
PINMUX_GPIO(GPIO_FN_TEND0_PE, TEND0_PE_MARK),
PINMUX_GPIO(GPIO_FN_DACK0_PD, DACK0_PD_MARK),
PINMUX_GPIO(GPIO_FN_DACK0_PE, DACK0_PE_MARK),
PINMUX_GPIO(GPIO_FN_DREQ0_PD, DREQ0_PD_MARK),
PINMUX_GPIO(GPIO_FN_DREQ0_PE, DREQ0_PE_MARK),
PINMUX_GPIO(GPIO_FN_TEND1_PD, TEND1_PD_MARK),
PINMUX_GPIO(GPIO_FN_TEND1_PE, TEND1_PE_MARK),
PINMUX_GPIO(GPIO_FN_DACK1_PD, DACK1_PD_MARK),
PINMUX_GPIO(GPIO_FN_DACK1_PE, DACK1_PE_MARK),
PINMUX_GPIO(GPIO_FN_DREQ1_PD, DREQ1_PD_MARK),
PINMUX_GPIO(GPIO_FN_DREQ1_PE, DREQ1_PE_MARK),
PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
GPIO_FN(TEND0_PD),
GPIO_FN(TEND0_PE),
GPIO_FN(DACK0_PD),
GPIO_FN(DACK0_PE),
GPIO_FN(DREQ0_PD),
GPIO_FN(DREQ0_PE),
GPIO_FN(TEND1_PD),
GPIO_FN(TEND1_PE),
GPIO_FN(DACK1_PD),
GPIO_FN(DACK1_PE),
GPIO_FN(DREQ1_PD),
GPIO_FN(DREQ1_PE),
GPIO_FN(DACK2),
GPIO_FN(DREQ2),
GPIO_FN(DACK3),
GPIO_FN(DREQ3),
/* ADC */
PINMUX_GPIO(GPIO_FN_ADTRG_PD, ADTRG_PD_MARK),
PINMUX_GPIO(GPIO_FN_ADTRG_PE, ADTRG_PE_MARK),
GPIO_FN(ADTRG_PD),
GPIO_FN(ADTRG_PE),
/* BSC */
PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
PINMUX_GPIO(GPIO_FN_MRES, MRES_MARK),
PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK),
PINMUX_GPIO(GPIO_FN_CS6_CE1B, CS6_CE1B_MARK),
PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
PINMUX_GPIO(GPIO_FN_CS5_CE1A, CS5_CE1A_MARK),
PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
PINMUX_GPIO(GPIO_FN_FRAME, FRAME_MARK),
PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
PINMUX_GPIO(GPIO_FN_CASU, CASU_MARK),
PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
PINMUX_GPIO(GPIO_FN_RASU, RASU_MARK),
PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
PINMUX_GPIO(GPIO_FN_CASL, CASL_MARK),
PINMUX_GPIO(GPIO_FN_RASL, RASL_MARK),
PINMUX_GPIO(GPIO_FN_WE3_DQMUU_AH_ICIO_WR, WE3_DQMUU_AH_ICIO_WR_MARK),
PINMUX_GPIO(GPIO_FN_WE2_DQMUL_ICIORD, WE2_DQMUL_ICIORD_MARK),
PINMUX_GPIO(GPIO_FN_WE1_DQMLU_WE, WE1_DQMLU_WE_MARK),
PINMUX_GPIO(GPIO_FN_WE0_DQMLL, WE0_DQMLL_MARK),
PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK),
PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK),
PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
PINMUX_GPIO(GPIO_FN_CS7, CS7_MARK),
GPIO_FN(D31),
GPIO_FN(D30),
GPIO_FN(D29),
GPIO_FN(D28),
GPIO_FN(D27),
GPIO_FN(D26),
GPIO_FN(D25),
GPIO_FN(D24),
GPIO_FN(D23),
GPIO_FN(D22),
GPIO_FN(D21),
GPIO_FN(D20),
GPIO_FN(D19),
GPIO_FN(D18),
GPIO_FN(D17),
GPIO_FN(D16),
GPIO_FN(A25),
GPIO_FN(A24),
GPIO_FN(A23),
GPIO_FN(A22),
GPIO_FN(A21),
GPIO_FN(CS4),
GPIO_FN(MRES),
GPIO_FN(BS),
GPIO_FN(IOIS16),
GPIO_FN(CS1),
GPIO_FN(CS6_CE1B),
GPIO_FN(CE2B),
GPIO_FN(CS5_CE1A),
GPIO_FN(CE2A),
GPIO_FN(FRAME),
GPIO_FN(WAIT),
GPIO_FN(RDWR),
GPIO_FN(CKE),
GPIO_FN(CASU),
GPIO_FN(BREQ),
GPIO_FN(RASU),
GPIO_FN(BACK),
GPIO_FN(CASL),
GPIO_FN(RASL),
GPIO_FN(WE3_DQMUU_AH_ICIO_WR),
GPIO_FN(WE2_DQMUL_ICIORD),
GPIO_FN(WE1_DQMLU_WE),
GPIO_FN(WE0_DQMLL),
GPIO_FN(CS3),
GPIO_FN(CS2),
GPIO_FN(A1),
GPIO_FN(A0),
GPIO_FN(CS7),
/* TMU */
PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK),
PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK),
PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK),
PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK),
PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK),
PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK),
PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK),
PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK),
PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK),
PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK),
PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK),
PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK),
PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK),
PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK),
PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK),
PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK),
PINMUX_GPIO(GPIO_FN_TCLKD_PD, TCLKD_PD_MARK),
PINMUX_GPIO(GPIO_FN_TCLKC_PD, TCLKC_PD_MARK),
PINMUX_GPIO(GPIO_FN_TCLKB_PD, TCLKB_PD_MARK),
PINMUX_GPIO(GPIO_FN_TCLKA_PD, TCLKA_PD_MARK),
PINMUX_GPIO(GPIO_FN_TCLKD_PF, TCLKD_PF_MARK),
PINMUX_GPIO(GPIO_FN_TCLKC_PF, TCLKC_PF_MARK),
PINMUX_GPIO(GPIO_FN_TCLKB_PF, TCLKB_PF_MARK),
PINMUX_GPIO(GPIO_FN_TCLKA_PF, TCLKA_PF_MARK),
GPIO_FN(TIOC4D),
GPIO_FN(TIOC4C),
GPIO_FN(TIOC4B),
GPIO_FN(TIOC4A),
GPIO_FN(TIOC3D),
GPIO_FN(TIOC3C),
GPIO_FN(TIOC3B),
GPIO_FN(TIOC3A),
GPIO_FN(TIOC2B),
GPIO_FN(TIOC1B),
GPIO_FN(TIOC2A),
GPIO_FN(TIOC1A),
GPIO_FN(TIOC0D),
GPIO_FN(TIOC0C),
GPIO_FN(TIOC0B),
GPIO_FN(TIOC0A),
GPIO_FN(TCLKD_PD),
GPIO_FN(TCLKC_PD),
GPIO_FN(TCLKB_PD),
GPIO_FN(TCLKA_PD),
GPIO_FN(TCLKD_PF),
GPIO_FN(TCLKC_PF),
GPIO_FN(TCLKB_PF),
GPIO_FN(TCLKA_PF),
/* SSU */
PINMUX_GPIO(GPIO_FN_SCS0_PD, SCS0_PD_MARK),
PINMUX_GPIO(GPIO_FN_SSO0_PD, SSO0_PD_MARK),
PINMUX_GPIO(GPIO_FN_SSI0_PD, SSI0_PD_MARK),
PINMUX_GPIO(GPIO_FN_SSCK0_PD, SSCK0_PD_MARK),
PINMUX_GPIO(GPIO_FN_SCS0_PF, SCS0_PF_MARK),
PINMUX_GPIO(GPIO_FN_SSO0_PF, SSO0_PF_MARK),
PINMUX_GPIO(GPIO_FN_SSI0_PF, SSI0_PF_MARK),
PINMUX_GPIO(GPIO_FN_SSCK0_PF, SSCK0_PF_MARK),
PINMUX_GPIO(GPIO_FN_SCS1_PD, SCS1_PD_MARK),
PINMUX_GPIO(GPIO_FN_SSO1_PD, SSO1_PD_MARK),
PINMUX_GPIO(GPIO_FN_SSI1_PD, SSI1_PD_MARK),
PINMUX_GPIO(GPIO_FN_SSCK1_PD, SSCK1_PD_MARK),
PINMUX_GPIO(GPIO_FN_SCS1_PF, SCS1_PF_MARK),
PINMUX_GPIO(GPIO_FN_SSO1_PF, SSO1_PF_MARK),
PINMUX_GPIO(GPIO_FN_SSI1_PF, SSI1_PF_MARK),
PINMUX_GPIO(GPIO_FN_SSCK1_PF, SSCK1_PF_MARK),
GPIO_FN(SCS0_PD),
GPIO_FN(SSO0_PD),
GPIO_FN(SSI0_PD),
GPIO_FN(SSCK0_PD),
GPIO_FN(SCS0_PF),
GPIO_FN(SSO0_PF),
GPIO_FN(SSI0_PF),
GPIO_FN(SSCK0_PF),
GPIO_FN(SCS1_PD),
GPIO_FN(SSO1_PD),
GPIO_FN(SSI1_PD),
GPIO_FN(SSCK1_PD),
GPIO_FN(SCS1_PF),
GPIO_FN(SSO1_PF),
GPIO_FN(SSI1_PF),
GPIO_FN(SSCK1_PF),
/* SCIF */
PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
GPIO_FN(TXD0),
GPIO_FN(RXD0),
GPIO_FN(SCK0),
GPIO_FN(TXD1),
GPIO_FN(RXD1),
GPIO_FN(SCK1),
GPIO_FN(TXD2),
GPIO_FN(RXD2),
GPIO_FN(SCK2),
GPIO_FN(RTS3),
GPIO_FN(CTS3),
GPIO_FN(TXD3),
GPIO_FN(RXD3),
GPIO_FN(SCK3),
/* SSI */
PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK),
PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK),
PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK),
PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK),
PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK),
PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK),
PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK),
PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK),
PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK),
PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK),
PINMUX_GPIO(GPIO_FN_SSIDATA0, SSIDATA0_MARK),
PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK),
PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK),
GPIO_FN(AUDIO_CLK),
GPIO_FN(SSIDATA3),
GPIO_FN(SSIWS3),
GPIO_FN(SSISCK3),
GPIO_FN(SSIDATA2),
GPIO_FN(SSIWS2),
GPIO_FN(SSISCK2),
GPIO_FN(SSIDATA1),
GPIO_FN(SSIWS1),
GPIO_FN(SSISCK1),
GPIO_FN(SSIDATA0),
GPIO_FN(SSIWS0),
GPIO_FN(SSISCK0),
/* FLCTL */
PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK),
PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK),
PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK),
PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK),
PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK),
PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK),
PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK),
PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK),
PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK),
PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK),
PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK),
PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
GPIO_FN(FCE),
GPIO_FN(FRB),
GPIO_FN(NAF7),
GPIO_FN(NAF6),
GPIO_FN(NAF5),
GPIO_FN(NAF4),
GPIO_FN(NAF3),
GPIO_FN(NAF2),
GPIO_FN(NAF1),
GPIO_FN(NAF0),
GPIO_FN(FSC),
GPIO_FN(FOE),
GPIO_FN(FCDE),
GPIO_FN(FWE),
/* LCDC */
PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK),
PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK),
PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK),
PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK),
PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK),
PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
GPIO_FN(LCD_VEPWC),
GPIO_FN(LCD_VCPWC),
GPIO_FN(LCD_CLK),
GPIO_FN(LCD_FLM),
GPIO_FN(LCD_M_DISP),
GPIO_FN(LCD_CL2),
GPIO_FN(LCD_CL1),
GPIO_FN(LCD_DON),
GPIO_FN(LCD_DATA15),
GPIO_FN(LCD_DATA14),
GPIO_FN(LCD_DATA13),
GPIO_FN(LCD_DATA12),
GPIO_FN(LCD_DATA11),
GPIO_FN(LCD_DATA10),
GPIO_FN(LCD_DATA9),
GPIO_FN(LCD_DATA8),
GPIO_FN(LCD_DATA7),
GPIO_FN(LCD_DATA6),
GPIO_FN(LCD_DATA5),
GPIO_FN(LCD_DATA4),
GPIO_FN(LCD_DATA3),
GPIO_FN(LCD_DATA2),
GPIO_FN(LCD_DATA1),
GPIO_FN(LCD_DATA0),
};
static struct pinmux_cfg_reg pinmux_config_regs[] = {
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1) {
0, 0,
0, 0,
......@@ -1525,7 +1529,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{}
};
static struct pinmux_data_reg pinmux_data_regs[] = {
static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADRL", 0xfffe3802, 16) {
0, 0, 0, 0,
0, 0, 0, 0,
......@@ -1571,19 +1575,17 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ },
};
struct sh_pfc_soc_info sh7203_pinmux_info = {
const struct sh_pfc_soc_info sh7203_pinmux_info = {
.name = "sh7203_pfc",
.reserved_id = PINMUX_RESERVED,
.data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PA7,
.last_gpio = GPIO_FN_LCD_DATA0,
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.gpios = pinmux_gpios,
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
......
drivers/pinctrl/sh-pfc/pfc-sh7264.c
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drivers/pinctrl/sh-pfc/pfc-sh7269.c
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drivers/pinctrl/sh-pfc/pfc-sh7372.c
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drivers/pinctrl/sh-pfc/pfc-sh73a0.c
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drivers/pinctrl/sh-pfc/pfc-sh7720.c
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drivers/pinctrl/sh-pfc/pfc-sh7722.c
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drivers/pinctrl/sh-pfc/pfc-sh7723.c
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drivers/pinctrl/sh-pfc/pfc-sh7724.c
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drivers/pinctrl/sh-pfc/pfc-sh7734.c
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drivers/pinctrl/sh-pfc/pfc-sh7757.c
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drivers/pinctrl/sh-pfc/pfc-sh7785.c
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drivers/pinctrl/sh-pfc/pfc-sh7786.c
浏览文件 @ 22b15436
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drivers/pinctrl/sh-pfc/pfc-shx3.c
浏览文件 @ 22b15436
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drivers/pinctrl/sh-pfc/pinctrl.c
浏览文件 @ 22b15436
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drivers/pinctrl/sh-pfc/sh_pfc.h
浏览文件 @ 22b15436
此差异已折叠。
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