提交 1a55361e 编写于 作者: L Lee Jones

Merge branch 'ib-mfd-omap' into HEAD

...@@ -32,6 +32,29 @@ Optional properties: ...@@ -32,6 +32,29 @@ Optional properties:
- single-ulpi-bypass: Must be present if the controller contains a single - single-ulpi-bypass: Must be present if the controller contains a single
ULPI bypass control bit. e.g. OMAP3 silicon <= ES2.1 ULPI bypass control bit. e.g. OMAP3 silicon <= ES2.1
- clocks: a list of phandles and clock-specifier pairs, one for each entry in
clock-names.
- clock-names: should include:
For OMAP3
* "usbhost_120m_fck" - 120MHz Functional clock.
For OMAP4+
* "refclk_60m_int" - 60MHz internal reference clock for UTMI clock mux
* "refclk_60m_ext_p1" - 60MHz external ref. clock for Port 1's UTMI clock mux.
* "refclk_60m_ext_p2" - 60MHz external ref. clock for Port 2's UTMI clock mux
* "utmi_p1_gfclk" - Port 1 UTMI clock mux.
* "utmi_p2_gfclk" - Port 2 UTMI clock mux.
* "usb_host_hs_utmi_p1_clk" - Port 1 UTMI clock gate.
* "usb_host_hs_utmi_p2_clk" - Port 2 UTMI clock gate.
* "usb_host_hs_utmi_p3_clk" - Port 3 UTMI clock gate.
* "usb_host_hs_hsic480m_p1_clk" - Port 1 480MHz HSIC clock gate.
* "usb_host_hs_hsic480m_p2_clk" - Port 2 480MHz HSIC clock gate.
* "usb_host_hs_hsic480m_p3_clk" - Port 3 480MHz HSIC clock gate.
* "usb_host_hs_hsic60m_p1_clk" - Port 1 60MHz HSIC clock gate.
* "usb_host_hs_hsic60m_p2_clk" - Port 2 60MHz HSIC clock gate.
* "usb_host_hs_hsic60m_p3_clk" - Port 3 60MHz HSIC clock gate.
Required properties if child node exists: Required properties if child node exists:
- #address-cells: Must be 1 - #address-cells: Must be 1
......
...@@ -7,6 +7,16 @@ Required properties: ...@@ -7,6 +7,16 @@ Required properties:
- interrupts : should contain the TLL module's interrupt - interrupts : should contain the TLL module's interrupt
- ti,hwmod : must contain "usb_tll_hs" - ti,hwmod : must contain "usb_tll_hs"
Optional properties:
- clocks: a list of phandles and clock-specifier pairs, one for each entry in
clock-names.
- clock-names: should include:
* "usb_tll_hs_usb_ch0_clk" - USB TLL channel 0 clock
* "usb_tll_hs_usb_ch1_clk" - USB TLL channel 1 clock
* "usb_tll_hs_usb_ch2_clk" - USB TLL channel 2 clock
Example: Example:
usbhstll: usbhstll@4a062000 { usbhstll: usbhstll@4a062000 {
......
...@@ -697,6 +697,12 @@ ...@@ -697,6 +697,12 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
clocks = <&init_60m_fclk>,
<&xclk60mhsp1_ck>,
<&xclk60mhsp2_ck>;
clock-names = "refclk_60m_int",
"refclk_60m_ext_p1",
"refclk_60m_ext_p2";
usbhsohci: ohci@4a064800 { usbhsohci: ohci@4a064800 {
compatible = "ti,ohci-omap3", "usb-ohci"; compatible = "ti,ohci-omap3", "usb-ohci";
......
...@@ -775,6 +775,12 @@ ...@@ -775,6 +775,12 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
clocks = <&l3init_60m_fclk>,
<&xclk60mhsp1_ck>,
<&xclk60mhsp2_ck>;
clock-names = "refclk_60m_int",
"refclk_60m_ext_p1",
"refclk_60m_ext_p2";
usbhsohci: ohci@4a064800 { usbhsohci: ohci@4a064800 {
compatible = "ti,ohci-omap3", "usb-ohci"; compatible = "ti,ohci-omap3", "usb-ohci";
......
...@@ -3495,10 +3495,6 @@ static struct omap_clk omap3xxx_clks[] = { ...@@ -3495,10 +3495,6 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "dss_tv_fck", &dss_tv_fck), CLK(NULL, "dss_tv_fck", &dss_tv_fck),
CLK(NULL, "dss_96m_fck", &dss_96m_fck), CLK(NULL, "dss_96m_fck", &dss_96m_fck),
CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck), CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck),
CLK(NULL, "utmi_p1_gfclk", &dummy_ck),
CLK(NULL, "utmi_p2_gfclk", &dummy_ck),
CLK(NULL, "xclk60mhsp1_ck", &dummy_ck),
CLK(NULL, "xclk60mhsp2_ck", &dummy_ck),
CLK(NULL, "init_60m_fclk", &dummy_ck), CLK(NULL, "init_60m_fclk", &dummy_ck),
CLK(NULL, "gpt1_fck", &gpt1_fck), CLK(NULL, "gpt1_fck", &gpt1_fck),
CLK(NULL, "aes2_ick", &aes2_ick), CLK(NULL, "aes2_ick", &aes2_ick),
......
...@@ -1955,10 +1955,6 @@ static struct omap_hwmod_class omap3xxx_usb_host_hs_hwmod_class = { ...@@ -1955,10 +1955,6 @@ static struct omap_hwmod_class omap3xxx_usb_host_hs_hwmod_class = {
.sysc = &omap3xxx_usb_host_hs_sysc, .sysc = &omap3xxx_usb_host_hs_sysc,
}; };
static struct omap_hwmod_opt_clk omap3xxx_usb_host_hs_opt_clks[] = {
{ .role = "ehci_logic_fck", .clk = "usbhost_120m_fck", },
};
static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = { static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
{ .name = "ohci-irq", .irq = 76 + OMAP_INTC_START, }, { .name = "ohci-irq", .irq = 76 + OMAP_INTC_START, },
{ .name = "ehci-irq", .irq = 77 + OMAP_INTC_START, }, { .name = "ehci-irq", .irq = 77 + OMAP_INTC_START, },
...@@ -1981,8 +1977,6 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = { ...@@ -1981,8 +1977,6 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
.idlest_stdby_bit = OMAP3430ES2_ST_USBHOST_STDBY_SHIFT, .idlest_stdby_bit = OMAP3430ES2_ST_USBHOST_STDBY_SHIFT,
}, },
}, },
.opt_clks = omap3xxx_usb_host_hs_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_opt_clks),
/* /*
* Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
......
...@@ -130,10 +130,6 @@ static struct ti_dt_clk omap3xxx_clks[] = { ...@@ -130,10 +130,6 @@ static struct ti_dt_clk omap3xxx_clks[] = {
DT_CLK(NULL, "dss_tv_fck", "dss_tv_fck"), DT_CLK(NULL, "dss_tv_fck", "dss_tv_fck"),
DT_CLK(NULL, "dss_96m_fck", "dss_96m_fck"), DT_CLK(NULL, "dss_96m_fck", "dss_96m_fck"),
DT_CLK(NULL, "dss2_alwon_fck", "dss2_alwon_fck"), DT_CLK(NULL, "dss2_alwon_fck", "dss2_alwon_fck"),
DT_CLK(NULL, "utmi_p1_gfclk", "dummy_ck"),
DT_CLK(NULL, "utmi_p2_gfclk", "dummy_ck"),
DT_CLK(NULL, "xclk60mhsp1_ck", "dummy_ck"),
DT_CLK(NULL, "xclk60mhsp2_ck", "dummy_ck"),
DT_CLK(NULL, "init_60m_fclk", "dummy_ck"), DT_CLK(NULL, "init_60m_fclk", "dummy_ck"),
DT_CLK(NULL, "gpt1_fck", "gpt1_fck"), DT_CLK(NULL, "gpt1_fck", "gpt1_fck"),
DT_CLK(NULL, "aes2_ick", "aes2_ick"), DT_CLK(NULL, "aes2_ick", "aes2_ick"),
......
...@@ -665,55 +665,78 @@ static int usbhs_omap_probe(struct platform_device *pdev) ...@@ -665,55 +665,78 @@ static int usbhs_omap_probe(struct platform_device *pdev)
goto err_mem; goto err_mem;
} }
need_logic_fck = false; /* Set all clocks as invalid to begin with */
omap->ehci_logic_fck = ERR_PTR(-ENODEV);
omap->init_60m_fclk = ERR_PTR(-ENODEV);
omap->utmi_p1_gfclk = ERR_PTR(-ENODEV);
omap->utmi_p2_gfclk = ERR_PTR(-ENODEV);
omap->xclk60mhsp1_ck = ERR_PTR(-ENODEV);
omap->xclk60mhsp2_ck = ERR_PTR(-ENODEV);
for (i = 0; i < omap->nports; i++) { for (i = 0; i < omap->nports; i++) {
if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) || omap->utmi_clk[i] = ERR_PTR(-ENODEV);
is_ehci_hsic_mode(i)) omap->hsic480m_clk[i] = ERR_PTR(-ENODEV);
need_logic_fck |= true; omap->hsic60m_clk[i] = ERR_PTR(-ENODEV);
} }
omap->ehci_logic_fck = ERR_PTR(-EINVAL); /* for OMAP3 i.e. USBHS REV1 */
if (need_logic_fck) { if (omap->usbhs_rev == OMAP_USBHS_REV1) {
omap->ehci_logic_fck = clk_get(dev, "ehci_logic_fck"); need_logic_fck = false;
if (IS_ERR(omap->ehci_logic_fck)) { for (i = 0; i < omap->nports; i++) {
ret = PTR_ERR(omap->ehci_logic_fck); if (is_ehci_phy_mode(pdata->port_mode[i]) ||
dev_dbg(dev, "ehci_logic_fck failed:%d\n", ret); is_ehci_tll_mode(pdata->port_mode[i]) ||
is_ehci_hsic_mode(pdata->port_mode[i]))
need_logic_fck |= true;
} }
if (need_logic_fck) {
omap->ehci_logic_fck = devm_clk_get(dev,
"usbhost_120m_fck");
if (IS_ERR(omap->ehci_logic_fck)) {
ret = PTR_ERR(omap->ehci_logic_fck);
dev_err(dev, "usbhost_120m_fck failed:%d\n",
ret);
goto err_mem;
}
}
goto initialize;
} }
omap->utmi_p1_gfclk = clk_get(dev, "utmi_p1_gfclk"); /* for OMAP4+ i.e. USBHS REV2+ */
omap->utmi_p1_gfclk = devm_clk_get(dev, "utmi_p1_gfclk");
if (IS_ERR(omap->utmi_p1_gfclk)) { if (IS_ERR(omap->utmi_p1_gfclk)) {
ret = PTR_ERR(omap->utmi_p1_gfclk); ret = PTR_ERR(omap->utmi_p1_gfclk);
dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret); dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
goto err_p1_gfclk; goto err_mem;
} }
omap->utmi_p2_gfclk = clk_get(dev, "utmi_p2_gfclk"); omap->utmi_p2_gfclk = devm_clk_get(dev, "utmi_p2_gfclk");
if (IS_ERR(omap->utmi_p2_gfclk)) { if (IS_ERR(omap->utmi_p2_gfclk)) {
ret = PTR_ERR(omap->utmi_p2_gfclk); ret = PTR_ERR(omap->utmi_p2_gfclk);
dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret); dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret);
goto err_p2_gfclk; goto err_mem;
} }
omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck"); omap->xclk60mhsp1_ck = devm_clk_get(dev, "refclk_60m_ext_p1");
if (IS_ERR(omap->xclk60mhsp1_ck)) { if (IS_ERR(omap->xclk60mhsp1_ck)) {
ret = PTR_ERR(omap->xclk60mhsp1_ck); ret = PTR_ERR(omap->xclk60mhsp1_ck);
dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret); dev_err(dev, "refclk_60m_ext_p1 failed error:%d\n", ret);
goto err_xclk60mhsp1; goto err_mem;
} }
omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck"); omap->xclk60mhsp2_ck = devm_clk_get(dev, "refclk_60m_ext_p2");
if (IS_ERR(omap->xclk60mhsp2_ck)) { if (IS_ERR(omap->xclk60mhsp2_ck)) {
ret = PTR_ERR(omap->xclk60mhsp2_ck); ret = PTR_ERR(omap->xclk60mhsp2_ck);
dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret); dev_err(dev, "refclk_60m_ext_p2 failed error:%d\n", ret);
goto err_xclk60mhsp2; goto err_mem;
} }
omap->init_60m_fclk = clk_get(dev, "init_60m_fclk"); omap->init_60m_fclk = devm_clk_get(dev, "refclk_60m_int");
if (IS_ERR(omap->init_60m_fclk)) { if (IS_ERR(omap->init_60m_fclk)) {
ret = PTR_ERR(omap->init_60m_fclk); ret = PTR_ERR(omap->init_60m_fclk);
dev_err(dev, "init_60m_fclk failed error:%d\n", ret); dev_err(dev, "refclk_60m_int failed error:%d\n", ret);
goto err_init60m; goto err_mem;
} }
for (i = 0; i < omap->nports; i++) { for (i = 0; i < omap->nports; i++) {
...@@ -727,55 +750,72 @@ static int usbhs_omap_probe(struct platform_device *pdev) ...@@ -727,55 +750,72 @@ static int usbhs_omap_probe(struct platform_device *pdev)
* platforms have all clocks and we can function without * platforms have all clocks and we can function without
* them * them
*/ */
omap->utmi_clk[i] = clk_get(dev, clkname); omap->utmi_clk[i] = devm_clk_get(dev, clkname);
if (IS_ERR(omap->utmi_clk[i])) if (IS_ERR(omap->utmi_clk[i])) {
dev_dbg(dev, "Failed to get clock : %s : %ld\n", ret = PTR_ERR(omap->utmi_clk[i]);
clkname, PTR_ERR(omap->utmi_clk[i])); dev_err(dev, "Failed to get clock : %s : %d\n",
clkname, ret);
goto err_mem;
}
snprintf(clkname, sizeof(clkname), snprintf(clkname, sizeof(clkname),
"usb_host_hs_hsic480m_p%d_clk", i + 1); "usb_host_hs_hsic480m_p%d_clk", i + 1);
omap->hsic480m_clk[i] = clk_get(dev, clkname); omap->hsic480m_clk[i] = devm_clk_get(dev, clkname);
if (IS_ERR(omap->hsic480m_clk[i])) if (IS_ERR(omap->hsic480m_clk[i])) {
dev_dbg(dev, "Failed to get clock : %s : %ld\n", ret = PTR_ERR(omap->hsic480m_clk[i]);
clkname, PTR_ERR(omap->hsic480m_clk[i])); dev_err(dev, "Failed to get clock : %s : %d\n",
clkname, ret);
goto err_mem;
}
snprintf(clkname, sizeof(clkname), snprintf(clkname, sizeof(clkname),
"usb_host_hs_hsic60m_p%d_clk", i + 1); "usb_host_hs_hsic60m_p%d_clk", i + 1);
omap->hsic60m_clk[i] = clk_get(dev, clkname); omap->hsic60m_clk[i] = devm_clk_get(dev, clkname);
if (IS_ERR(omap->hsic60m_clk[i])) if (IS_ERR(omap->hsic60m_clk[i])) {
dev_dbg(dev, "Failed to get clock : %s : %ld\n", ret = PTR_ERR(omap->hsic60m_clk[i]);
clkname, PTR_ERR(omap->hsic60m_clk[i])); dev_err(dev, "Failed to get clock : %s : %d\n",
clkname, ret);
goto err_mem;
}
} }
if (is_ehci_phy_mode(pdata->port_mode[0])) { if (is_ehci_phy_mode(pdata->port_mode[0])) {
/* for OMAP3, clk_set_parent fails */
ret = clk_set_parent(omap->utmi_p1_gfclk, ret = clk_set_parent(omap->utmi_p1_gfclk,
omap->xclk60mhsp1_ck); omap->xclk60mhsp1_ck);
if (ret != 0) if (ret != 0) {
dev_dbg(dev, "xclk60mhsp1_ck set parent failed: %d\n", dev_err(dev, "xclk60mhsp1_ck set parent failed: %d\n",
ret); ret);
goto err_mem;
}
} else if (is_ehci_tll_mode(pdata->port_mode[0])) { } else if (is_ehci_tll_mode(pdata->port_mode[0])) {
ret = clk_set_parent(omap->utmi_p1_gfclk, ret = clk_set_parent(omap->utmi_p1_gfclk,
omap->init_60m_fclk); omap->init_60m_fclk);
if (ret != 0) if (ret != 0) {
dev_dbg(dev, "P0 init_60m_fclk set parent failed: %d\n", dev_err(dev, "P0 init_60m_fclk set parent failed: %d\n",
ret); ret);
goto err_mem;
}
} }
if (is_ehci_phy_mode(pdata->port_mode[1])) { if (is_ehci_phy_mode(pdata->port_mode[1])) {
ret = clk_set_parent(omap->utmi_p2_gfclk, ret = clk_set_parent(omap->utmi_p2_gfclk,
omap->xclk60mhsp2_ck); omap->xclk60mhsp2_ck);
if (ret != 0) if (ret != 0) {
dev_dbg(dev, "xclk60mhsp2_ck set parent failed: %d\n", dev_err(dev, "xclk60mhsp2_ck set parent failed: %d\n",
ret); ret);
goto err_mem;
}
} else if (is_ehci_tll_mode(pdata->port_mode[1])) { } else if (is_ehci_tll_mode(pdata->port_mode[1])) {
ret = clk_set_parent(omap->utmi_p2_gfclk, ret = clk_set_parent(omap->utmi_p2_gfclk,
omap->init_60m_fclk); omap->init_60m_fclk);
if (ret != 0) if (ret != 0) {
dev_dbg(dev, "P1 init_60m_fclk set parent failed: %d\n", dev_err(dev, "P1 init_60m_fclk set parent failed: %d\n",
ret); ret);
goto err_mem;
}
} }
initialize:
omap_usbhs_init(dev); omap_usbhs_init(dev);
if (dev->of_node) { if (dev->of_node) {
...@@ -784,7 +824,7 @@ static int usbhs_omap_probe(struct platform_device *pdev) ...@@ -784,7 +824,7 @@ static int usbhs_omap_probe(struct platform_device *pdev)
if (ret) { if (ret) {
dev_err(dev, "Failed to create DT children: %d\n", ret); dev_err(dev, "Failed to create DT children: %d\n", ret);
goto err_alloc; goto err_mem;
} }
} else { } else {
...@@ -792,40 +832,12 @@ static int usbhs_omap_probe(struct platform_device *pdev) ...@@ -792,40 +832,12 @@ static int usbhs_omap_probe(struct platform_device *pdev)
if (ret) { if (ret) {
dev_err(dev, "omap_usbhs_alloc_children failed: %d\n", dev_err(dev, "omap_usbhs_alloc_children failed: %d\n",
ret); ret);
goto err_alloc; goto err_mem;
} }
} }
return 0; return 0;
err_alloc:
for (i = 0; i < omap->nports; i++) {
if (!IS_ERR(omap->utmi_clk[i]))
clk_put(omap->utmi_clk[i]);
if (!IS_ERR(omap->hsic60m_clk[i]))
clk_put(omap->hsic60m_clk[i]);
if (!IS_ERR(omap->hsic480m_clk[i]))
clk_put(omap->hsic480m_clk[i]);
}
clk_put(omap->init_60m_fclk);
err_init60m:
clk_put(omap->xclk60mhsp2_ck);
err_xclk60mhsp2:
clk_put(omap->xclk60mhsp1_ck);
err_xclk60mhsp1:
clk_put(omap->utmi_p2_gfclk);
err_p2_gfclk:
clk_put(omap->utmi_p1_gfclk);
err_p1_gfclk:
if (!IS_ERR(omap->ehci_logic_fck))
clk_put(omap->ehci_logic_fck);
err_mem: err_mem:
pm_runtime_disable(dev); pm_runtime_disable(dev);
...@@ -847,27 +859,6 @@ static int usbhs_omap_remove_child(struct device *dev, void *data) ...@@ -847,27 +859,6 @@ static int usbhs_omap_remove_child(struct device *dev, void *data)
*/ */
static int usbhs_omap_remove(struct platform_device *pdev) static int usbhs_omap_remove(struct platform_device *pdev)
{ {
struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
int i;
for (i = 0; i < omap->nports; i++) {
if (!IS_ERR(omap->utmi_clk[i]))
clk_put(omap->utmi_clk[i]);
if (!IS_ERR(omap->hsic60m_clk[i]))
clk_put(omap->hsic60m_clk[i]);
if (!IS_ERR(omap->hsic480m_clk[i]))
clk_put(omap->hsic480m_clk[i]);
}
clk_put(omap->init_60m_fclk);
clk_put(omap->utmi_p1_gfclk);
clk_put(omap->utmi_p2_gfclk);
clk_put(omap->xclk60mhsp2_ck);
clk_put(omap->xclk60mhsp1_ck);
if (!IS_ERR(omap->ehci_logic_fck))
clk_put(omap->ehci_logic_fck);
pm_runtime_disable(&pdev->dev); pm_runtime_disable(&pdev->dev);
/* remove children */ /* remove children */
......
...@@ -252,7 +252,7 @@ static int usbtll_omap_probe(struct platform_device *pdev) ...@@ -252,7 +252,7 @@ static int usbtll_omap_probe(struct platform_device *pdev)
break; break;
} }
tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk * [tll->nch]), tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk *) * tll->nch,
GFP_KERNEL); GFP_KERNEL);
if (!tll->ch_clk) { if (!tll->ch_clk) {
ret = -ENOMEM; ret = -ENOMEM;
......
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