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由 Stephane Viau 提交于
Some upcoming targets have more bits to set in CTL_FLUSH registers. Example: msm8x16 needs to set TIMING1 bit so that some of the INTF1's interface registers get flushed. Signed-off-by: NStephane Viau <sviau@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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