at91sam9263.dtsi 16.9 KB
Newer Older
1 2 3 4 5 6 7 8
/*
 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
 *
 *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 *
 * Licensed under GPLv2 only.
 */

9
#include "skeleton.dtsi"
10
#include <dt-bindings/pinctrl/at91.h>
11
#include <dt-bindings/interrupt-controller/irq.h>
12
#include <dt-bindings/gpio/gpio.h>
13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29

/ {
	model = "Atmel AT91SAM9263 family SoC";
	compatible = "atmel,at91sam9263";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		gpio4 = &pioE;
		tcb0 = &tcb0;
30
		i2c0 = &i2c0;
31 32
		ssc0 = &ssc0;
		ssc1 = &ssc1;
33 34
	};
	cpus {
35 36 37 38 39 40
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
		};
	};

	memory {
		reg = <0x20000000 0x08000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
61
				#interrupt-cells = <3>;
62 63 64
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
65
				atmel,external-irqs = <30 31>;
66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			ramc: ramc@ffffe200 {
				compatible = "atmel,at91sam9260-sdramc";
				reg = <0xffffe200 0x200
				       0xffffe800 0x200>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
82
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
83 84 85 86 87
			};

			tcb0: timer@fff7c000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfff7c000 0x100>;
88
				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
89 90 91 92 93 94 95 96 97 98 99 100
			};

			rstc@fffffd00 {
				compatible = "atmel,at91sam9260-rstc";
				reg = <0xfffffd00 0x10>;
			};

			shdwc@fffffd10 {
				compatible = "atmel,at91sam9260-shdwc";
				reg = <0xfffffd10 0x10>;
			};

101 102 103 104 105 106
			pinctrl@fffff200 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff200 0xfffff200 0xa00>;

107 108 109 110 111 112 113 114 115 116
				atmel,mux-mask = <
				      /*    A         B     */
				       0xfffffffb 0xffffe07f  /* pioA */
				       0x0007ffff 0x39072fff  /* pioB */
				       0xffffffff 0x3ffffff8  /* pioC */
				       0xfffffbff 0xffffffff  /* pioD */
				       0xffe00fff 0xfbfcff00  /* pioE */
				      >;

				/* shared pinctrl settings */
117 118 119
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
120 121
							<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC30 periph A */
							 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PC31 periph with pullup */
122 123 124
					};
				};

125 126
				usart0 {
					pinctrl_usart0: usart0-0 {
127
						atmel,pins =
128 129
							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA26 periph A with pullup */
							 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA27 periph A */
130 131
					};

132
					pinctrl_usart0_rts: usart0_rts-0 {
133
						atmel,pins =
134
							<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA28 periph A */
135 136 137 138
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
139
							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA29 periph A */
140 141 142
					};
				};

143 144
				usart1 {
					pinctrl_usart1: usart1-0 {
145
						atmel,pins =
146 147
							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PD0 periph A with pullup */
							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD1 periph A */
148 149
					};

150
					pinctrl_usart1_rts: usart1_rts-0 {
151
						atmel,pins =
152
							<AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD7 periph B */
153 154 155 156
					};

					pinctrl_usart1_cts: usart1_cts-0 {
						atmel,pins =
157
							<AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD8 periph B */
158 159 160
					};
				};

161 162
				usart2 {
					pinctrl_usart2: usart2-0 {
163
						atmel,pins =
164 165
							<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PD2 periph A with pullup */
							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD3 periph A */
166 167
					};

168 169
					pinctrl_usart2_rts: usart2_rts-0 {
						atmel,pins =
170
							<AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD5 periph B */
171 172 173
					};

					pinctrl_usart2_cts: usart2_cts-0 {
174
						atmel,pins =
175
							<AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD6 periph B */
176 177
					};
				};
178

179 180 181
				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
182 183
							<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP	/* PA22 gpio RDY pin pull_up*/
							 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PD15 gpio enable pin pull_up */
184 185 186
					};
				};

187 188 189
				macb {
					pinctrl_macb_rmii: macb_rmii-0 {
						atmel,pins =
190 191 192 193 194 195 196 197 198 199
							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
							 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE21 periph A */
							 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE23 periph A */
							 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE24 periph A */
							 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE25 periph A */
							 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE26 periph A */
							 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE27 periph A */
							 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE28 periph A */
							 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE29 periph A */
							 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PE30 periph A */
200 201 202 203
					};

					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
						atmel,pins =
204 205 206 207 208 209 210 211
							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC20 periph B */
							 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC21 periph B */
							 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC22 periph B */
							 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC23 periph B */
							 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC24 periph B */
							 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
							 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC27 periph B */
							 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PE22 periph B */
212 213 214
					};
				};

215 216 217
				mmc0 {
					pinctrl_mmc0_clk: mmc0_clk-0 {
						atmel,pins =
218
							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA12 periph A */
219 220 221 222
					};

					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
						atmel,pins =
223 224
							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA1 periph A with pullup */
							 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA0 periph A with pullup */
225 226 227 228
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
229 230 231
							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA3 periph A with pullup */
							 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA4 periph A with pullup */
							 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA5 periph A with pullup */
232 233 234 235
					};

					pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
						atmel,pins =
236 237
							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
							 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA17 periph A with pullup */
238 239 240 241
					};

					pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
						atmel,pins =
242 243 244
							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
245 246 247 248 249 250
					};
				};

				mmc1 {
					pinctrl_mmc1_clk: mmc1_clk-0 {
						atmel,pins =
251
							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA6 periph A */
252 253 254 255
					};

					pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
						atmel,pins =
256 257
							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA7 periph A with pullup */
							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA8 periph A with pullup */
258 259 260 261
					};

					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
						atmel,pins =
262 263 264
							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA9 periph A with pullup */
							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA10 periph A with pullup */
							 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA11 periph A with pullup */
265 266 267 268
					};

					pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
						atmel,pins =
269 270
							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA21 periph A with pullup */
							 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA22 periph A with pullup */
271 272 273 274
					};

					pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
						atmel,pins =
275 276 277
							<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA23 periph A with pullup */
							 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA24 periph A with pullup */
							 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA25 periph A with pullup */
278 279 280
					};
				};

281 282 283
				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
284 285 286
							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB0 periph B */
							 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB1 periph B */
							 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB2 periph B */
287 288 289 290
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
291 292 293
							<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB3 periph B */
							 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB4 periph B */
							 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB5 periph B */
294 295 296 297 298 299
					};
				};

				ssc1 {
					pinctrl_ssc1_tx: ssc1_tx-0 {
						atmel,pins =
300 301 302
							<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB6 periph A */
							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB7 periph A */
							 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB8 periph A */
303 304 305 306
					};

					pinctrl_ssc1_rx: ssc1_rx-0 {
						atmel,pins =
307 308 309
							<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB9 periph A */
							 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB10 periph A */
							 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB11 periph A */
310 311 312
					};
				};

313 314 315
				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
316 317 318
							<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA0 periph B SPI0_MISO pin */
							 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA1 periph B SPI0_MOSI pin */
							 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA2 periph B SPI0_SPCK pin */
319 320 321 322 323 324
					};
				};

				spi1 {
					pinctrl_spi1: spi1-0 {
						atmel,pins =
325 326 327
							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A SPI1_MISO pin */
							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A SPI1_MOSI pin */
							 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB14 periph A SPI1_SPCK pin */
328 329 330
					};
				};

331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368
				tcb0 {
					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
						atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
						atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
						atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
						atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
						atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
						atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
						atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
						atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
						atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

369 370 371
				pioA: gpio@fffff200 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff200 0x200>;
372
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
373 374 375 376 377 378 379 380 381
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff400 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
382
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
383 384 385 386 387 388 389 390 391
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff600 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
392
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
393 394 395 396 397 398 399 400 401
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffff800 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
402
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
403 404 405 406 407 408 409 410 411
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioE: gpio@fffffa00 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
412
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
413 414 415 416
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
417
				};
418 419 420 421 422
			};

			dbgu: serial@ffffee00 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xffffee00 0x200>;
423
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
424 425
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
426 427 428 429 430 431
				status = "disabled";
			};

			usart0: serial@fff8c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff8c000 0x200>;
432
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
433 434
				atmel,use-dma-rx;
				atmel,use-dma-tx;
435
				pinctrl-names = "default";
436
				pinctrl-0 = <&pinctrl_usart0>;
437 438 439 440 441 442
				status = "disabled";
			};

			usart1: serial@fff90000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff90000 0x200>;
443
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
444 445
				atmel,use-dma-rx;
				atmel,use-dma-tx;
446
				pinctrl-names = "default";
447
				pinctrl-0 = <&pinctrl_usart1>;
448 449 450 451 452 453
				status = "disabled";
			};

			usart2: serial@fff94000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff94000 0x200>;
454
				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
455 456
				atmel,use-dma-rx;
				atmel,use-dma-tx;
457
				pinctrl-names = "default";
458
				pinctrl-0 = <&pinctrl_usart2>;
459 460 461
				status = "disabled";
			};

462 463 464
			ssc0: ssc@fff98000 {
				compatible = "atmel,at91rm9200-ssc";
				reg = <0xfff98000 0x4000>;
465
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
466 467
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
468
				status = "disabled";
469 470 471 472 473
			};

			ssc1: ssc@fff9c000 {
				compatible = "atmel,at91rm9200-ssc";
				reg = <0xfff9c000 0x4000>;
474
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
475 476
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
477
				status = "disabled";
478 479
			};

480 481 482
			macb0: ethernet@fffbc000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xfffbc000 0x100>;
483
				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
484 485
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb_rmii>;
486 487 488 489 490 491
				status = "disabled";
			};

			usb1: gadget@fff78000 {
				compatible = "atmel,at91rm9200-udc";
				reg = <0xfff78000 0x4000>;
492
				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
493 494
				status = "disabled";
			};
495 496 497 498

			i2c0: i2c@fff88000 {
				compatible = "atmel,at91sam9263-i2c";
				reg = <0xfff88000 0x100>;
499
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
500 501 502 503
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
504 505 506 507

			mmc0: mmc@fff80000 {
				compatible = "atmel,hsmci";
				reg = <0xfff80000 0x600>;
508
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
509 510 511 512 513 514 515 516
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			mmc1: mmc@fff84000 {
				compatible = "atmel,hsmci";
				reg = <0xfff84000 0x600>;
517
				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
518 519 520 521
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
522

523 524 525 526 527
			watchdog@fffffd40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffd40 0x10>;
				status = "disabled";
			};
528 529 530 531 532 533

			spi0: spi@fffa4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffa4000 0x200>;
534
				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
535 536
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
537 538 539 540 541 542 543 544
				status = "disabled";
			};

			spi1: spi@fffa8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffa8000 0x200>;
545
				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
546 547
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi1>;
548 549
				status = "disabled";
			};
550 551 552 553 554 555 556 557 558 559 560
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe000 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
561 562
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
563 564
			gpios = <&pioA 22 GPIO_ACTIVE_HIGH
				 &pioD 15 GPIO_ACTIVE_HIGH
565 566 567 568 569 570 571 572
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00a00000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00a00000 0x100000>;
573
			interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
574 575 576 577 578 579
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
580 581
		gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
			 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
582 583 584 585 586 587 588 589 590
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};