imx28.dtsi 26.7 KB
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/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/include/ "skeleton.dtsi"

/ {
	interrupt-parent = <&icoll>;

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	aliases {
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		ethernet0 = &mac0;
		ethernet1 = &mac1;
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		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
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		saif0 = &saif0;
		saif1 = &saif1;
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		serial0 = &auart0;
		serial1 = &auart1;
		serial2 = &auart2;
		serial3 = &auart3;
		serial4 = &auart4;
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		spi0 = &ssp1;
		spi1 = &ssp2;
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	};

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	cpus {
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		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
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		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3c900>;
			ranges;

			icoll: interrupt-controller@80000000 {
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				compatible = "fsl,imx28-icoll", "fsl,icoll";
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				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

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			hsadc: hsadc@80002000 {
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				reg = <0x80002000 0x2000>;
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				interrupts = <13>;
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				dmas = <&dma_apbh 12>;
				dma-names = "rx";
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				status = "disabled";
			};

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			dma_apbh: dma-apbh@80004000 {
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				compatible = "fsl,imx28-dma-apbh";
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				reg = <0x80004000 0x2000>;
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				interrupts = <82 83 84 85
					      88 88 88 88
					      88 88 88 88
					      87 86 0 0>;
				interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
						  "gpmi0", "gmpi1", "gpmi2", "gmpi3",
						  "gpmi4", "gmpi5", "gpmi6", "gmpi7",
						  "hsadc", "lcdif", "empty", "empty";
				#dma-cells = <1>;
				dma-channels = <16>;
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				clocks = <&clks 25>;
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			};

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			perfmon: perfmon@80006000 {
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				reg = <0x80006000 0x800>;
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				interrupts = <27>;
				status = "disabled";
			};

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			gpmi: gpmi-nand@8000c000 {
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				compatible = "fsl,imx28-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
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				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
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				reg-names = "gpmi-nand", "bch";
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				interrupts = <41>;
				interrupt-names = "bch";
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				clocks = <&clks 50>;
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				clock-names = "gpmi_io";
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				dmas = <&dma_apbh 4>;
				dma-names = "rx-tx";
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				status = "disabled";
			};

			ssp0: ssp@80010000 {
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				#address-cells = <1>;
				#size-cells = <0>;
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				reg = <0x80010000 0x2000>;
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				interrupts = <96>;
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				clocks = <&clks 46>;
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				dmas = <&dma_apbh 0>;
				dma-names = "rx-tx";
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				status = "disabled";
			};

			ssp1: ssp@80012000 {
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				#address-cells = <1>;
				#size-cells = <0>;
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				reg = <0x80012000 0x2000>;
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				interrupts = <97>;
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				clocks = <&clks 47>;
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				dmas = <&dma_apbh 1>;
				dma-names = "rx-tx";
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				status = "disabled";
			};

			ssp2: ssp@80014000 {
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				#address-cells = <1>;
				#size-cells = <0>;
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				reg = <0x80014000 0x2000>;
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				interrupts = <98>;
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				clocks = <&clks 48>;
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				dmas = <&dma_apbh 2>;
				dma-names = "rx-tx";
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				status = "disabled";
			};

			ssp3: ssp@80016000 {
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				#address-cells = <1>;
				#size-cells = <0>;
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				reg = <0x80016000 0x2000>;
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				interrupts = <99>;
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				clocks = <&clks 49>;
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				dmas = <&dma_apbh 3>;
				dma-names = "rx-tx";
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				status = "disabled";
			};

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			pinctrl: pinctrl@80018000 {
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				#address-cells = <1>;
				#size-cells = <0>;
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				compatible = "fsl,imx28-pinctrl", "simple-bus";
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				reg = <0x80018000 0x2000>;
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				gpio0: gpio@0 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <127>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <126>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <125>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio3: gpio@3 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <124>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio4: gpio@4 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <123>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

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				duart_pins_a: duart@0 {
					reg = <0>;
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					fsl,pinmux-ids = <
						0x3102 /* MX28_PAD_PWM0__DUART_RX */
						0x3112 /* MX28_PAD_PWM1__DUART_TX */
					>;
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					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				duart_pins_b: duart@1 {
					reg = <1>;
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					fsl,pinmux-ids = <
						0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
						0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
					>;
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					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				duart_4pins_a: duart-4pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
						0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
						0x3002 /* MX28_PAD_AUART0_RX__DUART_CTS */
						0x3012 /* MX28_PAD_AUART0_TX__DUART_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
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					fsl,pinmux-ids = <
						0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */
						0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */
						0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */
						0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */
						0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */
						0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */
						0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */
						0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */
						0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */
						0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */
						0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
						0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
						0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */
						0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */
						0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
					>;
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					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				gpmi_status_cfg: gpmi-status-cfg {
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					fsl,pinmux-ids = <
						0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
						0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
						0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
					>;
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					fsl,drive-strength = <2>;
				};

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				auart0_pins_a: auart0@0 {
					reg = <0>;
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					fsl,pinmux-ids = <
						0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
						0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
						0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */
						0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */
					>;
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					fsl,drive-strength = <0>;
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					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
						0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
					>;
					fsl,drive-strength = <0>;
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					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				auart1_pins_a: auart1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
						0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
						0x3060 /* MX28_PAD_AUART1_CTS__AUART1_CTS */
						0x3070 /* MX28_PAD_AUART1_RTS__AUART1_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				auart1_2pins_a: auart1-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
						0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart2_2pins_a: auart2-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2101 /* MX28_PAD_SSP2_SCK__AUART2_RX */
						0x2111 /* MX28_PAD_SSP2_MOSI__AUART2_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				auart2_2pins_b: auart2-2pins@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						0x3080 /* MX28_PAD_AUART2_RX__AUART2_RX */
						0x3090 /* MX28_PAD_AUART2_TX__AUART2_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				auart3_pins_a: auart3@0 {
					reg = <0>;
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					fsl,pinmux-ids = <
						0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */
						0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */
						0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */
						0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */
					>;
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					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				auart3_2pins_a: auart3-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2121 /* MX28_PAD_SSP2_MISO__AUART3_RX */
						0x2131 /* MX28_PAD_SSP2_SS0__AUART3_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				auart3_2pins_b: auart3-2pins@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */
						0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				auart4_2pins_a: auart4@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2181 /* MX28_PAD_SSP3_SCK__AUART4_TX */
						0x2191 /* MX28_PAD_SSP3_MOSI__AUART4_RX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

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				mac0_pins_a: mac0@0 {
					reg = <0>;
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					fsl,pinmux-ids = <
						0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */
						0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */
						0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */
						0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */
						0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */
						0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */
						0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */
						0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */
						0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */
					>;
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					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mac1_pins_a: mac1@0 {
					reg = <0>;
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					fsl,pinmux-ids = <
						0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */
						0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */
						0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */
						0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */
						0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */
						0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */
					>;
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					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
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				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
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					fsl,pinmux-ids = <
						0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
						0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
						0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
						0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
						0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */
						0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */
						0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */
						0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */
						0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
						0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
						0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
					>;
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					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

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				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
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					fsl,pinmux-ids = <
						0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
						0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
						0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
						0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
						0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
						0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
						0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
					>;
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					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

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				mmc0_cd_cfg: mmc0-cd-cfg {
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					fsl,pinmux-ids = <
						0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
					>;
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					fsl,pull-up = <0>;
				};

				mmc0_sck_cfg: mmc0-sck-cfg {
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					fsl,pinmux-ids = <
						0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
					>;
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					fsl,drive-strength = <2>;
					fsl,pull-up = <0>;
				};
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				i2c0_pins_a: i2c0@0 {
					reg = <0>;
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					fsl,pinmux-ids = <
						0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */
						0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */
					>;
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					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
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				i2c0_pins_b: i2c0@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						0x3001 /* MX28_PAD_AUART0_RX__I2C0_SCL */
						0x3011 /* MX28_PAD_AUART0_TX__I2C0_SDA */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

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				i2c1_pins_a: i2c1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3101 /* MX28_PAD_PWM0__I2C1_SCL */
						0x3111 /* MX28_PAD_PWM1__I2C1_SDA */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

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				saif0_pins_a: saif0@0 {
					reg = <0>;
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					fsl,pinmux-ids = <
						0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */
						0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */
						0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */
						0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */
					>;
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					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

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				saif0_pins_b: saif0@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */
						0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */
						0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */
					>;
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

533 534
				saif1_pins_a: saif1@0 {
					reg = <0>;
535 536 537
					fsl,pinmux-ids = <
						0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */
					>;
538 539 540 541
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
542

543 544 545 546 547 548 549 550 551 552
				pwm0_pins_a: pwm0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3100 /* MX28_PAD_PWM0__PWM_0 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

553 554 555 556 557 558 559 560 561
				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3120 /* MX28_PAD_PWM2__PWM_2 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};
562

563 564 565 566 567 568 569 570 571 572
				pwm3_pins_a: pwm3@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x31c0 /* MX28_PAD_PWM3__PWM_3 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

573 574 575 576 577 578 579 580 581 582
				pwm3_pins_b: pwm3@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						0x3141 /* MX28_PAD_SAIF0_MCLK__PWM3 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

583 584 585 586 587 588 589 590 591 592
				pwm4_pins_a: pwm4@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x31d0 /* MX28_PAD_PWM4__PWM_4 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624
				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
						0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
						0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
						0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
						0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
						0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
						0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
						0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
						0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
						0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
						0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
						0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
						0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
						0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
						0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
						0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
						0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */
						0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */
						0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */
						0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */
						0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */
						0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */
						0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */
						0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};
625

626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650
				lcdif_16bit_pins_a: lcdif-16bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
						0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
						0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
						0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
						0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
						0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
						0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
						0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
						0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
						0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
						0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
						0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
						0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
						0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
						0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
						0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

651 652 653 654 655 656 657 658 659 660 661 662 663
				lcdif_sync_pins_a: lcdif-sync@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
						0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
						0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
						0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684
				can0_pins_a: can0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */
						0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				can1_pins_a: can1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */
						0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};
685 686 687 688 689 690 691 692 693 694 695 696 697

				spi2_pins_a: spi2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2100 /* MX28_PAD_SSP2_SCK__SSP2_SCK */
						0x2110 /* MX28_PAD_SSP2_MOSI__SSP2_CMD */
						0x2120 /* MX28_PAD_SSP2_MISO__SSP2_D0 */
						0x2130 /* MX28_PAD_SSP2_SS0__SSP2_D3 */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
698

699 700 701 702 703 704 705 706 707 708 709 710 711 712 713
				spi3_pins_a: spi3@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3082 /* MX28_PAD_AUART2_RX__SSP3_D4 */
						0x3092 /* MX28_PAD_AUART2_TX__SSP3_D5 */
						0x2180 /* MX28_PAD_SSP3_SCK__SSP3_SCK */
						0x2190 /* MX28_PAD_SSP3_MOSI__SSP3_CMD */
						0x21A0 /* MX28_PAD_SSP3_MISO__SSP3_D0 */
						0x21B0 /* MX28_PAD_SSP3_SS0__SSP3_D3 */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742
				usbphy0_pins_a: usbphy0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2152 /* MX28_PAD_SSP2_SS2__USB0_OVERCURRENT */
					>;
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				usbphy0_pins_b: usbphy0@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						0x3061 /* MX28_PAD_AUART1_CTS__USB0_OVERCURRENT */
					>;
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				usbphy1_pins_a: usbphy1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2142 /* MX28_PAD_SSP2_SS1__USB1_OVERCURRENT */
					>;
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};
743 744
			};

745
			digctl: digctl@8001c000 {
746
				compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
F
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747
				reg = <0x8001c000 0x2000>;
748 749 750 751
				interrupts = <89>;
				status = "disabled";
			};

752
			etm: etm@80022000 {
F
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753
				reg = <0x80022000 0x2000>;
754 755 756
				status = "disabled";
			};

757
			dma_apbx: dma-apbx@80024000 {
D
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758
				compatible = "fsl,imx28-dma-apbx";
F
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759
				reg = <0x80024000 0x2000>;
760 761 762 763 764 765 766 767 768 769
				interrupts = <78 79 66 0
					      80 81 68 69
					      70 71 72 73
					      74 75 76 77>;
				interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty",
						  "saif0", "saif1", "i2c0", "i2c1",
						  "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
						  "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
				#dma-cells = <1>;
				dma-channels = <16>;
770
				clocks = <&clks 26>;
771 772
			};

773
			dcp: dcp@80028000 {
F
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774
				reg = <0x80028000 0x2000>;
775
				interrupts = <52 53 54>;
776
				compatible = "fsl-dcp";
777 778
			};

779
			pxp: pxp@8002a000 {
F
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780
				reg = <0x8002a000 0x2000>;
781 782 783 784
				interrupts = <39>;
				status = "disabled";
			};

785
			ocotp: ocotp@8002c000 {
786
				compatible = "fsl,ocotp";
F
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787
				reg = <0x8002c000 0x2000>;
788 789 790 791
				status = "disabled";
			};

			axi-ahb@8002e000 {
F
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792
				reg = <0x8002e000 0x2000>;
793 794 795
				status = "disabled";
			};

796
			lcdif: lcdif@80030000 {
797
				compatible = "fsl,imx28-lcdif";
F
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798
				reg = <0x80030000 0x2000>;
799
				interrupts = <38>;
800
				clocks = <&clks 55>;
801 802
				dmas = <&dma_apbh 13>;
				dma-names = "rx";
803 804 805 806
				status = "disabled";
			};

			can0: can@80032000 {
807
				compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
F
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808
				reg = <0x80032000 0x2000>;
809
				interrupts = <8>;
810 811
				clocks = <&clks 58>, <&clks 58>;
				clock-names = "ipg", "per";
812 813 814 815
				status = "disabled";
			};

			can1: can@80034000 {
816
				compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
F
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817
				reg = <0x80034000 0x2000>;
818
				interrupts = <9>;
819 820
				clocks = <&clks 59>, <&clks 59>;
				clock-names = "ipg", "per";
821 822 823
				status = "disabled";
			};

824
			simdbg: simdbg@8003c000 {
F
Fabio Estevam 已提交
825
				reg = <0x8003c000 0x200>;
826 827 828
				status = "disabled";
			};

829
			simgpmisel: simgpmisel@8003c200 {
F
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830
				reg = <0x8003c200 0x100>;
831 832 833
				status = "disabled";
			};

834
			simsspsel: simsspsel@8003c300 {
F
Fabio Estevam 已提交
835
				reg = <0x8003c300 0x100>;
836 837 838
				status = "disabled";
			};

839
			simmemsel: simmemsel@8003c400 {
F
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840
				reg = <0x8003c400 0x100>;
841 842 843
				status = "disabled";
			};

844
			gpiomon: gpiomon@8003c500 {
F
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845
				reg = <0x8003c500 0x100>;
846 847 848
				status = "disabled";
			};

849
			simenet: simenet@8003c700 {
F
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850
				reg = <0x8003c700 0x100>;
851 852 853
				status = "disabled";
			};

854
			armjtag: armjtag@8003c800 {
F
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855
				reg = <0x8003c800 0x100>;
856 857
				status = "disabled";
			};
858
		};
859 860 861 862 863 864 865 866

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

867
			clks: clkctrl@80040000 {
868
				compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";
F
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869
				reg = <0x80040000 0x2000>;
870
				#clock-cells = <1>;
871 872 873
			};

			saif0: saif@80042000 {
874
				compatible = "fsl,imx28-saif";
F
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875
				reg = <0x80042000 0x2000>;
876
				interrupts = <59>;
877
				#clock-cells = <0>;
878
				clocks = <&clks 53>;
879 880
				dmas = <&dma_apbx 4>;
				dma-names = "rx-tx";
881 882 883
				status = "disabled";
			};

884
			power: power@80044000 {
F
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885
				reg = <0x80044000 0x2000>;
886 887 888 889
				status = "disabled";
			};

			saif1: saif@80046000 {
890
				compatible = "fsl,imx28-saif";
F
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891
				reg = <0x80046000 0x2000>;
892
				interrupts = <58>;
893
				clocks = <&clks 54>;
894 895
				dmas = <&dma_apbx 5>;
				dma-names = "rx-tx";
896 897 898
				status = "disabled";
			};

899
			lradc: lradc@80050000 {
900
				compatible = "fsl,imx28-lradc";
F
Fabio Estevam 已提交
901
				reg = <0x80050000 0x2000>;
902 903
				interrupts = <10 14 15 16 17 18 19
						20 21 22 23 24 25>;
904 905 906
				status = "disabled";
			};

907
			spdif: spdif@80054000 {
F
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908
				reg = <0x80054000 0x2000>;
909
				interrupts = <45>;
910 911
				dmas = <&dma_apbx 2>;
				dma-names = "tx";
912 913 914
				status = "disabled";
			};

915
			mxs_rtc: rtc@80056000 {
916
				compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
F
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917
				reg = <0x80056000 0x2000>;
918
				interrupts = <29>;
919 920 921
			};

			i2c0: i2c@80058000 {
922 923 924
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
F
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925
				reg = <0x80058000 0x2000>;
926
				interrupts = <111>;
927
				clock-frequency = <100000>;
928 929
				dmas = <&dma_apbx 6>;
				dma-names = "rx-tx";
930 931 932 933
				status = "disabled";
			};

			i2c1: i2c@8005a000 {
934 935 936
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
F
Fabio Estevam 已提交
937
				reg = <0x8005a000 0x2000>;
938
				interrupts = <110>;
939
				clock-frequency = <100000>;
940 941
				dmas = <&dma_apbx 7>;
				dma-names = "rx-tx";
942 943 944
				status = "disabled";
			};

945 946
			pwm: pwm@80064000 {
				compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
F
Fabio Estevam 已提交
947
				reg = <0x80064000 0x2000>;
948
				clocks = <&clks 44>;
949 950
				#pwm-cells = <2>;
				fsl,pwm-number = <8>;
951 952 953
				status = "disabled";
			};

954
			timer: timrot@80068000 {
955
				compatible = "fsl,imx28-timrot", "fsl,timrot";
F
Fabio Estevam 已提交
956
				reg = <0x80068000 0x2000>;
957
				interrupts = <48 49 50 51>;
958
				clocks = <&clks 26>;
959 960 961
			};

			auart0: serial@8006a000 {
962
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
963
				reg = <0x8006a000 0x2000>;
964
				interrupts = <112>;
965 966
				dmas = <&dma_apbx 8>, <&dma_apbx 9>;
				dma-names = "rx", "tx";
967
				clocks = <&clks 45>;
968 969 970 971
				status = "disabled";
			};

			auart1: serial@8006c000 {
972
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
973
				reg = <0x8006c000 0x2000>;
974
				interrupts = <113>;
975 976
				dmas = <&dma_apbx 10>, <&dma_apbx 11>;
				dma-names = "rx", "tx";
977
				clocks = <&clks 45>;
978 979 980 981
				status = "disabled";
			};

			auart2: serial@8006e000 {
982
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
983
				reg = <0x8006e000 0x2000>;
984
				interrupts = <114>;
985 986
				dmas = <&dma_apbx 12>, <&dma_apbx 13>;
				dma-names = "rx", "tx";
987
				clocks = <&clks 45>;
988 989 990 991
				status = "disabled";
			};

			auart3: serial@80070000 {
992
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
993
				reg = <0x80070000 0x2000>;
994
				interrupts = <115>;
995 996
				dmas = <&dma_apbx 14>, <&dma_apbx 15>;
				dma-names = "rx", "tx";
997
				clocks = <&clks 45>;
998 999 1000 1001
				status = "disabled";
			};

			auart4: serial@80072000 {
1002
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1003
				reg = <0x80072000 0x2000>;
1004
				interrupts = <116>;
1005 1006
				dmas = <&dma_apbx 0>, <&dma_apbx 1>;
				dma-names = "rx", "tx";
1007
				clocks = <&clks 45>;
1008 1009 1010 1011 1012 1013 1014
				status = "disabled";
			};

			duart: serial@80074000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80074000 0x1000>;
				interrupts = <47>;
1015 1016
				clocks = <&clks 45>, <&clks 26>;
				clock-names = "uart", "apb_pclk";
1017 1018 1019 1020
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
1021
				compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1022
				reg = <0x8007c000 0x2000>;
1023
				clocks = <&clks 62>;
1024 1025 1026 1027
				status = "disabled";
			};

			usbphy1: usbphy@8007e000 {
1028
				compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1029
				reg = <0x8007e000 0x2000>;
1030
				clocks = <&clks 63>;
1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

1043 1044
		usb0: usb@80080000 {
			compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1045
			reg = <0x80080000 0x10000>;
1046
			interrupts = <93>;
1047
			clocks = <&clks 60>;
1048
			fsl,usbphy = <&usbphy0>;
1049 1050 1051
			status = "disabled";
		};

1052 1053
		usb1: usb@80090000 {
			compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1054
			reg = <0x80090000 0x10000>;
1055
			interrupts = <92>;
1056
			clocks = <&clks 61>;
1057
			fsl,usbphy = <&usbphy1>;
1058 1059 1060
			status = "disabled";
		};

1061
		dflpt: dflpt@800c0000 {
1062 1063 1064 1065 1066 1067 1068 1069
			reg = <0x800c0000 0x10000>;
			status = "disabled";
		};

		mac0: ethernet@800f0000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f0000 0x4000>;
			interrupts = <101>;
1070 1071
			clocks = <&clks 57>, <&clks 57>, <&clks 64>;
			clock-names = "ipg", "ahb", "enet_out";
1072 1073 1074 1075 1076 1077 1078
			status = "disabled";
		};

		mac1: ethernet@800f4000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f4000 0x4000>;
			interrupts = <102>;
1079 1080
			clocks = <&clks 57>, <&clks 57>;
			clock-names = "ipg", "ahb";
1081 1082 1083
			status = "disabled";
		};

1084
		etn_switch: switch@800f8000 {
1085 1086 1087 1088 1089
			reg = <0x800f8000 0x8000>;
			status = "disabled";
		};
	};
};