imx28.dtsi 18.8 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/include/ "skeleton.dtsi"

/ {
	interrupt-parent = <&icoll>;

17 18 19 20 21 22
	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
23 24
		saif0 = &saif0;
		saif1 = &saif1;
25 26 27 28 29
		serial0 = &auart0;
		serial1 = &auart1;
		serial2 = &auart2;
		serial3 = &auart3;
		serial4 = &auart4;
30 31
	};

32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3c900>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			hsadc@80002000 {
F
Fabio Estevam 已提交
60
				reg = <0x80002000 0x2000>;
61 62 63 64 65
				interrupts = <13 87>;
				status = "disabled";
			};

			dma-apbh@80004000 {
D
Dong Aisheng 已提交
66
				compatible = "fsl,imx28-dma-apbh";
F
Fabio Estevam 已提交
67
				reg = <0x80004000 0x2000>;
68 69 70
			};

			perfmon@80006000 {
F
Fabio Estevam 已提交
71
				reg = <0x80006000 0x800>;
72 73 74 75
				interrupts = <27>;
				status = "disabled";
			};

H
Huang Shijie 已提交
76 77 78 79
			gpmi-nand@8000c000 {
				compatible = "fsl,imx28-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
F
Fabio Estevam 已提交
80
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
H
Huang Shijie 已提交
81 82 83 84
				reg-names = "gpmi-nand", "bch";
				interrupts = <88>, <41>;
				interrupt-names = "gpmi-dma", "bch";
				fsl,gpmi-dma-channel = <4>;
85 86 87 88
				status = "disabled";
			};

			ssp0: ssp@80010000 {
F
Fabio Estevam 已提交
89
				reg = <0x80010000 0x2000>;
90
				interrupts = <96 82>;
S
Shawn Guo 已提交
91
				fsl,ssp-dma-channel = <0>;
92 93 94 95
				status = "disabled";
			};

			ssp1: ssp@80012000 {
F
Fabio Estevam 已提交
96
				reg = <0x80012000 0x2000>;
97
				interrupts = <97 83>;
S
Shawn Guo 已提交
98
				fsl,ssp-dma-channel = <1>;
99 100 101 102
				status = "disabled";
			};

			ssp2: ssp@80014000 {
F
Fabio Estevam 已提交
103
				reg = <0x80014000 0x2000>;
104
				interrupts = <98 84>;
S
Shawn Guo 已提交
105
				fsl,ssp-dma-channel = <2>;
106 107 108 109
				status = "disabled";
			};

			ssp3: ssp@80016000 {
F
Fabio Estevam 已提交
110
				reg = <0x80016000 0x2000>;
111
				interrupts = <99 85>;
S
Shawn Guo 已提交
112
				fsl,ssp-dma-channel = <3>;
113 114 115 116 117 118
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
119
				compatible = "fsl,imx28-pinctrl", "simple-bus";
F
Fabio Estevam 已提交
120
				reg = <0x80018000 0x2000>;
121

122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166
				gpio0: gpio@0 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <127>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <126>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <125>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio3: gpio@3 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <124>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio4: gpio@4 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <123>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

167 168
				duart_pins_a: duart@0 {
					reg = <0>;
169 170 171 172
					fsl,pinmux-ids = <
						0x3102 /* MX28_PAD_PWM0__DUART_RX */
						0x3112 /* MX28_PAD_PWM1__DUART_TX */
					>;
173 174 175 176 177
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

178 179
				duart_pins_b: duart@1 {
					reg = <1>;
180 181 182 183
					fsl,pinmux-ids = <
						0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
						0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
					>;
184 185 186 187 188
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

189 190 191 192 193 194 195 196 197 198 199 200 201
				duart_4pins_a: duart-4pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
						0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
						0x3002 /* MX28_PAD_AUART0_RX__DUART_CTS */
						0x3012 /* MX28_PAD_AUART0_TX__DUART_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

H
Huang Shijie 已提交
202 203
				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220
					fsl,pinmux-ids = <
						0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */
						0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */
						0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */
						0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */
						0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */
						0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */
						0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */
						0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */
						0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */
						0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */
						0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
						0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
						0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */
						0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */
						0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
					>;
H
Huang Shijie 已提交
221 222 223 224 225 226
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				gpmi_status_cfg: gpmi-status-cfg {
227 228 229 230 231
					fsl,pinmux-ids = <
						0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
						0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
						0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
					>;
H
Huang Shijie 已提交
232 233 234
					fsl,drive-strength = <2>;
				};

235 236
				auart0_pins_a: auart0@0 {
					reg = <0>;
237 238 239 240 241 242
					fsl,pinmux-ids = <
						0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
						0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
						0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */
						0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */
					>;
243
					fsl,drive-strength = <0>;
244 245 246 247 248 249 250 251 252 253 254
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
						0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
					>;
					fsl,drive-strength = <0>;
255 256 257 258
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

259 260 261 262 263 264 265 266 267 268 269 270 271
				auart1_pins_a: auart1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
						0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
						0x3060 /* MX28_PAD_AUART1_CTS__AUART1_CTS */
						0x3070 /* MX28_PAD_AUART1_RTS__AUART1_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293
				auart1_2pins_a: auart1-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
						0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart2_2pins_a: auart2-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2101 /* MX28_PAD_SSP2_SCK__AUART2_RX */
						0x2111 /* MX28_PAD_SSP2_MOSI__AUART2_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

294 295
				auart3_pins_a: auart3@0 {
					reg = <0>;
296 297 298 299 300 301
					fsl,pinmux-ids = <
						0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */
						0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */
						0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */
						0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */
					>;
302 303 304 305 306
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

307 308 309 310 311 312 313 314 315 316 317
				auart3_2pins_a: auart3-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2121 /* MX28_PAD_SSP2_MISO__AUART3_RX */
						0x2131 /* MX28_PAD_SSP2_SS0__AUART3_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

318 319
				mac0_pins_a: mac0@0 {
					reg = <0>;
320 321 322 323 324 325 326 327 328 329 330
					fsl,pinmux-ids = <
						0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */
						0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */
						0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */
						0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */
						0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */
						0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */
						0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */
						0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */
						0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */
					>;
331 332 333 334 335 336 337
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mac1_pins_a: mac1@0 {
					reg = <0>;
338 339 340 341 342 343 344 345
					fsl,pinmux-ids = <
						0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */
						0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */
						0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */
						0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */
						0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */
						0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */
					>;
346 347 348 349
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
S
Shawn Guo 已提交
350 351 352

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
353 354 355 356 357 358 359 360 361 362 363 364 365
					fsl,pinmux-ids = <
						0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
						0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
						0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
						0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
						0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */
						0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */
						0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */
						0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */
						0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
						0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
						0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
					>;
S
Shawn Guo 已提交
366 367 368 369 370
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

371 372
				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
373 374 375 376 377 378 379 380 381
					fsl,pinmux-ids = <
						0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
						0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
						0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
						0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
						0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
						0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
						0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
					>;
382 383 384 385 386
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

S
Shawn Guo 已提交
387
				mmc0_cd_cfg: mmc0-cd-cfg {
388 389 390
					fsl,pinmux-ids = <
						0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
					>;
S
Shawn Guo 已提交
391 392 393 394
					fsl,pull-up = <0>;
				};

				mmc0_sck_cfg: mmc0-sck-cfg {
395 396 397
					fsl,pinmux-ids = <
						0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
					>;
S
Shawn Guo 已提交
398 399 400
					fsl,drive-strength = <2>;
					fsl,pull-up = <0>;
				};
401 402 403

				i2c0_pins_a: i2c0@0 {
					reg = <0>;
404 405 406 407
					fsl,pinmux-ids = <
						0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */
						0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */
					>;
408 409 410 411
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
412 413 414

				saif0_pins_a: saif0@0 {
					reg = <0>;
415 416 417 418 419 420
					fsl,pinmux-ids = <
						0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */
						0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */
						0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */
						0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */
					>;
421 422 423 424 425 426 427
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				saif1_pins_a: saif1@0 {
					reg = <0>;
428 429 430
					fsl,pinmux-ids = <
						0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */
					>;
431 432 433 434
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
435

436 437 438 439 440 441 442 443 444 445
				pwm0_pins_a: pwm0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3100 /* MX28_PAD_PWM0__PWM_0 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

446 447 448 449 450 451 452 453 454
				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3120 /* MX28_PAD_PWM2__PWM_2 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};
455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487

				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
						0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
						0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
						0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
						0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
						0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
						0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
						0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
						0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
						0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
						0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
						0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
						0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
						0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
						0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
						0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
						0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */
						0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */
						0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */
						0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */
						0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */
						0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */
						0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */
						0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};
488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509

				can0_pins_a: can0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */
						0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				can1_pins_a: can1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */
						0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};
510 511 512
			};

			digctl@8001c000 {
F
Fabio Estevam 已提交
513
				reg = <0x8001c000 0x2000>;
514 515 516 517 518
				interrupts = <89>;
				status = "disabled";
			};

			etm@80022000 {
F
Fabio Estevam 已提交
519
				reg = <0x80022000 0x2000>;
520 521 522 523
				status = "disabled";
			};

			dma-apbx@80024000 {
D
Dong Aisheng 已提交
524
				compatible = "fsl,imx28-dma-apbx";
F
Fabio Estevam 已提交
525
				reg = <0x80024000 0x2000>;
526 527 528
			};

			dcp@80028000 {
F
Fabio Estevam 已提交
529
				reg = <0x80028000 0x2000>;
530 531 532 533 534
				interrupts = <52 53 54>;
				status = "disabled";
			};

			pxp@8002a000 {
F
Fabio Estevam 已提交
535
				reg = <0x8002a000 0x2000>;
536 537 538 539 540
				interrupts = <39>;
				status = "disabled";
			};

			ocotp@8002c000 {
F
Fabio Estevam 已提交
541
				reg = <0x8002c000 0x2000>;
542 543 544 545
				status = "disabled";
			};

			axi-ahb@8002e000 {
F
Fabio Estevam 已提交
546
				reg = <0x8002e000 0x2000>;
547 548 549 550
				status = "disabled";
			};

			lcdif@80030000 {
551
				compatible = "fsl,imx28-lcdif";
F
Fabio Estevam 已提交
552
				reg = <0x80030000 0x2000>;
553 554 555 556 557
				interrupts = <38 86>;
				status = "disabled";
			};

			can0: can@80032000 {
558
				compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
F
Fabio Estevam 已提交
559
				reg = <0x80032000 0x2000>;
560 561 562 563 564
				interrupts = <8>;
				status = "disabled";
			};

			can1: can@80034000 {
565
				compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
F
Fabio Estevam 已提交
566
				reg = <0x80034000 0x2000>;
567 568 569 570 571
				interrupts = <9>;
				status = "disabled";
			};

			simdbg@8003c000 {
F
Fabio Estevam 已提交
572
				reg = <0x8003c000 0x200>;
573 574 575 576
				status = "disabled";
			};

			simgpmisel@8003c200 {
F
Fabio Estevam 已提交
577
				reg = <0x8003c200 0x100>;
578 579 580 581
				status = "disabled";
			};

			simsspsel@8003c300 {
F
Fabio Estevam 已提交
582
				reg = <0x8003c300 0x100>;
583 584 585 586
				status = "disabled";
			};

			simmemsel@8003c400 {
F
Fabio Estevam 已提交
587
				reg = <0x8003c400 0x100>;
588 589 590 591
				status = "disabled";
			};

			gpiomon@8003c500 {
F
Fabio Estevam 已提交
592
				reg = <0x8003c500 0x100>;
593 594 595 596
				status = "disabled";
			};

			simenet@8003c700 {
F
Fabio Estevam 已提交
597
				reg = <0x8003c700 0x100>;
598 599 600 601
				status = "disabled";
			};

			armjtag@8003c800 {
F
Fabio Estevam 已提交
602
				reg = <0x8003c800 0x100>;
603 604 605 606 607 608 609 610 611 612 613 614
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clkctl@80040000 {
F
Fabio Estevam 已提交
615
				reg = <0x80040000 0x2000>;
616 617 618 619
				status = "disabled";
			};

			saif0: saif@80042000 {
620
				compatible = "fsl,imx28-saif";
F
Fabio Estevam 已提交
621
				reg = <0x80042000 0x2000>;
622
				interrupts = <59 80>;
623
				fsl,saif-dma-channel = <4>;
624 625 626 627
				status = "disabled";
			};

			power@80044000 {
F
Fabio Estevam 已提交
628
				reg = <0x80044000 0x2000>;
629 630 631 632
				status = "disabled";
			};

			saif1: saif@80046000 {
633
				compatible = "fsl,imx28-saif";
F
Fabio Estevam 已提交
634
				reg = <0x80046000 0x2000>;
635
				interrupts = <58 81>;
636
				fsl,saif-dma-channel = <5>;
637 638 639 640
				status = "disabled";
			};

			lradc@80050000 {
F
Fabio Estevam 已提交
641
				reg = <0x80050000 0x2000>;
642 643 644 645
				status = "disabled";
			};

			spdif@80054000 {
F
Fabio Estevam 已提交
646
				reg = <0x80054000 0x2000>;
647 648 649 650 651
				interrupts = <45 66>;
				status = "disabled";
			};

			rtc@80056000 {
652
				compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
F
Fabio Estevam 已提交
653
				reg = <0x80056000 0x2000>;
654
				interrupts = <29>;
655 656 657
			};

			i2c0: i2c@80058000 {
658 659 660
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
F
Fabio Estevam 已提交
661
				reg = <0x80058000 0x2000>;
662
				interrupts = <111 68>;
663
				clock-frequency = <100000>;
664 665 666 667
				status = "disabled";
			};

			i2c1: i2c@8005a000 {
668 669 670
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
F
Fabio Estevam 已提交
671
				reg = <0x8005a000 0x2000>;
672
				interrupts = <110 69>;
673
				clock-frequency = <100000>;
674 675 676
				status = "disabled";
			};

677 678
			pwm: pwm@80064000 {
				compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
F
Fabio Estevam 已提交
679
				reg = <0x80064000 0x2000>;
680 681
				#pwm-cells = <2>;
				fsl,pwm-number = <8>;
682 683 684 685
				status = "disabled";
			};

			timrot@80068000 {
686
				compatible = "fsl,imx28-timrot", "fsl,timrot";
F
Fabio Estevam 已提交
687
				reg = <0x80068000 0x2000>;
688
				interrupts = <48 49 50 51>;
689 690 691
			};

			auart0: serial@8006a000 {
692
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
693 694 695 696 697 698
				reg = <0x8006a000 0x2000>;
				interrupts = <112 70 71>;
				status = "disabled";
			};

			auart1: serial@8006c000 {
699
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
700 701 702 703 704 705
				reg = <0x8006c000 0x2000>;
				interrupts = <113 72 73>;
				status = "disabled";
			};

			auart2: serial@8006e000 {
706
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
707 708 709 710 711 712
				reg = <0x8006e000 0x2000>;
				interrupts = <114 74 75>;
				status = "disabled";
			};

			auart3: serial@80070000 {
713
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
714 715 716 717 718 719
				reg = <0x80070000 0x2000>;
				interrupts = <115 76 77>;
				status = "disabled";
			};

			auart4: serial@80072000 {
720
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
721 722 723 724 725 726 727 728 729 730 731 732 733
				reg = <0x80072000 0x2000>;
				interrupts = <116 78 79>;
				status = "disabled";
			};

			duart: serial@80074000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80074000 0x1000>;
				interrupts = <47>;
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
734
				compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
735 736 737 738 739
				reg = <0x8007c000 0x2000>;
				status = "disabled";
			};

			usbphy1: usbphy@8007e000 {
740
				compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
741 742 743 744 745 746 747 748 749 750 751 752 753
				reg = <0x8007e000 0x2000>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

754 755
		usb0: usb@80080000 {
			compatible = "fsl,imx28-usb", "fsl,imx27-usb";
756
			reg = <0x80080000 0x10000>;
757 758
			interrupts = <93>;
			fsl,usbphy = <&usbphy0>;
759 760 761
			status = "disabled";
		};

762 763
		usb1: usb@80090000 {
			compatible = "fsl,imx28-usb", "fsl,imx27-usb";
764
			reg = <0x80090000 0x10000>;
765 766
			interrupts = <92>;
			fsl,usbphy = <&usbphy1>;
767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795
			status = "disabled";
		};

		dflpt@800c0000 {
			reg = <0x800c0000 0x10000>;
			status = "disabled";
		};

		mac0: ethernet@800f0000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f0000 0x4000>;
			interrupts = <101>;
			status = "disabled";
		};

		mac1: ethernet@800f4000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f4000 0x4000>;
			interrupts = <102>;
			status = "disabled";
		};

		switch@800f8000 {
			reg = <0x800f8000 0x8000>;
			status = "disabled";
		};

	};
};