qla_mbx.c 149.9 KB
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/*
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 * QLogic Fibre Channel HBA Driver
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 * Copyright (c)  2003-2014 QLogic Corporation
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 *
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 * See LICENSE.qla2xxx for copyright and licensing details.
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 */
#include "qla_def.h"
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#include "qla_target.h"
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#include <linux/delay.h>
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#include <linux/gfp.h>
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static struct mb_cmd_name {
	uint16_t cmd;
	const char *str;
} mb_str[] = {
	{MBC_GET_PORT_DATABASE,		"GPDB"},
	{MBC_GET_ID_LIST,		"GIDList"},
	{MBC_GET_LINK_PRIV_STATS,	"Stats"},
};

static const char *mb_to_str(uint16_t cmd)
{
	int i;
	struct mb_cmd_name *e;

	for (i = 0; i < ARRAY_SIZE(mb_str); i++) {
		e = mb_str + i;
		if (cmd == e->cmd)
			return e->str;
	}
	return "unknown";
}

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static struct rom_cmd {
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	uint16_t cmd;
} rom_cmds[] = {
	{ MBC_LOAD_RAM },
	{ MBC_EXECUTE_FIRMWARE },
	{ MBC_READ_RAM_WORD },
	{ MBC_MAILBOX_REGISTER_TEST },
	{ MBC_VERIFY_CHECKSUM },
	{ MBC_GET_FIRMWARE_VERSION },
	{ MBC_LOAD_RISC_RAM },
	{ MBC_DUMP_RISC_RAM },
	{ MBC_LOAD_RISC_RAM_EXTENDED },
	{ MBC_DUMP_RISC_RAM_EXTENDED },
	{ MBC_WRITE_RAM_WORD_EXTENDED },
	{ MBC_READ_RAM_EXTENDED },
	{ MBC_GET_RESOURCE_COUNTS },
	{ MBC_SET_FIRMWARE_OPTION },
	{ MBC_MID_INITIALIZE_FIRMWARE },
	{ MBC_GET_FIRMWARE_STATE },
	{ MBC_GET_MEM_OFFLOAD_CNTRL_STAT },
	{ MBC_GET_RETRY_COUNT },
	{ MBC_TRACE_CONTROL },
};

static int is_rom_cmd(uint16_t cmd)
{
	int i;
	struct  rom_cmd *wc;

	for (i = 0; i < ARRAY_SIZE(rom_cmds); i++) {
		wc = rom_cmds + i;
		if (wc->cmd == cmd)
			return 1;
	}

	return 0;
}
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/*
 * qla2x00_mailbox_command
 *	Issue mailbox command and waits for completion.
 *
 * Input:
 *	ha = adapter block pointer.
 *	mcp = driver internal mbx struct pointer.
 *
 * Output:
 *	mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
 *
 * Returns:
 *	0 : QLA_SUCCESS = cmd performed success
 *	1 : QLA_FUNCTION_FAILED   (error encountered)
 *	6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
 *
 * Context:
 *	Kernel context.
 */
static int
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qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
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{
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	int		rval, i;
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	unsigned long    flags = 0;
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	device_reg_t *reg;
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	uint8_t		abort_active;
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	uint8_t		io_lock_on;
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	uint16_t	command = 0;
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	uint16_t	*iptr;
	uint16_t __iomem *optr;
	uint32_t	cnt;
	uint32_t	mboxes;
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	uint16_t __iomem *mbx_reg;
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	unsigned long	wait_time;
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	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
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	ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
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	if (ha->pdev->error_state > pci_channel_io_frozen) {
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		ql_log(ql_log_warn, vha, 0x1001,
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		    "error_state is greater than pci_channel_io_frozen, "
		    "exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
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	}
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	if (vha->device_flags & DFLG_DEV_FAILED) {
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		ql_log(ql_log_warn, vha, 0x1002,
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		    "Device in failed state, exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
	}

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	/* if PCI error, then avoid mbx processing.*/
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	if (test_bit(PFLG_DISCONNECTED, &base_vha->dpc_flags) &&
	    test_bit(UNLOADING, &base_vha->dpc_flags)) {
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		ql_log(ql_log_warn, vha, 0xd04e,
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		    "PCI error, exiting.\n");
		return QLA_FUNCTION_TIMEOUT;
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	}
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	reg = ha->iobase;
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	io_lock_on = base_vha->flags.init_done;
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	rval = QLA_SUCCESS;
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	abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
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	if (ha->flags.pci_channel_io_perm_failure) {
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		ql_log(ql_log_warn, vha, 0x1003,
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		    "Perm failure on EEH timeout MBX, exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
	}

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	if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
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		/* Setting Link-Down error */
		mcp->mb[0] = MBS_LINK_DOWN_ERROR;
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		ql_log(ql_log_warn, vha, 0x1004,
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		    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
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		return QLA_FUNCTION_TIMEOUT;
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	}

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	/* check if ISP abort is active and return cmd with timeout */
	if ((test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) &&
	    !is_rom_cmd(mcp->mb[0])) {
		ql_log(ql_log_info, vha, 0x1005,
		    "Cmd 0x%x aborted with timeout since ISP Abort is pending\n",
		    mcp->mb[0]);
		return QLA_FUNCTION_TIMEOUT;
	}

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	/*
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	 * Wait for active mailbox commands to finish by waiting at most tov
	 * seconds. This is to serialize actual issuing of mailbox cmds during
	 * non ISP abort time.
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	 */
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	if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
		/* Timeout occurred. Return error. */
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		ql_log(ql_log_warn, vha, 0xd035,
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		    "Cmd access timeout, cmd=0x%x, Exiting.\n",
		    mcp->mb[0]);
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		return QLA_FUNCTION_TIMEOUT;
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	}

	ha->flags.mbox_busy = 1;
	/* Save mailbox command for debug */
	ha->mcp = mcp;

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	ql_dbg(ql_dbg_mbx, vha, 0x1006,
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	    "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
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	spin_lock_irqsave(&ha->hardware_lock, flags);

	/* Load mailbox registers. */
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	if (IS_P3P_TYPE(ha))
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		optr = (uint16_t __iomem *)&reg->isp82.mailbox_in[0];
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	else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
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		optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
	else
		optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
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	iptr = mcp->mb;
	command = mcp->mb[0];
	mboxes = mcp->out_mb;

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	ql_dbg(ql_dbg_mbx, vha, 0x1111,
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	    "Mailbox registers (OUT):\n");
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	for (cnt = 0; cnt < ha->mbx_count; cnt++) {
		if (IS_QLA2200(ha) && cnt == 8)
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			optr =
			    (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
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		if (mboxes & BIT_0) {
			ql_dbg(ql_dbg_mbx, vha, 0x1112,
			    "mbox[%d]<-0x%04x\n", cnt, *iptr);
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			WRT_REG_WORD(optr, *iptr);
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		}
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		mboxes >>= 1;
		optr++;
		iptr++;
	}

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	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
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	    "I/O Address = %p.\n", optr);
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	/* Issue set host interrupt command to send cmd out. */
	ha->flags.mbox_int = 0;
	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

	/* Unlock mbx registers and wait for interrupt */
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	ql_dbg(ql_dbg_mbx, vha, 0x100f,
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	    "Going to unlock irq & waiting for interrupts. "
	    "jiffies=%lx.\n", jiffies);
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	/* Wait for mbx cmd completion until timeout */

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	if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
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		set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);

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		if (IS_P3P_TYPE(ha)) {
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			if (RD_REG_DWORD(&reg->isp82.hint) &
				HINT_MBX_INT_PENDING) {
				spin_unlock_irqrestore(&ha->hardware_lock,
					flags);
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				ha->flags.mbox_busy = 0;
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				ql_dbg(ql_dbg_mbx, vha, 0x1010,
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				    "Pending mailbox timeout, exiting.\n");
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				rval = QLA_FUNCTION_TIMEOUT;
				goto premature_exit;
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			}
			WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
		} else if (IS_FWI2_CAPABLE(ha))
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			WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
		else
			WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
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		spin_unlock_irqrestore(&ha->hardware_lock, flags);

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		wait_time = jiffies;
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		if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
		    mcp->tov * HZ)) {
			ql_dbg(ql_dbg_mbx, vha, 0x117a,
			    "cmd=%x Timeout.\n", command);
			spin_lock_irqsave(&ha->hardware_lock, flags);
			clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
			spin_unlock_irqrestore(&ha->hardware_lock, flags);
		}
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		if (time_after(jiffies, wait_time + 5 * HZ))
			ql_log(ql_log_warn, vha, 0x1015, "cmd=0x%x, waited %d msecs\n",
			    command, jiffies_to_msecs(jiffies - wait_time));
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	} else {
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		ql_dbg(ql_dbg_mbx, vha, 0x1011,
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		    "Cmd=%x Polling Mode.\n", command);
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		if (IS_P3P_TYPE(ha)) {
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			if (RD_REG_DWORD(&reg->isp82.hint) &
				HINT_MBX_INT_PENDING) {
				spin_unlock_irqrestore(&ha->hardware_lock,
					flags);
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				ha->flags.mbox_busy = 0;
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				ql_dbg(ql_dbg_mbx, vha, 0x1012,
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				    "Pending mailbox timeout, exiting.\n");
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				rval = QLA_FUNCTION_TIMEOUT;
				goto premature_exit;
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			}
			WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
		} else if (IS_FWI2_CAPABLE(ha))
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			WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
		else
			WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
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		spin_unlock_irqrestore(&ha->hardware_lock, flags);

		wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
		while (!ha->flags.mbox_int) {
			if (time_after(jiffies, wait_time))
				break;

			/* Check for pending interrupts. */
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			qla2x00_poll(ha->rsp_q_map[0]);
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			if (!ha->flags.mbox_int &&
			    !(IS_QLA2200(ha) &&
			    command == MBC_LOAD_RISC_RAM_EXTENDED))
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				msleep(10);
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		} /* while */
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		ql_dbg(ql_dbg_mbx, vha, 0x1013,
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		    "Waited %d sec.\n",
		    (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
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	}

	/* Check whether we timed out */
	if (ha->flags.mbox_int) {
		uint16_t *iptr2;

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		ql_dbg(ql_dbg_mbx, vha, 0x1014,
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		    "Cmd=%x completed.\n", command);
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		/* Got interrupt. Clear the flag. */
		ha->flags.mbox_int = 0;
		clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

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		if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
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			ha->flags.mbox_busy = 0;
			/* Setting Link-Down error */
			mcp->mb[0] = MBS_LINK_DOWN_ERROR;
			ha->mcp = NULL;
			rval = QLA_FUNCTION_FAILED;
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			ql_log(ql_log_warn, vha, 0xd048,
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			    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
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			goto premature_exit;
		}

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		if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
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			rval = QLA_FUNCTION_FAILED;

		/* Load return mailbox registers. */
		iptr2 = mcp->mb;
		iptr = (uint16_t *)&ha->mailbox_out[0];
		mboxes = mcp->in_mb;
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		ql_dbg(ql_dbg_mbx, vha, 0x1113,
		    "Mailbox registers (IN):\n");
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		for (cnt = 0; cnt < ha->mbx_count; cnt++) {
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			if (mboxes & BIT_0) {
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				*iptr2 = *iptr;
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				ql_dbg(ql_dbg_mbx, vha, 0x1114,
				    "mbox[%d]->0x%04x\n", cnt, *iptr2);
			}
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			mboxes >>= 1;
			iptr2++;
			iptr++;
		}
	} else {

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		uint16_t mb[8];
		uint32_t ictrl, host_status, hccr;
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		uint16_t        w;
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		if (IS_FWI2_CAPABLE(ha)) {
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			mb[0] = RD_REG_WORD(&reg->isp24.mailbox0);
			mb[1] = RD_REG_WORD(&reg->isp24.mailbox1);
			mb[2] = RD_REG_WORD(&reg->isp24.mailbox2);
			mb[3] = RD_REG_WORD(&reg->isp24.mailbox3);
			mb[7] = RD_REG_WORD(&reg->isp24.mailbox7);
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			ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
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			host_status = RD_REG_DWORD(&reg->isp24.host_status);
			hccr = RD_REG_DWORD(&reg->isp24.hccr);

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			ql_log(ql_log_warn, vha, 0xd04c,
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			    "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
			    "mb[0-3]=[0x%x 0x%x 0x%x 0x%x] mb7 0x%x host_status 0x%x hccr 0x%x\n",
			    command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3],
			    mb[7], host_status, hccr);

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		} else {
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			mb[0] = RD_MAILBOX_REG(ha, &reg->isp, 0);
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			ictrl = RD_REG_WORD(&reg->isp.ictrl);
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			ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
			    "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
			    "mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]);
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		}
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		ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
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		/* Capture FW dump only, if PCI device active */
		if (!pci_channel_offline(vha->hw->pdev)) {
			pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
			if (w == 0xffff || ictrl == 0xffffffff) {
				/* This is special case if there is unload
				 * of driver happening and if PCI device go
				 * into bad state due to PCI error condition
				 * then only PCI ERR flag would be set.
				 * we will do premature exit for above case.
				 */
				ha->flags.mbox_busy = 0;
				rval = QLA_FUNCTION_TIMEOUT;
				goto premature_exit;
			}
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			/* Attempt to capture firmware dump for further
			 * anallysis of the current formware state. we do not
			 * need to do this if we are intentionally generating
			 * a dump
			 */
			if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
				ha->isp_ops->fw_dump(vha, 0);
			rval = QLA_FUNCTION_TIMEOUT;
		 }
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	}

	ha->flags.mbox_busy = 0;

	/* Clean up */
	ha->mcp = NULL;

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	if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
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		ql_dbg(ql_dbg_mbx, vha, 0x101a,
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		    "Checking for additional resp interrupt.\n");
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		/* polling mode for non isp_abort commands. */
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		qla2x00_poll(ha->rsp_q_map[0]);
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	}

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	if (rval == QLA_FUNCTION_TIMEOUT &&
	    mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
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		if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
		    ha->flags.eeh_busy) {
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			/* not in dpc. schedule it for dpc to take over. */
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			ql_dbg(ql_dbg_mbx, vha, 0x101b,
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			    "Timeout, schedule isp_abort_needed.\n");
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			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
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				if (IS_QLA82XX(ha)) {
					ql_dbg(ql_dbg_mbx, vha, 0x112a,
					    "disabling pause transmit on port "
					    "0 & 1.\n");
					qla82xx_wr_32(ha,
					    QLA82XX_CRB_NIU + 0x98,
					    CRB_NIU_XG_PAUSE_CTL_P0|
					    CRB_NIU_XG_PAUSE_CTL_P1);
				}
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				ql_log(ql_log_info, base_vha, 0x101c,
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				    "Mailbox cmd timeout occurred, cmd=0x%x, "
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				    "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
				    "abort.\n", command, mcp->mb[0],
				    ha->flags.eeh_busy);
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				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
				qla2xxx_wake_dpc(vha);
			}
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		} else if (!abort_active) {
			/* call abort directly since we are in the DPC thread */
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			ql_dbg(ql_dbg_mbx, vha, 0x101d,
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			    "Timeout, calling abort_isp.\n");
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			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
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				if (IS_QLA82XX(ha)) {
					ql_dbg(ql_dbg_mbx, vha, 0x112b,
					    "disabling pause transmit on port "
					    "0 & 1.\n");
					qla82xx_wr_32(ha,
					    QLA82XX_CRB_NIU + 0x98,
					    CRB_NIU_XG_PAUSE_CTL_P0|
					    CRB_NIU_XG_PAUSE_CTL_P1);
				}
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				ql_log(ql_log_info, base_vha, 0x101e,
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				    "Mailbox cmd timeout occurred, cmd=0x%x, "
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				    "mb[0]=0x%x. Scheduling ISP abort ",
				    command, mcp->mb[0]);
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				set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
				clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
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				/* Allow next mbx cmd to come in. */
				complete(&ha->mbx_cmd_comp);
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				if (ha->isp_ops->abort_isp(vha)) {
					/* Failed. retry later. */
					set_bit(ISP_ABORT_NEEDED,
					    &vha->dpc_flags);
				}
				clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
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				ql_dbg(ql_dbg_mbx, vha, 0x101f,
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				    "Finished abort_isp.\n");
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				goto mbx_done;
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			}
		}
	}

483
premature_exit:
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	/* Allow next mbx cmd to come in. */
485
	complete(&ha->mbx_cmd_comp);
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487
mbx_done:
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	if (rval) {
489
		ql_dbg(ql_dbg_disc, base_vha, 0x1020,
490 491
		    "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
		    mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
492

493
		ql_dbg(ql_dbg_mbx, vha, 0x1198,
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		    "host status: 0x%x, flags:0x%lx, intr ctrl reg:0x%x, intr status:0x%x\n",
		    RD_REG_DWORD(&reg->isp24.host_status),
		    ha->fw_dump_cap_flags,
		    RD_REG_DWORD(&reg->isp24.ictrl),
		    RD_REG_DWORD(&reg->isp24.istatus));

		mbx_reg = &reg->isp24.mailbox0;
		for (i = 0; i < 6; i++)
502
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1199,
503
			    "mbox[%d] 0x%04x\n", i, RD_REG_WORD(mbx_reg++));
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	} else {
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		ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
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	}

	return rval;
}

int
512
qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
513
    uint32_t risc_code_size)
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{
	int rval;
516
	struct qla_hw_data *ha = vha->hw;
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	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

520 521
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
	    "Entered %s.\n", __func__);
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523
	if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
524 525 526
		mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
		mcp->mb[8] = MSW(risc_addr);
		mcp->out_mb = MBX_8|MBX_0;
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	} else {
528 529
		mcp->mb[0] = MBC_LOAD_RISC_RAM;
		mcp->out_mb = MBX_0;
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	}
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
536
	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
537
	if (IS_FWI2_CAPABLE(ha)) {
538 539 540 541 542 543 544 545
		mcp->mb[4] = MSW(risc_code_size);
		mcp->mb[5] = LSW(risc_code_size);
		mcp->out_mb |= MBX_5|MBX_4;
	} else {
		mcp->mb[4] = LSW(risc_code_size);
		mcp->out_mb |= MBX_4;
	}

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	mcp->in_mb = MBX_0;
547
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
549
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
552 553
		ql_dbg(ql_dbg_mbx, vha, 0x1023,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
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	} else {
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		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

562
#define	EXTENDED_BB_CREDITS	BIT_0
563 564
#define	NVME_ENABLE_FLAG	BIT_3

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/*
 * qla2x00_execute_fw
567
 *     Start adapter firmware.
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 *
 * Input:
570 571 572
 *     ha = adapter block pointer.
 *     TARGET_QUEUE_LOCK must be released.
 *     ADAPTER_STATE_LOCK must be released.
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 *
 * Returns:
575
 *     qla2x00 local function return status code.
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 *
 * Context:
578
 *     Kernel context.
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 */
int
581
qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
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{
	int rval;
584
	struct qla_hw_data *ha = vha->hw;
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	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

588 589
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
592 593
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
594
	if (IS_FWI2_CAPABLE(ha)) {
595 596 597
		mcp->mb[1] = MSW(risc_addr);
		mcp->mb[2] = LSW(risc_addr);
		mcp->mb[3] = 0;
598 599
		if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
		    IS_QLA27XX(ha)) {
600 601 602 603 604
			struct nvram_81xx *nv = ha->nvram;
			mcp->mb[4] = (nv->enhanced_features &
			    EXTENDED_BB_CREDITS);
		} else
			mcp->mb[4] = 0;
605

606 607 608
		if (ql2xnvmeenable && IS_QLA27XX(ha))
			mcp->mb[4] |= NVME_ENABLE_FLAG;

609 610 611
		if (ha->flags.exlogins_enabled)
			mcp->mb[4] |= ENABLE_EXTENDED_LOGIN;

612 613 614
		if (ha->flags.exchoffld_enabled)
			mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD;

615
		mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
616 617 618 619 620 621 622 623
		mcp->in_mb |= MBX_1;
	} else {
		mcp->mb[1] = LSW(risc_addr);
		mcp->out_mb |= MBX_1;
		if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
			mcp->mb[2] = 0;
			mcp->out_mb |= MBX_2;
		}
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	}

626
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
628
	rval = qla2x00_mailbox_command(vha, mcp);
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630
	if (rval != QLA_SUCCESS) {
631 632
		ql_dbg(ql_dbg_mbx, vha, 0x1026,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
633
	} else {
634
		if (IS_FWI2_CAPABLE(ha)) {
635
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
636
			    "Done exchanges=%x.\n", mcp->mb[1]);
637
		} else {
638 639
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
			    "Done %s.\n", __func__);
640 641
		}
	}
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	return rval;
}

646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754
/*
 * qla_get_exlogin_status
 *	Get extended login status
 *	uses the memory offload control/status Mailbox
 *
 * Input:
 *	ha:		adapter state pointer.
 *	fwopt:		firmware options
 *
 * Returns:
 *	qla2x00 local function status
 *
 * Context:
 *	Kernel context.
 */
#define	FETCH_XLOGINS_STAT	0x8
int
qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
	uint16_t *ex_logins_cnt)
{
	int rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f,
	    "Entered %s\n", __func__);

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
	mcp->mb[1] = FETCH_XLOGINS_STAT;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_10|MBX_4|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval);
	} else {
		*buf_sz = mcp->mb[4];
		*ex_logins_cnt = mcp->mb[10];

		ql_log(ql_log_info, vha, 0x1190,
		    "buffer size 0x%x, exchange login count=%d\n",
		    mcp->mb[4], mcp->mb[10]);

		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116,
		    "Done %s.\n", __func__);
	}

	return rval;
}

/*
 * qla_set_exlogin_mem_cfg
 *	set extended login memory configuration
 *	Mbx needs to be issues before init_cb is set
 *
 * Input:
 *	ha:		adapter state pointer.
 *	buffer:		buffer pointer
 *	phys_addr:	physical address of buffer
 *	size:		size of buffer
 *	TARGET_QUEUE_LOCK must be released
 *	ADAPTER_STATE_LOCK must be release
 *
 * Returns:
 *	qla2x00 local funxtion status code.
 *
 * Context:
 *	Kernel context.
 */
#define CONFIG_XLOGINS_MEM	0x3
int
qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
	    "Entered %s.\n", __func__);

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
	mcp->mb[1] = CONFIG_XLOGINS_MEM;
	mcp->mb[2] = MSW(phys_addr);
	mcp->mb[3] = LSW(phys_addr);
	mcp->mb[6] = MSW(MSD(phys_addr));
	mcp->mb[7] = LSW(MSD(phys_addr));
	mcp->mb[8] = MSW(ha->exlogin_size);
	mcp->mb[9] = LSW(ha->exlogin_size);
	mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_11|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
		ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
		    "Done %s.\n", __func__);
	}

	return rval;
}

755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828
/*
 * qla_get_exchoffld_status
 *	Get exchange offload status
 *	uses the memory offload control/status Mailbox
 *
 * Input:
 *	ha:		adapter state pointer.
 *	fwopt:		firmware options
 *
 * Returns:
 *	qla2x00 local function status
 *
 * Context:
 *	Kernel context.
 */
#define	FETCH_XCHOFFLD_STAT	0x2
int
qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
	uint16_t *ex_logins_cnt)
{
	int rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019,
	    "Entered %s\n", __func__);

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
	mcp->mb[1] = FETCH_XCHOFFLD_STAT;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_10|MBX_4|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval);
	} else {
		*buf_sz = mcp->mb[4];
		*ex_logins_cnt = mcp->mb[10];

		ql_log(ql_log_info, vha, 0x118e,
		    "buffer size 0x%x, exchange offload count=%d\n",
		    mcp->mb[4], mcp->mb[10]);

		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156,
		    "Done %s.\n", __func__);
	}

	return rval;
}

/*
 * qla_set_exchoffld_mem_cfg
 *	Set exchange offload memory configuration
 *	Mbx needs to be issues before init_cb is set
 *
 * Input:
 *	ha:		adapter state pointer.
 *	buffer:		buffer pointer
 *	phys_addr:	physical address of buffer
 *	size:		size of buffer
 *	TARGET_QUEUE_LOCK must be released
 *	ADAPTER_STATE_LOCK must be release
 *
 * Returns:
 *	qla2x00 local funxtion status code.
 *
 * Context:
 *	Kernel context.
 */
#define CONFIG_XCHOFFLD_MEM	0x3
int
829
qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha)
830 831 832 833 834 835 836 837 838 839 840 841
{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157,
	    "Entered %s.\n", __func__);

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
	mcp->mb[1] = CONFIG_XCHOFFLD_MEM;
842 843 844 845 846 847
	mcp->mb[2] = MSW(ha->exchoffld_buf_dma);
	mcp->mb[3] = LSW(ha->exchoffld_buf_dma);
	mcp->mb[6] = MSW(MSD(ha->exchoffld_buf_dma));
	mcp->mb[7] = LSW(MSD(ha->exchoffld_buf_dma));
	mcp->mb[8] = MSW(ha->exchoffld_size);
	mcp->mb[9] = LSW(ha->exchoffld_size);
848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863
	mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_11|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
		ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
		    "Done %s.\n", __func__);
	}

	return rval;
}

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864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879
/*
 * qla2x00_get_fw_version
 *	Get firmware version.
 *
 * Input:
 *	ha:		adapter state pointer.
 *	major:		pointer for major number.
 *	minor:		pointer for minor number.
 *	subminor:	pointer for subminor number.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
880
int
881
qla2x00_get_fw_version(scsi_qla_host_t *vha)
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882 883 884 885
{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
886
	struct qla_hw_data *ha = vha->hw;
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888 889
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
894
	if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
895
		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
896
	if (IS_FWI2_CAPABLE(ha))
897
		mcp->in_mb |= MBX_17|MBX_16|MBX_15;
898
	if (IS_QLA27XX(ha))
899 900 901
		mcp->in_mb |=
		    MBX_25|MBX_24|MBX_23|MBX_22|MBX_21|MBX_20|MBX_19|MBX_18|
		    MBX_14|MBX_13|MBX_11|MBX_10|MBX_9|MBX_8;
902

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	mcp->flags = 0;
904
	mcp->tov = MBX_TOV_SECONDS;
905
	rval = qla2x00_mailbox_command(vha, mcp);
906 907
	if (rval != QLA_SUCCESS)
		goto failed;
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	/* Return mailbox data. */
910 911 912 913
	ha->fw_major_version = mcp->mb[1];
	ha->fw_minor_version = mcp->mb[2];
	ha->fw_subminor_version = mcp->mb[3];
	ha->fw_attributes = mcp->mb[6];
914
	if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
915
		ha->fw_memory_size = 0x1FFFF;		/* Defaults to 128KB. */
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916
	else
917
		ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
918

919
	if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
920 921 922 923 924 925 926 927
		ha->mpi_version[0] = mcp->mb[10] & 0xff;
		ha->mpi_version[1] = mcp->mb[11] >> 8;
		ha->mpi_version[2] = mcp->mb[11] & 0xff;
		ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
		ha->phy_version[0] = mcp->mb[8] & 0xff;
		ha->phy_version[1] = mcp->mb[9] >> 8;
		ha->phy_version[2] = mcp->mb[9] & 0xff;
	}
928

929 930 931 932 933 934 935 936 937 938
	if (IS_FWI2_CAPABLE(ha)) {
		ha->fw_attributes_h = mcp->mb[15];
		ha->fw_attributes_ext[0] = mcp->mb[16];
		ha->fw_attributes_ext[1] = mcp->mb[17];
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
		    "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
		    __func__, mcp->mb[15], mcp->mb[6]);
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
		    "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
		    __func__, mcp->mb[17], mcp->mb[16]);
939

940 941 942 943
		if (ha->fw_attributes_h & 0x4)
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d,
			    "%s: Firmware supports Extended Login 0x%x\n",
			    __func__, ha->fw_attributes_h);
944 945 946 947 948

		if (ha->fw_attributes_h & 0x8)
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191,
			    "%s: Firmware supports Exchange Offload 0x%x\n",
			    __func__, ha->fw_attributes_h);
949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964

		/* bit 26 of fw_attributes */
		if ((ha->fw_attributes_h & 0x400) && ql2xnvmeenable) {
			struct init_cb_24xx *icb;

			icb = (struct init_cb_24xx *)ha->init_cb;
			/*
			 * fw supports nvme and driver load
			 * parameter requested nvme
			 */
			vha->flags.nvme_enabled = 1;
			icb->firmware_options_2 &= cpu_to_le32(~0xf);
			ha->zio_mode = 0;
			ha->zio_timer = 0;
		}

965
	}
966

967
	if (IS_QLA27XX(ha)) {
968 969 970 971 972 973
		ha->mpi_version[0] = mcp->mb[10] & 0xff;
		ha->mpi_version[1] = mcp->mb[11] >> 8;
		ha->mpi_version[2] = mcp->mb[11] & 0xff;
		ha->pep_version[0] = mcp->mb[13] & 0xff;
		ha->pep_version[1] = mcp->mb[14] >> 8;
		ha->pep_version[2] = mcp->mb[14] & 0xff;
974 975
		ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
		ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
976 977
		ha->fw_ddr_ram_start = (mcp->mb[23] << 16) | mcp->mb[22];
		ha->fw_ddr_ram_end = (mcp->mb[25] << 16) | mcp->mb[24];
978
	}
979

980
failed:
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
983
		ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
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	} else {
		/*EMPTY*/
986 987
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
		    "Done %s.\n", __func__);
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	}
989
	return rval;
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}

/*
 * qla2x00_get_fw_options
 *	Set firmware options.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fwopt = pointer for firmware options.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1007
qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1013 1014
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1019
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1021
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1025
		ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
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	} else {
1027
		fwopts[0] = mcp->mb[0];
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		fwopts[1] = mcp->mb[1];
		fwopts[2] = mcp->mb[2];
		fwopts[3] = mcp->mb[3];

1032 1033
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
		    "Done %s.\n", __func__);
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	}

	return rval;
}


/*
 * qla2x00_set_fw_options
 *	Set firmware options.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fwopt = pointer for firmware options.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1055
qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1061 1062
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
	mcp->mb[1] = fwopts[1];
	mcp->mb[2] = fwopts[2];
	mcp->mb[3] = fwopts[3];
1068
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
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	mcp->in_mb = MBX_0;
1070
	if (IS_FWI2_CAPABLE(vha->hw)) {
1071
		mcp->in_mb |= MBX_1;
1072 1073
		mcp->mb[10] = fwopts[10];
		mcp->out_mb |= MBX_10;
1074 1075 1076 1077 1078 1079
	} else {
		mcp->mb[10] = fwopts[10];
		mcp->mb[11] = fwopts[11];
		mcp->mb[12] = 0;	/* Undocumented, but used */
		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
	}
1080
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1082
	rval = qla2x00_mailbox_command(vha, mcp);
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1083

1084 1085
	fwopts[0] = mcp->mb[0];

L
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1088 1089
		ql_dbg(ql_dbg_mbx, vha, 0x1030,
		    "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
L
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1090 1091
	} else {
		/*EMPTY*/
1092 1093
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_mbx_reg_test
 *	Mailbox register wrap test.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1115
qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
L
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1121 1122
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
	mcp->mb[1] = 0xAAAA;
	mcp->mb[2] = 0x5555;
	mcp->mb[3] = 0xAA55;
	mcp->mb[4] = 0x55AA;
	mcp->mb[5] = 0xA5A5;
	mcp->mb[6] = 0x5A5A;
	mcp->mb[7] = 0x2525;
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1134
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1136
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval == QLA_SUCCESS) {
		if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
		    mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
			rval = QLA_FUNCTION_FAILED;
		if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
		    mcp->mb[7] != 0x2525)
			rval = QLA_FUNCTION_FAILED;
	}

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1149
		ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
L
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1150 1151
	} else {
		/*EMPTY*/
1152 1153
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_verify_checksum
 *	Verify firmware checksum.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1175
qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
L
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1176 1177 1178 1179 1180
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1181 1182
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
	    "Entered %s.\n", __func__);
L
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	mcp->mb[0] = MBC_VERIFY_CHECKSUM;
1185 1186
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
1187
	if (IS_FWI2_CAPABLE(vha->hw)) {
1188 1189 1190 1191 1192 1193 1194 1195 1196 1197
		mcp->mb[1] = MSW(risc_addr);
		mcp->mb[2] = LSW(risc_addr);
		mcp->out_mb |= MBX_2|MBX_1;
		mcp->in_mb |= MBX_2|MBX_1;
	} else {
		mcp->mb[1] = LSW(risc_addr);
		mcp->out_mb |= MBX_1;
		mcp->in_mb |= MBX_1;
	}

1198
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1200
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
1203 1204 1205
		ql_dbg(ql_dbg_mbx, vha, 0x1036,
		    "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
		    (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
L
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	} else {
1207 1208
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_issue_iocb
 *	Issue IOCB using mailbox command
 *
 * Input:
 *	ha = adapter state pointer.
 *	buffer = buffer pointer.
 *	phys_addr = physical address of buffer.
 *	size = size of buffer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
1232
int
1233
qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
1234
    dma_addr_t phys_addr, size_t size, uint32_t tov)
L
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{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;

1240 1241
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
	    "Entered %s.\n", __func__);
1242

L
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	mcp->mb[0] = MBC_IOCB_COMMAND_A64;
	mcp->mb[1] = 0;
	mcp->mb[2] = MSW(phys_addr);
	mcp->mb[3] = LSW(phys_addr);
	mcp->mb[6] = MSW(MSD(phys_addr));
	mcp->mb[7] = LSW(MSD(phys_addr));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_0;
1251
	mcp->tov = tov;
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	mcp->flags = 0;
1253
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1257
		ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
L
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1258
	} else {
1259 1260 1261 1262
		sts_entry_t *sts_entry = (sts_entry_t *) buffer;

		/* Mask reserved bits. */
		sts_entry->entry_status &=
1263
		    IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
1264 1265
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
		    "Done %s.\n", __func__);
L
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	}

	return rval;
}

1271
int
1272
qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
1273 1274
    size_t size)
{
1275
	return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
1276 1277 1278
	    MBX_TOV_SECONDS);
}

L
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/*
 * qla2x00_abort_command
 *	Abort command aborts a specified IOCB.
 *
 * Input:
 *	ha = adapter block pointer.
 *	sp = SB structure pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1294
qla2x00_abort_command(srb_t *sp)
L
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1295 1296 1297
{
	unsigned long   flags = 0;
	int		rval;
1298
	uint32_t	handle = 0;
L
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	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
1301 1302
	fc_port_t	*fcport = sp->fcport;
	scsi_qla_host_t *vha = fcport->vha;
1303
	struct qla_hw_data *ha = vha->hw;
1304
	struct req_que *req;
1305
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
L
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1307 1308
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
	    "Entered %s.\n", __func__);
L
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1310 1311 1312 1313 1314
	if (vha->flags.qpairs_available && sp->qpair)
		req = sp->qpair->req;
	else
		req = vha->req;

1315
	spin_lock_irqsave(&ha->hardware_lock, flags);
1316
	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1317
		if (req->outstanding_cmds[handle] == sp)
L
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			break;
	}
1320
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
L
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1321

1322
	if (handle == req->num_outstanding_cmds) {
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		/* command not found */
		return QLA_FUNCTION_FAILED;
	}

	mcp->mb[0] = MBC_ABORT_COMMAND;
	if (HAS_EXTENDED_IDS(ha))
		mcp->mb[1] = fcport->loop_id;
	else
		mcp->mb[1] = fcport->loop_id << 8;
	mcp->mb[2] = (uint16_t)handle;
	mcp->mb[3] = (uint16_t)(handle >> 16);
1334
	mcp->mb[6] = (uint16_t)cmd->device->lun;
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	mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
1337
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1339
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
1342
		ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
L
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	} else {
1344 1345
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

int
H
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qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
L
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1353
{
1354
	int rval, rval2;
L
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	mbx_cmd_t  mc;
	mbx_cmd_t  *mcp = &mc;
1357
	scsi_qla_host_t *vha;
1358 1359
	struct req_que *req;
	struct rsp_que *rsp;
L
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1361
	l = l;
1362
	vha = fcport->vha;
1363

1364 1365
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
	    "Entered %s.\n", __func__);
1366

1367 1368
	req = vha->hw->req_q_map[0];
	rsp = req->rsp;
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	mcp->mb[0] = MBC_ABORT_TARGET;
1370
	mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
1371
	if (HAS_EXTENDED_IDS(vha->hw)) {
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		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = fcport->loop_id << 8;
	}
1378 1379
	mcp->mb[2] = vha->hw->loop_reset_delay;
	mcp->mb[9] = vha->vp_idx;
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	mcp->in_mb = MBX_0;
1382
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1384
	rval = qla2x00_mailbox_command(vha, mcp);
1385
	if (rval != QLA_SUCCESS) {
1386 1387
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
		    "Failed=%x.\n", rval);
1388 1389 1390
	}

	/* Issue marker IOCB. */
1391 1392
	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
							MK_SYNC_ID);
1393
	if (rval2 != QLA_SUCCESS) {
1394 1395
		ql_dbg(ql_dbg_mbx, vha, 0x1040,
		    "Failed to issue marker IOCB (%x).\n", rval2);
1396
	} else {
1397 1398
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
		    "Done %s.\n", __func__);
1399 1400 1401 1402 1403 1404
	}

	return rval;
}

int
H
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qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1406 1407 1408 1409
{
	int rval, rval2;
	mbx_cmd_t  mc;
	mbx_cmd_t  *mcp = &mc;
1410
	scsi_qla_host_t *vha;
1411 1412
	struct req_que *req;
	struct rsp_que *rsp;
1413

1414
	vha = fcport->vha;
1415

1416 1417
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
	    "Entered %s.\n", __func__);
1418

1419 1420
	req = vha->hw->req_q_map[0];
	rsp = req->rsp;
1421 1422
	mcp->mb[0] = MBC_LUN_RESET;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1423
	if (HAS_EXTENDED_IDS(vha->hw))
1424 1425 1426
		mcp->mb[1] = fcport->loop_id;
	else
		mcp->mb[1] = fcport->loop_id << 8;
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	mcp->mb[2] = (u32)l;
1428
	mcp->mb[3] = 0;
1429
	mcp->mb[9] = vha->vp_idx;
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1431
	mcp->in_mb = MBX_0;
1432
	mcp->tov = MBX_TOV_SECONDS;
1433
	mcp->flags = 0;
1434
	rval = qla2x00_mailbox_command(vha, mcp);
L
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	if (rval != QLA_SUCCESS) {
1436
		ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1437 1438 1439
	}

	/* Issue marker IOCB. */
1440 1441
	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
								MK_SYNC_ID_LUN);
1442
	if (rval2 != QLA_SUCCESS) {
1443 1444
		ql_dbg(ql_dbg_mbx, vha, 0x1044,
		    "Failed to issue marker IOCB (%x).\n", rval2);
L
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	} else {
1446 1447
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
		    "Done %s.\n", __func__);
L
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	}

	return rval;
}

/*
 * qla2x00_get_adapter_id
 *	Get adapter ID and topology.
 *
 * Input:
 *	ha = adapter block pointer.
 *	id = pointer for loop ID.
 *	al_pa = pointer for AL_PA.
 *	area = pointer for area.
 *	domain = pointer for domain.
 *	top = pointer for topology.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1474
qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1475
    uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
L
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1481 1482
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
	    "Entered %s.\n", __func__);
L
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	mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1485
	mcp->mb[9] = vha->vp_idx;
1486
	mcp->out_mb = MBX_9|MBX_0;
1487
	mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1488
	if (IS_CNA_CAPABLE(vha->hw))
1489
		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1490 1491
	if (IS_FWI2_CAPABLE(vha->hw))
		mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1492 1493
	if (IS_QLA27XX(vha->hw))
		mcp->in_mb |= MBX_15;
1494
	mcp->tov = MBX_TOV_SECONDS;
L
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1495
	mcp->flags = 0;
1496
	rval = qla2x00_mailbox_command(vha, mcp);
1497 1498
	if (mcp->mb[0] == MBS_COMMAND_ERROR)
		rval = QLA_COMMAND_ERROR;
1499 1500
	else if (mcp->mb[0] == MBS_INVALID_COMMAND)
		rval = QLA_INVALID_COMMAND;
L
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	/* Return data. */
	*id = mcp->mb[1];
	*al_pa = LSB(mcp->mb[2]);
	*area = MSB(mcp->mb[2]);
	*domain	= LSB(mcp->mb[3]);
	*top = mcp->mb[6];
1508
	*sw_cap = mcp->mb[7];
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1512
		ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
L
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1513
	} else {
1514 1515
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
		    "Done %s.\n", __func__);
1516

1517
		if (IS_CNA_CAPABLE(vha->hw)) {
1518 1519 1520 1521 1522 1523 1524 1525 1526
			vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
			vha->fcoe_fcf_idx = mcp->mb[10];
			vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
			vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
			vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
			vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
			vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
			vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
		}
1527
		/* If FA-WWN supported */
1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543
		if (IS_FAWWN_CAPABLE(vha->hw)) {
			if (mcp->mb[7] & BIT_14) {
				vha->port_name[0] = MSB(mcp->mb[16]);
				vha->port_name[1] = LSB(mcp->mb[16]);
				vha->port_name[2] = MSB(mcp->mb[17]);
				vha->port_name[3] = LSB(mcp->mb[17]);
				vha->port_name[4] = MSB(mcp->mb[18]);
				vha->port_name[5] = LSB(mcp->mb[18]);
				vha->port_name[6] = MSB(mcp->mb[19]);
				vha->port_name[7] = LSB(mcp->mb[19]);
				fc_host_port_name(vha->host) =
				    wwn_to_u64(vha->port_name);
				ql_dbg(ql_dbg_mbx, vha, 0x10ca,
				    "FA-WWN acquired %016llx\n",
				    wwn_to_u64(vha->port_name));
			}
1544
		}
1545 1546 1547

		if (IS_QLA27XX(vha->hw))
			vha->bbcr = mcp->mb[15];
L
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1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568
	}

	return rval;
}

/*
 * qla2x00_get_retry_cnt
 *	Get current firmware login retry count and delay.
 *
 * Input:
 *	ha = adapter block pointer.
 *	retry_cnt = pointer to login retry count.
 *	tov = pointer to login timeout value.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1569
qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
L
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1570 1571 1572 1573 1574 1575 1576
    uint16_t *r_a_tov)
{
	int rval;
	uint16_t ratov;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1577 1578
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
	    "Entered %s.\n", __func__);
L
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1579 1580 1581 1582

	mcp->mb[0] = MBC_GET_RETRY_COUNT;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1583
	mcp->tov = MBX_TOV_SECONDS;
L
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1584
	mcp->flags = 0;
1585
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1586 1587 1588

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1589 1590
		ql_dbg(ql_dbg_mbx, vha, 0x104a,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
L
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1591 1592 1593 1594 1595 1596 1597 1598 1599 1600
	} else {
		/* Convert returned data and check our values. */
		*r_a_tov = mcp->mb[3] / 2;
		ratov = (mcp->mb[3]/2) / 10;  /* mb[3] value is in 100ms */
		if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
			/* Update to the larger values */
			*retry_cnt = (uint8_t)mcp->mb[1];
			*tov = ratov;
		}

1601
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1602
		    "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
L
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	}

	return rval;
}

/*
 * qla2x00_init_firmware
 *	Initialize adapter firmware.
 *
 * Input:
 *	ha = adapter block pointer.
 *	dptr = Initialization control block pointer.
 *	size = size of initialization control block.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1626
qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
L
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1627 1628 1629 1630
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
1631
	struct qla_hw_data *ha = vha->hw;
L
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1632

1633 1634
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
	    "Entered %s.\n", __func__);
L
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1635

1636
	if (IS_P3P_TYPE(ha) && ql2xdbwr)
1637
		qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr,
1638 1639
			(0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));

1640
	if (ha->flags.npiv_supported)
1641 1642 1643 1644
		mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
	else
		mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;

1645
	mcp->mb[1] = 0;
L
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1646 1647 1648 1649
	mcp->mb[2] = MSW(ha->init_cb_dma);
	mcp->mb[3] = LSW(ha->init_cb_dma);
	mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
	mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1650
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1651
	if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1652 1653 1654 1655 1656 1657 1658 1659
		mcp->mb[1] = BIT_0;
		mcp->mb[10] = MSW(ha->ex_init_cb_dma);
		mcp->mb[11] = LSW(ha->ex_init_cb_dma);
		mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
		mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
		mcp->mb[14] = sizeof(*ha->ex_init_cb);
		mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
	}
1660 1661
	/* 1 and 2 should normally be captured. */
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
1662
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1663 1664
		/* mb3 is additional info about the installed SFP. */
		mcp->in_mb  |= MBX_3;
L
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1665 1666
	mcp->buf_size = size;
	mcp->flags = MBX_DMA_OUT;
1667
	mcp->tov = MBX_TOV_SECONDS;
1668
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1669 1670 1671

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1672
		ql_dbg(ql_dbg_mbx, vha, 0x104d,
1673 1674
		    "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
L
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1675 1676
	} else {
		/*EMPTY*/
1677 1678
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
		    "Done %s.\n", __func__);
L
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1679 1680 1681 1682 1683
	}

	return rval;
}

1684

L
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1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701
/*
 * qla2x00_get_port_database
 *	Issue normal/enhanced get port database mailbox command
 *	and copy device name as necessary.
 *
 * Input:
 *	ha = adapter state pointer.
 *	dev = structure pointer.
 *	opt = enhanced cmd option byte.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1702
qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
L
Linus Torvalds 已提交
1703 1704 1705 1706 1707
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	port_database_t *pd;
1708
	struct port_database_24xx *pd24;
L
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1709
	dma_addr_t pd_dma;
1710
	struct qla_hw_data *ha = vha->hw;
L
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1711

1712 1713
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
1714

1715 1716
	pd24 = NULL;
	pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
L
Linus Torvalds 已提交
1717
	if (pd  == NULL) {
1718 1719
		ql_log(ql_log_warn, vha, 0x1050,
		    "Failed to allocate port database structure.\n");
L
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1720 1721
		return QLA_MEMORY_ALLOC_FAILED;
	}
1722
	memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
L
Linus Torvalds 已提交
1723

1724
	mcp->mb[0] = MBC_GET_PORT_DATABASE;
1725
	if (opt != 0 && !IS_FWI2_CAPABLE(ha))
L
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1726 1727 1728 1729 1730
		mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
	mcp->mb[2] = MSW(pd_dma);
	mcp->mb[3] = LSW(pd_dma);
	mcp->mb[6] = MSW(MSD(pd_dma));
	mcp->mb[7] = LSW(MSD(pd_dma));
1731
	mcp->mb[9] = vha->vp_idx;
1732
	mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
L
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1733
	mcp->in_mb = MBX_0;
1734
	if (IS_FWI2_CAPABLE(ha)) {
1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746
		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10|MBX_1;
		mcp->in_mb |= MBX_1;
	} else if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10|MBX_1;
	} else {
		mcp->mb[1] = fcport->loop_id << 8 | opt;
		mcp->out_mb |= MBX_1;
	}
1747 1748
	mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
	    PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
L
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1749 1750
	mcp->flags = MBX_DMA_IN;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1751
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1752 1753 1754
	if (rval != QLA_SUCCESS)
		goto gpd_error_out;

1755
	if (IS_FWI2_CAPABLE(ha)) {
1756
		uint64_t zero = 0;
1757 1758 1759 1760 1761
		pd24 = (struct port_database_24xx *) pd;

		/* Check for logged in state. */
		if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
		    pd24->last_login_state != PDS_PRLI_COMPLETE) {
1762 1763 1764 1765
			ql_dbg(ql_dbg_mbx, vha, 0x1051,
			    "Unable to verify login-state (%x/%x) for "
			    "loop_id %x.\n", pd24->current_login_state,
			    pd24->last_login_state, fcport->loop_id);
1766 1767 1768
			rval = QLA_FUNCTION_FAILED;
			goto gpd_error_out;
		}
L
Linus Torvalds 已提交
1769

1770 1771 1772 1773 1774 1775 1776 1777
		if (fcport->loop_id == FC_NO_LOOP_ID ||
		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
		     memcmp(fcport->port_name, pd24->port_name, 8))) {
			/* We lost the device mid way. */
			rval = QLA_NOT_LOGGED_IN;
			goto gpd_error_out;
		}

1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792
		/* Names are little-endian. */
		memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
		memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);

		/* Get port_id of device. */
		fcport->d_id.b.domain = pd24->port_id[0];
		fcport->d_id.b.area = pd24->port_id[1];
		fcport->d_id.b.al_pa = pd24->port_id[2];
		fcport->d_id.b.rsvd_1 = 0;

		/* If not target must be initiator or unknown type. */
		if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type = FCT_INITIATOR;
		else
			fcport->port_type = FCT_TARGET;
1793 1794 1795 1796 1797 1798 1799

		/* Passback COS information. */
		fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
				FC_COS_CLASS2 : FC_COS_CLASS3;

		if (pd24->prli_svc_param_word_3[0] & BIT_7)
			fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1800
	} else {
1801 1802
		uint64_t zero = 0;

1803 1804 1805
		/* Check for logged in state. */
		if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
		    pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1806 1807 1808 1809 1810
			ql_dbg(ql_dbg_mbx, vha, 0x100a,
			    "Unable to verify login-state (%x/%x) - "
			    "portid=%02x%02x%02x.\n", pd->master_state,
			    pd->slave_state, fcport->d_id.b.domain,
			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
1811 1812 1813
			rval = QLA_FUNCTION_FAILED;
			goto gpd_error_out;
		}
L
Linus Torvalds 已提交
1814

1815 1816 1817 1818 1819 1820 1821 1822
		if (fcport->loop_id == FC_NO_LOOP_ID ||
		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
		     memcmp(fcport->port_name, pd->port_name, 8))) {
			/* We lost the device mid way. */
			rval = QLA_NOT_LOGGED_IN;
			goto gpd_error_out;
		}

1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837
		/* Names are little-endian. */
		memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
		memcpy(fcport->port_name, pd->port_name, WWN_SIZE);

		/* Get port_id of device. */
		fcport->d_id.b.domain = pd->port_id[0];
		fcport->d_id.b.area = pd->port_id[3];
		fcport->d_id.b.al_pa = pd->port_id[2];
		fcport->d_id.b.rsvd_1 = 0;

		/* If not target must be initiator or unknown type. */
		if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type = FCT_INITIATOR;
		else
			fcport->port_type = FCT_TARGET;
1838 1839 1840 1841

		/* Passback COS information. */
		fcport->supported_classes = (pd->options & BIT_4) ?
		    FC_COS_CLASS2: FC_COS_CLASS3;
1842
	}
L
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1843 1844 1845 1846 1847

gpd_error_out:
	dma_pool_free(ha->s_dma_pool, pd, pd_dma);

	if (rval != QLA_SUCCESS) {
1848 1849 1850
		ql_dbg(ql_dbg_mbx, vha, 0x1052,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
		    mcp->mb[0], mcp->mb[1]);
L
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1851
	} else {
1852 1853
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
		    "Done %s.\n", __func__);
L
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1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875
	}

	return rval;
}

/*
 * qla2x00_get_firmware_state
 *	Get adapter firmware state.
 *
 * Input:
 *	ha = adapter block pointer.
 *	dptr = pointer for firmware state.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1876
qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
L
Linus Torvalds 已提交
1877 1878 1879 1880 1881
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1882 1883
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
1884 1885 1886

	mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
	mcp->out_mb = MBX_0;
1887
	if (IS_FWI2_CAPABLE(vha->hw))
1888
		mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1889 1890
	else
		mcp->in_mb = MBX_1|MBX_0;
1891
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1893
	rval = qla2x00_mailbox_command(vha, mcp);
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1895 1896
	/* Return firmware states. */
	states[0] = mcp->mb[1];
1897 1898
	if (IS_FWI2_CAPABLE(vha->hw)) {
		states[1] = mcp->mb[2];
1899
		states[2] = mcp->mb[3];  /* SFP info */
1900 1901
		states[3] = mcp->mb[4];
		states[4] = mcp->mb[5];
1902
		states[5] = mcp->mb[6];  /* DPORT status */
1903
	}
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1907
		ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
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	} else {
		/*EMPTY*/
1910 1911
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_get_port_name
 *	Issue get port name mailbox command.
 *	Returned name is in big endian format.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = loop ID of device.
 *	name = pointer for name.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1936
qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
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    uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1943 1944
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
	    "Entered %s.\n", __func__);
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1945 1946

	mcp->mb[0] = MBC_GET_PORT_NAME;
1947
	mcp->mb[9] = vha->vp_idx;
1948
	mcp->out_mb = MBX_9|MBX_1|MBX_0;
1949
	if (HAS_EXTENDED_IDS(vha->hw)) {
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		mcp->mb[1] = loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = loop_id << 8 | opt;
	}

	mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1958
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1960
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1964
		ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
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	} else {
		if (name != NULL) {
			/* This function returns name in big endian. */
1968 1969 1970 1971 1972 1973 1974 1975
			name[0] = MSB(mcp->mb[2]);
			name[1] = LSB(mcp->mb[2]);
			name[2] = MSB(mcp->mb[3]);
			name[3] = LSB(mcp->mb[3]);
			name[4] = MSB(mcp->mb[6]);
			name[5] = LSB(mcp->mb[6]);
			name[6] = MSB(mcp->mb[7]);
			name[7] = LSB(mcp->mb[7]);
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		}

1978 1979
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013
/*
 * qla24xx_link_initialization
 *	Issue link initialization mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_link_initialize(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
	    "Entered %s.\n", __func__);

	if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_LINK_INITIALIZATION;
2014 2015 2016 2017 2018
	mcp->mb[1] = BIT_4;
	if (vha->hw->operating_mode == LOOP)
		mcp->mb[1] |= BIT_6;
	else
		mcp->mb[1] |= BIT_5;
2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036
	mcp->mb[2] = 0;
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
		    "Done %s.\n", __func__);
	}

	return rval;
}

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/*
 * qla2x00_lip_reset
 *	Issue LIP reset mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2053
qla2x00_lip_reset(scsi_qla_host_t *vha)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2059 2060
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
	    "Entered %s.\n", __func__);
L
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2061

2062
	if (IS_CNA_CAPABLE(vha->hw)) {
2063 2064 2065 2066 2067 2068
		/* Logout across all FCFs. */
		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
		mcp->mb[1] = BIT_1;
		mcp->mb[2] = 0;
		mcp->out_mb = MBX_2|MBX_1|MBX_0;
	} else if (IS_FWI2_CAPABLE(vha->hw)) {
2069
		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2070 2071
		mcp->mb[1] = BIT_6;
		mcp->mb[2] = 0;
2072
		mcp->mb[3] = vha->hw->loop_reset_delay;
2073
		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
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2074
	} else {
2075 2076
		mcp->mb[0] = MBC_LIP_RESET;
		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2077
		if (HAS_EXTENDED_IDS(vha->hw)) {
2078 2079 2080 2081 2082 2083
			mcp->mb[1] = 0x00ff;
			mcp->mb[10] = 0;
			mcp->out_mb |= MBX_10;
		} else {
			mcp->mb[1] = 0xff00;
		}
2084
		mcp->mb[2] = vha->hw->loop_reset_delay;
2085
		mcp->mb[3] = 0;
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	}
	mcp->in_mb = MBX_0;
2088
	mcp->tov = MBX_TOV_SECONDS;
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2089
	mcp->flags = 0;
2090
	rval = qla2x00_mailbox_command(vha, mcp);
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2091 2092 2093

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2094
		ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
L
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2095 2096
	} else {
		/*EMPTY*/
2097 2098
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
		    "Done %s.\n", __func__);
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2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122
	}

	return rval;
}

/*
 * qla2x00_send_sns
 *	Send SNS command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	sns = pointer for command.
 *	cmd_size = command size.
 *	buf_size = response/command size.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2123
qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
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2124 2125 2126 2127 2128 2129
    uint16_t cmd_size, size_t buf_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2130 2131
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
	    "Entered %s.\n", __func__);
L
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2132

2133
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
2134 2135
	    "Retry cnt=%d ratov=%d total tov=%d.\n",
	    vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
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2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146

	mcp->mb[0] = MBC_SEND_SNS_COMMAND;
	mcp->mb[1] = cmd_size;
	mcp->mb[2] = MSW(sns_phys_address);
	mcp->mb[3] = LSW(sns_phys_address);
	mcp->mb[6] = MSW(MSD(sns_phys_address));
	mcp->mb[7] = LSW(MSD(sns_phys_address));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->buf_size = buf_size;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
2147 2148
	mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
	rval = qla2x00_mailbox_command(vha, mcp);
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2149 2150 2151

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2152 2153 2154
		ql_dbg(ql_dbg_mbx, vha, 0x105f,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
L
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2155 2156
	} else {
		/*EMPTY*/
2157 2158
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

2164
int
2165
qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2166 2167 2168 2169 2170 2171 2172
    uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
{
	int		rval;

	struct logio_entry_24xx *lg;
	dma_addr_t	lg_dma;
	uint32_t	iop[2];
2173
	struct qla_hw_data *ha = vha->hw;
2174
	struct req_que *req;
2175

2176 2177
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
	    "Entered %s.\n", __func__);
2178

2179 2180
	if (vha->vp_idx && vha->qpair)
		req = vha->qpair->req;
2181
	else
2182
		req = ha->req_q_map[0];
2183

2184 2185
	lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
	if (lg == NULL) {
2186 2187
		ql_log(ql_log_warn, vha, 0x1062,
		    "Failed to allocate login IOCB.\n");
2188 2189 2190 2191 2192 2193
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(lg, 0, sizeof(struct logio_entry_24xx));

	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
	lg->entry_count = 1;
2194
	lg->handle = MAKE_HANDLE(req->id, lg->handle);
2195
	lg->nport_handle = cpu_to_le16(loop_id);
2196
	lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
2197
	if (opt & BIT_0)
2198
		lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
2199
	if (opt & BIT_1)
2200
		lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
2201 2202 2203
	lg->port_id[0] = al_pa;
	lg->port_id[1] = area;
	lg->port_id[2] = domain;
2204
	lg->vp_index = vha->vp_idx;
2205 2206
	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
	    (ha->r_a_tov / 10 * 2) + 2);
2207
	if (rval != QLA_SUCCESS) {
2208 2209
		ql_dbg(ql_dbg_mbx, vha, 0x1063,
		    "Failed to issue login IOCB (%x).\n", rval);
2210
	} else if (lg->entry_status != 0) {
2211 2212 2213
		ql_dbg(ql_dbg_mbx, vha, 0x1064,
		    "Failed to complete IOCB -- error status (%x).\n",
		    lg->entry_status);
2214
		rval = QLA_FUNCTION_FAILED;
2215
	} else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2216 2217 2218
		iop[0] = le32_to_cpu(lg->io_parameter[0]);
		iop[1] = le32_to_cpu(lg->io_parameter[1]);

2219 2220 2221 2222
		ql_dbg(ql_dbg_mbx, vha, 0x1065,
		    "Failed to complete IOCB -- completion  status (%x) "
		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
		    iop[0], iop[1]);
2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249

		switch (iop[0]) {
		case LSC_SCODE_PORTID_USED:
			mb[0] = MBS_PORT_ID_USED;
			mb[1] = LSW(iop[1]);
			break;
		case LSC_SCODE_NPORT_USED:
			mb[0] = MBS_LOOP_ID_USED;
			break;
		case LSC_SCODE_NOLINK:
		case LSC_SCODE_NOIOCB:
		case LSC_SCODE_NOXCB:
		case LSC_SCODE_CMD_FAILED:
		case LSC_SCODE_NOFABRIC:
		case LSC_SCODE_FW_NOT_READY:
		case LSC_SCODE_NOT_LOGGED_IN:
		case LSC_SCODE_NOPCB:
		case LSC_SCODE_ELS_REJECT:
		case LSC_SCODE_CMD_PARAM_ERR:
		case LSC_SCODE_NONPORT:
		case LSC_SCODE_LOGGED_IN:
		case LSC_SCODE_NOFLOGI_ACC:
		default:
			mb[0] = MBS_COMMAND_ERROR;
			break;
		}
	} else {
2250 2251
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
		    "Done %s.\n", __func__);
2252 2253 2254 2255 2256 2257 2258 2259 2260 2261

		iop[0] = le32_to_cpu(lg->io_parameter[0]);

		mb[0] = MBS_COMMAND_COMPLETE;
		mb[1] = 0;
		if (iop[0] & BIT_4) {
			if (iop[0] & BIT_8)
				mb[1] |= BIT_1;
		} else
			mb[1] = BIT_0;
2262 2263 2264 2265 2266 2267 2268

		/* Passback COS information. */
		mb[10] = 0;
		if (lg->io_parameter[7] || lg->io_parameter[8])
			mb[10] |= BIT_0;	/* Class 2. */
		if (lg->io_parameter[9] || lg->io_parameter[10])
			mb[10] |= BIT_1;	/* Class 3. */
2269
		if (lg->io_parameter[0] & cpu_to_le32(BIT_7))
2270 2271 2272
			mb[10] |= BIT_7;	/* Confirmed Completion
						 * Allowed
						 */
2273 2274 2275 2276 2277 2278 2279
	}

	dma_pool_free(ha->s_dma_pool, lg, lg_dma);

	return rval;
}

L
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2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301
/*
 * qla2x00_login_fabric
 *	Issue login fabric port mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	domain = device domain.
 *	area = device area.
 *	al_pa = device AL_PA.
 *	status = pointer for return status.
 *	opt = command options.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2302
qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
L
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2303 2304 2305 2306 2307
    uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2308
	struct qla_hw_data *ha = vha->hw;
L
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2309

2310 2311
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
	    "Entered %s.\n", __func__);
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2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327

	mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = (loop_id << 8) | opt;
	}
	mcp->mb[2] = domain;
	mcp->mb[3] = area << 8 | al_pa;

	mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
	mcp->flags = 0;
2328
	rval = qla2x00_mailbox_command(vha, mcp);
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2329 2330 2331 2332 2333 2334 2335 2336

	/* Return mailbox statuses. */
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[2] = mcp->mb[2];
		mb[6] = mcp->mb[6];
		mb[7] = mcp->mb[7];
2337 2338
		/* COS retrieved from Get-Port-Database mailbox command. */
		mb[10] = 0;
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	}

	if (rval != QLA_SUCCESS) {
		/* RLU tmp code: need to change main mailbox_command function to
		 * return ok even when the mailbox completion value is not
		 * SUCCESS. The caller needs to be responsible to interpret
		 * the return values of this mailbox command if we're not
		 * to change too much of the existing code.
		 */
		if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
		    mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
		    mcp->mb[0] == 0x4006)
			rval = QLA_SUCCESS;

		/*EMPTY*/
2354 2355 2356
		ql_dbg(ql_dbg_mbx, vha, 0x1068,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
L
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2357 2358
	} else {
		/*EMPTY*/
2359 2360
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_login_local_device
 *           Issue login loop port mailbox command.
A
Andrew Vasquez 已提交
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 *
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2370 2371 2372 2373
 * Input:
 *           ha = adapter block pointer.
 *           loop_id = device loop ID.
 *           opt = command options.
A
Andrew Vasquez 已提交
2374
 *
L
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2375 2376
 * Returns:
 *            Return status code.
A
Andrew Vasquez 已提交
2377
 *
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2378 2379
 * Context:
 *            Kernel context.
A
Andrew Vasquez 已提交
2380
 *
L
Linus Torvalds 已提交
2381 2382
 */
int
2383
qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
L
Linus Torvalds 已提交
2384 2385 2386 2387 2388
    uint16_t *mb_ret, uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2389
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2390

2391 2392
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
	    "Entered %s.\n", __func__);
2393

2394
	if (IS_FWI2_CAPABLE(ha))
2395
		return qla24xx_login_fabric(vha, fcport->loop_id,
2396 2397 2398
		    fcport->d_id.b.domain, fcport->d_id.b.area,
		    fcport->d_id.b.al_pa, mb_ret, opt);

L
Linus Torvalds 已提交
2399 2400
	mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
	if (HAS_EXTENDED_IDS(ha))
2401
		mcp->mb[1] = fcport->loop_id;
L
Linus Torvalds 已提交
2402
	else
2403
		mcp->mb[1] = fcport->loop_id << 8;
L
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2404 2405 2406 2407 2408
	mcp->mb[2] = opt;
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
 	mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
	mcp->flags = 0;
2409
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428

 	/* Return mailbox statuses. */
 	if (mb_ret != NULL) {
 		mb_ret[0] = mcp->mb[0];
 		mb_ret[1] = mcp->mb[1];
 		mb_ret[6] = mcp->mb[6];
 		mb_ret[7] = mcp->mb[7];
 	}

	if (rval != QLA_SUCCESS) {
 		/* AV tmp code: need to change main mailbox_command function to
 		 * return ok even when the mailbox completion value is not
 		 * SUCCESS. The caller needs to be responsible to interpret
 		 * the return values of this mailbox command if we're not
 		 * to change too much of the existing code.
 		 */
 		if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
 			rval = QLA_SUCCESS;

2429 2430 2431
		ql_dbg(ql_dbg_mbx, vha, 0x106b,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
L
Linus Torvalds 已提交
2432 2433
	} else {
		/*EMPTY*/
2434 2435
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2436 2437 2438 2439 2440
	}

	return (rval);
}

2441
int
2442
qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2443 2444 2445 2446 2447
    uint8_t area, uint8_t al_pa)
{
	int		rval;
	struct logio_entry_24xx *lg;
	dma_addr_t	lg_dma;
2448
	struct qla_hw_data *ha = vha->hw;
2449
	struct req_que *req;
2450

2451 2452
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
	    "Entered %s.\n", __func__);
2453 2454 2455

	lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
	if (lg == NULL) {
2456 2457
		ql_log(ql_log_warn, vha, 0x106e,
		    "Failed to allocate logout IOCB.\n");
2458 2459 2460 2461
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(lg, 0, sizeof(struct logio_entry_24xx));

2462
	req = vha->req;
2463 2464
	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
	lg->entry_count = 1;
2465
	lg->handle = MAKE_HANDLE(req->id, lg->handle);
2466 2467
	lg->nport_handle = cpu_to_le16(loop_id);
	lg->control_flags =
2468
	    cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2469
		LCF_FREE_NPORT);
2470 2471 2472
	lg->port_id[0] = al_pa;
	lg->port_id[1] = area;
	lg->port_id[2] = domain;
2473
	lg->vp_index = vha->vp_idx;
2474 2475
	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
	    (ha->r_a_tov / 10 * 2) + 2);
2476
	if (rval != QLA_SUCCESS) {
2477 2478
		ql_dbg(ql_dbg_mbx, vha, 0x106f,
		    "Failed to issue logout IOCB (%x).\n", rval);
2479
	} else if (lg->entry_status != 0) {
2480 2481 2482
		ql_dbg(ql_dbg_mbx, vha, 0x1070,
		    "Failed to complete IOCB -- error status (%x).\n",
		    lg->entry_status);
2483
		rval = QLA_FUNCTION_FAILED;
2484
	} else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2485 2486 2487
		ql_dbg(ql_dbg_mbx, vha, 0x1071,
		    "Failed to complete IOCB -- completion status (%x) "
		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2488
		    le32_to_cpu(lg->io_parameter[0]),
2489
		    le32_to_cpu(lg->io_parameter[1]));
2490 2491
	} else {
		/*EMPTY*/
2492 2493
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
		    "Done %s.\n", __func__);
2494 2495 2496 2497 2498 2499 2500
	}

	dma_pool_free(ha->s_dma_pool, lg, lg_dma);

	return rval;
}

L
Linus Torvalds 已提交
2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517
/*
 * qla2x00_fabric_logout
 *	Issue logout fabric port mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2518
qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2519
    uint8_t area, uint8_t al_pa)
L
Linus Torvalds 已提交
2520 2521 2522 2523 2524
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2525 2526
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2527 2528 2529

	mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
	mcp->out_mb = MBX_1|MBX_0;
2530
	if (HAS_EXTENDED_IDS(vha->hw)) {
L
Linus Torvalds 已提交
2531 2532 2533 2534 2535 2536 2537 2538
		mcp->mb[1] = loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = loop_id << 8;
	}

	mcp->in_mb = MBX_1|MBX_0;
2539
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2540
	mcp->flags = 0;
2541
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2542 2543 2544

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2545 2546
		ql_dbg(ql_dbg_mbx, vha, 0x1074,
		    "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
L
Linus Torvalds 已提交
2547 2548
	} else {
		/*EMPTY*/
2549 2550
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571
	}

	return rval;
}

/*
 * qla2x00_full_login_lip
 *	Issue full login LIP mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2572
qla2x00_full_login_lip(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
2573 2574 2575 2576 2577
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2578 2579
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2580 2581

	mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2582
	mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2583
	mcp->mb[2] = 0;
L
Linus Torvalds 已提交
2584 2585 2586
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
2587
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2588
	mcp->flags = 0;
2589
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2590 2591 2592

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2593
		ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2594 2595
	} else {
		/*EMPTY*/
2596 2597
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615
	}

	return rval;
}

/*
 * qla2x00_get_id_list
 *
 * Input:
 *	ha = adapter block pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2616
qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
L
Linus Torvalds 已提交
2617 2618 2619 2620 2621 2622
    uint16_t *entries)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2623 2624
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2625 2626 2627 2628 2629

	if (id_list == NULL)
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_ID_LIST;
2630
	mcp->out_mb = MBX_0;
2631
	if (IS_FWI2_CAPABLE(vha->hw)) {
2632 2633 2634 2635
		mcp->mb[2] = MSW(id_list_dma);
		mcp->mb[3] = LSW(id_list_dma);
		mcp->mb[6] = MSW(MSD(id_list_dma));
		mcp->mb[7] = LSW(MSD(id_list_dma));
2636
		mcp->mb[8] = 0;
2637
		mcp->mb[9] = vha->vp_idx;
2638
		mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2639 2640 2641 2642 2643 2644 2645
	} else {
		mcp->mb[1] = MSW(id_list_dma);
		mcp->mb[2] = LSW(id_list_dma);
		mcp->mb[3] = MSW(MSD(id_list_dma));
		mcp->mb[6] = LSW(MSD(id_list_dma));
		mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
	}
L
Linus Torvalds 已提交
2646
	mcp->in_mb = MBX_1|MBX_0;
2647
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2648
	mcp->flags = 0;
2649
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2650 2651 2652

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2653
		ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2654 2655
	} else {
		*entries = mcp->mb[1];
2656 2657
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675 2676
	}

	return rval;
}

/*
 * qla2x00_get_resource_cnts
 *	Get current firmware resource counts.
 *
 * Input:
 *	ha = adapter block pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2677
qla2x00_get_resource_cnts(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
2678
{
2679
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2680 2681 2682 2683
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2684 2685
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2686 2687 2688

	mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
	mcp->out_mb = MBX_0;
2689
	mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2690
	if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw))
2691
		mcp->in_mb |= MBX_12;
2692
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2693
	mcp->flags = 0;
2694
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2695 2696 2697

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2698 2699
		ql_dbg(ql_dbg_mbx, vha, 0x107d,
		    "Failed mb[0]=%x.\n", mcp->mb[0]);
L
Linus Torvalds 已提交
2700
	} else {
2701
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2702 2703 2704 2705
		    "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
		    "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
		    mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
		    mcp->mb[11], mcp->mb[12]);
L
Linus Torvalds 已提交
2706

2707 2708 2709 2710 2711 2712 2713 2714 2715 2716
		ha->orig_fw_tgt_xcb_count =  mcp->mb[1];
		ha->cur_fw_tgt_xcb_count = mcp->mb[2];
		ha->cur_fw_xcb_count = mcp->mb[3];
		ha->orig_fw_xcb_count = mcp->mb[6];
		ha->cur_fw_iocb_count = mcp->mb[7];
		ha->orig_fw_iocb_count = mcp->mb[10];
		if (ha->flags.npiv_supported)
			ha->max_npiv_vports = mcp->mb[11];
		if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
			ha->fw_max_fcf_count = mcp->mb[12];
L
Linus Torvalds 已提交
2717 2718 2719 2720 2721 2722 2723 2724 2725 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736
	}

	return (rval);
}

/*
 * qla2x00_get_fcal_position_map
 *	Get FCAL (LILP) position map using mailbox command
 *
 * Input:
 *	ha = adapter state pointer.
 *	pos_map = buffer pointer (can be NULL).
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2737
qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
L
Linus Torvalds 已提交
2738 2739 2740 2741 2742 2743
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	char *pmap;
	dma_addr_t pmap_dma;
2744
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2745

2746 2747
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
	    "Entered %s.\n", __func__);
2748

2749
	pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
L
Linus Torvalds 已提交
2750
	if (pmap  == NULL) {
2751 2752
		ql_log(ql_log_warn, vha, 0x1080,
		    "Memory alloc failed.\n");
L
Linus Torvalds 已提交
2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(pmap, 0, FCAL_MAP_SIZE);

	mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
	mcp->mb[2] = MSW(pmap_dma);
	mcp->mb[3] = LSW(pmap_dma);
	mcp->mb[6] = MSW(MSD(pmap_dma));
	mcp->mb[7] = LSW(MSD(pmap_dma));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->buf_size = FCAL_MAP_SIZE;
	mcp->flags = MBX_DMA_IN;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2767
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2768 2769

	if (rval == QLA_SUCCESS) {
2770
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2771 2772 2773 2774
		    "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
		    mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
		    pmap, pmap[0] + 1);
L
Linus Torvalds 已提交
2775 2776 2777 2778 2779 2780 2781

		if (pos_map)
			memcpy(pos_map, pmap, FCAL_MAP_SIZE);
	}
	dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);

	if (rval != QLA_SUCCESS) {
2782
		ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2783
	} else {
2784 2785
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2786 2787 2788 2789
	}

	return rval;
}
2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804

/*
 * qla2x00_get_link_status
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	ret_buf = pointer to link status return buffer.
 *
 * Returns:
 *	0 = success.
 *	BIT_0 = mem alloc error.
 *	BIT_1 = mailbox error.
 */
int
2805
qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2806
    struct link_statistics *stats, dma_addr_t stats_dma)
2807 2808 2809 2810
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2811 2812
	uint32_t *iter = (void *)stats;
	ushort dwords = offsetof(typeof(*stats), link_up_cnt)/sizeof(*iter);
2813
	struct qla_hw_data *ha = vha->hw;
2814

2815 2816
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
	    "Entered %s.\n", __func__);
2817 2818

	mcp->mb[0] = MBC_GET_LINK_STATUS;
2819 2820
	mcp->mb[2] = MSW(LSD(stats_dma));
	mcp->mb[3] = LSW(LSD(stats_dma));
2821 2822
	mcp->mb[6] = MSW(MSD(stats_dma));
	mcp->mb[7] = LSW(MSD(stats_dma));
2823 2824
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_0;
2825
	if (IS_FWI2_CAPABLE(ha)) {
2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838
		mcp->mb[1] = loop_id;
		mcp->mb[4] = 0;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10|MBX_4|MBX_1;
		mcp->in_mb |= MBX_1;
	} else if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10|MBX_1;
	} else {
		mcp->mb[1] = loop_id << 8;
		mcp->out_mb |= MBX_1;
	}
2839
	mcp->tov = MBX_TOV_SECONDS;
2840
	mcp->flags = IOCTL_CMD;
2841
	rval = qla2x00_mailbox_command(vha, mcp);
2842 2843 2844

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2845 2846
			ql_dbg(ql_dbg_mbx, vha, 0x1085,
			    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2847
			rval = QLA_FUNCTION_FAILED;
2848
		} else {
2849
			/* Re-endianize - firmware data is le32. */
2850 2851
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
			    "Done %s.\n", __func__);
2852 2853
			for ( ; dwords--; iter++)
				le32_to_cpus(iter);
2854 2855 2856
		}
	} else {
		/* Failed. */
2857
		ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2858 2859 2860 2861 2862 2863
	}

	return rval;
}

int
2864
qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2865
    dma_addr_t stats_dma, uint16_t options)
2866 2867 2868 2869
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2870
	uint32_t *iter, dwords;
2871

2872 2873
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
	    "Entered %s.\n", __func__);
2874

2875 2876 2877 2878 2879 2880 2881 2882 2883 2884 2885
	memset(&mc, 0, sizeof(mc));
	mc.mb[0] = MBC_GET_LINK_PRIV_STATS;
	mc.mb[2] = MSW(stats_dma);
	mc.mb[3] = LSW(stats_dma);
	mc.mb[6] = MSW(MSD(stats_dma));
	mc.mb[7] = LSW(MSD(stats_dma));
	mc.mb[8] = sizeof(struct link_statistics) / 4;
	mc.mb[9] = cpu_to_le16(vha->vp_idx);
	mc.mb[10] = cpu_to_le16(options);

	rval = qla24xx_send_mb_cmd(vha, &mc);
2886 2887 2888

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2889 2890
			ql_dbg(ql_dbg_mbx, vha, 0x1089,
			    "Failed mb[0]=%x.\n", mcp->mb[0]);
2891
			rval = QLA_FUNCTION_FAILED;
2892
		} else {
2893 2894
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
			    "Done %s.\n", __func__);
2895
			/* Re-endianize - firmware data is le32. */
2896
			dwords = sizeof(struct link_statistics) / 4;
2897 2898 2899
			iter = &stats->link_fail_cnt;
			for ( ; dwords--; iter++)
				le32_to_cpus(iter);
2900 2901 2902
		}
	} else {
		/* Failed. */
2903
		ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2904 2905 2906 2907 2908 2909
	}

	return rval;
}

int
2910
qla24xx_abort_command(srb_t *sp)
2911 2912 2913 2914 2915 2916 2917
{
	int		rval;
	unsigned long   flags = 0;

	struct abort_entry_24xx *abt;
	dma_addr_t	abt_dma;
	uint32_t	handle;
2918 2919
	fc_port_t	*fcport = sp->fcport;
	struct scsi_qla_host *vha = fcport->vha;
2920
	struct qla_hw_data *ha = vha->hw;
2921
	struct req_que *req = vha->req;
2922

2923 2924
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
	    "Entered %s.\n", __func__);
2925

2926 2927 2928
	if (vha->flags.qpairs_available && sp->qpair)
		req = sp->qpair->req;

2929 2930 2931
	if (ql2xasynctmfenable)
		return qla24xx_async_abort_command(sp);

2932
	spin_lock_irqsave(&ha->hardware_lock, flags);
2933
	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2934
		if (req->outstanding_cmds[handle] == sp)
2935 2936
			break;
	}
2937
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2938
	if (handle == req->num_outstanding_cmds) {
2939 2940 2941 2942 2943 2944
		/* Command not found. */
		return QLA_FUNCTION_FAILED;
	}

	abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
	if (abt == NULL) {
2945 2946
		ql_log(ql_log_warn, vha, 0x108d,
		    "Failed to allocate abort IOCB.\n");
2947 2948 2949 2950 2951 2952
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(abt, 0, sizeof(struct abort_entry_24xx));

	abt->entry_type = ABORT_IOCB_TYPE;
	abt->entry_count = 1;
2953
	abt->handle = MAKE_HANDLE(req->id, abt->handle);
2954
	abt->nport_handle = cpu_to_le16(fcport->loop_id);
2955
	abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2956 2957 2958
	abt->port_id[0] = fcport->d_id.b.al_pa;
	abt->port_id[1] = fcport->d_id.b.area;
	abt->port_id[2] = fcport->d_id.b.domain;
2959
	abt->vp_index = fcport->vha->vp_idx;
2960 2961 2962

	abt->req_que_no = cpu_to_le16(req->id);

2963
	rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2964
	if (rval != QLA_SUCCESS) {
2965 2966
		ql_dbg(ql_dbg_mbx, vha, 0x108e,
		    "Failed to issue IOCB (%x).\n", rval);
2967
	} else if (abt->entry_status != 0) {
2968 2969 2970
		ql_dbg(ql_dbg_mbx, vha, 0x108f,
		    "Failed to complete IOCB -- error status (%x).\n",
		    abt->entry_status);
2971
		rval = QLA_FUNCTION_FAILED;
2972
	} else if (abt->nport_handle != cpu_to_le16(0)) {
2973 2974 2975
		ql_dbg(ql_dbg_mbx, vha, 0x1090,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(abt->nport_handle));
2976 2977 2978 2979
		if (abt->nport_handle == CS_IOCB_ERROR)
			rval = QLA_FUNCTION_PARAMETER_ERROR;
		else
			rval = QLA_FUNCTION_FAILED;
2980
	} else {
2981 2982
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
		    "Done %s.\n", __func__);
2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996
	}

	dma_pool_free(ha->s_dma_pool, abt, abt_dma);

	return rval;
}

struct tsk_mgmt_cmd {
	union {
		struct tsk_mgmt_entry tsk;
		struct sts_entry_24xx sts;
	} p;
};

2997 2998
static int
__qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
H
Hannes Reinecke 已提交
2999
    uint64_t l, int tag)
3000
{
3001
	int		rval, rval2;
3002
	struct tsk_mgmt_cmd *tsk;
3003
	struct sts_entry_24xx *sts;
3004
	dma_addr_t	tsk_dma;
3005 3006
	scsi_qla_host_t *vha;
	struct qla_hw_data *ha;
3007 3008
	struct req_que *req;
	struct rsp_que *rsp;
3009
	struct qla_qpair *qpair;
3010

3011 3012
	vha = fcport->vha;
	ha = vha->hw;
3013
	req = vha->req;
3014

3015 3016
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
	    "Entered %s.\n", __func__);
3017

3018 3019 3020 3021 3022 3023
	if (vha->vp_idx && vha->qpair) {
		/* NPIV port */
		qpair = vha->qpair;
		rsp = qpair->rsp;
		req = qpair->req;
	} else {
3024
		rsp = req->rsp;
3025 3026
	}

3027
	tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
3028
	if (tsk == NULL) {
3029 3030
		ql_log(ql_log_warn, vha, 0x1093,
		    "Failed to allocate task management IOCB.\n");
3031 3032 3033 3034 3035 3036
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));

	tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
	tsk->p.tsk.entry_count = 1;
3037
	tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
3038
	tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
3039
	tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
3040
	tsk->p.tsk.control_flags = cpu_to_le32(type);
3041 3042 3043
	tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
	tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
	tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
3044
	tsk->p.tsk.vp_index = fcport->vha->vp_idx;
3045 3046 3047 3048 3049
	if (type == TCF_LUN_RESET) {
		int_to_scsilun(l, &tsk->p.tsk.lun);
		host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
		    sizeof(tsk->p.tsk.lun));
	}
3050

3051
	sts = &tsk->p.sts;
3052
	rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
3053
	if (rval != QLA_SUCCESS) {
3054 3055
		ql_dbg(ql_dbg_mbx, vha, 0x1094,
		    "Failed to issue %s reset IOCB (%x).\n", name, rval);
3056
	} else if (sts->entry_status != 0) {
3057 3058 3059
		ql_dbg(ql_dbg_mbx, vha, 0x1095,
		    "Failed to complete IOCB -- error status (%x).\n",
		    sts->entry_status);
3060
		rval = QLA_FUNCTION_FAILED;
3061
	} else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
3062 3063 3064
		ql_dbg(ql_dbg_mbx, vha, 0x1096,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(sts->comp_status));
3065
		rval = QLA_FUNCTION_FAILED;
3066 3067 3068
	} else if (le16_to_cpu(sts->scsi_status) &
	    SS_RESPONSE_INFO_LEN_VALID) {
		if (le32_to_cpu(sts->rsp_data_len) < 4) {
3069
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
3070 3071 3072
			    "Ignoring inconsistent data length -- not enough "
			    "response info (%d).\n",
			    le32_to_cpu(sts->rsp_data_len));
3073
		} else if (sts->data[3]) {
3074 3075 3076
			ql_dbg(ql_dbg_mbx, vha, 0x1098,
			    "Failed to complete IOCB -- response (%x).\n",
			    sts->data[3]);
3077 3078
			rval = QLA_FUNCTION_FAILED;
		}
3079 3080 3081
	}

	/* Issue marker IOCB. */
3082
	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
3083 3084
	    type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
	if (rval2 != QLA_SUCCESS) {
3085 3086
		ql_dbg(ql_dbg_mbx, vha, 0x1099,
		    "Failed to issue marker IOCB (%x).\n", rval2);
3087
	} else {
3088 3089
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
		    "Done %s.\n", __func__);
3090 3091
	}

3092
	dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
3093 3094 3095 3096

	return rval;
}

3097
int
H
Hannes Reinecke 已提交
3098
qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
3099
{
3100 3101 3102 3103 3104
	struct qla_hw_data *ha = fcport->vha->hw;

	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
		return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);

3105
	return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
3106 3107 3108
}

int
H
Hannes Reinecke 已提交
3109
qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
3110
{
3111 3112 3113 3114 3115
	struct qla_hw_data *ha = fcport->vha->hw;

	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
		return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);

3116
	return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
3117 3118
}

3119
int
3120
qla2x00_system_error(scsi_qla_host_t *vha)
3121 3122 3123 3124
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
3125
	struct qla_hw_data *ha = vha->hw;
3126

3127
	if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
3128 3129
		return QLA_FUNCTION_FAILED;

3130 3131
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
	    "Entered %s.\n", __func__);
3132 3133 3134 3135 3136 3137

	mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 5;
	mcp->flags = 0;
3138
	rval = qla2x00_mailbox_command(vha, mcp);
3139 3140

	if (rval != QLA_SUCCESS) {
3141
		ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
3142
	} else {
3143 3144
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
		    "Done %s.\n", __func__);
3145 3146 3147 3148 3149
	}

	return rval;
}

3150 3151 3152 3153 3154 3155 3156
int
qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3157 3158
	if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
	    !IS_QLA27XX(vha->hw))
3159 3160 3161 3162 3163 3164 3165
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_WRITE_SERDES;
	mcp->mb[1] = addr;
3166 3167 3168 3169 3170
	if (IS_QLA2031(vha->hw))
		mcp->mb[2] = data & 0xff;
	else
		mcp->mb[2] = data;

3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1183,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
		    "Done %s.\n", __func__);
	}

	return rval;
}

int
qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3196 3197
	if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
	    !IS_QLA27XX(vha->hw))
3198 3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_READ_SERDES;
	mcp->mb[1] = addr;
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

3212 3213 3214 3215
	if (IS_QLA2031(vha->hw))
		*data = mcp->mb[1] & 0xff;
	else
		*data = mcp->mb[1];
3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1186,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
		    "Done %s.\n", __func__);
	}

	return rval;
}

3228 3229 3230 3231 3232 3233 3234 3235 3236 3237
int
qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA8044(vha->hw))
		return QLA_FUNCTION_FAILED;

3238
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x11a0,
3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
	mcp->mb[1] = HCS_WRITE_SERDES;
	mcp->mb[3] = LSW(addr);
	mcp->mb[4] = MSW(addr);
	mcp->mb[5] = LSW(data);
	mcp->mb[6] = MSW(data);
	mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3254
		ql_dbg(ql_dbg_mbx, vha, 0x11a1,
3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
		    "Done %s.\n", __func__);
	}

	return rval;
}

int
qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA8044(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
	mcp->mb[1] = HCS_READ_SERDES;
	mcp->mb[3] = LSW(addr);
	mcp->mb[4] = MSW(addr);
	mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	*data = mcp->mb[2] << 16 | mcp->mb[1];

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x118a,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
		    "Done %s.\n", __func__);
	}

	return rval;
}

3300 3301 3302 3303 3304 3305 3306
/**
 * qla2x00_set_serdes_params() -
 * @ha: HA context
 *
 * Returns
 */
int
3307
qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
3308 3309 3310 3311 3312 3313
    uint16_t sw_em_2g, uint16_t sw_em_4g)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3314 3315
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
	    "Entered %s.\n", __func__);
3316 3317 3318

	mcp->mb[0] = MBC_SERDES_PARAMS;
	mcp->mb[1] = BIT_0;
3319 3320 3321
	mcp->mb[2] = sw_em_1g | BIT_15;
	mcp->mb[3] = sw_em_2g | BIT_15;
	mcp->mb[4] = sw_em_4g | BIT_15;
3322 3323
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
3324
	mcp->tov = MBX_TOV_SECONDS;
3325
	mcp->flags = 0;
3326
	rval = qla2x00_mailbox_command(vha, mcp);
3327 3328 3329

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
3330 3331
		ql_dbg(ql_dbg_mbx, vha, 0x109f,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3332 3333
	} else {
		/*EMPTY*/
3334 3335
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
		    "Done %s.\n", __func__);
3336 3337 3338 3339
	}

	return rval;
}
3340 3341

int
3342
qla2x00_stop_firmware(scsi_qla_host_t *vha)
3343 3344 3345 3346 3347
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3348
	if (!IS_FWI2_CAPABLE(vha->hw))
3349 3350
		return QLA_FUNCTION_FAILED;

3351 3352
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
	    "Entered %s.\n", __func__);
3353 3354

	mcp->mb[0] = MBC_STOP_FIRMWARE;
3355 3356
	mcp->mb[1] = 0;
	mcp->out_mb = MBX_1|MBX_0;
3357 3358 3359
	mcp->in_mb = MBX_0;
	mcp->tov = 5;
	mcp->flags = 0;
3360
	rval = qla2x00_mailbox_command(vha, mcp);
3361 3362

	if (rval != QLA_SUCCESS) {
3363
		ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3364 3365
		if (mcp->mb[0] == MBS_INVALID_COMMAND)
			rval = QLA_INVALID_COMMAND;
3366
	} else {
3367 3368
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
		    "Done %s.\n", __func__);
3369 3370 3371 3372
	}

	return rval;
}
3373 3374

int
3375
qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3376 3377 3378 3379 3380 3381
    uint16_t buffers)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3382 3383
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
	    "Entered %s.\n", __func__);
3384

3385
	if (!IS_FWI2_CAPABLE(vha->hw))
3386 3387
		return QLA_FUNCTION_FAILED;

3388 3389 3390
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3391
	mcp->mb[0] = MBC_TRACE_CONTROL;
3392 3393 3394 3395 3396 3397 3398 3399
	mcp->mb[1] = TC_EFT_ENABLE;
	mcp->mb[2] = LSW(eft_dma);
	mcp->mb[3] = MSW(eft_dma);
	mcp->mb[4] = LSW(MSD(eft_dma));
	mcp->mb[5] = MSW(MSD(eft_dma));
	mcp->mb[6] = buffers;
	mcp->mb[7] = TC_AEN_DISABLE;
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3400
	mcp->in_mb = MBX_1|MBX_0;
3401
	mcp->tov = MBX_TOV_SECONDS;
3402
	mcp->flags = 0;
3403
	rval = qla2x00_mailbox_command(vha, mcp);
3404
	if (rval != QLA_SUCCESS) {
3405 3406 3407
		ql_dbg(ql_dbg_mbx, vha, 0x10a5,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3408
	} else {
3409 3410
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
		    "Done %s.\n", __func__);
3411 3412 3413 3414
	}

	return rval;
}
3415

3416
int
3417
qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3418 3419 3420 3421 3422
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3423 3424
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
	    "Entered %s.\n", __func__);
3425

3426
	if (!IS_FWI2_CAPABLE(vha->hw))
3427 3428
		return QLA_FUNCTION_FAILED;

3429 3430 3431
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3432 3433 3434 3435
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_EFT_DISABLE;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
3436
	mcp->tov = MBX_TOV_SECONDS;
3437
	mcp->flags = 0;
3438
	rval = qla2x00_mailbox_command(vha, mcp);
3439
	if (rval != QLA_SUCCESS) {
3440 3441 3442
		ql_dbg(ql_dbg_mbx, vha, 0x10a8,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3443
	} else {
3444 3445
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
		    "Done %s.\n", __func__);
3446 3447 3448 3449 3450
	}

	return rval;
}

3451
int
3452
qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3453 3454 3455 3456 3457 3458
    uint16_t buffers, uint16_t *mb, uint32_t *dwords)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3459 3460
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
	    "Entered %s.\n", __func__);
3461

3462
	if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3463
	    !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
3464 3465
		return QLA_FUNCTION_FAILED;

3466 3467 3468
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_FCE_ENABLE;
	mcp->mb[2] = LSW(fce_dma);
	mcp->mb[3] = MSW(fce_dma);
	mcp->mb[4] = LSW(MSD(fce_dma));
	mcp->mb[5] = MSW(MSD(fce_dma));
	mcp->mb[6] = buffers;
	mcp->mb[7] = TC_AEN_DISABLE;
	mcp->mb[8] = 0;
	mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
	mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
	    MBX_1|MBX_0;
	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3483
	mcp->tov = MBX_TOV_SECONDS;
3484
	mcp->flags = 0;
3485
	rval = qla2x00_mailbox_command(vha, mcp);
3486
	if (rval != QLA_SUCCESS) {
3487 3488 3489
		ql_dbg(ql_dbg_mbx, vha, 0x10ab,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3490
	} else {
3491 3492
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
		    "Done %s.\n", __func__);
3493 3494 3495 3496

		if (mb)
			memcpy(mb, mcp->mb, 8 * sizeof(*mb));
		if (dwords)
3497
			*dwords = buffers;
3498 3499 3500 3501 3502 3503
	}

	return rval;
}

int
3504
qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3505 3506 3507 3508 3509
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3510 3511
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
	    "Entered %s.\n", __func__);
3512

3513
	if (!IS_FWI2_CAPABLE(vha->hw))
3514 3515
		return QLA_FUNCTION_FAILED;

3516 3517 3518
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3519 3520 3521 3522 3523 3524
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_FCE_DISABLE;
	mcp->mb[2] = TC_FCE_DISABLE_TRACE;
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
	    MBX_1|MBX_0;
3525
	mcp->tov = MBX_TOV_SECONDS;
3526
	mcp->flags = 0;
3527
	rval = qla2x00_mailbox_command(vha, mcp);
3528
	if (rval != QLA_SUCCESS) {
3529 3530 3531
		ql_dbg(ql_dbg_mbx, vha, 0x10ae,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3532
	} else {
3533 3534
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
		    "Done %s.\n", __func__);
3535 3536 3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550

		if (wr)
			*wr = (uint64_t) mcp->mb[5] << 48 |
			    (uint64_t) mcp->mb[4] << 32 |
			    (uint64_t) mcp->mb[3] << 16 |
			    (uint64_t) mcp->mb[2];
		if (rd)
			*rd = (uint64_t) mcp->mb[9] << 48 |
			    (uint64_t) mcp->mb[8] << 32 |
			    (uint64_t) mcp->mb[7] << 16 |
			    (uint64_t) mcp->mb[6];
	}

	return rval;
}

3551 3552 3553 3554 3555 3556 3557 3558
int
qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
	uint16_t *port_speed, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3559 3560
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
	    "Entered %s.\n", __func__);
3561

3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581 3582
	if (!IS_IIDMA_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	mcp->mb[2] = mcp->mb[3] = 0;
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	/* Return mailbox statuses. */
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
	}

	if (rval != QLA_SUCCESS) {
3583
		ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3584
	} else {
3585 3586
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
		    "Done %s.\n", __func__);
3587 3588 3589 3590 3591 3592 3593
		if (port_speed)
			*port_speed = mcp->mb[3];
	}

	return rval;
}

3594
int
3595
qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3596 3597 3598 3599 3600 3601
    uint16_t port_speed, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3602 3603
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
	    "Entered %s.\n", __func__);
3604

3605
	if (!IS_IIDMA_CAPABLE(vha->hw))
3606 3607 3608 3609 3610
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	mcp->mb[2] = BIT_0;
3611
	if (IS_CNA_CAPABLE(vha->hw))
3612 3613 3614 3615 3616 3617
		mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
	else
		mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_1|MBX_0;
3618
	mcp->tov = MBX_TOV_SECONDS;
3619
	mcp->flags = 0;
3620
	rval = qla2x00_mailbox_command(vha, mcp);
3621 3622 3623 3624 3625 3626 3627 3628 3629

	/* Return mailbox statuses. */
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
	}

	if (rval != QLA_SUCCESS) {
3630 3631
		ql_dbg(ql_dbg_mbx, vha, 0x10b4,
		    "Failed=%x.\n", rval);
3632
	} else {
3633 3634
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
		    "Done %s.\n", __func__);
3635 3636 3637 3638
	}

	return rval;
}
3639 3640

void
3641
qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3642 3643
	struct vp_rpt_id_entry_24xx *rptid_entry)
{
3644
	struct qla_hw_data *ha = vha->hw;
3645
	scsi_qla_host_t *vp = NULL;
3646
	unsigned long   flags;
3647
	int found;
3648
	port_id_t id;
3649

3650 3651
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
	    "Entered %s.\n", __func__);
3652

3653 3654 3655
	if (rptid_entry->entry_status != 0)
		return;

3656 3657 3658 3659 3660
	id.b.domain = rptid_entry->port_id[2];
	id.b.area   = rptid_entry->port_id[1];
	id.b.al_pa  = rptid_entry->port_id[0];
	id.b.rsvd_1 = 0;

3661
	if (rptid_entry->format == 0) {
3662
		/* loop */
3663
		ql_dbg(ql_dbg_async, vha, 0x10b7,
3664
		    "Format 0 : Number of VPs setup %d, number of "
3665 3666
		    "VPs acquired %d.\n", rptid_entry->vp_setup,
		    rptid_entry->vp_acquired);
3667
		ql_dbg(ql_dbg_async, vha, 0x10b8,
3668 3669 3670
		    "Primary port id %02x%02x%02x.\n",
		    rptid_entry->port_id[2], rptid_entry->port_id[1],
		    rptid_entry->port_id[0]);
3671

3672
		qlt_update_host_map(vha, id);
3673

3674
	} else if (rptid_entry->format == 1) {
3675
		/* fabric */
3676
		ql_dbg(ql_dbg_async, vha, 0x10b9,
3677
		    "Format 1: VP[%d] enabled - status %d - with "
3678 3679
		    "port id %02x%02x%02x.\n", rptid_entry->vp_idx,
			rptid_entry->vp_status,
3680
		    rptid_entry->port_id[2], rptid_entry->port_id[1],
3681
		    rptid_entry->port_id[0]);
3682

3683
		/* buffer to buffer credit flag */
3684 3685 3686 3687 3688 3689 3690 3691 3692 3693 3694 3695 3696
		vha->flags.bbcr_enable = (rptid_entry->u.f1.bbcr & 0xf) != 0;

		if (rptid_entry->vp_idx == 0) {
			if (rptid_entry->vp_status == VP_STAT_COMPL) {
				/* FA-WWN is only for physical port */
				if (qla_ini_mode_enabled(vha) &&
				    ha->flags.fawwpn_enabled &&
				    (rptid_entry->u.f1.flags &
				     VP_FLAGS_NAME_VALID)) {
					memcpy(vha->port_name,
					    rptid_entry->u.f1.port_name,
					    WWN_SIZE);
				}
3697

3698
				qlt_update_host_map(vha, id);
3699
			}
3700 3701 3702 3703 3704 3705 3706 3707 3708 3709

			set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
			set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
		} else {
			if (rptid_entry->vp_status != VP_STAT_COMPL &&
				rptid_entry->vp_status != VP_STAT_ID_CHG) {
				ql_dbg(ql_dbg_mbx, vha, 0x10ba,
				    "Could not acquire ID for VP[%d].\n",
				    rptid_entry->vp_idx);
				return;
3710
			}
3711

3712 3713 3714 3715 3716 3717 3718 3719 3720
			found = 0;
			spin_lock_irqsave(&ha->vport_slock, flags);
			list_for_each_entry(vp, &ha->vp_list, list) {
				if (rptid_entry->vp_idx == vp->vp_idx) {
					found = 1;
					break;
				}
			}
			spin_unlock_irqrestore(&ha->vport_slock, flags);
3721

3722 3723
			if (!found)
				return;
3724

3725
			qlt_update_host_map(vp, id);
3726

3727 3728 3729 3730 3731 3732 3733 3734
			/*
			 * Cannot configure here as we are still sitting on the
			 * response queue. Handle it in dpc context.
			 */
			set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
			set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
			set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
		}
3735
		set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3736
		qla2xxx_wake_dpc(vha);
3737
	} else if (rptid_entry->format == 2) {
3738
		ql_dbg(ql_dbg_async, vha, 0x505f,
3739 3740 3741 3742
		    "RIDA: format 2/N2N Primary port id %02x%02x%02x.\n",
		    rptid_entry->port_id[2], rptid_entry->port_id[1],
		    rptid_entry->port_id[0]);

3743
		ql_dbg(ql_dbg_async, vha, 0x5075,
3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754
		    "N2N: Remote WWPN %8phC.\n",
		    rptid_entry->u.f2.port_name);

		/* N2N.  direct connect */
		vha->d_id.b.domain = rptid_entry->port_id[2];
		vha->d_id.b.area = rptid_entry->port_id[1];
		vha->d_id.b.al_pa = rptid_entry->port_id[0];

		spin_lock_irqsave(&ha->vport_slock, flags);
		qlt_update_vp_map(vha, SET_AL_PA);
		spin_unlock_irqrestore(&ha->vport_slock, flags);
3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765 3766 3767 3768 3769 3770 3771 3772 3773 3774 3775 3776
	}
}

/*
 * qla24xx_modify_vp_config
 *	Change VP configuration for vha
 *
 * Input:
 *	vha = adapter block pointer.
 *
 * Returns:
 *	qla2xxx local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_modify_vp_config(scsi_qla_host_t *vha)
{
	int		rval;
	struct vp_config_entry_24xx *vpmod;
	dma_addr_t	vpmod_dma;
3777 3778
	struct qla_hw_data *ha = vha->hw;
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3779 3780 3781

	/* This can be called by the parent */

3782 3783
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
	    "Entered %s.\n", __func__);
3784

3785
	vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3786
	if (!vpmod) {
3787 3788
		ql_log(ql_log_warn, vha, 0x10bc,
		    "Failed to allocate modify VP IOCB.\n");
3789 3790 3791 3792 3793 3794 3795 3796 3797 3798
		return QLA_MEMORY_ALLOC_FAILED;
	}

	memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
	vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
	vpmod->entry_count = 1;
	vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
	vpmod->vp_count = 1;
	vpmod->vp_index1 = vha->vp_idx;
	vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3799 3800 3801

	qlt_modify_vp_config(vha, vpmod);

3802 3803 3804 3805
	memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
	memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
	vpmod->entry_count = 1;

3806
	rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3807
	if (rval != QLA_SUCCESS) {
3808 3809
		ql_dbg(ql_dbg_mbx, vha, 0x10bd,
		    "Failed to issue VP config IOCB (%x).\n", rval);
3810
	} else if (vpmod->comp_status != 0) {
3811 3812 3813
		ql_dbg(ql_dbg_mbx, vha, 0x10be,
		    "Failed to complete IOCB -- error status (%x).\n",
		    vpmod->comp_status);
3814
		rval = QLA_FUNCTION_FAILED;
3815
	} else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) {
3816 3817 3818
		ql_dbg(ql_dbg_mbx, vha, 0x10bf,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(vpmod->comp_status));
3819 3820 3821
		rval = QLA_FUNCTION_FAILED;
	} else {
		/* EMPTY */
3822 3823
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
		    "Done %s.\n", __func__);
3824 3825
		fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
	}
3826
	dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852

	return rval;
}

/*
 * qla24xx_control_vp
 *	Enable a virtual port for given host
 *
 * Input:
 *	ha = adapter block pointer.
 *	vhba = virtual adapter (unused)
 *	index = index number for enabled VP
 *
 * Returns:
 *	qla2xxx local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
{
	int		rval;
	int		map, pos;
	struct vp_ctrl_entry_24xx   *vce;
	dma_addr_t	vce_dma;
3853
	struct qla_hw_data *ha = vha->hw;
3854
	int	vp_index = vha->vp_idx;
3855
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3856

3857
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3858
	    "Entered %s enabling index %d.\n", __func__, vp_index);
3859

3860
	if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3861 3862 3863 3864
		return QLA_PARAMETER_ERROR;

	vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
	if (!vce) {
3865 3866
		ql_log(ql_log_warn, vha, 0x10c2,
		    "Failed to allocate VP control IOCB.\n");
3867 3868 3869 3870 3871 3872 3873
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));

	vce->entry_type = VP_CTRL_IOCB_TYPE;
	vce->entry_count = 1;
	vce->command = cpu_to_le16(cmd);
3874
	vce->vp_count = cpu_to_le16(1);
3875 3876 3877 3878 3879 3880

	/* index map in firmware starts with 1; decrement index
	 * this is ok as we never use index 0
	 */
	map = (vp_index - 1) / 8;
	pos = (vp_index - 1) & 7;
3881
	mutex_lock(&ha->vport_lock);
3882
	vce->vp_idx_map[map] |= 1 << pos;
3883
	mutex_unlock(&ha->vport_lock);
3884

3885
	rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3886
	if (rval != QLA_SUCCESS) {
3887 3888
		ql_dbg(ql_dbg_mbx, vha, 0x10c3,
		    "Failed to issue VP control IOCB (%x).\n", rval);
3889
	} else if (vce->entry_status != 0) {
3890 3891
		ql_dbg(ql_dbg_mbx, vha, 0x10c4,
		    "Failed to complete IOCB -- error status (%x).\n",
3892 3893
		    vce->entry_status);
		rval = QLA_FUNCTION_FAILED;
3894
	} else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
3895 3896
		ql_dbg(ql_dbg_mbx, vha, 0x10c5,
		    "Failed to complet IOCB -- completion status (%x).\n",
3897 3898 3899
		    le16_to_cpu(vce->comp_status));
		rval = QLA_FUNCTION_FAILED;
	} else {
3900 3901
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
		    "Done %s.\n", __func__);
3902 3903 3904 3905 3906 3907 3908 3909 3910 3911 3912 3913 3914 3915 3916 3917 3918 3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930
	}

	dma_pool_free(ha->s_dma_pool, vce, vce_dma);

	return rval;
}

/*
 * qla2x00_send_change_request
 *	Receive or disable RSCN request from fabric controller
 *
 * Input:
 *	ha = adapter block pointer
 *	format = registration format:
 *		0 - Reserved
 *		1 - Fabric detected registration
 *		2 - N_port detected registration
 *		3 - Full registration
 *		FF - clear registration
 *	vp_idx = Virtual port index
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel Context
 */

int
3931
qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3932 3933 3934 3935 3936 3937
			    uint16_t vp_idx)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3938 3939
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
	    "Entered %s.\n", __func__);
3940

3941 3942 3943 3944 3945 3946 3947
	mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
	mcp->mb[1] = format;
	mcp->mb[9] = vp_idx;
	mcp->out_mb = MBX_9|MBX_1|MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
3948
	rval = qla2x00_mailbox_command(vha, mcp);
3949 3950 3951 3952 3953 3954 3955 3956 3957 3958

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
			rval = BIT_1;
		}
	} else
		rval = BIT_1;

	return rval;
}
3959 3960

int
3961
qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3962 3963 3964 3965 3966 3967
    uint32_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3968 3969
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
	    "Entered %s.\n", __func__);
3970

3971
	if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3972 3973 3974 3975 3976 3977 3978 3979 3980 3981 3982 3983 3984
		mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
		mcp->mb[8] = MSW(addr);
		mcp->out_mb = MBX_8|MBX_0;
	} else {
		mcp->mb[0] = MBC_DUMP_RISC_RAM;
		mcp->out_mb = MBX_0;
	}
	mcp->mb[1] = LSW(addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3985
	if (IS_FWI2_CAPABLE(vha->hw)) {
3986 3987 3988 3989 3990 3991 3992 3993 3994
		mcp->mb[4] = MSW(size);
		mcp->mb[5] = LSW(size);
		mcp->out_mb |= MBX_5|MBX_4;
	} else {
		mcp->mb[4] = LSW(size);
		mcp->out_mb |= MBX_4;
	}

	mcp->in_mb = MBX_0;
3995
	mcp->tov = MBX_TOV_SECONDS;
3996
	mcp->flags = 0;
3997
	rval = qla2x00_mailbox_command(vha, mcp);
3998 3999

	if (rval != QLA_SUCCESS) {
4000 4001
		ql_dbg(ql_dbg_mbx, vha, 0x1008,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4002
	} else {
4003 4004
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
		    "Done %s.\n", __func__);
4005 4006 4007 4008
	}

	return rval;
}
4009 4010 4011 4012 4013 4014 4015 4016 4017 4018
/* 84XX Support **************************************************************/

struct cs84xx_mgmt_cmd {
	union {
		struct verify_chip_entry_84xx req;
		struct verify_chip_rsp_84xx rsp;
	} p;
};

int
4019
qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
4020 4021 4022 4023 4024 4025
{
	int rval, retry;
	struct cs84xx_mgmt_cmd *mn;
	dma_addr_t mn_dma;
	uint16_t options;
	unsigned long flags;
4026
	struct qla_hw_data *ha = vha->hw;
4027

4028 4029
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
	    "Entered %s.\n", __func__);
4030 4031 4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043

	mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
	if (mn == NULL) {
		return QLA_MEMORY_ALLOC_FAILED;
	}

	/* Force Update? */
	options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
	/* Diagnostic firmware? */
	/* options |= MENLO_DIAG_FW; */
	/* We update the firmware with only one data sequence. */
	options |= VCO_END_OF_DATA;

	do {
4044
		retry = 0;
4045 4046 4047 4048 4049
		memset(mn, 0, sizeof(*mn));
		mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
		mn->p.req.entry_count = 1;
		mn->p.req.options = cpu_to_le16(options);

4050 4051 4052 4053
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
		    "Dump of Verify Request.\n");
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
		    (uint8_t *)mn, sizeof(*mn));
4054

4055
		rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
4056
		if (rval != QLA_SUCCESS) {
4057 4058
			ql_dbg(ql_dbg_mbx, vha, 0x10cb,
			    "Failed to issue verify IOCB (%x).\n", rval);
4059 4060 4061
			goto verify_done;
		}

4062 4063 4064 4065
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
		    "Dump of Verify Response.\n");
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
		    (uint8_t *)mn, sizeof(*mn));
4066 4067 4068 4069

		status[0] = le16_to_cpu(mn->p.rsp.comp_status);
		status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
		    le16_to_cpu(mn->p.rsp.failure_code) : 0;
4070
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
4071
		    "cs=%x fc=%x.\n", status[0], status[1]);
4072 4073 4074 4075

		if (status[0] != CS_COMPLETE) {
			rval = QLA_FUNCTION_FAILED;
			if (!(options & VCO_DONT_UPDATE_FW)) {
4076 4077 4078
				ql_dbg(ql_dbg_mbx, vha, 0x10cf,
				    "Firmware update failed. Retrying "
				    "without update firmware.\n");
4079 4080 4081 4082 4083
				options |= VCO_DONT_UPDATE_FW;
				options &= ~VCO_FORCE_UPDATE;
				retry = 1;
			}
		} else {
4084
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
4085 4086
			    "Firmware updated to %x.\n",
			    le32_to_cpu(mn->p.rsp.fw_ver));
4087 4088 4089 4090 4091 4092 4093 4094 4095 4096 4097 4098 4099 4100

			/* NOTE: we only update OP firmware. */
			spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
			ha->cs84xx->op_fw_version =
			    le32_to_cpu(mn->p.rsp.fw_ver);
			spin_unlock_irqrestore(&ha->cs84xx->access_lock,
			    flags);
		}
	} while (retry);

verify_done:
	dma_pool_free(ha->s_dma_pool, mn, mn_dma);

	if (rval != QLA_SUCCESS) {
4101 4102
		ql_dbg(ql_dbg_mbx, vha, 0x10d1,
		    "Failed=%x.\n", rval);
4103
	} else {
4104 4105
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
		    "Done %s.\n", __func__);
4106 4107 4108 4109
	}

	return rval;
}
4110 4111

int
4112
qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
4113 4114 4115 4116 4117 4118 4119
{
	int rval;
	unsigned long flags;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4120 4121
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
	    "Entered %s.\n", __func__);
4122

4123 4124 4125
	if (IS_SHADOW_REG_CAPABLE(ha))
		req->options |= BIT_13;

4126
	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4127
	mcp->mb[1] = req->options;
4128 4129 4130 4131 4132 4133 4134 4135 4136 4137
	mcp->mb[2] = MSW(LSD(req->dma));
	mcp->mb[3] = LSW(LSD(req->dma));
	mcp->mb[6] = MSW(MSD(req->dma));
	mcp->mb[7] = LSW(MSD(req->dma));
	mcp->mb[5] = req->length;
	if (req->rsp)
		mcp->mb[10] = req->rsp->id;
	mcp->mb[12] = req->qos;
	mcp->mb[11] = req->vp_idx;
	mcp->mb[13] = req->rid;
4138
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4139
		mcp->mb[15] = 0;
4140 4141 4142 4143 4144

	mcp->mb[4] = req->id;
	/* que in ptr index */
	mcp->mb[8] = 0;
	/* que out ptr index */
4145
	mcp->mb[9] = *req->out_ptr = 0;
4146 4147 4148 4149
	mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
			MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->flags = MBX_DMA_OUT;
4150 4151
	mcp->tov = MBX_TOV_SECONDS * 2;

4152
	if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
4153
		mcp->in_mb |= MBX_1;
4154
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4155 4156 4157 4158
		mcp->out_mb |= MBX_15;
		/* debug q create issue in SR-IOV */
		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
	}
4159 4160

	spin_lock_irqsave(&ha->hardware_lock, flags);
4161
	if (!(req->options & BIT_0)) {
4162
		WRT_REG_DWORD(req->req_q_in, 0);
4163
		if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4164
			WRT_REG_DWORD(req->req_q_out, 0);
4165 4166 4167
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

4168
	rval = qla2x00_mailbox_command(vha, mcp);
4169 4170 4171 4172
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10d4,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
4173 4174
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
		    "Done %s.\n", __func__);
4175 4176
	}

4177 4178 4179 4180
	return rval;
}

int
4181
qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
4182 4183 4184 4185 4186 4187 4188
{
	int rval;
	unsigned long flags;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4189 4190
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
	    "Entered %s.\n", __func__);
4191

4192 4193 4194
	if (IS_SHADOW_REG_CAPABLE(ha))
		rsp->options |= BIT_13;

4195
	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4196
	mcp->mb[1] = rsp->options;
4197 4198 4199 4200 4201
	mcp->mb[2] = MSW(LSD(rsp->dma));
	mcp->mb[3] = LSW(LSD(rsp->dma));
	mcp->mb[6] = MSW(MSD(rsp->dma));
	mcp->mb[7] = LSW(MSD(rsp->dma));
	mcp->mb[5] = rsp->length;
4202
	mcp->mb[14] = rsp->msix->entry;
4203
	mcp->mb[13] = rsp->rid;
4204
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4205
		mcp->mb[15] = 0;
4206 4207 4208

	mcp->mb[4] = rsp->id;
	/* que in ptr index */
4209
	mcp->mb[8] = *rsp->in_ptr = 0;
4210 4211
	/* que out ptr index */
	mcp->mb[9] = 0;
4212
	mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
4213 4214 4215
			|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->flags = MBX_DMA_OUT;
4216 4217 4218 4219 4220
	mcp->tov = MBX_TOV_SECONDS * 2;

	if (IS_QLA81XX(ha)) {
		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
		mcp->in_mb |= MBX_1;
4221
	} else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4222 4223 4224 4225 4226
		mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
		mcp->in_mb |= MBX_1;
		/* debug q create issue in SR-IOV */
		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
	}
4227 4228

	spin_lock_irqsave(&ha->hardware_lock, flags);
4229
	if (!(rsp->options & BIT_0)) {
4230
		WRT_REG_DWORD(rsp->rsp_q_out, 0);
4231
		if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4232
			WRT_REG_DWORD(rsp->rsp_q_in, 0);
4233 4234 4235 4236
	}

	spin_unlock_irqrestore(&ha->hardware_lock, flags);

4237
	rval = qla2x00_mailbox_command(vha, mcp);
4238 4239 4240 4241
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10d7,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
4242 4243
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
		    "Done %s.\n", __func__);
4244 4245
	}

4246 4247 4248
	return rval;
}

4249 4250 4251 4252 4253 4254 4255
int
qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4256 4257
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
	    "Entered %s.\n", __func__);
4258 4259 4260 4261 4262 4263 4264 4265 4266 4267

	mcp->mb[0] = MBC_IDC_ACK;
	memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4268 4269
		ql_dbg(ql_dbg_mbx, vha, 0x10da,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4270
	} else {
4271 4272
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
		    "Done %s.\n", __func__);
4273 4274 4275 4276
	}

	return rval;
}
4277 4278 4279 4280 4281 4282 4283 4284

int
qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4285 4286
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
	    "Entered %s.\n", __func__);
4287

4288 4289
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
	    !IS_QLA27XX(vha->hw))
4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4301 4302 4303
		ql_dbg(ql_dbg_mbx, vha, 0x10dd,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
4304
	} else {
4305 4306
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
		    "Done %s.\n", __func__);
4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319
		*sector_size = mcp->mb[1];
	}

	return rval;
}

int
qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4320 4321
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
	    !IS_QLA27XX(vha->hw))
4322 4323
		return QLA_FUNCTION_FAILED;

4324 4325
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
	    "Entered %s.\n", __func__);
4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
	    FAC_OPT_CMD_WRITE_PROTECT;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4337 4338 4339
		ql_dbg(ql_dbg_mbx, vha, 0x10e0,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
4340
	} else {
4341 4342
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
		    "Done %s.\n", __func__);
4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354
	}

	return rval;
}

int
qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4355 4356
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
	    !IS_QLA27XX(vha->hw))
4357 4358
		return QLA_FUNCTION_FAILED;

4359 4360
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
	    "Entered %s.\n", __func__);
4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
	mcp->mb[2] = LSW(start);
	mcp->mb[3] = MSW(start);
	mcp->mb[4] = LSW(finish);
	mcp->mb[5] = MSW(finish);
	mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4375 4376 4377
		ql_dbg(ql_dbg_mbx, vha, 0x10e3,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4378
	} else {
4379 4380
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
		    "Done %s.\n", __func__);
4381 4382 4383 4384
	}

	return rval;
}
4385 4386 4387 4388 4389 4390 4391 4392

int
qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
{
	int rval = 0;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4393 4394
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
	    "Entered %s.\n", __func__);
4395 4396 4397 4398 4399 4400 4401 4402 4403

	mcp->mb[0] = MBC_RESTART_MPI_FW;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4404 4405 4406
		ql_dbg(ql_dbg_mbx, vha, 0x10e6,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
4407
	} else {
4408 4409
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
		    "Done %s.\n", __func__);
4410 4411 4412 4413
	}

	return rval;
}
4414

4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520
int
qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int i;
	int len;
	uint16_t *str;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_P3P_TYPE(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
	    "Entered %s.\n", __func__);

	str = (void *)version;
	len = strlen(version);

	mcp->mb[0] = MBC_SET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
	mcp->out_mb = MBX_1|MBX_0;
	for (i = 4; i < 16 && len; i++, str++, len -= 2) {
		mcp->mb[i] = cpu_to_le16p(str);
		mcp->out_mb |= 1<<i;
	}
	for (; i < 16; i++) {
		mcp->mb[i] = 0;
		mcp->out_mb |= 1<<i;
	}
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x117c,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
		    "Done %s.\n", __func__);
	}

	return rval;
}

int
qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int len;
	uint16_t dwlen;
	uint8_t *str;
	dma_addr_t str_dma;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
	    IS_P3P_TYPE(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
	    "Entered %s.\n", __func__);

	str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
	if (!str) {
		ql_log(ql_log_warn, vha, 0x117f,
		    "Failed to allocate driver version param.\n");
		return QLA_MEMORY_ALLOC_FAILED;
	}

	memcpy(str, "\x7\x3\x11\x0", 4);
	dwlen = str[0];
	len = dwlen * 4 - 4;
	memset(str + 4, 0, len);
	if (len > strlen(version))
		len = strlen(version);
	memcpy(str + 4, version, len);

	mcp->mb[0] = MBC_SET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
	mcp->mb[2] = MSW(LSD(str_dma));
	mcp->mb[3] = LSW(LSD(str_dma));
	mcp->mb[6] = MSW(MSD(str_dma));
	mcp->mb[7] = LSW(MSD(str_dma));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1180,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
		    "Done %s.\n", __func__);
	}

	dma_pool_free(ha->s_dma_pool, str, str_dma);

	return rval;
}

4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553
static int
qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_FWI2_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_GET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	*temp = mcp->mb[1];

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x115a,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
		    "Done %s.\n", __func__);
	}

	return rval;
}

4554
int
4555 4556
qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4557 4558 4559 4560
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
4561 4562
	struct qla_hw_data *ha = vha->hw;

4563 4564
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
	    "Entered %s.\n", __func__);
4565

4566 4567
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;
4568

4569 4570 4571
	if (len == 1)
		opt |= BIT_0;

4572 4573 4574 4575 4576 4577 4578
	mcp->mb[0] = MBC_READ_SFP;
	mcp->mb[1] = dev;
	mcp->mb[2] = MSW(sfp_dma);
	mcp->mb[3] = LSW(sfp_dma);
	mcp->mb[6] = MSW(MSD(sfp_dma));
	mcp->mb[7] = LSW(MSD(sfp_dma));
	mcp->mb[8] = len;
4579
	mcp->mb[9] = off;
4580 4581
	mcp->mb[10] = opt;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4582
	mcp->in_mb = MBX_1|MBX_0;
4583 4584 4585 4586 4587
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (opt & BIT_0)
4588
		*sfp = mcp->mb[1];
4589 4590

	if (rval != QLA_SUCCESS) {
4591 4592
		ql_dbg(ql_dbg_mbx, vha, 0x10e9,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4593
	} else {
4594 4595
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
		    "Done %s.\n", __func__);
4596 4597 4598 4599 4600 4601
	}

	return rval;
}

int
4602 4603
qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4604 4605 4606 4607
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
4608 4609
	struct qla_hw_data *ha = vha->hw;

4610 4611
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
	    "Entered %s.\n", __func__);
4612

4613 4614
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;
4615

4616 4617 4618
	if (len == 1)
		opt |= BIT_0;

4619
	if (opt & BIT_0)
4620
		len = *sfp;
4621 4622 4623 4624 4625 4626 4627 4628

	mcp->mb[0] = MBC_WRITE_SFP;
	mcp->mb[1] = dev;
	mcp->mb[2] = MSW(sfp_dma);
	mcp->mb[3] = LSW(sfp_dma);
	mcp->mb[6] = MSW(MSD(sfp_dma));
	mcp->mb[7] = LSW(MSD(sfp_dma));
	mcp->mb[8] = len;
4629
	mcp->mb[9] = off;
4630 4631
	mcp->mb[10] = opt;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4632
	mcp->in_mb = MBX_1|MBX_0;
4633 4634 4635 4636 4637
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4638 4639
		ql_dbg(ql_dbg_mbx, vha, 0x10ec,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4640
	} else {
4641 4642
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
		    "Done %s.\n", __func__);
4643 4644 4645 4646
	}

	return rval;
}
4647 4648 4649 4650 4651 4652 4653 4654 4655

int
qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
    uint16_t size_in_bytes, uint16_t *actual_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4656 4657
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
	    "Entered %s.\n", __func__);
4658

4659
	if (!IS_CNA_CAPABLE(vha->hw))
4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672 4673 4674
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_XGMAC_STATS;
	mcp->mb[2] = MSW(stats_dma);
	mcp->mb[3] = LSW(stats_dma);
	mcp->mb[6] = MSW(MSD(stats_dma));
	mcp->mb[7] = LSW(MSD(stats_dma));
	mcp->mb[8] = size_in_bytes >> 2;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4675 4676 4677
		ql_dbg(ql_dbg_mbx, vha, 0x10ef,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4678
	} else {
4679 4680
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
		    "Done %s.\n", __func__);
4681

4682 4683 4684 4685 4686 4687

		*actual_size = mcp->mb[2] << 2;
	}

	return rval;
}
4688 4689 4690 4691 4692 4693 4694 4695 4696

int
qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
    uint16_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4697 4698
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
	    "Entered %s.\n", __func__);
4699

4700
	if (!IS_CNA_CAPABLE(vha->hw))
4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712 4713 4714 4715 4716
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_DCBX_PARAMS;
	mcp->mb[1] = 0;
	mcp->mb[2] = MSW(tlv_dma);
	mcp->mb[3] = LSW(tlv_dma);
	mcp->mb[6] = MSW(MSD(tlv_dma));
	mcp->mb[7] = LSW(MSD(tlv_dma));
	mcp->mb[8] = size;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4717 4718 4719
		ql_dbg(ql_dbg_mbx, vha, 0x10f2,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4720
	} else {
4721 4722
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
		    "Done %s.\n", __func__);
4723 4724 4725 4726
	}

	return rval;
}
4727 4728 4729 4730 4731 4732 4733 4734

int
qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4735 4736
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
	    "Entered %s.\n", __func__);
4737

4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749
	if (!IS_FWI2_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_READ_RAM_EXTENDED;
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[8] = MSW(risc_addr);
	mcp->out_mb = MBX_8|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4750 4751
		ql_dbg(ql_dbg_mbx, vha, 0x10f5,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4752
	} else {
4753 4754
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
		    "Done %s.\n", __func__);
4755 4756 4757 4758 4759 4760
		*data = mcp->mb[3] << 16 | mcp->mb[2];
	}

	return rval;
}

4761
int
4762 4763
qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
	uint16_t *mresp)
4764 4765 4766 4767 4768
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4769 4770
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
	    "Entered %s.\n", __func__);
4771 4772 4773 4774 4775 4776 4777 4778 4779 4780 4781 4782 4783 4784 4785

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
	mcp->mb[1] = mreq->options | BIT_6;	// BIT_6 specifies 64 bit addressing

	/* transfer count */
	mcp->mb[10] = LSW(mreq->transfer_size);
	mcp->mb[11] = MSW(mreq->transfer_size);

	/* send data address */
	mcp->mb[14] = LSW(mreq->send_dma);
	mcp->mb[15] = MSW(mreq->send_dma);
	mcp->mb[20] = LSW(MSD(mreq->send_dma));
	mcp->mb[21] = MSW(MSD(mreq->send_dma));

L
Lucas De Marchi 已提交
4786
	/* receive data address */
4787 4788 4789 4790 4791 4792
	mcp->mb[16] = LSW(mreq->rcv_dma);
	mcp->mb[17] = MSW(mreq->rcv_dma);
	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));

	/* Iteration count */
4793 4794
	mcp->mb[18] = LSW(mreq->iteration_count);
	mcp->mb[19] = MSW(mreq->iteration_count);
4795 4796 4797

	mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
	    MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4798
	if (IS_CNA_CAPABLE(vha->hw))
4799 4800 4801 4802 4803 4804 4805 4806 4807 4808
		mcp->out_mb |= MBX_2;
	mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->buf_size = mreq->transfer_size;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4809 4810 4811 4812
		ql_dbg(ql_dbg_mbx, vha, 0x10f8,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
		    "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
		    mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4813
	} else {
4814 4815
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
		    "Done %s.\n", __func__);
4816 4817 4818 4819 4820 4821 4822 4823
	}

	/* Copy mailbox information */
	memcpy( mresp, mcp->mb, 64);
	return rval;
}

int
4824 4825
qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
	uint16_t *mresp)
4826 4827 4828 4829 4830 4831
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4832 4833
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
	    "Entered %s.\n", __func__);
4834 4835 4836

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4837 4838
	/* BIT_6 specifies 64bit address */
	mcp->mb[1] = mreq->options | BIT_15 | BIT_6;
4839
	if (IS_CNA_CAPABLE(ha)) {
4840 4841
		mcp->mb[2] = vha->fcoe_fcf_idx;
	}
4842 4843 4844 4845 4846 4847 4848 4849 4850 4851 4852 4853 4854 4855
	mcp->mb[16] = LSW(mreq->rcv_dma);
	mcp->mb[17] = MSW(mreq->rcv_dma);
	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));

	mcp->mb[10] = LSW(mreq->transfer_size);

	mcp->mb[14] = LSW(mreq->send_dma);
	mcp->mb[15] = MSW(mreq->send_dma);
	mcp->mb[20] = LSW(MSD(mreq->send_dma));
	mcp->mb[21] = MSW(MSD(mreq->send_dma));

	mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
	    MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4856
	if (IS_CNA_CAPABLE(ha))
4857 4858 4859
		mcp->out_mb |= MBX_2;

	mcp->in_mb = MBX_0;
4860 4861
	if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
	    IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4862
		mcp->in_mb |= MBX_1;
4863
	if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4864 4865 4866 4867 4868 4869 4870 4871 4872
		mcp->in_mb |= MBX_3;

	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->buf_size = mreq->transfer_size;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4873 4874 4875
		ql_dbg(ql_dbg_mbx, vha, 0x10fb,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
4876
	} else {
4877 4878
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
		    "Done %s.\n", __func__);
4879 4880 4881
	}

	/* Copy mailbox information */
4882
	memcpy(mresp, mcp->mb, 64);
4883 4884
	return rval;
}
4885

4886
int
4887
qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4888 4889 4890 4891 4892
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4893
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4894
	    "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4895 4896 4897 4898 4899 4900 4901

	mcp->mb[0] = MBC_ISP84XX_RESET;
	mcp->mb[1] = enable_diagnostic;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4902
	rval = qla2x00_mailbox_command(vha, mcp);
4903 4904

	if (rval != QLA_SUCCESS)
4905
		ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4906
	else
4907 4908
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
		    "Done %s.\n", __func__);
4909 4910 4911 4912

	return rval;
}

4913 4914 4915 4916 4917 4918 4919
int
qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4920 4921
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
	    "Entered %s.\n", __func__);
4922

4923
	if (!IS_FWI2_CAPABLE(vha->hw))
4924
		return QLA_FUNCTION_FAILED;
4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935 4936

	mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[2] = LSW(data);
	mcp->mb[3] = MSW(data);
	mcp->mb[8] = MSW(risc_addr);
	mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4937 4938
		ql_dbg(ql_dbg_mbx, vha, 0x1101,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4939
	} else {
4940 4941
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
		    "Done %s.\n", __func__);
4942 4943 4944 4945
	}

	return rval;
}
4946

4947 4948 4949 4950 4951 4952 4953 4954 4955 4956 4957
int
qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	uint32_t stat, timer;
	uint16_t mb0 = 0;
	struct qla_hw_data *ha = vha->hw;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

	rval = QLA_SUCCESS;

4958 4959
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
	    "Entered %s.\n", __func__);
4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983 4984 4985 4986 4987 4988 4989 4990 4991 4992 4993 4994 4995 4996 4997 4998

	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

	/* Write the MBC data to the registers */
	WRT_REG_WORD(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
	WRT_REG_WORD(&reg->mailbox1, mb[0]);
	WRT_REG_WORD(&reg->mailbox2, mb[1]);
	WRT_REG_WORD(&reg->mailbox3, mb[2]);
	WRT_REG_WORD(&reg->mailbox4, mb[3]);

	WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);

	/* Poll for MBC interrupt */
	for (timer = 6000000; timer; timer--) {
		/* Check for pending interrupts. */
		stat = RD_REG_DWORD(&reg->host_status);
		if (stat & HSRX_RISC_INT) {
			stat &= 0xff;

			if (stat == 0x1 || stat == 0x2 ||
			    stat == 0x10 || stat == 0x11) {
				set_bit(MBX_INTERRUPT,
				    &ha->mbx_cmd_flags);
				mb0 = RD_REG_WORD(&reg->mailbox0);
				WRT_REG_DWORD(&reg->hccr,
				    HCCRX_CLR_RISC_INT);
				RD_REG_DWORD(&reg->hccr);
				break;
			}
		}
		udelay(5);
	}

	if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
		rval = mb0 & MBS_MASK;
	else
		rval = QLA_FUNCTION_FAILED;

	if (rval != QLA_SUCCESS) {
4999 5000
		ql_dbg(ql_dbg_mbx, vha, 0x1104,
		    "Failed=%x mb[0]=%x.\n", rval, mb[0]);
5001
	} else {
5002 5003
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
		    "Done %s.\n", __func__);
5004 5005 5006 5007
	}

	return rval;
}
5008

5009 5010 5011 5012 5013 5014 5015 5016
int
qla2x00_get_data_rate(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

5017 5018
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
	    "Entered %s.\n", __func__);
5019

5020 5021 5022 5023 5024 5025 5026
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_DATA_RATE;
	mcp->mb[1] = 0;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
5027
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
5028
		mcp->in_mb |= MBX_3;
5029 5030 5031 5032
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
5033 5034
		ql_dbg(ql_dbg_mbx, vha, 0x1107,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5035
	} else {
5036 5037
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
		    "Done %s.\n", __func__);
5038 5039 5040 5041 5042 5043
		if (mcp->mb[1] != 0x7)
			ha->link_data_rate = mcp->mb[1];
	}

	return rval;
}
S
Sarang Radke 已提交
5044

5045 5046 5047 5048 5049 5050 5051 5052
int
qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

5053 5054
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
	    "Entered %s.\n", __func__);
5055

5056 5057
	if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
	    !IS_QLA27XX(ha))
5058 5059 5060 5061 5062 5063 5064 5065 5066 5067
		return QLA_FUNCTION_FAILED;
	mcp->mb[0] = MBC_GET_PORT_CONFIG;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
5068 5069
		ql_dbg(ql_dbg_mbx, vha, 0x110a,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5070 5071 5072 5073
	} else {
		/* Copy all bits to preserve original value */
		memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);

5074 5075
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
		    "Done %s.\n", __func__);
5076 5077 5078 5079 5080 5081 5082 5083 5084 5085 5086
	}
	return rval;
}

int
qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5087 5088
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
	    "Entered %s.\n", __func__);
5089 5090 5091 5092 5093 5094 5095 5096 5097 5098 5099

	mcp->mb[0] = MBC_SET_PORT_CONFIG;
	/* Copy all bits to preserve original setting */
	memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
5100 5101
		ql_dbg(ql_dbg_mbx, vha, 0x110d,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5102
	} else
5103 5104
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
		    "Done %s.\n", __func__);
5105 5106 5107 5108 5109

	return rval;
}


S
Sarang Radke 已提交
5110 5111 5112 5113 5114 5115 5116 5117 5118
int
qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
		uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

5119 5120
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
	    "Entered %s.\n", __func__);
5121

S
Sarang Radke 已提交
5122 5123 5124 5125 5126 5127 5128 5129 5130 5131 5132 5133 5134 5135 5136 5137 5138 5139 5140 5141 5142 5143 5144 5145
	if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	if (ha->flags.fcp_prio_enabled)
		mcp->mb[2] = BIT_1;
	else
		mcp->mb[2] = BIT_2;
	mcp->mb[4] = priority & 0xf;
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
		mb[4] = mcp->mb[4];
	}

	if (rval != QLA_SUCCESS) {
5146
		ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
S
Sarang Radke 已提交
5147
	} else {
5148 5149
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
		    "Done %s.\n", __func__);
S
Sarang Radke 已提交
5150 5151 5152 5153
	}

	return rval;
}
5154

5155
int
5156
qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
5157
{
5158
	int rval = QLA_FUNCTION_FAILED;
5159
	struct qla_hw_data *ha = vha->hw;
5160
	uint8_t byte;
5161

5162 5163 5164 5165 5166 5167 5168 5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183 5184 5185
	if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
		ql_dbg(ql_dbg_mbx, vha, 0x1150,
		    "Thermal not supported by this card.\n");
		return rval;
	}

	if (IS_QLA25XX(ha)) {
		if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
		    ha->pdev->subsystem_device == 0x0175) {
			rval = qla2x00_read_sfp(vha, 0, &byte,
			    0x98, 0x1, 1, BIT_13|BIT_0);
			*temp = byte;
			return rval;
		}
		if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
		    ha->pdev->subsystem_device == 0x338e) {
			rval = qla2x00_read_sfp(vha, 0, &byte,
			    0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
			*temp = byte;
			return rval;
		}
		ql_dbg(ql_dbg_mbx, vha, 0x10c9,
		    "Thermal not supported by this card.\n");
		return rval;
5186 5187
	}

5188 5189 5190 5191 5192 5193 5194 5195
	if (IS_QLA82XX(ha)) {
		*temp = qla82xx_read_temperature(vha);
		rval = QLA_SUCCESS;
		return rval;
	} else if (IS_QLA8044(ha)) {
		*temp = qla8044_read_temperature(vha);
		rval = QLA_SUCCESS;
		return rval;
5196 5197
	}

5198
	rval = qla2x00_read_asic_temperature(vha, temp);
5199 5200 5201
	return rval;
}

5202 5203 5204 5205 5206 5207 5208 5209
int
qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5210 5211
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
	    "Entered %s.\n", __func__);
5212

5213 5214 5215 5216
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;

	memset(mcp, 0, sizeof(mbx_cmd_t));
5217
	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5218 5219 5220 5221 5222 5223 5224 5225 5226
	mcp->mb[1] = 1;

	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
5227 5228
		ql_dbg(ql_dbg_mbx, vha, 0x1016,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5229
	} else {
5230 5231
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
		    "Done %s.\n", __func__);
5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244
	}

	return rval;
}

int
qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5245 5246
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
	    "Entered %s.\n", __func__);
5247

5248
	if (!IS_P3P_TYPE(ha))
5249 5250 5251
		return QLA_FUNCTION_FAILED;

	memset(mcp, 0, sizeof(mbx_cmd_t));
5252
	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5253 5254 5255 5256 5257 5258 5259 5260 5261
	mcp->mb[1] = 0;

	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
5262 5263
		ql_dbg(ql_dbg_mbx, vha, 0x100c,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5264
	} else {
5265 5266
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
		    "Done %s.\n", __func__);
5267 5268 5269 5270
	}

	return rval;
}
5271 5272 5273 5274 5275 5276 5277 5278 5279

int
qla82xx_md_get_template_size(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;

5280 5281
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
	    "Entered %s.\n", __func__);
5282 5283 5284 5285 5286 5287 5288 5289 5290 5291 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
	mcp->mb[3] = MSW(RQST_TMPLT_SIZE);

	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->tov = MBX_TOV_SECONDS;
	rval = qla2x00_mailbox_command(vha, mcp);

	/* Always copy back return mailbox values. */
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1120,
		    "mailbox command FAILED=0x%x, subcode=%x.\n",
		    (mcp->mb[1] << 16) | mcp->mb[0],
		    (mcp->mb[3] << 16) | mcp->mb[2]);
	} else {
5304 5305
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
		    "Done %s.\n", __func__);
5306 5307 5308 5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319 5320 5321 5322 5323
		ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
		if (!ha->md_template_size) {
			ql_dbg(ql_dbg_mbx, vha, 0x1122,
			    "Null template size obtained.\n");
			rval = QLA_FUNCTION_FAILED;
		}
	}
	return rval;
}

int
qla82xx_md_get_template(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;

5324 5325
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
	    "Entered %s.\n", __func__);
5326 5327 5328 5329 5330 5331 5332 5333 5334 5335 5336 5337 5338 5339 5340 5341 5342 5343 5344 5345 5346 5347 5348 5349 5350 5351 5352 5353 5354 5355 5356 5357 5358 5359

	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
	if (!ha->md_tmplt_hdr) {
		ql_log(ql_log_warn, vha, 0x1124,
		    "Unable to allocate memory for Minidump template.\n");
		return rval;
	}

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[2] = LSW(RQST_TMPLT);
	mcp->mb[3] = MSW(RQST_TMPLT);
	mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
	mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
	mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
	mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
	mcp->mb[8] = LSW(ha->md_template_size);
	mcp->mb[9] = MSW(ha->md_template_size);

	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1125,
		    "mailbox command FAILED=0x%x, subcode=%x.\n",
		    ((mcp->mb[1] << 16) | mcp->mb[0]),
		    ((mcp->mb[3] << 16) | mcp->mb[2]));
	} else
5360 5361
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
		    "Done %s.\n", __func__);
5362 5363
	return rval;
}
5364

5365 5366 5367 5368 5369 5370 5371 5372 5373 5374 5375 5376 5377 5378 5379 5380 5381 5382 5383 5384 5385 5386 5387 5388 5389 5390 5391 5392 5393 5394 5395 5396 5397 5398 5399 5400 5401 5402 5403 5404 5405 5406 5407 5408 5409 5410 5411 5412 5413 5414 5415 5416 5417 5418
int
qla8044_md_get_template(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;
	int offset = 0, size = MINIDUMP_SIZE_36K;
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
	    "Entered %s.\n", __func__);

	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
	if (!ha->md_tmplt_hdr) {
		ql_log(ql_log_warn, vha, 0xb11b,
		    "Unable to allocate memory for Minidump template.\n");
		return rval;
	}

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	while (offset < ha->md_template_size) {
		mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
		mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
		mcp->mb[2] = LSW(RQST_TMPLT);
		mcp->mb[3] = MSW(RQST_TMPLT);
		mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[8] = LSW(size);
		mcp->mb[9] = MSW(size);
		mcp->mb[10] = offset & 0x0000FFFF;
		mcp->mb[11] = offset & 0xFFFF0000;
		mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
		mcp->tov = MBX_TOV_SECONDS;
		mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
			MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
		mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
		rval = qla2x00_mailbox_command(vha, mcp);

		if (rval != QLA_SUCCESS) {
			ql_dbg(ql_dbg_mbx, vha, 0xb11c,
				"mailbox command FAILED=0x%x, subcode=%x.\n",
				((mcp->mb[1] << 16) | mcp->mb[0]),
				((mcp->mb[3] << 16) | mcp->mb[2]));
			return rval;
		} else
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
				"Done %s.\n", __func__);
		offset = offset + size;
	}
	return rval;
}

5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429
int
qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

5430 5431
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
	    "Entered %s.\n", __func__);
5432 5433 5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444 5445 5446 5447 5448 5449 5450 5451 5452 5453 5454 5455

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_SET_LED_CONFIG;
	mcp->mb[1] = led_cfg[0];
	mcp->mb[2] = led_cfg[1];
	if (IS_QLA8031(ha)) {
		mcp->mb[3] = led_cfg[2];
		mcp->mb[4] = led_cfg[3];
		mcp->mb[5] = led_cfg[4];
		mcp->mb[6] = led_cfg[5];
	}

	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	if (IS_QLA8031(ha))
		mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1134,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
5456 5457
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
		    "Done %s.\n", __func__);
5458 5459 5460 5461 5462 5463 5464 5465 5466 5467 5468 5469 5470 5471 5472 5473
	}

	return rval;
}

int
qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

5474 5475
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
	    "Entered %s.\n", __func__);
5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 5495 5496 5497 5498 5499

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_GET_LED_CONFIG;

	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	if (IS_QLA8031(ha))
		mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1137,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		led_cfg[0] = mcp->mb[1];
		led_cfg[1] = mcp->mb[2];
		if (IS_QLA8031(ha)) {
			led_cfg[2] = mcp->mb[3];
			led_cfg[3] = mcp->mb[4];
			led_cfg[4] = mcp->mb[5];
			led_cfg[5] = mcp->mb[6];
		}
5500 5501
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
		    "Done %s.\n", __func__);
5502 5503 5504 5505 5506
	}

	return rval;
}

5507 5508 5509 5510 5511 5512 5513 5514
int
qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5515
	if (!IS_P3P_TYPE(ha))
5516 5517
		return QLA_FUNCTION_FAILED;

5518
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5519 5520 5521 5522 5523 5524 5525 5526 5527 5528 5529
		"Entered %s.\n", __func__);

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_SET_LED_CONFIG;
	if (enable)
		mcp->mb[7] = 0xE;
	else
		mcp->mb[7] = 0xD;

	mcp->out_mb = MBX_7|MBX_0;
	mcp->in_mb = MBX_0;
5530
	mcp->tov = MBX_TOV_SECONDS;
5531 5532 5533 5534 5535 5536 5537
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1128,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
5538
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5539 5540 5541 5542 5543
		    "Done %s.\n", __func__);
	}

	return rval;
}
5544 5545

int
5546
qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5547 5548 5549 5550 5551 5552
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5553
	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5554 5555
		return QLA_FUNCTION_FAILED;

5556 5557
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
	    "Entered %s.\n", __func__);
5558 5559 5560 5561 5562 5563 5564 5565 5566 5567 5568 5569 5570 5571 5572 5573 5574

	mcp->mb[0] = MBC_WRITE_REMOTE_REG;
	mcp->mb[1] = LSW(reg);
	mcp->mb[2] = MSW(reg);
	mcp->mb[3] = LSW(data);
	mcp->mb[4] = MSW(data);
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1131,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
5575
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5576 5577
		    "Done %s.\n", __func__);
	}
5578

5579 5580
	return rval;
}
5581 5582 5583 5584 5585 5586 5587 5588 5589 5590

int
qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5591
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5592 5593 5594 5595 5596
		    "Implicit LOGO Unsupported.\n");
		return QLA_FUNCTION_FAILED;
	}


5597 5598
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
	    "Entering %s.\n",  __func__);
5599 5600 5601 5602 5603 5604 5605 5606 5607 5608 5609 5610 5611 5612

	/* Perform Implicit LOGO. */
	mcp->mb[0] = MBC_PORT_LOGOUT;
	mcp->mb[1] = fcport->loop_id;
	mcp->mb[10] = BIT_15;
	mcp->out_mb = MBX_10|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS)
		ql_dbg(ql_dbg_mbx, vha, 0x113d,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	else
5613 5614
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
		    "Done %s.\n", __func__);
5615 5616 5617 5618

	return rval;
}

5619 5620 5621 5622 5623 5624 5625 5626 5627
int
qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;
	unsigned long retry_max_time = jiffies + (2 * HZ);

5628
	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5629 5630 5631 5632 5633 5634 5635 5636 5637 5638 5639 5640 5641 5642 5643 5644 5645 5646 5647 5648 5649 5650 5651 5652 5653 5654 5655 5656 5657 5658 5659 5660 5661 5662 5663 5664 5665 5666 5667 5668 5669 5670 5671 5672 5673 5674 5675 5676 5677
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);

retry_rd_reg:
	mcp->mb[0] = MBC_READ_REMOTE_REG;
	mcp->mb[1] = LSW(reg);
	mcp->mb[2] = MSW(reg);
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x114c,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
	} else {
		*data = (mcp->mb[3] | (mcp->mb[4] << 16));
		if (*data == QLA8XXX_BAD_VALUE) {
			/*
			 * During soft-reset CAMRAM register reads might
			 * return 0xbad0bad0. So retry for MAX of 2 sec
			 * while reading camram registers.
			 */
			if (time_after(jiffies, retry_max_time)) {
				ql_dbg(ql_dbg_mbx, vha, 0x1141,
				    "Failure to read CAMRAM register. "
				    "data=0x%x.\n", *data);
				return QLA_FUNCTION_FAILED;
			}
			msleep(100);
			goto retry_rd_reg;
		}
		ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
	}

	return rval;
}

int
qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

5678
	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5679 5680 5681 5682 5683 5684 5685 5686 5687 5688 5689 5690 5691 5692 5693 5694 5695 5696 5697 5698 5699 5700 5701 5702 5703 5704 5705 5706 5707 5708 5709 5710 5711 5712 5713 5714 5715 5716 5717 5718 5719 5720 5721 5722 5723 5724 5725 5726 5727 5728 5729 5730 5731 5732 5733 5734 5735 5736 5737 5738 5739 5740 5741 5742 5743 5744 5745 5746 5747 5748 5749 5750 5751 5752 5753 5754
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1144,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
		ha->isp_ops->fw_dump(vha, 0);
	} else {
		ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
	}

	return rval;
}

int
qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
	uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	uint8_t subcode = (uint8_t)options;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
	mcp->mb[1] = options;
	mcp->out_mb = MBX_1|MBX_0;
	if (subcode & BIT_2) {
		mcp->mb[2] = LSW(start_addr);
		mcp->mb[3] = MSW(start_addr);
		mcp->mb[4] = LSW(end_addr);
		mcp->mb[5] = MSW(end_addr);
		mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
	}
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	if (!(subcode & (BIT_2 | BIT_5)))
		mcp->in_mb |= MBX_4|MBX_3;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1147,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
		    mcp->mb[4]);
		ha->isp_ops->fw_dump(vha, 0);
	} else {
		if (subcode & BIT_5)
			*sector_size = mcp->mb[1];
		else if (subcode & (BIT_6 | BIT_7)) {
			ql_dbg(ql_dbg_mbx, vha, 0x1148,
			    "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
		} else if (subcode & (BIT_3 | BIT_4)) {
			ql_dbg(ql_dbg_mbx, vha, 0x1149,
			    "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
		}
		ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
	}

	return rval;
}
5755 5756 5757 5758 5759 5760 5761 5762 5763 5764 5765 5766 5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781 5782 5783 5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796 5797 5798 5799 5800 5801

int
qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
	uint32_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_MCTP_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
	mcp->mb[1] = LSW(addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[4] = MSW(size);
	mcp->mb[5] = LSW(size);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
	mcp->mb[8] = MSW(addr);
	/* Setting RAM ID to valid */
	mcp->mb[10] |= BIT_7;
	/* For MCTP RAM ID is 0x40 */
	mcp->mb[10] |= 0x40;

	mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
	    MBX_0;

	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x114e,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
		    "Done %s.\n", __func__);
	}

	return rval;
}
5802 5803 5804 5805 5806 5807 5808 5809 5810 5811 5812 5813 5814

int
qla26xx_dport_diagnostics(scsi_qla_host_t *vha,
	void *dd_buf, uint size, uint options)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	dma_addr_t dd_dma;

	if (!IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
		return QLA_FUNCTION_FAILED;

5815
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x119f,
5816 5817 5818 5819 5820 5821 5822 5823 5824 5825 5826 5827 5828 5829 5830 5831 5832 5833 5834 5835 5836 5837 5838 5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851 5852
	    "Entered %s.\n", __func__);

	dd_dma = dma_map_single(&vha->hw->pdev->dev,
	    dd_buf, size, DMA_FROM_DEVICE);
	if (!dd_dma) {
		ql_log(ql_log_warn, vha, 0x1194, "Failed to map dma buffer.\n");
		return QLA_MEMORY_ALLOC_FAILED;
	}

	memset(dd_buf, 0, size);

	mcp->mb[0] = MBC_DPORT_DIAGNOSTICS;
	mcp->mb[1] = options;
	mcp->mb[2] = MSW(LSD(dd_dma));
	mcp->mb[3] = LSW(LSD(dd_dma));
	mcp->mb[6] = MSW(MSD(dd_dma));
	mcp->mb[7] = LSW(MSD(dd_dma));
	mcp->mb[8] = size;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->buf_size = size;
	mcp->flags = MBX_DMA_IN;
	mcp->tov = MBX_TOV_SECONDS * 4;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1195, "Failed=%x.\n", rval);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1196,
		    "Done %s.\n", __func__);
	}

	dma_unmap_single(&vha->hw->pdev->dev, dd_dma,
	    size, DMA_FROM_DEVICE);

	return rval;
}
5853 5854 5855 5856 5857 5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882 5883 5884 5885 5886 5887 5888 5889 5890 5891 5892 5893 5894 5895 5896

static void qla2x00_async_mb_sp_done(void *s, int res)
{
	struct srb *sp = s;

	sp->u.iocb_cmd.u.mbx.rc = res;

	complete(&sp->u.iocb_cmd.u.mbx.comp);
	/* don't free sp here. Let the caller do the free */
}

/*
 * This mailbox uses the iocb interface to send MB command.
 * This allows non-critial (non chip setup) command to go
 * out in parrallel.
 */
int qla24xx_send_mb_cmd(struct scsi_qla_host *vha, mbx_cmd_t *mcp)
{
	int rval = QLA_FUNCTION_FAILED;
	srb_t *sp;
	struct srb_iocb *c;

	if (!vha->hw->flags.fw_started)
		goto done;

	sp = qla2x00_get_sp(vha, NULL, GFP_KERNEL);
	if (!sp)
		goto done;

	sp->type = SRB_MB_IOCB;
	sp->name = mb_to_str(mcp->mb[0]);

	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);

	memcpy(sp->u.iocb_cmd.u.mbx.out_mb, mcp->mb, SIZEOF_IOCB_MB_REG);

	c = &sp->u.iocb_cmd;
	c->timeout = qla2x00_async_iocb_timeout;
	init_completion(&c->u.mbx.comp);

	sp->done = qla2x00_async_mb_sp_done;

	rval = qla2x00_start_sp(sp);
	if (rval != QLA_SUCCESS) {
5897
		ql_dbg(ql_dbg_mbx, vha, 0x1018,
5898 5899 5900 5901 5902
		    "%s: %s Failed submission. %x.\n",
		    __func__, sp->name, rval);
		goto done_free_sp;
	}

5903
	ql_dbg(ql_dbg_mbx, vha, 0x113f, "MB:%s hndl %x submitted\n",
5904 5905 5906 5907 5908 5909 5910 5911
	    sp->name, sp->handle);

	wait_for_completion(&c->u.mbx.comp);
	memcpy(mcp->mb, sp->u.iocb_cmd.u.mbx.in_mb, SIZEOF_IOCB_MB_REG);

	rval = c->u.mbx.rc;
	switch (rval) {
	case QLA_FUNCTION_TIMEOUT:
5912
		ql_dbg(ql_dbg_mbx, vha, 0x1140, "%s: %s Timeout. %x.\n",
5913 5914 5915
		    __func__, sp->name, rval);
		break;
	case  QLA_SUCCESS:
5916
		ql_dbg(ql_dbg_mbx, vha, 0x119d, "%s: %s done.\n",
5917 5918 5919 5920
		    __func__, sp->name);
		sp->free(sp);
		break;
	default:
5921
		ql_dbg(ql_dbg_mbx, vha, 0x119e, "%s: %s Failed. %x.\n",
5922 5923 5924 5925 5926 5927 5928 5929 5930 5931 5932 5933 5934 5935 5936 5937 5938 5939 5940 5941 5942 5943 5944 5945 5946 5947 5948 5949 5950 5951
		    __func__, sp->name, rval);
		sp->free(sp);
		break;
	}

	return rval;

done_free_sp:
	sp->free(sp);
done:
	return rval;
}

/*
 * qla24xx_gpdb_wait
 * NOTE: Do not call this routine from DPC thread
 */
int qla24xx_gpdb_wait(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
{
	int rval = QLA_FUNCTION_FAILED;
	dma_addr_t pd_dma;
	struct port_database_24xx *pd;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;

	if (!vha->hw->flags.fw_started)
		goto done;

	pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
	if (pd  == NULL) {
5952 5953
		ql_log(ql_log_warn, vha, 0xd047,
		    "Failed to allocate port database structure.\n");
5954 5955 5956 5957 5958 5959 5960 5961 5962 5963 5964 5965 5966 5967 5968 5969
		goto done_free_sp;
	}
	memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));

	memset(&mc, 0, sizeof(mc));
	mc.mb[0] = MBC_GET_PORT_DATABASE;
	mc.mb[1] = cpu_to_le16(fcport->loop_id);
	mc.mb[2] = MSW(pd_dma);
	mc.mb[3] = LSW(pd_dma);
	mc.mb[6] = MSW(MSD(pd_dma));
	mc.mb[7] = LSW(MSD(pd_dma));
	mc.mb[9] = cpu_to_le16(vha->vp_idx);
	mc.mb[10] = cpu_to_le16((uint16_t)opt);

	rval = qla24xx_send_mb_cmd(vha, &mc);
	if (rval != QLA_SUCCESS) {
5970
		ql_dbg(ql_dbg_mbx, vha, 0x1193,
5971 5972 5973 5974 5975 5976
		    "%s: %8phC fail\n", __func__, fcport->port_name);
		goto done_free_sp;
	}

	rval = __qla24xx_parse_gpdb(vha, fcport, pd);

5977
	ql_dbg(ql_dbg_mbx, vha, 0x1197, "%s: %8phC done\n",
5978 5979 5980 5981 5982 5983 5984 5985 5986 5987 5988 5989 5990 5991
	    __func__, fcport->port_name);

done_free_sp:
	if (pd)
		dma_pool_free(ha->s_dma_pool, pd, pd_dma);
done:
	return rval;
}

int __qla24xx_parse_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport,
    struct port_database_24xx *pd)
{
	int rval = QLA_SUCCESS;
	uint64_t zero = 0;
5992 5993 5994 5995 5996 5997 5998 5999 6000
	u8 current_login_state, last_login_state;

	if (fcport->fc4f_nvme) {
		current_login_state = pd->current_login_state >> 4;
		last_login_state = pd->last_login_state >> 4;
	} else {
		current_login_state = pd->current_login_state & 0xf;
		last_login_state = pd->last_login_state & 0xf;
	}
6001 6002

	/* Check for logged in state. */
6003 6004
	if (current_login_state != PDS_PRLI_COMPLETE &&
	    last_login_state != PDS_PRLI_COMPLETE) {
6005 6006
		ql_dbg(ql_dbg_mbx, vha, 0x119a,
		    "Unable to verify login-state (%x/%x) for loop_id %x.\n",
6007
		    current_login_state, last_login_state, fcport->loop_id);
6008 6009 6010 6011 6012 6013 6014 6015 6016 6017 6018 6019 6020 6021 6022 6023 6024 6025 6026 6027 6028 6029
		rval = QLA_FUNCTION_FAILED;
		goto gpd_error_out;
	}

	if (fcport->loop_id == FC_NO_LOOP_ID ||
	    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
	     memcmp(fcport->port_name, pd->port_name, 8))) {
		/* We lost the device mid way. */
		rval = QLA_NOT_LOGGED_IN;
		goto gpd_error_out;
	}

	/* Names are little-endian. */
	memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
	memcpy(fcport->port_name, pd->port_name, WWN_SIZE);

	/* Get port_id of device. */
	fcport->d_id.b.domain = pd->port_id[0];
	fcport->d_id.b.area = pd->port_id[1];
	fcport->d_id.b.al_pa = pd->port_id[2];
	fcport->d_id.b.rsvd_1 = 0;

6030 6031 6032 6033 6034 6035 6036 6037 6038 6039 6040
	if (fcport->fc4f_nvme) {
		fcport->nvme_prli_service_param =
		    pd->prli_nvme_svc_param_word_3;
		fcport->port_type = FCT_NVME;
	} else {
		/* If not target must be initiator or unknown type. */
		if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type = FCT_INITIATOR;
		else
			fcport->port_type = FCT_TARGET;
	}
6041 6042 6043 6044 6045 6046 6047 6048 6049 6050 6051 6052 6053 6054 6055 6056 6057 6058 6059 6060 6061 6062 6063 6064 6065 6066 6067 6068 6069 6070 6071 6072 6073 6074 6075 6076 6077
	/* Passback COS information. */
	fcport->supported_classes = (pd->flags & PDF_CLASS_2) ?
		FC_COS_CLASS2 : FC_COS_CLASS3;

	if (pd->prli_svc_param_word_3[0] & BIT_7) {
		fcport->flags |= FCF_CONF_COMP_SUPPORTED;
		fcport->conf_compl_supported = 1;
	}

gpd_error_out:
	return rval;
}

/*
 * qla24xx_gidlist__wait
 * NOTE: don't call this routine from DPC thread.
 */
int qla24xx_gidlist_wait(struct scsi_qla_host *vha,
	void *id_list, dma_addr_t id_list_dma, uint16_t *entries)
{
	int rval = QLA_FUNCTION_FAILED;
	mbx_cmd_t mc;

	if (!vha->hw->flags.fw_started)
		goto done;

	memset(&mc, 0, sizeof(mc));
	mc.mb[0] = MBC_GET_ID_LIST;
	mc.mb[2] = MSW(id_list_dma);
	mc.mb[3] = LSW(id_list_dma);
	mc.mb[6] = MSW(MSD(id_list_dma));
	mc.mb[7] = LSW(MSD(id_list_dma));
	mc.mb[8] = 0;
	mc.mb[9] = cpu_to_le16(vha->vp_idx);

	rval = qla24xx_send_mb_cmd(vha, &mc);
	if (rval != QLA_SUCCESS) {
6078 6079
		ql_dbg(ql_dbg_mbx, vha, 0x119b,
		    "%s:  fail\n", __func__);
6080 6081
	} else {
		*entries = mc.mb[1];
6082 6083
		ql_dbg(ql_dbg_mbx, vha, 0x119c,
		    "%s:  done\n", __func__);
6084 6085 6086 6087
	}
done:
	return rval;
}