qla_mbx.c 124.7 KB
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/*
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Andrew Vasquez 已提交
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 * QLogic Fibre Channel HBA Driver
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 * Copyright (c)  2003-2013 QLogic Corporation
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 *
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Andrew Vasquez 已提交
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 * See LICENSE.qla2xxx for copyright and licensing details.
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 */
#include "qla_def.h"
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#include "qla_target.h"
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#include <linux/delay.h>
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#include <linux/gfp.h>
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/*
 * qla2x00_mailbox_command
 *	Issue mailbox command and waits for completion.
 *
 * Input:
 *	ha = adapter block pointer.
 *	mcp = driver internal mbx struct pointer.
 *
 * Output:
 *	mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
 *
 * Returns:
 *	0 : QLA_SUCCESS = cmd performed success
 *	1 : QLA_FUNCTION_FAILED   (error encountered)
 *	6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
 *
 * Context:
 *	Kernel context.
 */
static int
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qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
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{
	int		rval;
	unsigned long    flags = 0;
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	device_reg_t __iomem *reg;
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	uint8_t		abort_active;
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	uint8_t		io_lock_on;
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	uint16_t	command = 0;
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	uint16_t	*iptr;
	uint16_t __iomem *optr;
	uint32_t	cnt;
	uint32_t	mboxes;
	unsigned long	wait_time;
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	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
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	ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
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	if (ha->pdev->error_state > pci_channel_io_frozen) {
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		ql_log(ql_log_warn, vha, 0x1001,
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		    "error_state is greater than pci_channel_io_frozen, "
		    "exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
57
	}
58

59
	if (vha->device_flags & DFLG_DEV_FAILED) {
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		ql_log(ql_log_warn, vha, 0x1002,
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		    "Device in failed state, exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
	}

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	reg = ha->iobase;
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	io_lock_on = base_vha->flags.init_done;
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	rval = QLA_SUCCESS;
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	abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
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	if (ha->flags.pci_channel_io_perm_failure) {
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		ql_log(ql_log_warn, vha, 0x1003,
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		    "Perm failure on EEH timeout MBX, exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
	}

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	if (IS_QLA82XX(ha) && ha->flags.isp82xx_fw_hung) {
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		/* Setting Link-Down error */
		mcp->mb[0] = MBS_LINK_DOWN_ERROR;
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		ql_log(ql_log_warn, vha, 0x1004,
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		    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
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		return QLA_FUNCTION_TIMEOUT;
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	}

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	/*
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	 * Wait for active mailbox commands to finish by waiting at most tov
	 * seconds. This is to serialize actual issuing of mailbox cmds during
	 * non ISP abort time.
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	 */
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	if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
		/* Timeout occurred. Return error. */
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		ql_log(ql_log_warn, vha, 0x1005,
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		    "Cmd access timeout, cmd=0x%x, Exiting.\n",
		    mcp->mb[0]);
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		return QLA_FUNCTION_TIMEOUT;
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	}

	ha->flags.mbox_busy = 1;
	/* Save mailbox command for debug */
	ha->mcp = mcp;

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	ql_dbg(ql_dbg_mbx, vha, 0x1006,
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	    "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
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	spin_lock_irqsave(&ha->hardware_lock, flags);

	/* Load mailbox registers. */
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	if (IS_QLA82XX(ha))
		optr = (uint16_t __iomem *)&reg->isp82.mailbox_in[0];
	else if (IS_FWI2_CAPABLE(ha) && !IS_QLA82XX(ha))
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		optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
	else
		optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
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	iptr = mcp->mb;
	command = mcp->mb[0];
	mboxes = mcp->out_mb;

	for (cnt = 0; cnt < ha->mbx_count; cnt++) {
		if (IS_QLA2200(ha) && cnt == 8)
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			optr =
			    (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
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		if (mboxes & BIT_0)
			WRT_REG_WORD(optr, *iptr);

		mboxes >>= 1;
		optr++;
		iptr++;
	}

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	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1111,
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	    "Loaded MBX registers (displayed in bytes) =.\n");
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	ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1112,
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	    (uint8_t *)mcp->mb, 16);
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	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1113,
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	    ".\n");
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	ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1114,
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	    ((uint8_t *)mcp->mb + 0x10), 16);
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	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1115,
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	    ".\n");
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	ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1116,
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	    ((uint8_t *)mcp->mb + 0x20), 8);
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	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
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	    "I/O Address = %p.\n", optr);
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	ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x100e);
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	/* Issue set host interrupt command to send cmd out. */
	ha->flags.mbox_int = 0;
	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

	/* Unlock mbx registers and wait for interrupt */
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	ql_dbg(ql_dbg_mbx, vha, 0x100f,
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	    "Going to unlock irq & waiting for interrupts. "
	    "jiffies=%lx.\n", jiffies);
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	/* Wait for mbx cmd completion until timeout */

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	if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
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		set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);

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		if (IS_QLA82XX(ha)) {
			if (RD_REG_DWORD(&reg->isp82.hint) &
				HINT_MBX_INT_PENDING) {
				spin_unlock_irqrestore(&ha->hardware_lock,
					flags);
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				ha->flags.mbox_busy = 0;
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				ql_dbg(ql_dbg_mbx, vha, 0x1010,
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				    "Pending mailbox timeout, exiting.\n");
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				rval = QLA_FUNCTION_TIMEOUT;
				goto premature_exit;
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			}
			WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
		} else if (IS_FWI2_CAPABLE(ha))
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			WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
		else
			WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
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		spin_unlock_irqrestore(&ha->hardware_lock, flags);

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		wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
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	} else {
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		ql_dbg(ql_dbg_mbx, vha, 0x1011,
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		    "Cmd=%x Polling Mode.\n", command);
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		if (IS_QLA82XX(ha)) {
			if (RD_REG_DWORD(&reg->isp82.hint) &
				HINT_MBX_INT_PENDING) {
				spin_unlock_irqrestore(&ha->hardware_lock,
					flags);
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				ha->flags.mbox_busy = 0;
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				ql_dbg(ql_dbg_mbx, vha, 0x1012,
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				    "Pending mailbox timeout, exiting.\n");
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				rval = QLA_FUNCTION_TIMEOUT;
				goto premature_exit;
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			}
			WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
		} else if (IS_FWI2_CAPABLE(ha))
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			WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
		else
			WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
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		spin_unlock_irqrestore(&ha->hardware_lock, flags);

		wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
		while (!ha->flags.mbox_int) {
			if (time_after(jiffies, wait_time))
				break;

			/* Check for pending interrupts. */
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			qla2x00_poll(ha->rsp_q_map[0]);
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			if (!ha->flags.mbox_int &&
			    !(IS_QLA2200(ha) &&
			    command == MBC_LOAD_RISC_RAM_EXTENDED))
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				msleep(10);
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		} /* while */
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		ql_dbg(ql_dbg_mbx, vha, 0x1013,
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		    "Waited %d sec.\n",
		    (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
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	}

	/* Check whether we timed out */
	if (ha->flags.mbox_int) {
		uint16_t *iptr2;

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		ql_dbg(ql_dbg_mbx, vha, 0x1014,
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		    "Cmd=%x completed.\n", command);
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		/* Got interrupt. Clear the flag. */
		ha->flags.mbox_int = 0;
		clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

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		if ((IS_QLA82XX(ha) && ha->flags.isp82xx_fw_hung)) {
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			ha->flags.mbox_busy = 0;
			/* Setting Link-Down error */
			mcp->mb[0] = MBS_LINK_DOWN_ERROR;
			ha->mcp = NULL;
			rval = QLA_FUNCTION_FAILED;
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			ql_log(ql_log_warn, vha, 0x1015,
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			    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
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			goto premature_exit;
		}

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		if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
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			rval = QLA_FUNCTION_FAILED;

		/* Load return mailbox registers. */
		iptr2 = mcp->mb;
		iptr = (uint16_t *)&ha->mailbox_out[0];
		mboxes = mcp->in_mb;
		for (cnt = 0; cnt < ha->mbx_count; cnt++) {
			if (mboxes & BIT_0)
				*iptr2 = *iptr;

			mboxes >>= 1;
			iptr2++;
			iptr++;
		}
	} else {

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		uint16_t mb0;
		uint32_t ictrl;

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		if (IS_FWI2_CAPABLE(ha)) {
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			mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
			ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
		} else {
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			mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
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			ictrl = RD_REG_WORD(&reg->isp.ictrl);
		}
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		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
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		    "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
		    "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
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		ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
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		/*
		 * Attempt to capture a firmware dump for further analysis
		 * of the current firmware state
		 */
		ha->isp_ops->fw_dump(vha, 0);

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		rval = QLA_FUNCTION_TIMEOUT;
	}

	ha->flags.mbox_busy = 0;

	/* Clean up */
	ha->mcp = NULL;

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	if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
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		ql_dbg(ql_dbg_mbx, vha, 0x101a,
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		    "Checking for additional resp interrupt.\n");
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		/* polling mode for non isp_abort commands. */
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		qla2x00_poll(ha->rsp_q_map[0]);
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	}

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	if (rval == QLA_FUNCTION_TIMEOUT &&
	    mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
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		if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
		    ha->flags.eeh_busy) {
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			/* not in dpc. schedule it for dpc to take over. */
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			ql_dbg(ql_dbg_mbx, vha, 0x101b,
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			    "Timeout, schedule isp_abort_needed.\n");
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			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
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				if (IS_QLA82XX(ha)) {
					ql_dbg(ql_dbg_mbx, vha, 0x112a,
					    "disabling pause transmit on port "
					    "0 & 1.\n");
					qla82xx_wr_32(ha,
					    QLA82XX_CRB_NIU + 0x98,
					    CRB_NIU_XG_PAUSE_CTL_P0|
					    CRB_NIU_XG_PAUSE_CTL_P1);
				}
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				ql_log(ql_log_info, base_vha, 0x101c,
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				    "Mailbox cmd timeout occurred, cmd=0x%x, "
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				    "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
				    "abort.\n", command, mcp->mb[0],
				    ha->flags.eeh_busy);
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				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
				qla2xxx_wake_dpc(vha);
			}
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		} else if (!abort_active) {
			/* call abort directly since we are in the DPC thread */
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			ql_dbg(ql_dbg_mbx, vha, 0x101d,
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			    "Timeout, calling abort_isp.\n");
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			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
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				if (IS_QLA82XX(ha)) {
					ql_dbg(ql_dbg_mbx, vha, 0x112b,
					    "disabling pause transmit on port "
					    "0 & 1.\n");
					qla82xx_wr_32(ha,
					    QLA82XX_CRB_NIU + 0x98,
					    CRB_NIU_XG_PAUSE_CTL_P0|
					    CRB_NIU_XG_PAUSE_CTL_P1);
				}
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				ql_log(ql_log_info, base_vha, 0x101e,
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				    "Mailbox cmd timeout occurred, cmd=0x%x, "
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				    "mb[0]=0x%x. Scheduling ISP abort ",
				    command, mcp->mb[0]);
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				set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
				clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
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				/* Allow next mbx cmd to come in. */
				complete(&ha->mbx_cmd_comp);
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				if (ha->isp_ops->abort_isp(vha)) {
					/* Failed. retry later. */
					set_bit(ISP_ABORT_NEEDED,
					    &vha->dpc_flags);
				}
				clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
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				ql_dbg(ql_dbg_mbx, vha, 0x101f,
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				    "Finished abort_isp.\n");
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				goto mbx_done;
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			}
		}
	}

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premature_exit:
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	/* Allow next mbx cmd to come in. */
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	complete(&ha->mbx_cmd_comp);
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mbx_done:
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	if (rval) {
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		ql_log(ql_log_warn, base_vha, 0x1020,
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		    "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
		    mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
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	} else {
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		ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
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	}

	return rval;
}

int
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qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
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    uint32_t risc_code_size)
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{
	int rval;
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	struct qla_hw_data *ha = vha->hw;
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	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

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	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
	    "Entered %s.\n", __func__);
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	if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
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		mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
		mcp->mb[8] = MSW(risc_addr);
		mcp->out_mb = MBX_8|MBX_0;
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	} else {
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		mcp->mb[0] = MBC_LOAD_RISC_RAM;
		mcp->out_mb = MBX_0;
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	}
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
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	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
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	if (IS_FWI2_CAPABLE(ha)) {
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		mcp->mb[4] = MSW(risc_code_size);
		mcp->mb[5] = LSW(risc_code_size);
		mcp->out_mb |= MBX_5|MBX_4;
	} else {
		mcp->mb[4] = LSW(risc_code_size);
		mcp->out_mb |= MBX_4;
	}

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	mcp->in_mb = MBX_0;
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	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
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	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
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		ql_dbg(ql_dbg_mbx, vha, 0x1023,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
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	} else {
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		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

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#define	EXTENDED_BB_CREDITS	BIT_0
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/*
 * qla2x00_execute_fw
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 *     Start adapter firmware.
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 *
 * Input:
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 *     ha = adapter block pointer.
 *     TARGET_QUEUE_LOCK must be released.
 *     ADAPTER_STATE_LOCK must be released.
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 *
 * Returns:
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 *     qla2x00 local function return status code.
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 *
 * Context:
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 *     Kernel context.
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 */
int
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qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
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{
	int rval;
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	struct qla_hw_data *ha = vha->hw;
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	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

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	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
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	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
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	if (IS_FWI2_CAPABLE(ha)) {
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		mcp->mb[1] = MSW(risc_addr);
		mcp->mb[2] = LSW(risc_addr);
		mcp->mb[3] = 0;
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		if (IS_QLA81XX(ha) || IS_QLA83XX(ha)) {
466 467 468 469 470
			struct nvram_81xx *nv = ha->nvram;
			mcp->mb[4] = (nv->enhanced_features &
			    EXTENDED_BB_CREDITS);
		} else
			mcp->mb[4] = 0;
471
		mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
472 473 474 475 476 477 478 479
		mcp->in_mb |= MBX_1;
	} else {
		mcp->mb[1] = LSW(risc_addr);
		mcp->out_mb |= MBX_1;
		if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
			mcp->mb[2] = 0;
			mcp->out_mb |= MBX_2;
		}
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	}

482
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
484
	rval = qla2x00_mailbox_command(vha, mcp);
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486
	if (rval != QLA_SUCCESS) {
487 488
		ql_dbg(ql_dbg_mbx, vha, 0x1026,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
489
	} else {
490
		if (IS_FWI2_CAPABLE(ha)) {
491
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
492
			    "Done exchanges=%x.\n", mcp->mb[1]);
493
		} else {
494 495
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
			    "Done %s.\n", __func__);
496 497
		}
	}
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	return rval;
}

/*
 * qla2x00_get_fw_version
 *	Get firmware version.
 *
 * Input:
 *	ha:		adapter state pointer.
 *	major:		pointer for major number.
 *	minor:		pointer for minor number.
 *	subminor:	pointer for subminor number.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
518
int
519
qla2x00_get_fw_version(scsi_qla_host_t *vha)
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{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
524
	struct qla_hw_data *ha = vha->hw;
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525

526 527
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
532
	if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha))
533
		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
534
	if (IS_FWI2_CAPABLE(ha))
535
		mcp->in_mb |= MBX_17|MBX_16|MBX_15;
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	mcp->flags = 0;
537
	mcp->tov = MBX_TOV_SECONDS;
538
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS)
		goto failed;
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	/* Return mailbox data. */
543 544 545 546
	ha->fw_major_version = mcp->mb[1];
	ha->fw_minor_version = mcp->mb[2];
	ha->fw_subminor_version = mcp->mb[3];
	ha->fw_attributes = mcp->mb[6];
547
	if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
548
		ha->fw_memory_size = 0x1FFFF;		/* Defaults to 128KB. */
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	else
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		ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
	if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw)) {
		ha->mpi_version[0] = mcp->mb[10] & 0xff;
		ha->mpi_version[1] = mcp->mb[11] >> 8;
		ha->mpi_version[2] = mcp->mb[11] & 0xff;
		ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
		ha->phy_version[0] = mcp->mb[8] & 0xff;
		ha->phy_version[1] = mcp->mb[9] >> 8;
		ha->phy_version[2] = mcp->mb[9] & 0xff;
	}
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	if (IS_FWI2_CAPABLE(ha)) {
		ha->fw_attributes_h = mcp->mb[15];
		ha->fw_attributes_ext[0] = mcp->mb[16];
		ha->fw_attributes_ext[1] = mcp->mb[17];
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
		    "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
		    __func__, mcp->mb[15], mcp->mb[6]);
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
		    "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
		    __func__, mcp->mb[17], mcp->mb[16]);
570
	}
571

572
failed:
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
575
		ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
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	} else {
		/*EMPTY*/
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		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
		    "Done %s.\n", __func__);
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	}
581
	return rval;
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}

/*
 * qla2x00_get_fw_options
 *	Set firmware options.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fwopt = pointer for firmware options.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
599
qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

605 606
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
611
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
613
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
617
		ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
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	} else {
619
		fwopts[0] = mcp->mb[0];
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		fwopts[1] = mcp->mb[1];
		fwopts[2] = mcp->mb[2];
		fwopts[3] = mcp->mb[3];

624 625
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
		    "Done %s.\n", __func__);
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	}

	return rval;
}


/*
 * qla2x00_set_fw_options
 *	Set firmware options.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fwopt = pointer for firmware options.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
647
qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

653 654
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
	mcp->mb[1] = fwopts[1];
	mcp->mb[2] = fwopts[2];
	mcp->mb[3] = fwopts[3];
660
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
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	mcp->in_mb = MBX_0;
662
	if (IS_FWI2_CAPABLE(vha->hw)) {
663 664 665 666 667 668 669
		mcp->in_mb |= MBX_1;
	} else {
		mcp->mb[10] = fwopts[10];
		mcp->mb[11] = fwopts[11];
		mcp->mb[12] = 0;	/* Undocumented, but used */
		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
	}
670
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
672
	rval = qla2x00_mailbox_command(vha, mcp);
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674 675
	fwopts[0] = mcp->mb[0];

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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
678 679
		ql_dbg(ql_dbg_mbx, vha, 0x1030,
		    "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
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	} else {
		/*EMPTY*/
682 683
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_mbx_reg_test
 *	Mailbox register wrap test.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
705
qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

711 712
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
	mcp->mb[1] = 0xAAAA;
	mcp->mb[2] = 0x5555;
	mcp->mb[3] = 0xAA55;
	mcp->mb[4] = 0x55AA;
	mcp->mb[5] = 0xA5A5;
	mcp->mb[6] = 0x5A5A;
	mcp->mb[7] = 0x2525;
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
724
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
726
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval == QLA_SUCCESS) {
		if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
		    mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
			rval = QLA_FUNCTION_FAILED;
		if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
		    mcp->mb[7] != 0x2525)
			rval = QLA_FUNCTION_FAILED;
	}

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
739
		ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
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	} else {
		/*EMPTY*/
742 743
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_verify_checksum
 *	Verify firmware checksum.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
765
qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

771 772
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_VERIFY_CHECKSUM;
775 776
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
777
	if (IS_FWI2_CAPABLE(vha->hw)) {
778 779 780 781 782 783 784 785 786 787
		mcp->mb[1] = MSW(risc_addr);
		mcp->mb[2] = LSW(risc_addr);
		mcp->out_mb |= MBX_2|MBX_1;
		mcp->in_mb |= MBX_2|MBX_1;
	} else {
		mcp->mb[1] = LSW(risc_addr);
		mcp->out_mb |= MBX_1;
		mcp->in_mb |= MBX_1;
	}

788
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
790
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
793 794 795
		ql_dbg(ql_dbg_mbx, vha, 0x1036,
		    "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
		    (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
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	} else {
797 798
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_issue_iocb
 *	Issue IOCB using mailbox command
 *
 * Input:
 *	ha = adapter state pointer.
 *	buffer = buffer pointer.
 *	phys_addr = physical address of buffer.
 *	size = size of buffer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
822
int
823
qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
824
    dma_addr_t phys_addr, size_t size, uint32_t tov)
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{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;

830 831
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
	    "Entered %s.\n", __func__);
832

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	mcp->mb[0] = MBC_IOCB_COMMAND_A64;
	mcp->mb[1] = 0;
	mcp->mb[2] = MSW(phys_addr);
	mcp->mb[3] = LSW(phys_addr);
	mcp->mb[6] = MSW(MSD(phys_addr));
	mcp->mb[7] = LSW(MSD(phys_addr));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_0;
841
	mcp->tov = tov;
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	mcp->flags = 0;
843
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
847
		ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
L
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	} else {
849 850 851 852
		sts_entry_t *sts_entry = (sts_entry_t *) buffer;

		/* Mask reserved bits. */
		sts_entry->entry_status &=
853
		    IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
854 855
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

861
int
862
qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
863 864
    size_t size)
{
865
	return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
866 867 868
	    MBX_TOV_SECONDS);
}

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/*
 * qla2x00_abort_command
 *	Abort command aborts a specified IOCB.
 *
 * Input:
 *	ha = adapter block pointer.
 *	sp = SB structure pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
884
qla2x00_abort_command(srb_t *sp)
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{
	unsigned long   flags = 0;
	int		rval;
888
	uint32_t	handle = 0;
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	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
891 892
	fc_port_t	*fcport = sp->fcport;
	scsi_qla_host_t *vha = fcport->vha;
893
	struct qla_hw_data *ha = vha->hw;
894
	struct req_que *req = vha->req;
895
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
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897 898
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
	    "Entered %s.\n", __func__);
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900
	spin_lock_irqsave(&ha->hardware_lock, flags);
901
	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
902
		if (req->outstanding_cmds[handle] == sp)
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			break;
	}
905
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
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907
	if (handle == req->num_outstanding_cmds) {
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		/* command not found */
		return QLA_FUNCTION_FAILED;
	}

	mcp->mb[0] = MBC_ABORT_COMMAND;
	if (HAS_EXTENDED_IDS(ha))
		mcp->mb[1] = fcport->loop_id;
	else
		mcp->mb[1] = fcport->loop_id << 8;
	mcp->mb[2] = (uint16_t)handle;
	mcp->mb[3] = (uint16_t)(handle >> 16);
919
	mcp->mb[6] = (uint16_t)cmd->device->lun;
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	mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
922
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
924
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
927
		ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
L
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	} else {
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		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

int
937
qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
L
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{
939
	int rval, rval2;
L
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	mbx_cmd_t  mc;
	mbx_cmd_t  *mcp = &mc;
942
	scsi_qla_host_t *vha;
943 944
	struct req_que *req;
	struct rsp_que *rsp;
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946
	l = l;
947
	vha = fcport->vha;
948

949 950
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
	    "Entered %s.\n", __func__);
951

952 953
	req = vha->hw->req_q_map[0];
	rsp = req->rsp;
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	mcp->mb[0] = MBC_ABORT_TARGET;
955
	mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
956
	if (HAS_EXTENDED_IDS(vha->hw)) {
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		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = fcport->loop_id << 8;
	}
963 964
	mcp->mb[2] = vha->hw->loop_reset_delay;
	mcp->mb[9] = vha->vp_idx;
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	mcp->in_mb = MBX_0;
967
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
969
	rval = qla2x00_mailbox_command(vha, mcp);
970
	if (rval != QLA_SUCCESS) {
971 972
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
		    "Failed=%x.\n", rval);
973 974 975
	}

	/* Issue marker IOCB. */
976 977
	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
							MK_SYNC_ID);
978
	if (rval2 != QLA_SUCCESS) {
979 980
		ql_dbg(ql_dbg_mbx, vha, 0x1040,
		    "Failed to issue marker IOCB (%x).\n", rval2);
981
	} else {
982 983
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
		    "Done %s.\n", __func__);
984 985 986 987 988 989
	}

	return rval;
}

int
990
qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
991 992 993 994
{
	int rval, rval2;
	mbx_cmd_t  mc;
	mbx_cmd_t  *mcp = &mc;
995
	scsi_qla_host_t *vha;
996 997
	struct req_que *req;
	struct rsp_que *rsp;
998

999
	vha = fcport->vha;
1000

1001 1002
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
	    "Entered %s.\n", __func__);
1003

1004 1005
	req = vha->hw->req_q_map[0];
	rsp = req->rsp;
1006 1007
	mcp->mb[0] = MBC_LUN_RESET;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1008
	if (HAS_EXTENDED_IDS(vha->hw))
1009 1010 1011 1012 1013
		mcp->mb[1] = fcport->loop_id;
	else
		mcp->mb[1] = fcport->loop_id << 8;
	mcp->mb[2] = l;
	mcp->mb[3] = 0;
1014
	mcp->mb[9] = vha->vp_idx;
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1016
	mcp->in_mb = MBX_0;
1017
	mcp->tov = MBX_TOV_SECONDS;
1018
	mcp->flags = 0;
1019
	rval = qla2x00_mailbox_command(vha, mcp);
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1020
	if (rval != QLA_SUCCESS) {
1021
		ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1022 1023 1024
	}

	/* Issue marker IOCB. */
1025 1026
	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
								MK_SYNC_ID_LUN);
1027
	if (rval2 != QLA_SUCCESS) {
1028 1029
		ql_dbg(ql_dbg_mbx, vha, 0x1044,
		    "Failed to issue marker IOCB (%x).\n", rval2);
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	} else {
1031 1032
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_get_adapter_id
 *	Get adapter ID and topology.
 *
 * Input:
 *	ha = adapter block pointer.
 *	id = pointer for loop ID.
 *	al_pa = pointer for AL_PA.
 *	area = pointer for area.
 *	domain = pointer for domain.
 *	top = pointer for topology.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1059
qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1060
    uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1066 1067
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1070
	mcp->mb[9] = vha->vp_idx;
1071
	mcp->out_mb = MBX_9|MBX_0;
1072
	mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1073
	if (IS_CNA_CAPABLE(vha->hw))
1074
		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1075
	mcp->tov = MBX_TOV_SECONDS;
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1076
	mcp->flags = 0;
1077
	rval = qla2x00_mailbox_command(vha, mcp);
1078 1079
	if (mcp->mb[0] == MBS_COMMAND_ERROR)
		rval = QLA_COMMAND_ERROR;
1080 1081
	else if (mcp->mb[0] == MBS_INVALID_COMMAND)
		rval = QLA_INVALID_COMMAND;
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	/* Return data. */
	*id = mcp->mb[1];
	*al_pa = LSB(mcp->mb[2]);
	*area = MSB(mcp->mb[2]);
	*domain	= LSB(mcp->mb[3]);
	*top = mcp->mb[6];
1089
	*sw_cap = mcp->mb[7];
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1090 1091 1092

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1093
		ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
L
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1094
	} else {
1095 1096
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
		    "Done %s.\n", __func__);
1097

1098
		if (IS_CNA_CAPABLE(vha->hw)) {
1099 1100 1101 1102 1103 1104 1105 1106 1107
			vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
			vha->fcoe_fcf_idx = mcp->mb[10];
			vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
			vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
			vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
			vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
			vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
			vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
		}
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1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128
	}

	return rval;
}

/*
 * qla2x00_get_retry_cnt
 *	Get current firmware login retry count and delay.
 *
 * Input:
 *	ha = adapter block pointer.
 *	retry_cnt = pointer to login retry count.
 *	tov = pointer to login timeout value.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1129
qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
L
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1130 1131 1132 1133 1134 1135 1136
    uint16_t *r_a_tov)
{
	int rval;
	uint16_t ratov;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1137 1138
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
	    "Entered %s.\n", __func__);
L
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1139 1140 1141 1142

	mcp->mb[0] = MBC_GET_RETRY_COUNT;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1143
	mcp->tov = MBX_TOV_SECONDS;
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1144
	mcp->flags = 0;
1145
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1146 1147 1148

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1149 1150
		ql_dbg(ql_dbg_mbx, vha, 0x104a,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
L
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1151 1152 1153 1154 1155 1156 1157 1158 1159 1160
	} else {
		/* Convert returned data and check our values. */
		*r_a_tov = mcp->mb[3] / 2;
		ratov = (mcp->mb[3]/2) / 10;  /* mb[3] value is in 100ms */
		if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
			/* Update to the larger values */
			*retry_cnt = (uint8_t)mcp->mb[1];
			*tov = ratov;
		}

1161
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1162
		    "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
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1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185
	}

	return rval;
}

/*
 * qla2x00_init_firmware
 *	Initialize adapter firmware.
 *
 * Input:
 *	ha = adapter block pointer.
 *	dptr = Initialization control block pointer.
 *	size = size of initialization control block.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1186
qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
L
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1187 1188 1189 1190
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
1191
	struct qla_hw_data *ha = vha->hw;
L
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1192

1193 1194
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
	    "Entered %s.\n", __func__);
L
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1195

1196 1197 1198 1199
	if (IS_QLA82XX(ha) && ql2xdbwr)
		qla82xx_wr_32(ha, ha->nxdb_wr_ptr,
			(0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));

1200
	if (ha->flags.npiv_supported)
1201 1202 1203 1204
		mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
	else
		mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;

1205
	mcp->mb[1] = 0;
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	mcp->mb[2] = MSW(ha->init_cb_dma);
	mcp->mb[3] = LSW(ha->init_cb_dma);
	mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
	mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1210
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1211
	if ((IS_QLA81XX(ha) || IS_QLA83XX(ha)) && ha->ex_init_cb->ex_version) {
1212 1213 1214 1215 1216 1217 1218 1219
		mcp->mb[1] = BIT_0;
		mcp->mb[10] = MSW(ha->ex_init_cb_dma);
		mcp->mb[11] = LSW(ha->ex_init_cb_dma);
		mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
		mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
		mcp->mb[14] = sizeof(*ha->ex_init_cb);
		mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
	}
1220 1221 1222 1223 1224
	/* 1 and 2 should normally be captured. */
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	if (IS_QLA83XX(ha))
		/* mb3 is additional info about the installed SFP. */
		mcp->in_mb  |= MBX_3;
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1225 1226
	mcp->buf_size = size;
	mcp->flags = MBX_DMA_OUT;
1227
	mcp->tov = MBX_TOV_SECONDS;
1228
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1229 1230 1231

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1232
		ql_dbg(ql_dbg_mbx, vha, 0x104d,
1233 1234
		    "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
L
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1235 1236
	} else {
		/*EMPTY*/
1237 1238
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
		    "Done %s.\n", __func__);
L
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1239 1240 1241 1242 1243
	}

	return rval;
}

1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333
/*
 * qla2x00_get_node_name_list
 *      Issue get node name list mailbox command, kmalloc()
 *      and return the resulting list. Caller must kfree() it!
 *
 * Input:
 *      ha = adapter state pointer.
 *      out_data = resulting list
 *      out_len = length of the resulting list
 *
 * Returns:
 *      qla2x00 local function return status code.
 *
 * Context:
 *      Kernel context.
 */
int
qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
{
	struct qla_hw_data *ha = vha->hw;
	struct qla_port_24xx_data *list = NULL;
	void *pmap;
	mbx_cmd_t mc;
	dma_addr_t pmap_dma;
	ulong dma_size;
	int rval, left;

	left = 1;
	while (left > 0) {
		dma_size = left * sizeof(*list);
		pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
					 &pmap_dma, GFP_KERNEL);
		if (!pmap) {
			ql_log(ql_log_warn, vha, 0x113f,
			    "%s(%ld): DMA Alloc failed of %ld\n",
			    __func__, vha->host_no, dma_size);
			rval = QLA_MEMORY_ALLOC_FAILED;
			goto out;
		}

		mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
		mc.mb[1] = BIT_1 | BIT_3;
		mc.mb[2] = MSW(pmap_dma);
		mc.mb[3] = LSW(pmap_dma);
		mc.mb[6] = MSW(MSD(pmap_dma));
		mc.mb[7] = LSW(MSD(pmap_dma));
		mc.mb[8] = dma_size;
		mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
		mc.in_mb = MBX_0|MBX_1;
		mc.tov = 30;
		mc.flags = MBX_DMA_IN;

		rval = qla2x00_mailbox_command(vha, &mc);
		if (rval != QLA_SUCCESS) {
			if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
			    (mc.mb[1] == 0xA)) {
				left += le16_to_cpu(mc.mb[2]) /
				    sizeof(struct qla_port_24xx_data);
				goto restart;
			}
			goto out_free;
		}

		left = 0;

		list = kzalloc(dma_size, GFP_KERNEL);
		if (!list) {
			ql_log(ql_log_warn, vha, 0x1140,
			    "%s(%ld): failed to allocate node names list "
			    "structure.\n", __func__, vha->host_no);
			rval = QLA_MEMORY_ALLOC_FAILED;
			goto out_free;
		}

		memcpy(list, pmap, dma_size);
restart:
		dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
	}

	*out_data = list;
	*out_len = dma_size;

out:
	return rval;

out_free:
	dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
	return rval;
}

L
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1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350
/*
 * qla2x00_get_port_database
 *	Issue normal/enhanced get port database mailbox command
 *	and copy device name as necessary.
 *
 * Input:
 *	ha = adapter state pointer.
 *	dev = structure pointer.
 *	opt = enhanced cmd option byte.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1351
qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
L
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1352 1353 1354 1355 1356
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	port_database_t *pd;
1357
	struct port_database_24xx *pd24;
L
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1358
	dma_addr_t pd_dma;
1359
	struct qla_hw_data *ha = vha->hw;
L
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1360

1361 1362
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
	    "Entered %s.\n", __func__);
L
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1363

1364 1365
	pd24 = NULL;
	pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
L
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1366
	if (pd  == NULL) {
1367 1368
		ql_log(ql_log_warn, vha, 0x1050,
		    "Failed to allocate port database structure.\n");
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1369 1370
		return QLA_MEMORY_ALLOC_FAILED;
	}
1371
	memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
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1373
	mcp->mb[0] = MBC_GET_PORT_DATABASE;
1374
	if (opt != 0 && !IS_FWI2_CAPABLE(ha))
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		mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
	mcp->mb[2] = MSW(pd_dma);
	mcp->mb[3] = LSW(pd_dma);
	mcp->mb[6] = MSW(MSD(pd_dma));
	mcp->mb[7] = LSW(MSD(pd_dma));
1380
	mcp->mb[9] = vha->vp_idx;
1381
	mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
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	mcp->in_mb = MBX_0;
1383
	if (IS_FWI2_CAPABLE(ha)) {
1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395
		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10|MBX_1;
		mcp->in_mb |= MBX_1;
	} else if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10|MBX_1;
	} else {
		mcp->mb[1] = fcport->loop_id << 8 | opt;
		mcp->out_mb |= MBX_1;
	}
1396 1397
	mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
	    PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
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	mcp->flags = MBX_DMA_IN;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1400
	rval = qla2x00_mailbox_command(vha, mcp);
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1401 1402 1403
	if (rval != QLA_SUCCESS)
		goto gpd_error_out;

1404
	if (IS_FWI2_CAPABLE(ha)) {
1405
		uint64_t zero = 0;
1406 1407 1408 1409 1410
		pd24 = (struct port_database_24xx *) pd;

		/* Check for logged in state. */
		if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
		    pd24->last_login_state != PDS_PRLI_COMPLETE) {
1411 1412 1413 1414
			ql_dbg(ql_dbg_mbx, vha, 0x1051,
			    "Unable to verify login-state (%x/%x) for "
			    "loop_id %x.\n", pd24->current_login_state,
			    pd24->last_login_state, fcport->loop_id);
1415 1416 1417
			rval = QLA_FUNCTION_FAILED;
			goto gpd_error_out;
		}
L
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1418

1419 1420 1421 1422 1423 1424 1425 1426
		if (fcport->loop_id == FC_NO_LOOP_ID ||
		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
		     memcmp(fcport->port_name, pd24->port_name, 8))) {
			/* We lost the device mid way. */
			rval = QLA_NOT_LOGGED_IN;
			goto gpd_error_out;
		}

1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441
		/* Names are little-endian. */
		memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
		memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);

		/* Get port_id of device. */
		fcport->d_id.b.domain = pd24->port_id[0];
		fcport->d_id.b.area = pd24->port_id[1];
		fcport->d_id.b.al_pa = pd24->port_id[2];
		fcport->d_id.b.rsvd_1 = 0;

		/* If not target must be initiator or unknown type. */
		if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type = FCT_INITIATOR;
		else
			fcport->port_type = FCT_TARGET;
1442 1443 1444 1445 1446 1447 1448

		/* Passback COS information. */
		fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
				FC_COS_CLASS2 : FC_COS_CLASS3;

		if (pd24->prli_svc_param_word_3[0] & BIT_7)
			fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1449
	} else {
1450 1451
		uint64_t zero = 0;

1452 1453 1454
		/* Check for logged in state. */
		if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
		    pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1455 1456 1457 1458 1459
			ql_dbg(ql_dbg_mbx, vha, 0x100a,
			    "Unable to verify login-state (%x/%x) - "
			    "portid=%02x%02x%02x.\n", pd->master_state,
			    pd->slave_state, fcport->d_id.b.domain,
			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
1460 1461 1462
			rval = QLA_FUNCTION_FAILED;
			goto gpd_error_out;
		}
L
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1463

1464 1465 1466 1467 1468 1469 1470 1471
		if (fcport->loop_id == FC_NO_LOOP_ID ||
		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
		     memcmp(fcport->port_name, pd->port_name, 8))) {
			/* We lost the device mid way. */
			rval = QLA_NOT_LOGGED_IN;
			goto gpd_error_out;
		}

1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486
		/* Names are little-endian. */
		memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
		memcpy(fcport->port_name, pd->port_name, WWN_SIZE);

		/* Get port_id of device. */
		fcport->d_id.b.domain = pd->port_id[0];
		fcport->d_id.b.area = pd->port_id[3];
		fcport->d_id.b.al_pa = pd->port_id[2];
		fcport->d_id.b.rsvd_1 = 0;

		/* If not target must be initiator or unknown type. */
		if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type = FCT_INITIATOR;
		else
			fcport->port_type = FCT_TARGET;
1487 1488 1489 1490

		/* Passback COS information. */
		fcport->supported_classes = (pd->options & BIT_4) ?
		    FC_COS_CLASS2: FC_COS_CLASS3;
1491
	}
L
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gpd_error_out:
	dma_pool_free(ha->s_dma_pool, pd, pd_dma);

	if (rval != QLA_SUCCESS) {
1497 1498 1499
		ql_dbg(ql_dbg_mbx, vha, 0x1052,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
		    mcp->mb[0], mcp->mb[1]);
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	} else {
1501 1502
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_get_firmware_state
 *	Get adapter firmware state.
 *
 * Input:
 *	ha = adapter block pointer.
 *	dptr = pointer for firmware state.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1525
qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
L
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1526 1527 1528 1529 1530
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1531 1532
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
	    "Entered %s.\n", __func__);
L
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1533 1534 1535

	mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
	mcp->out_mb = MBX_0;
1536 1537 1538 1539
	if (IS_FWI2_CAPABLE(vha->hw))
		mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	else
		mcp->in_mb = MBX_1|MBX_0;
1540
	mcp->tov = MBX_TOV_SECONDS;
L
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1541
	mcp->flags = 0;
1542
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1543

1544 1545
	/* Return firmware states. */
	states[0] = mcp->mb[1];
1546 1547 1548 1549 1550 1551
	if (IS_FWI2_CAPABLE(vha->hw)) {
		states[1] = mcp->mb[2];
		states[2] = mcp->mb[3];
		states[3] = mcp->mb[4];
		states[4] = mcp->mb[5];
	}
L
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1552 1553 1554

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1555
		ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
L
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1556 1557
	} else {
		/*EMPTY*/
1558 1559
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
		    "Done %s.\n", __func__);
L
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1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583
	}

	return rval;
}

/*
 * qla2x00_get_port_name
 *	Issue get port name mailbox command.
 *	Returned name is in big endian format.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = loop ID of device.
 *	name = pointer for name.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1584
qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
L
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1585 1586 1587 1588 1589 1590
    uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1591 1592
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
	    "Entered %s.\n", __func__);
L
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1593 1594

	mcp->mb[0] = MBC_GET_PORT_NAME;
1595
	mcp->mb[9] = vha->vp_idx;
1596
	mcp->out_mb = MBX_9|MBX_1|MBX_0;
1597
	if (HAS_EXTENDED_IDS(vha->hw)) {
L
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		mcp->mb[1] = loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = loop_id << 8 | opt;
	}

	mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1606
	mcp->tov = MBX_TOV_SECONDS;
L
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1607
	mcp->flags = 0;
1608
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1609 1610 1611

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1612
		ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
L
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1613 1614 1615
	} else {
		if (name != NULL) {
			/* This function returns name in big endian. */
1616 1617 1618 1619 1620 1621 1622 1623
			name[0] = MSB(mcp->mb[2]);
			name[1] = LSB(mcp->mb[2]);
			name[2] = MSB(mcp->mb[3]);
			name[3] = LSB(mcp->mb[3]);
			name[4] = MSB(mcp->mb[6]);
			name[5] = LSB(mcp->mb[6]);
			name[6] = MSB(mcp->mb[7]);
			name[7] = LSB(mcp->mb[7]);
L
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1624 1625
		}

1626 1627
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
		    "Done %s.\n", __func__);
L
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1628 1629 1630 1631 1632
	}

	return rval;
}

1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680
/*
 * qla24xx_link_initialization
 *	Issue link initialization mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_link_initialize(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
	    "Entered %s.\n", __func__);

	if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_LINK_INITIALIZATION;
	mcp->mb[1] = BIT_6|BIT_4;
	mcp->mb[2] = 0;
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
		    "Done %s.\n", __func__);
	}

	return rval;
}

L
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1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696
/*
 * qla2x00_lip_reset
 *	Issue LIP reset mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1697
qla2x00_lip_reset(scsi_qla_host_t *vha)
L
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1698 1699 1700 1701 1702
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1703 1704
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
1705

1706
	if (IS_CNA_CAPABLE(vha->hw)) {
1707 1708 1709 1710 1711 1712
		/* Logout across all FCFs. */
		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
		mcp->mb[1] = BIT_1;
		mcp->mb[2] = 0;
		mcp->out_mb = MBX_2|MBX_1|MBX_0;
	} else if (IS_FWI2_CAPABLE(vha->hw)) {
1713
		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1714 1715
		mcp->mb[1] = BIT_6;
		mcp->mb[2] = 0;
1716
		mcp->mb[3] = vha->hw->loop_reset_delay;
1717
		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
L
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1718
	} else {
1719 1720
		mcp->mb[0] = MBC_LIP_RESET;
		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1721
		if (HAS_EXTENDED_IDS(vha->hw)) {
1722 1723 1724 1725 1726 1727
			mcp->mb[1] = 0x00ff;
			mcp->mb[10] = 0;
			mcp->out_mb |= MBX_10;
		} else {
			mcp->mb[1] = 0xff00;
		}
1728
		mcp->mb[2] = vha->hw->loop_reset_delay;
1729
		mcp->mb[3] = 0;
L
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1730 1731
	}
	mcp->in_mb = MBX_0;
1732
	mcp->tov = MBX_TOV_SECONDS;
L
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1733
	mcp->flags = 0;
1734
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1735 1736 1737

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1738
		ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
1739 1740
	} else {
		/*EMPTY*/
1741 1742
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766
	}

	return rval;
}

/*
 * qla2x00_send_sns
 *	Send SNS command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	sns = pointer for command.
 *	cmd_size = command size.
 *	buf_size = response/command size.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1767
qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
L
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1768 1769 1770 1771 1772 1773
    uint16_t cmd_size, size_t buf_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1774 1775
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
	    "Entered %s.\n", __func__);
L
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1776

1777
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
1778 1779
	    "Retry cnt=%d ratov=%d total tov=%d.\n",
	    vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
L
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1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790

	mcp->mb[0] = MBC_SEND_SNS_COMMAND;
	mcp->mb[1] = cmd_size;
	mcp->mb[2] = MSW(sns_phys_address);
	mcp->mb[3] = LSW(sns_phys_address);
	mcp->mb[6] = MSW(MSD(sns_phys_address));
	mcp->mb[7] = LSW(MSD(sns_phys_address));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->buf_size = buf_size;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
1791 1792
	mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1793 1794 1795

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1796 1797 1798
		ql_dbg(ql_dbg_mbx, vha, 0x105f,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
L
Linus Torvalds 已提交
1799 1800
	} else {
		/*EMPTY*/
1801 1802
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
		    "Done %s.\n", __func__);
L
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1803 1804 1805 1806 1807
	}

	return rval;
}

1808
int
1809
qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1810 1811 1812 1813 1814 1815 1816
    uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
{
	int		rval;

	struct logio_entry_24xx *lg;
	dma_addr_t	lg_dma;
	uint32_t	iop[2];
1817
	struct qla_hw_data *ha = vha->hw;
1818 1819
	struct req_que *req;
	struct rsp_que *rsp;
1820

1821 1822
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
	    "Entered %s.\n", __func__);
1823

1824
	if (ha->flags.cpu_affinity_enabled)
1825 1826 1827
		req = ha->req_q_map[0];
	else
		req = vha->req;
1828 1829
	rsp = req->rsp;

1830 1831
	lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
	if (lg == NULL) {
1832 1833
		ql_log(ql_log_warn, vha, 0x1062,
		    "Failed to allocate login IOCB.\n");
1834 1835 1836 1837 1838 1839
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(lg, 0, sizeof(struct logio_entry_24xx));

	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
	lg->entry_count = 1;
1840
	lg->handle = MAKE_HANDLE(req->id, lg->handle);
1841 1842 1843 1844
	lg->nport_handle = cpu_to_le16(loop_id);
	lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
	if (opt & BIT_0)
		lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
1845 1846
	if (opt & BIT_1)
		lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
1847 1848 1849
	lg->port_id[0] = al_pa;
	lg->port_id[1] = area;
	lg->port_id[2] = domain;
1850
	lg->vp_index = vha->vp_idx;
1851 1852
	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
	    (ha->r_a_tov / 10 * 2) + 2);
1853
	if (rval != QLA_SUCCESS) {
1854 1855
		ql_dbg(ql_dbg_mbx, vha, 0x1063,
		    "Failed to issue login IOCB (%x).\n", rval);
1856
	} else if (lg->entry_status != 0) {
1857 1858 1859
		ql_dbg(ql_dbg_mbx, vha, 0x1064,
		    "Failed to complete IOCB -- error status (%x).\n",
		    lg->entry_status);
1860 1861 1862 1863 1864
		rval = QLA_FUNCTION_FAILED;
	} else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
		iop[0] = le32_to_cpu(lg->io_parameter[0]);
		iop[1] = le32_to_cpu(lg->io_parameter[1]);

1865 1866 1867 1868
		ql_dbg(ql_dbg_mbx, vha, 0x1065,
		    "Failed to complete IOCB -- completion  status (%x) "
		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
		    iop[0], iop[1]);
1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895

		switch (iop[0]) {
		case LSC_SCODE_PORTID_USED:
			mb[0] = MBS_PORT_ID_USED;
			mb[1] = LSW(iop[1]);
			break;
		case LSC_SCODE_NPORT_USED:
			mb[0] = MBS_LOOP_ID_USED;
			break;
		case LSC_SCODE_NOLINK:
		case LSC_SCODE_NOIOCB:
		case LSC_SCODE_NOXCB:
		case LSC_SCODE_CMD_FAILED:
		case LSC_SCODE_NOFABRIC:
		case LSC_SCODE_FW_NOT_READY:
		case LSC_SCODE_NOT_LOGGED_IN:
		case LSC_SCODE_NOPCB:
		case LSC_SCODE_ELS_REJECT:
		case LSC_SCODE_CMD_PARAM_ERR:
		case LSC_SCODE_NONPORT:
		case LSC_SCODE_LOGGED_IN:
		case LSC_SCODE_NOFLOGI_ACC:
		default:
			mb[0] = MBS_COMMAND_ERROR;
			break;
		}
	} else {
1896 1897
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
		    "Done %s.\n", __func__);
1898 1899 1900 1901 1902 1903 1904 1905 1906 1907

		iop[0] = le32_to_cpu(lg->io_parameter[0]);

		mb[0] = MBS_COMMAND_COMPLETE;
		mb[1] = 0;
		if (iop[0] & BIT_4) {
			if (iop[0] & BIT_8)
				mb[1] |= BIT_1;
		} else
			mb[1] = BIT_0;
1908 1909 1910 1911 1912 1913 1914

		/* Passback COS information. */
		mb[10] = 0;
		if (lg->io_parameter[7] || lg->io_parameter[8])
			mb[10] |= BIT_0;	/* Class 2. */
		if (lg->io_parameter[9] || lg->io_parameter[10])
			mb[10] |= BIT_1;	/* Class 3. */
1915 1916 1917 1918
		if (lg->io_parameter[0] & __constant_cpu_to_le32(BIT_7))
			mb[10] |= BIT_7;	/* Confirmed Completion
						 * Allowed
						 */
1919 1920 1921 1922 1923 1924 1925
	}

	dma_pool_free(ha->s_dma_pool, lg, lg_dma);

	return rval;
}

L
Linus Torvalds 已提交
1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947
/*
 * qla2x00_login_fabric
 *	Issue login fabric port mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	domain = device domain.
 *	area = device area.
 *	al_pa = device AL_PA.
 *	status = pointer for return status.
 *	opt = command options.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1948
qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
L
Linus Torvalds 已提交
1949 1950 1951 1952 1953
    uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
1954
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1955

1956 1957
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973

	mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = (loop_id << 8) | opt;
	}
	mcp->mb[2] = domain;
	mcp->mb[3] = area << 8 | al_pa;

	mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
	mcp->flags = 0;
1974
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
1975 1976 1977 1978 1979 1980 1981 1982

	/* Return mailbox statuses. */
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[2] = mcp->mb[2];
		mb[6] = mcp->mb[6];
		mb[7] = mcp->mb[7];
1983 1984
		/* COS retrieved from Get-Port-Database mailbox command. */
		mb[10] = 0;
L
Linus Torvalds 已提交
1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999
	}

	if (rval != QLA_SUCCESS) {
		/* RLU tmp code: need to change main mailbox_command function to
		 * return ok even when the mailbox completion value is not
		 * SUCCESS. The caller needs to be responsible to interpret
		 * the return values of this mailbox command if we're not
		 * to change too much of the existing code.
		 */
		if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
		    mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
		    mcp->mb[0] == 0x4006)
			rval = QLA_SUCCESS;

		/*EMPTY*/
2000 2001 2002
		ql_dbg(ql_dbg_mbx, vha, 0x1068,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
L
Linus Torvalds 已提交
2003 2004
	} else {
		/*EMPTY*/
2005 2006
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2007 2008 2009 2010 2011 2012 2013 2014
	}

	return rval;
}

/*
 * qla2x00_login_local_device
 *           Issue login loop port mailbox command.
A
Andrew Vasquez 已提交
2015
 *
L
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2016 2017 2018 2019
 * Input:
 *           ha = adapter block pointer.
 *           loop_id = device loop ID.
 *           opt = command options.
A
Andrew Vasquez 已提交
2020
 *
L
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2021 2022
 * Returns:
 *            Return status code.
A
Andrew Vasquez 已提交
2023
 *
L
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2024 2025
 * Context:
 *            Kernel context.
A
Andrew Vasquez 已提交
2026
 *
L
Linus Torvalds 已提交
2027 2028
 */
int
2029
qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
L
Linus Torvalds 已提交
2030 2031 2032 2033 2034
    uint16_t *mb_ret, uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2035
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2036

2037 2038
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
	    "Entered %s.\n", __func__);
2039

2040
	if (IS_FWI2_CAPABLE(ha))
2041
		return qla24xx_login_fabric(vha, fcport->loop_id,
2042 2043 2044
		    fcport->d_id.b.domain, fcport->d_id.b.area,
		    fcport->d_id.b.al_pa, mb_ret, opt);

L
Linus Torvalds 已提交
2045 2046
	mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
	if (HAS_EXTENDED_IDS(ha))
2047
		mcp->mb[1] = fcport->loop_id;
L
Linus Torvalds 已提交
2048
	else
2049
		mcp->mb[1] = fcport->loop_id << 8;
L
Linus Torvalds 已提交
2050 2051 2052 2053 2054
	mcp->mb[2] = opt;
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
 	mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
	mcp->flags = 0;
2055
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074

 	/* Return mailbox statuses. */
 	if (mb_ret != NULL) {
 		mb_ret[0] = mcp->mb[0];
 		mb_ret[1] = mcp->mb[1];
 		mb_ret[6] = mcp->mb[6];
 		mb_ret[7] = mcp->mb[7];
 	}

	if (rval != QLA_SUCCESS) {
 		/* AV tmp code: need to change main mailbox_command function to
 		 * return ok even when the mailbox completion value is not
 		 * SUCCESS. The caller needs to be responsible to interpret
 		 * the return values of this mailbox command if we're not
 		 * to change too much of the existing code.
 		 */
 		if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
 			rval = QLA_SUCCESS;

2075 2076 2077
		ql_dbg(ql_dbg_mbx, vha, 0x106b,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
L
Linus Torvalds 已提交
2078 2079
	} else {
		/*EMPTY*/
2080 2081
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2082 2083 2084 2085 2086
	}

	return (rval);
}

2087
int
2088
qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2089 2090 2091 2092 2093
    uint8_t area, uint8_t al_pa)
{
	int		rval;
	struct logio_entry_24xx *lg;
	dma_addr_t	lg_dma;
2094
	struct qla_hw_data *ha = vha->hw;
2095 2096
	struct req_que *req;
	struct rsp_que *rsp;
2097

2098 2099
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
	    "Entered %s.\n", __func__);
2100 2101 2102

	lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
	if (lg == NULL) {
2103 2104
		ql_log(ql_log_warn, vha, 0x106e,
		    "Failed to allocate logout IOCB.\n");
2105 2106 2107 2108
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(lg, 0, sizeof(struct logio_entry_24xx));

2109 2110 2111 2112 2113
	if (ql2xmaxqueues > 1)
		req = ha->req_q_map[0];
	else
		req = vha->req;
	rsp = req->rsp;
2114 2115
	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
	lg->entry_count = 1;
2116
	lg->handle = MAKE_HANDLE(req->id, lg->handle);
2117 2118
	lg->nport_handle = cpu_to_le16(loop_id);
	lg->control_flags =
2119 2120
	    __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
		LCF_FREE_NPORT);
2121 2122 2123
	lg->port_id[0] = al_pa;
	lg->port_id[1] = area;
	lg->port_id[2] = domain;
2124
	lg->vp_index = vha->vp_idx;
2125 2126
	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
	    (ha->r_a_tov / 10 * 2) + 2);
2127
	if (rval != QLA_SUCCESS) {
2128 2129
		ql_dbg(ql_dbg_mbx, vha, 0x106f,
		    "Failed to issue logout IOCB (%x).\n", rval);
2130
	} else if (lg->entry_status != 0) {
2131 2132 2133
		ql_dbg(ql_dbg_mbx, vha, 0x1070,
		    "Failed to complete IOCB -- error status (%x).\n",
		    lg->entry_status);
2134 2135
		rval = QLA_FUNCTION_FAILED;
	} else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
2136 2137 2138
		ql_dbg(ql_dbg_mbx, vha, 0x1071,
		    "Failed to complete IOCB -- completion status (%x) "
		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2139
		    le32_to_cpu(lg->io_parameter[0]),
2140
		    le32_to_cpu(lg->io_parameter[1]));
2141 2142
	} else {
		/*EMPTY*/
2143 2144
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
		    "Done %s.\n", __func__);
2145 2146 2147 2148 2149 2150 2151
	}

	dma_pool_free(ha->s_dma_pool, lg, lg_dma);

	return rval;
}

L
Linus Torvalds 已提交
2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168
/*
 * qla2x00_fabric_logout
 *	Issue logout fabric port mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2169
qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2170
    uint8_t area, uint8_t al_pa)
L
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2171 2172 2173 2174 2175
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2176 2177
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2178 2179 2180

	mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
	mcp->out_mb = MBX_1|MBX_0;
2181
	if (HAS_EXTENDED_IDS(vha->hw)) {
L
Linus Torvalds 已提交
2182 2183 2184 2185 2186 2187 2188 2189
		mcp->mb[1] = loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = loop_id << 8;
	}

	mcp->in_mb = MBX_1|MBX_0;
2190
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2191
	mcp->flags = 0;
2192
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2193 2194 2195

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2196 2197
		ql_dbg(ql_dbg_mbx, vha, 0x1074,
		    "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
L
Linus Torvalds 已提交
2198 2199
	} else {
		/*EMPTY*/
2200 2201
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222
	}

	return rval;
}

/*
 * qla2x00_full_login_lip
 *	Issue full login LIP mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2223
qla2x00_full_login_lip(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
2224 2225 2226 2227 2228
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2229 2230
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2231 2232

	mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2233
	mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2234
	mcp->mb[2] = 0;
L
Linus Torvalds 已提交
2235 2236 2237
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
2238
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2239
	mcp->flags = 0;
2240
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2241 2242 2243

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2244
		ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2245 2246
	} else {
		/*EMPTY*/
2247 2248
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266
	}

	return rval;
}

/*
 * qla2x00_get_id_list
 *
 * Input:
 *	ha = adapter block pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2267
qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
L
Linus Torvalds 已提交
2268 2269 2270 2271 2272 2273
    uint16_t *entries)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2274 2275
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2276 2277 2278 2279 2280

	if (id_list == NULL)
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_ID_LIST;
2281
	mcp->out_mb = MBX_0;
2282
	if (IS_FWI2_CAPABLE(vha->hw)) {
2283 2284 2285 2286
		mcp->mb[2] = MSW(id_list_dma);
		mcp->mb[3] = LSW(id_list_dma);
		mcp->mb[6] = MSW(MSD(id_list_dma));
		mcp->mb[7] = LSW(MSD(id_list_dma));
2287
		mcp->mb[8] = 0;
2288
		mcp->mb[9] = vha->vp_idx;
2289
		mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2290 2291 2292 2293 2294 2295 2296
	} else {
		mcp->mb[1] = MSW(id_list_dma);
		mcp->mb[2] = LSW(id_list_dma);
		mcp->mb[3] = MSW(MSD(id_list_dma));
		mcp->mb[6] = LSW(MSD(id_list_dma));
		mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
	}
L
Linus Torvalds 已提交
2297
	mcp->in_mb = MBX_1|MBX_0;
2298
	mcp->tov = MBX_TOV_SECONDS;
L
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2299
	mcp->flags = 0;
2300
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2301 2302 2303

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2304
		ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2305 2306
	} else {
		*entries = mcp->mb[1];
2307 2308
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
		    "Done %s.\n", __func__);
L
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2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327
	}

	return rval;
}

/*
 * qla2x00_get_resource_cnts
 *	Get current firmware resource counts.
 *
 * Input:
 *	ha = adapter block pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2328
qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
2329
    uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
2330
    uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
L
Linus Torvalds 已提交
2331 2332 2333 2334 2335
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2336 2337
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2338 2339 2340

	mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
	mcp->out_mb = MBX_0;
2341
	mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2342
	if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
2343
		mcp->in_mb |= MBX_12;
2344
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2345
	mcp->flags = 0;
2346
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2347 2348 2349

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2350 2351
		ql_dbg(ql_dbg_mbx, vha, 0x107d,
		    "Failed mb[0]=%x.\n", mcp->mb[0]);
L
Linus Torvalds 已提交
2352
	} else {
2353
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2354 2355 2356 2357
		    "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
		    "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
		    mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
		    mcp->mb[11], mcp->mb[12]);
L
Linus Torvalds 已提交
2358 2359 2360 2361 2362 2363 2364 2365 2366

		if (cur_xchg_cnt)
			*cur_xchg_cnt = mcp->mb[3];
		if (orig_xchg_cnt)
			*orig_xchg_cnt = mcp->mb[6];
		if (cur_iocb_cnt)
			*cur_iocb_cnt = mcp->mb[7];
		if (orig_iocb_cnt)
			*orig_iocb_cnt = mcp->mb[10];
2367
		if (vha->hw->flags.npiv_supported && max_npiv_vports)
2368
			*max_npiv_vports = mcp->mb[11];
2369
		if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)
2370
			*max_fcfs = mcp->mb[12];
L
Linus Torvalds 已提交
2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390
	}

	return (rval);
}

/*
 * qla2x00_get_fcal_position_map
 *	Get FCAL (LILP) position map using mailbox command
 *
 * Input:
 *	ha = adapter state pointer.
 *	pos_map = buffer pointer (can be NULL).
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2391
qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
L
Linus Torvalds 已提交
2392 2393 2394 2395 2396 2397
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	char *pmap;
	dma_addr_t pmap_dma;
2398
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2399

2400 2401
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
	    "Entered %s.\n", __func__);
2402

2403
	pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
L
Linus Torvalds 已提交
2404
	if (pmap  == NULL) {
2405 2406
		ql_log(ql_log_warn, vha, 0x1080,
		    "Memory alloc failed.\n");
L
Linus Torvalds 已提交
2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(pmap, 0, FCAL_MAP_SIZE);

	mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
	mcp->mb[2] = MSW(pmap_dma);
	mcp->mb[3] = LSW(pmap_dma);
	mcp->mb[6] = MSW(MSD(pmap_dma));
	mcp->mb[7] = LSW(MSD(pmap_dma));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->buf_size = FCAL_MAP_SIZE;
	mcp->flags = MBX_DMA_IN;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2421
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2422 2423

	if (rval == QLA_SUCCESS) {
2424
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2425 2426 2427 2428
		    "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
		    mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
		    pmap, pmap[0] + 1);
L
Linus Torvalds 已提交
2429 2430 2431 2432 2433 2434 2435

		if (pos_map)
			memcpy(pos_map, pmap, FCAL_MAP_SIZE);
	}
	dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);

	if (rval != QLA_SUCCESS) {
2436
		ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2437
	} else {
2438 2439
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2440 2441 2442 2443
	}

	return rval;
}
2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458

/*
 * qla2x00_get_link_status
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	ret_buf = pointer to link status return buffer.
 *
 * Returns:
 *	0 = success.
 *	BIT_0 = mem alloc error.
 *	BIT_1 = mailbox error.
 */
int
2459
qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2460
    struct link_statistics *stats, dma_addr_t stats_dma)
2461 2462 2463 2464
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2465
	uint32_t *siter, *diter, dwords;
2466
	struct qla_hw_data *ha = vha->hw;
2467

2468 2469
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
	    "Entered %s.\n", __func__);
2470 2471

	mcp->mb[0] = MBC_GET_LINK_STATUS;
2472 2473 2474 2475
	mcp->mb[2] = MSW(stats_dma);
	mcp->mb[3] = LSW(stats_dma);
	mcp->mb[6] = MSW(MSD(stats_dma));
	mcp->mb[7] = LSW(MSD(stats_dma));
2476 2477
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_0;
2478
	if (IS_FWI2_CAPABLE(ha)) {
2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491
		mcp->mb[1] = loop_id;
		mcp->mb[4] = 0;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10|MBX_4|MBX_1;
		mcp->in_mb |= MBX_1;
	} else if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10|MBX_1;
	} else {
		mcp->mb[1] = loop_id << 8;
		mcp->out_mb |= MBX_1;
	}
2492
	mcp->tov = MBX_TOV_SECONDS;
2493
	mcp->flags = IOCTL_CMD;
2494
	rval = qla2x00_mailbox_command(vha, mcp);
2495 2496 2497

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2498 2499
			ql_dbg(ql_dbg_mbx, vha, 0x1085,
			    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2500
			rval = QLA_FUNCTION_FAILED;
2501
		} else {
2502
			/* Copy over data -- firmware data is LE. */
2503 2504
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
			    "Done %s.\n", __func__);
2505 2506 2507 2508
			dwords = offsetof(struct link_statistics, unused1) / 4;
			siter = diter = &stats->link_fail_cnt;
			while (dwords--)
				*diter++ = le32_to_cpu(*siter++);
2509 2510 2511
		}
	} else {
		/* Failed. */
2512
		ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2513 2514 2515 2516 2517 2518
	}

	return rval;
}

int
2519
qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2520
    dma_addr_t stats_dma)
2521 2522 2523 2524
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2525
	uint32_t *siter, *diter, dwords;
2526

2527 2528
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
	    "Entered %s.\n", __func__);
2529 2530

	mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
2531 2532 2533 2534 2535
	mcp->mb[2] = MSW(stats_dma);
	mcp->mb[3] = LSW(stats_dma);
	mcp->mb[6] = MSW(MSD(stats_dma));
	mcp->mb[7] = LSW(MSD(stats_dma));
	mcp->mb[8] = sizeof(struct link_statistics) / 4;
2536
	mcp->mb[9] = vha->vp_idx;
2537
	mcp->mb[10] = 0;
2538
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2539
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
2540
	mcp->tov = MBX_TOV_SECONDS;
2541
	mcp->flags = IOCTL_CMD;
2542
	rval = qla2x00_mailbox_command(vha, mcp);
2543 2544 2545

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2546 2547
			ql_dbg(ql_dbg_mbx, vha, 0x1089,
			    "Failed mb[0]=%x.\n", mcp->mb[0]);
2548
			rval = QLA_FUNCTION_FAILED;
2549
		} else {
2550 2551
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
			    "Done %s.\n", __func__);
2552
			/* Copy over data -- firmware data is LE. */
2553 2554
			dwords = sizeof(struct link_statistics) / 4;
			siter = diter = &stats->link_fail_cnt;
2555
			while (dwords--)
2556
				*diter++ = le32_to_cpu(*siter++);
2557 2558 2559
		}
	} else {
		/* Failed. */
2560
		ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2561 2562 2563 2564 2565 2566
	}

	return rval;
}

int
2567
qla24xx_abort_command(srb_t *sp)
2568 2569 2570 2571 2572 2573 2574
{
	int		rval;
	unsigned long   flags = 0;

	struct abort_entry_24xx *abt;
	dma_addr_t	abt_dma;
	uint32_t	handle;
2575 2576
	fc_port_t	*fcport = sp->fcport;
	struct scsi_qla_host *vha = fcport->vha;
2577
	struct qla_hw_data *ha = vha->hw;
2578
	struct req_que *req = vha->req;
2579

2580 2581
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
	    "Entered %s.\n", __func__);
2582

2583
	spin_lock_irqsave(&ha->hardware_lock, flags);
2584
	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2585
		if (req->outstanding_cmds[handle] == sp)
2586 2587
			break;
	}
2588
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2589
	if (handle == req->num_outstanding_cmds) {
2590 2591 2592 2593 2594 2595
		/* Command not found. */
		return QLA_FUNCTION_FAILED;
	}

	abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
	if (abt == NULL) {
2596 2597
		ql_log(ql_log_warn, vha, 0x108d,
		    "Failed to allocate abort IOCB.\n");
2598 2599 2600 2601 2602 2603
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(abt, 0, sizeof(struct abort_entry_24xx));

	abt->entry_type = ABORT_IOCB_TYPE;
	abt->entry_count = 1;
2604
	abt->handle = MAKE_HANDLE(req->id, abt->handle);
2605
	abt->nport_handle = cpu_to_le16(fcport->loop_id);
2606
	abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2607 2608 2609
	abt->port_id[0] = fcport->d_id.b.al_pa;
	abt->port_id[1] = fcport->d_id.b.area;
	abt->port_id[2] = fcport->d_id.b.domain;
2610
	abt->vp_index = fcport->vha->vp_idx;
2611 2612 2613

	abt->req_que_no = cpu_to_le16(req->id);

2614
	rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2615
	if (rval != QLA_SUCCESS) {
2616 2617
		ql_dbg(ql_dbg_mbx, vha, 0x108e,
		    "Failed to issue IOCB (%x).\n", rval);
2618
	} else if (abt->entry_status != 0) {
2619 2620 2621
		ql_dbg(ql_dbg_mbx, vha, 0x108f,
		    "Failed to complete IOCB -- error status (%x).\n",
		    abt->entry_status);
2622 2623
		rval = QLA_FUNCTION_FAILED;
	} else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
2624 2625 2626
		ql_dbg(ql_dbg_mbx, vha, 0x1090,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(abt->nport_handle));
2627 2628
		rval = QLA_FUNCTION_FAILED;
	} else {
2629 2630
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
		    "Done %s.\n", __func__);
2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644
	}

	dma_pool_free(ha->s_dma_pool, abt, abt_dma);

	return rval;
}

struct tsk_mgmt_cmd {
	union {
		struct tsk_mgmt_entry tsk;
		struct sts_entry_24xx sts;
	} p;
};

2645 2646
static int
__qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2647
    unsigned int l, int tag)
2648
{
2649
	int		rval, rval2;
2650
	struct tsk_mgmt_cmd *tsk;
2651
	struct sts_entry_24xx *sts;
2652
	dma_addr_t	tsk_dma;
2653 2654
	scsi_qla_host_t *vha;
	struct qla_hw_data *ha;
2655 2656
	struct req_que *req;
	struct rsp_que *rsp;
2657

2658 2659
	vha = fcport->vha;
	ha = vha->hw;
2660
	req = vha->req;
2661

2662 2663
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
	    "Entered %s.\n", __func__);
2664

2665
	if (ha->flags.cpu_affinity_enabled)
2666 2667 2668
		rsp = ha->rsp_q_map[tag + 1];
	else
		rsp = req->rsp;
2669
	tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
2670
	if (tsk == NULL) {
2671 2672
		ql_log(ql_log_warn, vha, 0x1093,
		    "Failed to allocate task management IOCB.\n");
2673 2674 2675 2676 2677 2678
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));

	tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
	tsk->p.tsk.entry_count = 1;
2679
	tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
2680
	tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
2681
	tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
2682
	tsk->p.tsk.control_flags = cpu_to_le32(type);
2683 2684 2685
	tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
	tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
	tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
2686
	tsk->p.tsk.vp_index = fcport->vha->vp_idx;
2687 2688 2689 2690 2691
	if (type == TCF_LUN_RESET) {
		int_to_scsilun(l, &tsk->p.tsk.lun);
		host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
		    sizeof(tsk->p.tsk.lun));
	}
2692

2693
	sts = &tsk->p.sts;
2694
	rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
2695
	if (rval != QLA_SUCCESS) {
2696 2697
		ql_dbg(ql_dbg_mbx, vha, 0x1094,
		    "Failed to issue %s reset IOCB (%x).\n", name, rval);
2698
	} else if (sts->entry_status != 0) {
2699 2700 2701
		ql_dbg(ql_dbg_mbx, vha, 0x1095,
		    "Failed to complete IOCB -- error status (%x).\n",
		    sts->entry_status);
2702
		rval = QLA_FUNCTION_FAILED;
2703
	} else if (sts->comp_status !=
2704
	    __constant_cpu_to_le16(CS_COMPLETE)) {
2705 2706 2707
		ql_dbg(ql_dbg_mbx, vha, 0x1096,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(sts->comp_status));
2708
		rval = QLA_FUNCTION_FAILED;
2709 2710 2711
	} else if (le16_to_cpu(sts->scsi_status) &
	    SS_RESPONSE_INFO_LEN_VALID) {
		if (le32_to_cpu(sts->rsp_data_len) < 4) {
2712
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
2713 2714 2715
			    "Ignoring inconsistent data length -- not enough "
			    "response info (%d).\n",
			    le32_to_cpu(sts->rsp_data_len));
2716
		} else if (sts->data[3]) {
2717 2718 2719
			ql_dbg(ql_dbg_mbx, vha, 0x1098,
			    "Failed to complete IOCB -- response (%x).\n",
			    sts->data[3]);
2720 2721
			rval = QLA_FUNCTION_FAILED;
		}
2722 2723 2724
	}

	/* Issue marker IOCB. */
2725
	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
2726 2727
	    type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
	if (rval2 != QLA_SUCCESS) {
2728 2729
		ql_dbg(ql_dbg_mbx, vha, 0x1099,
		    "Failed to issue marker IOCB (%x).\n", rval2);
2730
	} else {
2731 2732
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
		    "Done %s.\n", __func__);
2733 2734
	}

2735
	dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
2736 2737 2738 2739

	return rval;
}

2740
int
2741
qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
2742
{
2743 2744 2745 2746 2747
	struct qla_hw_data *ha = fcport->vha->hw;

	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
		return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);

2748
	return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
2749 2750 2751
}

int
2752
qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
2753
{
2754 2755 2756 2757 2758
	struct qla_hw_data *ha = fcport->vha->hw;

	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
		return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);

2759
	return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
2760 2761
}

2762
int
2763
qla2x00_system_error(scsi_qla_host_t *vha)
2764 2765 2766 2767
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2768
	struct qla_hw_data *ha = vha->hw;
2769

2770
	if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
2771 2772
		return QLA_FUNCTION_FAILED;

2773 2774
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
	    "Entered %s.\n", __func__);
2775 2776 2777 2778 2779 2780

	mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 5;
	mcp->flags = 0;
2781
	rval = qla2x00_mailbox_command(vha, mcp);
2782 2783

	if (rval != QLA_SUCCESS) {
2784
		ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
2785
	} else {
2786 2787
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
		    "Done %s.\n", __func__);
2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799
	}

	return rval;
}

/**
 * qla2x00_set_serdes_params() -
 * @ha: HA context
 *
 * Returns
 */
int
2800
qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
2801 2802 2803 2804 2805 2806
    uint16_t sw_em_2g, uint16_t sw_em_4g)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2807 2808
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
	    "Entered %s.\n", __func__);
2809 2810 2811

	mcp->mb[0] = MBC_SERDES_PARAMS;
	mcp->mb[1] = BIT_0;
2812 2813 2814
	mcp->mb[2] = sw_em_1g | BIT_15;
	mcp->mb[3] = sw_em_2g | BIT_15;
	mcp->mb[4] = sw_em_4g | BIT_15;
2815 2816
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
2817
	mcp->tov = MBX_TOV_SECONDS;
2818
	mcp->flags = 0;
2819
	rval = qla2x00_mailbox_command(vha, mcp);
2820 2821 2822

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2823 2824
		ql_dbg(ql_dbg_mbx, vha, 0x109f,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2825 2826
	} else {
		/*EMPTY*/
2827 2828
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
		    "Done %s.\n", __func__);
2829 2830 2831 2832
	}

	return rval;
}
2833 2834

int
2835
qla2x00_stop_firmware(scsi_qla_host_t *vha)
2836 2837 2838 2839 2840
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2841
	if (!IS_FWI2_CAPABLE(vha->hw))
2842 2843
		return QLA_FUNCTION_FAILED;

2844 2845
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
	    "Entered %s.\n", __func__);
2846 2847

	mcp->mb[0] = MBC_STOP_FIRMWARE;
2848 2849
	mcp->mb[1] = 0;
	mcp->out_mb = MBX_1|MBX_0;
2850 2851 2852
	mcp->in_mb = MBX_0;
	mcp->tov = 5;
	mcp->flags = 0;
2853
	rval = qla2x00_mailbox_command(vha, mcp);
2854 2855

	if (rval != QLA_SUCCESS) {
2856
		ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
2857 2858
		if (mcp->mb[0] == MBS_INVALID_COMMAND)
			rval = QLA_INVALID_COMMAND;
2859
	} else {
2860 2861
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
		    "Done %s.\n", __func__);
2862 2863 2864 2865
	}

	return rval;
}
2866 2867

int
2868
qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
2869 2870 2871 2872 2873 2874
    uint16_t buffers)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2875 2876
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
	    "Entered %s.\n", __func__);
2877

2878
	if (!IS_FWI2_CAPABLE(vha->hw))
2879 2880
		return QLA_FUNCTION_FAILED;

2881 2882 2883
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

2884
	mcp->mb[0] = MBC_TRACE_CONTROL;
2885 2886 2887 2888 2889 2890 2891 2892
	mcp->mb[1] = TC_EFT_ENABLE;
	mcp->mb[2] = LSW(eft_dma);
	mcp->mb[3] = MSW(eft_dma);
	mcp->mb[4] = LSW(MSD(eft_dma));
	mcp->mb[5] = MSW(MSD(eft_dma));
	mcp->mb[6] = buffers;
	mcp->mb[7] = TC_AEN_DISABLE;
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2893
	mcp->in_mb = MBX_1|MBX_0;
2894
	mcp->tov = MBX_TOV_SECONDS;
2895
	mcp->flags = 0;
2896
	rval = qla2x00_mailbox_command(vha, mcp);
2897
	if (rval != QLA_SUCCESS) {
2898 2899 2900
		ql_dbg(ql_dbg_mbx, vha, 0x10a5,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
2901
	} else {
2902 2903
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
		    "Done %s.\n", __func__);
2904 2905 2906 2907
	}

	return rval;
}
2908

2909
int
2910
qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
2911 2912 2913 2914 2915
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2916 2917
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
	    "Entered %s.\n", __func__);
2918

2919
	if (!IS_FWI2_CAPABLE(vha->hw))
2920 2921
		return QLA_FUNCTION_FAILED;

2922 2923 2924
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

2925 2926 2927 2928
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_EFT_DISABLE;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
2929
	mcp->tov = MBX_TOV_SECONDS;
2930
	mcp->flags = 0;
2931
	rval = qla2x00_mailbox_command(vha, mcp);
2932
	if (rval != QLA_SUCCESS) {
2933 2934 2935
		ql_dbg(ql_dbg_mbx, vha, 0x10a8,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
2936
	} else {
2937 2938
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
		    "Done %s.\n", __func__);
2939 2940 2941 2942 2943
	}

	return rval;
}

2944
int
2945
qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
2946 2947 2948 2949 2950 2951
    uint16_t buffers, uint16_t *mb, uint32_t *dwords)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2952 2953
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
	    "Entered %s.\n", __func__);
2954

2955 2956
	if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
	    !IS_QLA83XX(vha->hw))
2957 2958
		return QLA_FUNCTION_FAILED;

2959 2960 2961
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_FCE_ENABLE;
	mcp->mb[2] = LSW(fce_dma);
	mcp->mb[3] = MSW(fce_dma);
	mcp->mb[4] = LSW(MSD(fce_dma));
	mcp->mb[5] = MSW(MSD(fce_dma));
	mcp->mb[6] = buffers;
	mcp->mb[7] = TC_AEN_DISABLE;
	mcp->mb[8] = 0;
	mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
	mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
	    MBX_1|MBX_0;
	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2976
	mcp->tov = MBX_TOV_SECONDS;
2977
	mcp->flags = 0;
2978
	rval = qla2x00_mailbox_command(vha, mcp);
2979
	if (rval != QLA_SUCCESS) {
2980 2981 2982
		ql_dbg(ql_dbg_mbx, vha, 0x10ab,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
2983
	} else {
2984 2985
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
		    "Done %s.\n", __func__);
2986 2987 2988 2989

		if (mb)
			memcpy(mb, mcp->mb, 8 * sizeof(*mb));
		if (dwords)
2990
			*dwords = buffers;
2991 2992 2993 2994 2995 2996
	}

	return rval;
}

int
2997
qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
2998 2999 3000 3001 3002
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3003 3004
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
	    "Entered %s.\n", __func__);
3005

3006
	if (!IS_FWI2_CAPABLE(vha->hw))
3007 3008
		return QLA_FUNCTION_FAILED;

3009 3010 3011
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3012 3013 3014 3015 3016 3017
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_FCE_DISABLE;
	mcp->mb[2] = TC_FCE_DISABLE_TRACE;
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
	    MBX_1|MBX_0;
3018
	mcp->tov = MBX_TOV_SECONDS;
3019
	mcp->flags = 0;
3020
	rval = qla2x00_mailbox_command(vha, mcp);
3021
	if (rval != QLA_SUCCESS) {
3022 3023 3024
		ql_dbg(ql_dbg_mbx, vha, 0x10ae,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3025
	} else {
3026 3027
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
		    "Done %s.\n", __func__);
3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043

		if (wr)
			*wr = (uint64_t) mcp->mb[5] << 48 |
			    (uint64_t) mcp->mb[4] << 32 |
			    (uint64_t) mcp->mb[3] << 16 |
			    (uint64_t) mcp->mb[2];
		if (rd)
			*rd = (uint64_t) mcp->mb[9] << 48 |
			    (uint64_t) mcp->mb[8] << 32 |
			    (uint64_t) mcp->mb[7] << 16 |
			    (uint64_t) mcp->mb[6];
	}

	return rval;
}

3044 3045 3046 3047 3048 3049 3050 3051
int
qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
	uint16_t *port_speed, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3052 3053
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
	    "Entered %s.\n", __func__);
3054

3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075
	if (!IS_IIDMA_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	mcp->mb[2] = mcp->mb[3] = 0;
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	/* Return mailbox statuses. */
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
	}

	if (rval != QLA_SUCCESS) {
3076
		ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3077
	} else {
3078 3079
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
		    "Done %s.\n", __func__);
3080 3081 3082 3083 3084 3085 3086
		if (port_speed)
			*port_speed = mcp->mb[3];
	}

	return rval;
}

3087
int
3088
qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3089 3090 3091 3092 3093 3094
    uint16_t port_speed, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3095 3096
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
	    "Entered %s.\n", __func__);
3097

3098
	if (!IS_IIDMA_CAPABLE(vha->hw))
3099 3100 3101 3102 3103
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	mcp->mb[2] = BIT_0;
3104
	if (IS_CNA_CAPABLE(vha->hw))
3105 3106 3107 3108 3109 3110
		mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
	else
		mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_1|MBX_0;
3111
	mcp->tov = MBX_TOV_SECONDS;
3112
	mcp->flags = 0;
3113
	rval = qla2x00_mailbox_command(vha, mcp);
3114 3115 3116 3117 3118 3119 3120 3121 3122

	/* Return mailbox statuses. */
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
	}

	if (rval != QLA_SUCCESS) {
3123 3124
		ql_dbg(ql_dbg_mbx, vha, 0x10b4,
		    "Failed=%x.\n", rval);
3125
	} else {
3126 3127
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
		    "Done %s.\n", __func__);
3128 3129 3130 3131
	}

	return rval;
}
3132 3133

void
3134
qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3135 3136 3137
	struct vp_rpt_id_entry_24xx *rptid_entry)
{
	uint8_t vp_idx;
3138
	uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
3139 3140
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *vp;
3141
	unsigned long   flags;
3142
	int found;
3143

3144 3145
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
	    "Entered %s.\n", __func__);
3146

3147 3148 3149 3150
	if (rptid_entry->entry_status != 0)
		return;

	if (rptid_entry->format == 0) {
3151
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
3152 3153 3154 3155
		    "Format 0 : Number of VPs setup %d, number of "
		    "VPs acquired %d.\n",
		    MSB(le16_to_cpu(rptid_entry->vp_count)),
		    LSB(le16_to_cpu(rptid_entry->vp_count)));
3156
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
3157 3158 3159
		    "Primary port id %02x%02x%02x.\n",
		    rptid_entry->port_id[2], rptid_entry->port_id[1],
		    rptid_entry->port_id[0]);
3160
	} else if (rptid_entry->format == 1) {
3161
		vp_idx = LSB(stat);
3162
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
3163 3164
		    "Format 1: VP[%d] enabled - status %d - with "
		    "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
3165
		    rptid_entry->port_id[2], rptid_entry->port_id[1],
3166
		    rptid_entry->port_id[0]);
3167 3168 3169 3170

		vp = vha;
		if (vp_idx == 0 && (MSB(stat) != 1))
			goto reg_needed;
3171

3172
		if (MSB(stat) != 0 && MSB(stat) != 2) {
3173 3174
			ql_dbg(ql_dbg_mbx, vha, 0x10ba,
			    "Could not acquire ID for VP[%d].\n", vp_idx);
3175
			return;
3176
		}
3177

3178
		found = 0;
3179
		spin_lock_irqsave(&ha->vport_slock, flags);
3180 3181 3182
		list_for_each_entry(vp, &ha->vp_list, list) {
			if (vp_idx == vp->vp_idx) {
				found = 1;
3183
				break;
3184 3185
			}
		}
3186 3187
		spin_unlock_irqrestore(&ha->vport_slock, flags);

3188
		if (!found)
3189 3190
			return;

3191 3192 3193
		vp->d_id.b.domain = rptid_entry->port_id[2];
		vp->d_id.b.area =  rptid_entry->port_id[1];
		vp->d_id.b.al_pa = rptid_entry->port_id[0];
3194 3195 3196 3197 3198

		/*
		 * Cannot configure here as we are still sitting on the
		 * response queue. Handle it in dpc context.
		 */
3199
		set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3200

3201 3202 3203 3204
reg_needed:
		set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
		set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
		set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3205
		qla2xxx_wake_dpc(vha);
3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227
	}
}

/*
 * qla24xx_modify_vp_config
 *	Change VP configuration for vha
 *
 * Input:
 *	vha = adapter block pointer.
 *
 * Returns:
 *	qla2xxx local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_modify_vp_config(scsi_qla_host_t *vha)
{
	int		rval;
	struct vp_config_entry_24xx *vpmod;
	dma_addr_t	vpmod_dma;
3228 3229
	struct qla_hw_data *ha = vha->hw;
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3230 3231 3232

	/* This can be called by the parent */

3233 3234
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
	    "Entered %s.\n", __func__);
3235

3236
	vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3237
	if (!vpmod) {
3238 3239
		ql_log(ql_log_warn, vha, 0x10bc,
		    "Failed to allocate modify VP IOCB.\n");
3240 3241 3242 3243 3244 3245 3246 3247 3248 3249
		return QLA_MEMORY_ALLOC_FAILED;
	}

	memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
	vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
	vpmod->entry_count = 1;
	vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
	vpmod->vp_count = 1;
	vpmod->vp_index1 = vha->vp_idx;
	vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3250 3251 3252

	qlt_modify_vp_config(vha, vpmod);

3253 3254 3255 3256
	memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
	memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
	vpmod->entry_count = 1;

3257
	rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3258
	if (rval != QLA_SUCCESS) {
3259 3260
		ql_dbg(ql_dbg_mbx, vha, 0x10bd,
		    "Failed to issue VP config IOCB (%x).\n", rval);
3261
	} else if (vpmod->comp_status != 0) {
3262 3263 3264
		ql_dbg(ql_dbg_mbx, vha, 0x10be,
		    "Failed to complete IOCB -- error status (%x).\n",
		    vpmod->comp_status);
3265 3266
		rval = QLA_FUNCTION_FAILED;
	} else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3267 3268 3269
		ql_dbg(ql_dbg_mbx, vha, 0x10bf,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(vpmod->comp_status));
3270 3271 3272
		rval = QLA_FUNCTION_FAILED;
	} else {
		/* EMPTY */
3273 3274
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
		    "Done %s.\n", __func__);
3275 3276
		fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
	}
3277
	dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303

	return rval;
}

/*
 * qla24xx_control_vp
 *	Enable a virtual port for given host
 *
 * Input:
 *	ha = adapter block pointer.
 *	vhba = virtual adapter (unused)
 *	index = index number for enabled VP
 *
 * Returns:
 *	qla2xxx local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
{
	int		rval;
	int		map, pos;
	struct vp_ctrl_entry_24xx   *vce;
	dma_addr_t	vce_dma;
3304
	struct qla_hw_data *ha = vha->hw;
3305
	int	vp_index = vha->vp_idx;
3306
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3307

3308
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3309
	    "Entered %s enabling index %d.\n", __func__, vp_index);
3310

3311
	if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3312 3313 3314 3315
		return QLA_PARAMETER_ERROR;

	vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
	if (!vce) {
3316 3317
		ql_log(ql_log_warn, vha, 0x10c2,
		    "Failed to allocate VP control IOCB.\n");
3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));

	vce->entry_type = VP_CTRL_IOCB_TYPE;
	vce->entry_count = 1;
	vce->command = cpu_to_le16(cmd);
	vce->vp_count = __constant_cpu_to_le16(1);

	/* index map in firmware starts with 1; decrement index
	 * this is ok as we never use index 0
	 */
	map = (vp_index - 1) / 8;
	pos = (vp_index - 1) & 7;
3332
	mutex_lock(&ha->vport_lock);
3333
	vce->vp_idx_map[map] |= 1 << pos;
3334
	mutex_unlock(&ha->vport_lock);
3335

3336
	rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3337
	if (rval != QLA_SUCCESS) {
3338 3339
		ql_dbg(ql_dbg_mbx, vha, 0x10c3,
		    "Failed to issue VP control IOCB (%x).\n", rval);
3340
	} else if (vce->entry_status != 0) {
3341 3342
		ql_dbg(ql_dbg_mbx, vha, 0x10c4,
		    "Failed to complete IOCB -- error status (%x).\n",
3343 3344 3345
		    vce->entry_status);
		rval = QLA_FUNCTION_FAILED;
	} else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3346 3347
		ql_dbg(ql_dbg_mbx, vha, 0x10c5,
		    "Failed to complet IOCB -- completion status (%x).\n",
3348 3349 3350
		    le16_to_cpu(vce->comp_status));
		rval = QLA_FUNCTION_FAILED;
	} else {
3351 3352
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
		    "Done %s.\n", __func__);
3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381
	}

	dma_pool_free(ha->s_dma_pool, vce, vce_dma);

	return rval;
}

/*
 * qla2x00_send_change_request
 *	Receive or disable RSCN request from fabric controller
 *
 * Input:
 *	ha = adapter block pointer
 *	format = registration format:
 *		0 - Reserved
 *		1 - Fabric detected registration
 *		2 - N_port detected registration
 *		3 - Full registration
 *		FF - clear registration
 *	vp_idx = Virtual port index
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel Context
 */

int
3382
qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3383 3384 3385 3386 3387 3388
			    uint16_t vp_idx)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3389 3390
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
	    "Entered %s.\n", __func__);
3391

3392 3393 3394 3395 3396 3397 3398
	mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
	mcp->mb[1] = format;
	mcp->mb[9] = vp_idx;
	mcp->out_mb = MBX_9|MBX_1|MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
3399
	rval = qla2x00_mailbox_command(vha, mcp);
3400 3401 3402 3403 3404 3405 3406 3407 3408 3409

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
			rval = BIT_1;
		}
	} else
		rval = BIT_1;

	return rval;
}
3410 3411

int
3412
qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3413 3414 3415 3416 3417 3418
    uint32_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3419 3420
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
	    "Entered %s.\n", __func__);
3421

3422
	if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435
		mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
		mcp->mb[8] = MSW(addr);
		mcp->out_mb = MBX_8|MBX_0;
	} else {
		mcp->mb[0] = MBC_DUMP_RISC_RAM;
		mcp->out_mb = MBX_0;
	}
	mcp->mb[1] = LSW(addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3436
	if (IS_FWI2_CAPABLE(vha->hw)) {
3437 3438 3439 3440 3441 3442 3443 3444 3445
		mcp->mb[4] = MSW(size);
		mcp->mb[5] = LSW(size);
		mcp->out_mb |= MBX_5|MBX_4;
	} else {
		mcp->mb[4] = LSW(size);
		mcp->out_mb |= MBX_4;
	}

	mcp->in_mb = MBX_0;
3446
	mcp->tov = MBX_TOV_SECONDS;
3447
	mcp->flags = 0;
3448
	rval = qla2x00_mailbox_command(vha, mcp);
3449 3450

	if (rval != QLA_SUCCESS) {
3451 3452
		ql_dbg(ql_dbg_mbx, vha, 0x1008,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3453
	} else {
3454 3455
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
		    "Done %s.\n", __func__);
3456 3457 3458 3459
	}

	return rval;
}
3460 3461 3462 3463 3464 3465 3466 3467 3468 3469
/* 84XX Support **************************************************************/

struct cs84xx_mgmt_cmd {
	union {
		struct verify_chip_entry_84xx req;
		struct verify_chip_rsp_84xx rsp;
	} p;
};

int
3470
qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
3471 3472 3473 3474 3475 3476
{
	int rval, retry;
	struct cs84xx_mgmt_cmd *mn;
	dma_addr_t mn_dma;
	uint16_t options;
	unsigned long flags;
3477
	struct qla_hw_data *ha = vha->hw;
3478

3479 3480
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
	    "Entered %s.\n", __func__);
3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494

	mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
	if (mn == NULL) {
		return QLA_MEMORY_ALLOC_FAILED;
	}

	/* Force Update? */
	options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
	/* Diagnostic firmware? */
	/* options |= MENLO_DIAG_FW; */
	/* We update the firmware with only one data sequence. */
	options |= VCO_END_OF_DATA;

	do {
3495
		retry = 0;
3496 3497 3498 3499 3500
		memset(mn, 0, sizeof(*mn));
		mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
		mn->p.req.entry_count = 1;
		mn->p.req.options = cpu_to_le16(options);

3501 3502 3503 3504
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
		    "Dump of Verify Request.\n");
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
		    (uint8_t *)mn, sizeof(*mn));
3505

3506
		rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
3507
		if (rval != QLA_SUCCESS) {
3508 3509
			ql_dbg(ql_dbg_mbx, vha, 0x10cb,
			    "Failed to issue verify IOCB (%x).\n", rval);
3510 3511 3512
			goto verify_done;
		}

3513 3514 3515 3516
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
		    "Dump of Verify Response.\n");
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
		    (uint8_t *)mn, sizeof(*mn));
3517 3518 3519 3520

		status[0] = le16_to_cpu(mn->p.rsp.comp_status);
		status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
		    le16_to_cpu(mn->p.rsp.failure_code) : 0;
3521
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
3522
		    "cs=%x fc=%x.\n", status[0], status[1]);
3523 3524 3525 3526

		if (status[0] != CS_COMPLETE) {
			rval = QLA_FUNCTION_FAILED;
			if (!(options & VCO_DONT_UPDATE_FW)) {
3527 3528 3529
				ql_dbg(ql_dbg_mbx, vha, 0x10cf,
				    "Firmware update failed. Retrying "
				    "without update firmware.\n");
3530 3531 3532 3533 3534
				options |= VCO_DONT_UPDATE_FW;
				options &= ~VCO_FORCE_UPDATE;
				retry = 1;
			}
		} else {
3535
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
3536 3537
			    "Firmware updated to %x.\n",
			    le32_to_cpu(mn->p.rsp.fw_ver));
3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550 3551

			/* NOTE: we only update OP firmware. */
			spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
			ha->cs84xx->op_fw_version =
			    le32_to_cpu(mn->p.rsp.fw_ver);
			spin_unlock_irqrestore(&ha->cs84xx->access_lock,
			    flags);
		}
	} while (retry);

verify_done:
	dma_pool_free(ha->s_dma_pool, mn, mn_dma);

	if (rval != QLA_SUCCESS) {
3552 3553
		ql_dbg(ql_dbg_mbx, vha, 0x10d1,
		    "Failed=%x.\n", rval);
3554
	} else {
3555 3556
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
		    "Done %s.\n", __func__);
3557 3558 3559 3560
	}

	return rval;
}
3561 3562

int
3563
qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
3564 3565 3566 3567 3568 3569 3570 3571
{
	int rval;
	unsigned long flags;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct device_reg_25xxmq __iomem *reg;
	struct qla_hw_data *ha = vha->hw;

3572 3573
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
	    "Entered %s.\n", __func__);
3574

3575
	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3576
	mcp->mb[1] = req->options;
3577 3578 3579 3580 3581 3582 3583 3584 3585 3586
	mcp->mb[2] = MSW(LSD(req->dma));
	mcp->mb[3] = LSW(LSD(req->dma));
	mcp->mb[6] = MSW(MSD(req->dma));
	mcp->mb[7] = LSW(MSD(req->dma));
	mcp->mb[5] = req->length;
	if (req->rsp)
		mcp->mb[10] = req->rsp->id;
	mcp->mb[12] = req->qos;
	mcp->mb[11] = req->vp_idx;
	mcp->mb[13] = req->rid;
3587 3588
	if (IS_QLA83XX(ha))
		mcp->mb[15] = 0;
3589

3590
	reg = (struct device_reg_25xxmq __iomem *)((ha->mqiobase) +
3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601
		QLA_QUE_PAGE * req->id);

	mcp->mb[4] = req->id;
	/* que in ptr index */
	mcp->mb[8] = 0;
	/* que out ptr index */
	mcp->mb[9] = 0;
	mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
			MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->flags = MBX_DMA_OUT;
3602 3603 3604 3605 3606 3607 3608 3609 3610
	mcp->tov = MBX_TOV_SECONDS * 2;

	if (IS_QLA81XX(ha) || IS_QLA83XX(ha))
		mcp->in_mb |= MBX_1;
	if (IS_QLA83XX(ha)) {
		mcp->out_mb |= MBX_15;
		/* debug q create issue in SR-IOV */
		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
	}
3611 3612

	spin_lock_irqsave(&ha->hardware_lock, flags);
3613
	if (!(req->options & BIT_0)) {
3614
		WRT_REG_DWORD(&reg->req_q_in, 0);
3615 3616
		if (!IS_QLA83XX(ha))
			WRT_REG_DWORD(&reg->req_q_out, 0);
3617
	}
3618 3619
	req->req_q_in = &reg->req_q_in;
	req->req_q_out = &reg->req_q_out;
3620 3621
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

3622
	rval = qla2x00_mailbox_command(vha, mcp);
3623 3624 3625 3626
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10d4,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
3627 3628
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
		    "Done %s.\n", __func__);
3629 3630
	}

3631 3632 3633 3634
	return rval;
}

int
3635
qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
3636 3637 3638 3639 3640 3641 3642 3643
{
	int rval;
	unsigned long flags;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct device_reg_25xxmq __iomem *reg;
	struct qla_hw_data *ha = vha->hw;

3644 3645
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
	    "Entered %s.\n", __func__);
3646

3647
	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3648
	mcp->mb[1] = rsp->options;
3649 3650 3651 3652 3653
	mcp->mb[2] = MSW(LSD(rsp->dma));
	mcp->mb[3] = LSW(LSD(rsp->dma));
	mcp->mb[6] = MSW(MSD(rsp->dma));
	mcp->mb[7] = LSW(MSD(rsp->dma));
	mcp->mb[5] = rsp->length;
3654
	mcp->mb[14] = rsp->msix->entry;
3655
	mcp->mb[13] = rsp->rid;
3656 3657
	if (IS_QLA83XX(ha))
		mcp->mb[15] = 0;
3658

3659
	reg = (struct device_reg_25xxmq __iomem *)((ha->mqiobase) +
3660 3661 3662 3663 3664 3665 3666
		QLA_QUE_PAGE * rsp->id);

	mcp->mb[4] = rsp->id;
	/* que in ptr index */
	mcp->mb[8] = 0;
	/* que out ptr index */
	mcp->mb[9] = 0;
3667
	mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
3668 3669 3670
			|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->flags = MBX_DMA_OUT;
3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681
	mcp->tov = MBX_TOV_SECONDS * 2;

	if (IS_QLA81XX(ha)) {
		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
		mcp->in_mb |= MBX_1;
	} else if (IS_QLA83XX(ha)) {
		mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
		mcp->in_mb |= MBX_1;
		/* debug q create issue in SR-IOV */
		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
	}
3682 3683

	spin_lock_irqsave(&ha->hardware_lock, flags);
3684
	if (!(rsp->options & BIT_0)) {
3685
		WRT_REG_DWORD(&reg->rsp_q_out, 0);
3686 3687
		if (!IS_QLA83XX(ha))
			WRT_REG_DWORD(&reg->rsp_q_in, 0);
3688 3689 3690 3691
	}

	spin_unlock_irqrestore(&ha->hardware_lock, flags);

3692
	rval = qla2x00_mailbox_command(vha, mcp);
3693 3694 3695 3696
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10d7,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
3697 3698
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
		    "Done %s.\n", __func__);
3699 3700
	}

3701 3702 3703
	return rval;
}

3704 3705 3706 3707 3708 3709 3710
int
qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3711 3712
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
	    "Entered %s.\n", __func__);
3713 3714 3715 3716 3717 3718 3719 3720 3721 3722

	mcp->mb[0] = MBC_IDC_ACK;
	memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3723 3724
		ql_dbg(ql_dbg_mbx, vha, 0x10da,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3725
	} else {
3726 3727
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
		    "Done %s.\n", __func__);
3728 3729 3730 3731
	}

	return rval;
}
3732 3733 3734 3735 3736 3737 3738 3739

int
qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3740 3741
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
	    "Entered %s.\n", __func__);
3742

3743
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3755 3756 3757
		ql_dbg(ql_dbg_mbx, vha, 0x10dd,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3758
	} else {
3759 3760
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
		    "Done %s.\n", __func__);
3761 3762 3763 3764 3765 3766 3767 3768 3769 3770 3771 3772 3773
		*sector_size = mcp->mb[1];
	}

	return rval;
}

int
qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3774
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3775 3776
		return QLA_FUNCTION_FAILED;

3777 3778
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
	    "Entered %s.\n", __func__);
3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
	    FAC_OPT_CMD_WRITE_PROTECT;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3790 3791 3792
		ql_dbg(ql_dbg_mbx, vha, 0x10e0,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3793
	} else {
3794 3795
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
		    "Done %s.\n", __func__);
3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807
	}

	return rval;
}

int
qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3808
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3809 3810
		return QLA_FUNCTION_FAILED;

3811 3812
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
	    "Entered %s.\n", __func__);
3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
	mcp->mb[2] = LSW(start);
	mcp->mb[3] = MSW(start);
	mcp->mb[4] = LSW(finish);
	mcp->mb[5] = MSW(finish);
	mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3827 3828 3829
		ql_dbg(ql_dbg_mbx, vha, 0x10e3,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
3830
	} else {
3831 3832
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
		    "Done %s.\n", __func__);
3833 3834 3835 3836
	}

	return rval;
}
3837 3838 3839 3840 3841 3842 3843 3844

int
qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
{
	int rval = 0;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3845 3846
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
	    "Entered %s.\n", __func__);
3847 3848 3849 3850 3851 3852 3853 3854 3855

	mcp->mb[0] = MBC_RESTART_MPI_FW;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3856 3857 3858
		ql_dbg(ql_dbg_mbx, vha, 0x10e6,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3859
	} else {
3860 3861
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
		    "Done %s.\n", __func__);
3862 3863 3864 3865
	}

	return rval;
}
3866

3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894 3895 3896 3897 3898 3899
static int
qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_FWI2_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_GET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	*temp = mcp->mb[1];

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x115a,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
		    "Done %s.\n", __func__);
	}

	return rval;
}

3900
int
3901 3902
qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
3903 3904 3905 3906
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
3907 3908
	struct qla_hw_data *ha = vha->hw;

3909 3910
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
	    "Entered %s.\n", __func__);
3911

3912 3913
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;
3914

3915 3916 3917
	if (len == 1)
		opt |= BIT_0;

3918 3919 3920 3921 3922 3923 3924
	mcp->mb[0] = MBC_READ_SFP;
	mcp->mb[1] = dev;
	mcp->mb[2] = MSW(sfp_dma);
	mcp->mb[3] = LSW(sfp_dma);
	mcp->mb[6] = MSW(MSD(sfp_dma));
	mcp->mb[7] = LSW(MSD(sfp_dma));
	mcp->mb[8] = len;
3925
	mcp->mb[9] = off;
3926 3927
	mcp->mb[10] = opt;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
3928
	mcp->in_mb = MBX_1|MBX_0;
3929 3930 3931 3932 3933
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (opt & BIT_0)
3934
		*sfp = mcp->mb[1];
3935 3936

	if (rval != QLA_SUCCESS) {
3937 3938
		ql_dbg(ql_dbg_mbx, vha, 0x10e9,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3939
	} else {
3940 3941
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
		    "Done %s.\n", __func__);
3942 3943 3944 3945 3946 3947
	}

	return rval;
}

int
3948 3949
qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
3950 3951 3952 3953
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
3954 3955
	struct qla_hw_data *ha = vha->hw;

3956 3957
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
	    "Entered %s.\n", __func__);
3958

3959 3960
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;
3961

3962 3963 3964
	if (len == 1)
		opt |= BIT_0;

3965
	if (opt & BIT_0)
3966
		len = *sfp;
3967 3968 3969 3970 3971 3972 3973 3974

	mcp->mb[0] = MBC_WRITE_SFP;
	mcp->mb[1] = dev;
	mcp->mb[2] = MSW(sfp_dma);
	mcp->mb[3] = LSW(sfp_dma);
	mcp->mb[6] = MSW(MSD(sfp_dma));
	mcp->mb[7] = LSW(MSD(sfp_dma));
	mcp->mb[8] = len;
3975
	mcp->mb[9] = off;
3976 3977
	mcp->mb[10] = opt;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
3978
	mcp->in_mb = MBX_1|MBX_0;
3979 3980 3981 3982 3983
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3984 3985
		ql_dbg(ql_dbg_mbx, vha, 0x10ec,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3986
	} else {
3987 3988
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
		    "Done %s.\n", __func__);
3989 3990 3991 3992
	}

	return rval;
}
3993 3994 3995 3996 3997 3998 3999 4000 4001

int
qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
    uint16_t size_in_bytes, uint16_t *actual_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4002 4003
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
	    "Entered %s.\n", __func__);
4004

4005
	if (!IS_CNA_CAPABLE(vha->hw))
4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_XGMAC_STATS;
	mcp->mb[2] = MSW(stats_dma);
	mcp->mb[3] = LSW(stats_dma);
	mcp->mb[6] = MSW(MSD(stats_dma));
	mcp->mb[7] = LSW(MSD(stats_dma));
	mcp->mb[8] = size_in_bytes >> 2;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4021 4022 4023
		ql_dbg(ql_dbg_mbx, vha, 0x10ef,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4024
	} else {
4025 4026
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
		    "Done %s.\n", __func__);
4027

4028 4029 4030 4031 4032 4033

		*actual_size = mcp->mb[2] << 2;
	}

	return rval;
}
4034 4035 4036 4037 4038 4039 4040 4041 4042

int
qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
    uint16_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4043 4044
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
	    "Entered %s.\n", __func__);
4045

4046
	if (!IS_CNA_CAPABLE(vha->hw))
4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057 4058 4059 4060 4061 4062
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_DCBX_PARAMS;
	mcp->mb[1] = 0;
	mcp->mb[2] = MSW(tlv_dma);
	mcp->mb[3] = LSW(tlv_dma);
	mcp->mb[6] = MSW(MSD(tlv_dma));
	mcp->mb[7] = LSW(MSD(tlv_dma));
	mcp->mb[8] = size;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4063 4064 4065
		ql_dbg(ql_dbg_mbx, vha, 0x10f2,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4066
	} else {
4067 4068
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
		    "Done %s.\n", __func__);
4069 4070 4071 4072
	}

	return rval;
}
4073 4074 4075 4076 4077 4078 4079 4080

int
qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4081 4082
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
	    "Entered %s.\n", __func__);
4083

4084 4085 4086 4087 4088 4089 4090 4091 4092 4093 4094 4095
	if (!IS_FWI2_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_READ_RAM_EXTENDED;
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[8] = MSW(risc_addr);
	mcp->out_mb = MBX_8|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4096 4097
		ql_dbg(ql_dbg_mbx, vha, 0x10f5,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4098
	} else {
4099 4100
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
		    "Done %s.\n", __func__);
4101 4102 4103 4104 4105 4106
		*data = mcp->mb[3] << 16 | mcp->mb[2];
	}

	return rval;
}

4107
int
4108 4109
qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
	uint16_t *mresp)
4110 4111 4112 4113 4114
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4115 4116
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
	    "Entered %s.\n", __func__);
4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127 4128 4129 4130 4131

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
	mcp->mb[1] = mreq->options | BIT_6;	// BIT_6 specifies 64 bit addressing

	/* transfer count */
	mcp->mb[10] = LSW(mreq->transfer_size);
	mcp->mb[11] = MSW(mreq->transfer_size);

	/* send data address */
	mcp->mb[14] = LSW(mreq->send_dma);
	mcp->mb[15] = MSW(mreq->send_dma);
	mcp->mb[20] = LSW(MSD(mreq->send_dma));
	mcp->mb[21] = MSW(MSD(mreq->send_dma));

L
Lucas De Marchi 已提交
4132
	/* receive data address */
4133 4134 4135 4136 4137 4138
	mcp->mb[16] = LSW(mreq->rcv_dma);
	mcp->mb[17] = MSW(mreq->rcv_dma);
	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));

	/* Iteration count */
4139 4140
	mcp->mb[18] = LSW(mreq->iteration_count);
	mcp->mb[19] = MSW(mreq->iteration_count);
4141 4142 4143

	mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
	    MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4144
	if (IS_CNA_CAPABLE(vha->hw))
4145 4146 4147 4148 4149 4150 4151 4152 4153 4154
		mcp->out_mb |= MBX_2;
	mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->buf_size = mreq->transfer_size;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4155 4156 4157 4158
		ql_dbg(ql_dbg_mbx, vha, 0x10f8,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
		    "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
		    mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4159
	} else {
4160 4161
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
		    "Done %s.\n", __func__);
4162 4163 4164 4165 4166 4167 4168 4169
	}

	/* Copy mailbox information */
	memcpy( mresp, mcp->mb, 64);
	return rval;
}

int
4170 4171
qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
	uint16_t *mresp)
4172 4173 4174 4175 4176 4177
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4178 4179
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
	    "Entered %s.\n", __func__);
4180 4181 4182 4183

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
	mcp->mb[1] = mreq->options | BIT_6;	/* BIT_6 specifies 64bit address */
4184
	if (IS_CNA_CAPABLE(ha)) {
4185
		mcp->mb[1] |= BIT_15;
4186 4187
		mcp->mb[2] = vha->fcoe_fcf_idx;
	}
4188 4189 4190 4191 4192 4193 4194 4195 4196 4197 4198 4199 4200 4201
	mcp->mb[16] = LSW(mreq->rcv_dma);
	mcp->mb[17] = MSW(mreq->rcv_dma);
	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));

	mcp->mb[10] = LSW(mreq->transfer_size);

	mcp->mb[14] = LSW(mreq->send_dma);
	mcp->mb[15] = MSW(mreq->send_dma);
	mcp->mb[20] = LSW(MSD(mreq->send_dma));
	mcp->mb[21] = MSW(MSD(mreq->send_dma));

	mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
	    MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4202
	if (IS_CNA_CAPABLE(ha))
4203 4204 4205
		mcp->out_mb |= MBX_2;

	mcp->in_mb = MBX_0;
4206 4207
	if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
	    IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4208
		mcp->in_mb |= MBX_1;
4209
	if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4210 4211 4212 4213 4214 4215 4216 4217 4218
		mcp->in_mb |= MBX_3;

	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->buf_size = mreq->transfer_size;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4219 4220 4221
		ql_dbg(ql_dbg_mbx, vha, 0x10fb,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
4222
	} else {
4223 4224
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
		    "Done %s.\n", __func__);
4225 4226 4227
	}

	/* Copy mailbox information */
4228
	memcpy(mresp, mcp->mb, 64);
4229 4230
	return rval;
}
4231

4232
int
4233
qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4234 4235 4236 4237 4238
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4239
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4240
	    "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4241 4242 4243 4244 4245 4246 4247

	mcp->mb[0] = MBC_ISP84XX_RESET;
	mcp->mb[1] = enable_diagnostic;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4248
	rval = qla2x00_mailbox_command(vha, mcp);
4249 4250

	if (rval != QLA_SUCCESS)
4251
		ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4252
	else
4253 4254
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
		    "Done %s.\n", __func__);
4255 4256 4257 4258

	return rval;
}

4259 4260 4261 4262 4263 4264 4265
int
qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4266 4267
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
	    "Entered %s.\n", __func__);
4268

4269
	if (!IS_FWI2_CAPABLE(vha->hw))
4270
		return QLA_FUNCTION_FAILED;
4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282

	mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[2] = LSW(data);
	mcp->mb[3] = MSW(data);
	mcp->mb[8] = MSW(risc_addr);
	mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4283 4284
		ql_dbg(ql_dbg_mbx, vha, 0x1101,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4285
	} else {
4286 4287
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
		    "Done %s.\n", __func__);
4288 4289 4290 4291
	}

	return rval;
}
4292

4293 4294 4295 4296 4297 4298 4299 4300 4301 4302 4303
int
qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	uint32_t stat, timer;
	uint16_t mb0 = 0;
	struct qla_hw_data *ha = vha->hw;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

	rval = QLA_SUCCESS;

4304 4305
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
	    "Entered %s.\n", __func__);
4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344

	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

	/* Write the MBC data to the registers */
	WRT_REG_WORD(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
	WRT_REG_WORD(&reg->mailbox1, mb[0]);
	WRT_REG_WORD(&reg->mailbox2, mb[1]);
	WRT_REG_WORD(&reg->mailbox3, mb[2]);
	WRT_REG_WORD(&reg->mailbox4, mb[3]);

	WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);

	/* Poll for MBC interrupt */
	for (timer = 6000000; timer; timer--) {
		/* Check for pending interrupts. */
		stat = RD_REG_DWORD(&reg->host_status);
		if (stat & HSRX_RISC_INT) {
			stat &= 0xff;

			if (stat == 0x1 || stat == 0x2 ||
			    stat == 0x10 || stat == 0x11) {
				set_bit(MBX_INTERRUPT,
				    &ha->mbx_cmd_flags);
				mb0 = RD_REG_WORD(&reg->mailbox0);
				WRT_REG_DWORD(&reg->hccr,
				    HCCRX_CLR_RISC_INT);
				RD_REG_DWORD(&reg->hccr);
				break;
			}
		}
		udelay(5);
	}

	if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
		rval = mb0 & MBS_MASK;
	else
		rval = QLA_FUNCTION_FAILED;

	if (rval != QLA_SUCCESS) {
4345 4346
		ql_dbg(ql_dbg_mbx, vha, 0x1104,
		    "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4347
	} else {
4348 4349
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
		    "Done %s.\n", __func__);
4350 4351 4352 4353
	}

	return rval;
}
4354

4355 4356 4357 4358 4359 4360 4361 4362
int
qla2x00_get_data_rate(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4363 4364
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
	    "Entered %s.\n", __func__);
4365

4366 4367 4368 4369 4370 4371 4372
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_DATA_RATE;
	mcp->mb[1] = 0;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
4373 4374
	if (IS_QLA83XX(ha))
		mcp->in_mb |= MBX_3;
4375 4376 4377 4378
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4379 4380
		ql_dbg(ql_dbg_mbx, vha, 0x1107,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4381
	} else {
4382 4383
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
		    "Done %s.\n", __func__);
4384 4385 4386 4387 4388 4389
		if (mcp->mb[1] != 0x7)
			ha->link_data_rate = mcp->mb[1];
	}

	return rval;
}
S
Sarang Radke 已提交
4390

4391 4392 4393 4394 4395 4396 4397 4398
int
qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4399 4400
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
	    "Entered %s.\n", __func__);
4401

4402
	if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha))
4403 4404 4405 4406 4407 4408 4409 4410 4411 4412
		return QLA_FUNCTION_FAILED;
	mcp->mb[0] = MBC_GET_PORT_CONFIG;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4413 4414
		ql_dbg(ql_dbg_mbx, vha, 0x110a,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4415 4416 4417 4418
	} else {
		/* Copy all bits to preserve original value */
		memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);

4419 4420
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
		    "Done %s.\n", __func__);
4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431
	}
	return rval;
}

int
qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4432 4433
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
	    "Entered %s.\n", __func__);
4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444

	mcp->mb[0] = MBC_SET_PORT_CONFIG;
	/* Copy all bits to preserve original setting */
	memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4445 4446
		ql_dbg(ql_dbg_mbx, vha, 0x110d,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4447
	} else
4448 4449
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
		    "Done %s.\n", __func__);
4450 4451 4452 4453 4454

	return rval;
}


S
Sarang Radke 已提交
4455 4456 4457 4458 4459 4460 4461 4462 4463
int
qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
		uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4464 4465
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
	    "Entered %s.\n", __func__);
4466

S
Sarang Radke 已提交
4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490
	if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	if (ha->flags.fcp_prio_enabled)
		mcp->mb[2] = BIT_1;
	else
		mcp->mb[2] = BIT_2;
	mcp->mb[4] = priority & 0xf;
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
		mb[4] = mcp->mb[4];
	}

	if (rval != QLA_SUCCESS) {
4491
		ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
S
Sarang Radke 已提交
4492
	} else {
4493 4494
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
		    "Done %s.\n", __func__);
S
Sarang Radke 已提交
4495 4496 4497 4498
	}

	return rval;
}
4499

4500
int
4501
qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
4502
{
4503
	int rval = QLA_FUNCTION_FAILED;
4504
	struct qla_hw_data *ha = vha->hw;
4505
	uint8_t byte;
4506

4507 4508
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ca,
	    "Entered %s.\n", __func__);
4509

4510 4511 4512 4513 4514 4515 4516 4517
	if (ha->thermal_support & THERMAL_SUPPORT_I2C) {
		rval = qla2x00_read_sfp(vha, 0, &byte,
		    0x98, 0x1, 1, BIT_13|BIT_12|BIT_0);
		*temp = byte;
		if (rval == QLA_SUCCESS)
			goto done;

		ql_log(ql_log_warn, vha, 0x10c9,
4518 4519
		    "Thermal not supported through I2C bus, trying alternate "
		    "method (ISP access).\n");
4520
		ha->thermal_support &= ~THERMAL_SUPPORT_I2C;
4521 4522
	}

4523 4524 4525 4526 4527 4528
	if (ha->thermal_support & THERMAL_SUPPORT_ISP) {
		rval = qla2x00_read_asic_temperature(vha, temp);
		if (rval == QLA_SUCCESS)
			goto done;

		ql_log(ql_log_warn, vha, 0x1019,
4529
		    "Thermal not supported through ISP.\n");
4530
		ha->thermal_support &= ~THERMAL_SUPPORT_ISP;
4531 4532
	}

4533 4534 4535
	ql_log(ql_log_warn, vha, 0x1150,
	    "Thermal not supported by this card "
	    "(ignoring further requests).\n");
4536 4537 4538 4539 4540
	return  rval;

done:
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1018,
	    "Done %s.\n", __func__);
4541 4542 4543
	return rval;
}

4544 4545 4546 4547 4548 4549 4550 4551
int
qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4552 4553
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
	    "Entered %s.\n", __func__);
4554

4555 4556 4557 4558
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;

	memset(mcp, 0, sizeof(mbx_cmd_t));
4559
	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4560 4561 4562 4563 4564 4565 4566 4567 4568
	mcp->mb[1] = 1;

	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4569 4570
		ql_dbg(ql_dbg_mbx, vha, 0x1016,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4571
	} else {
4572 4573
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
		    "Done %s.\n", __func__);
4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586
	}

	return rval;
}

int
qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4587 4588
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
	    "Entered %s.\n", __func__);
4589

4590 4591 4592 4593
	if (!IS_QLA82XX(ha))
		return QLA_FUNCTION_FAILED;

	memset(mcp, 0, sizeof(mbx_cmd_t));
4594
	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4595 4596 4597 4598 4599 4600 4601 4602 4603
	mcp->mb[1] = 0;

	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4604 4605
		ql_dbg(ql_dbg_mbx, vha, 0x100c,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4606
	} else {
4607 4608
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
		    "Done %s.\n", __func__);
4609 4610 4611 4612
	}

	return rval;
}
4613 4614 4615 4616 4617 4618 4619 4620 4621

int
qla82xx_md_get_template_size(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;

4622 4623
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
	    "Entered %s.\n", __func__);
4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644 4645

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
	mcp->mb[3] = MSW(RQST_TMPLT_SIZE);

	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->tov = MBX_TOV_SECONDS;
	rval = qla2x00_mailbox_command(vha, mcp);

	/* Always copy back return mailbox values. */
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1120,
		    "mailbox command FAILED=0x%x, subcode=%x.\n",
		    (mcp->mb[1] << 16) | mcp->mb[0],
		    (mcp->mb[3] << 16) | mcp->mb[2]);
	} else {
4646 4647
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
		    "Done %s.\n", __func__);
4648 4649 4650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 4665
		ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
		if (!ha->md_template_size) {
			ql_dbg(ql_dbg_mbx, vha, 0x1122,
			    "Null template size obtained.\n");
			rval = QLA_FUNCTION_FAILED;
		}
	}
	return rval;
}

int
qla82xx_md_get_template(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;

4666 4667
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
	    "Entered %s.\n", __func__);
4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701

	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
	if (!ha->md_tmplt_hdr) {
		ql_log(ql_log_warn, vha, 0x1124,
		    "Unable to allocate memory for Minidump template.\n");
		return rval;
	}

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[2] = LSW(RQST_TMPLT);
	mcp->mb[3] = MSW(RQST_TMPLT);
	mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
	mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
	mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
	mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
	mcp->mb[8] = LSW(ha->md_template_size);
	mcp->mb[9] = MSW(ha->md_template_size);

	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1125,
		    "mailbox command FAILED=0x%x, subcode=%x.\n",
		    ((mcp->mb[1] << 16) | mcp->mb[0]),
		    ((mcp->mb[3] << 16) | mcp->mb[2]));
	} else
4702 4703
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
		    "Done %s.\n", __func__);
4704 4705
	return rval;
}
4706

4707 4708 4709 4710 4711 4712 4713 4714 4715 4716 4717
int
qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

4718 4719
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
	    "Entered %s.\n", __func__);
4720 4721 4722 4723 4724 4725 4726 4727 4728 4729 4730 4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_SET_LED_CONFIG;
	mcp->mb[1] = led_cfg[0];
	mcp->mb[2] = led_cfg[1];
	if (IS_QLA8031(ha)) {
		mcp->mb[3] = led_cfg[2];
		mcp->mb[4] = led_cfg[3];
		mcp->mb[5] = led_cfg[4];
		mcp->mb[6] = led_cfg[5];
	}

	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	if (IS_QLA8031(ha))
		mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1134,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
4744 4745
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
		    "Done %s.\n", __func__);
4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4759 4760 4761
	}

	return rval;
}

int
qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

4762 4763
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
	    "Entered %s.\n", __func__);
4764 4765 4766 4767 4768 4769 4770 4771 4772 4773 4774 4775 4776 4777 4778 4779 4780 4781 4782 4783 4784 4785 4786 4787

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_GET_LED_CONFIG;

	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	if (IS_QLA8031(ha))
		mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1137,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		led_cfg[0] = mcp->mb[1];
		led_cfg[1] = mcp->mb[2];
		if (IS_QLA8031(ha)) {
			led_cfg[2] = mcp->mb[3];
			led_cfg[3] = mcp->mb[4];
			led_cfg[4] = mcp->mb[5];
			led_cfg[5] = mcp->mb[6];
		}
4788 4789
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
		    "Done %s.\n", __func__);
4790 4791 4792 4793 4794
	}

	return rval;
}

4795 4796 4797 4798 4799 4800 4801 4802 4803 4804 4805
int
qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA82XX(ha))
		return QLA_FUNCTION_FAILED;

4806
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
4807 4808 4809 4810 4811 4812 4813 4814 4815 4816 4817
		"Entered %s.\n", __func__);

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_SET_LED_CONFIG;
	if (enable)
		mcp->mb[7] = 0xE;
	else
		mcp->mb[7] = 0xD;

	mcp->out_mb = MBX_7|MBX_0;
	mcp->in_mb = MBX_0;
4818
	mcp->tov = MBX_TOV_SECONDS;
4819 4820 4821 4822 4823 4824 4825
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1128,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
4826
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
4827 4828 4829 4830 4831
		    "Done %s.\n", __func__);
	}

	return rval;
}
4832 4833

int
4834
qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
4835 4836 4837 4838 4839 4840 4841 4842 4843
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA83XX(ha))
		return QLA_FUNCTION_FAILED;

4844 4845
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
	    "Entered %s.\n", __func__);
4846 4847 4848 4849 4850 4851 4852 4853 4854 4855 4856 4857 4858 4859 4860 4861 4862

	mcp->mb[0] = MBC_WRITE_REMOTE_REG;
	mcp->mb[1] = LSW(reg);
	mcp->mb[2] = MSW(reg);
	mcp->mb[3] = LSW(data);
	mcp->mb[4] = MSW(data);
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1131,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
4863
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
4864 4865
		    "Done %s.\n", __func__);
	}
4866

4867 4868
	return rval;
}
4869 4870 4871 4872 4873 4874 4875 4876 4877 4878

int
qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4879
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
4880 4881 4882 4883 4884
		    "Implicit LOGO Unsupported.\n");
		return QLA_FUNCTION_FAILED;
	}


4885 4886
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
	    "Entering %s.\n",  __func__);
4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897 4898 4899 4900

	/* Perform Implicit LOGO. */
	mcp->mb[0] = MBC_PORT_LOGOUT;
	mcp->mb[1] = fcport->loop_id;
	mcp->mb[10] = BIT_15;
	mcp->out_mb = MBX_10|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS)
		ql_dbg(ql_dbg_mbx, vha, 0x113d,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	else
4901 4902
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
		    "Done %s.\n", __func__);
4903 4904 4905 4906

	return rval;
}

4907 4908 4909 4910 4911 4912 4913 4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935 4936 4937 4938 4939 4940 4941 4942 4943 4944 4945 4946 4947 4948 4949 4950 4951 4952 4953 4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983 4984 4985 4986 4987 4988 4989 4990 4991 4992 4993 4994 4995 4996 4997 4998 4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011 5012 5013 5014 5015 5016 5017 5018 5019 5020 5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042
int
qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;
	unsigned long retry_max_time = jiffies + (2 * HZ);

	if (!IS_QLA83XX(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);

retry_rd_reg:
	mcp->mb[0] = MBC_READ_REMOTE_REG;
	mcp->mb[1] = LSW(reg);
	mcp->mb[2] = MSW(reg);
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x114c,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
	} else {
		*data = (mcp->mb[3] | (mcp->mb[4] << 16));
		if (*data == QLA8XXX_BAD_VALUE) {
			/*
			 * During soft-reset CAMRAM register reads might
			 * return 0xbad0bad0. So retry for MAX of 2 sec
			 * while reading camram registers.
			 */
			if (time_after(jiffies, retry_max_time)) {
				ql_dbg(ql_dbg_mbx, vha, 0x1141,
				    "Failure to read CAMRAM register. "
				    "data=0x%x.\n", *data);
				return QLA_FUNCTION_FAILED;
			}
			msleep(100);
			goto retry_rd_reg;
		}
		ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
	}

	return rval;
}

int
qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_QLA83XX(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1144,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
		ha->isp_ops->fw_dump(vha, 0);
	} else {
		ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
	}

	return rval;
}

int
qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
	uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	uint8_t subcode = (uint8_t)options;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
	mcp->mb[1] = options;
	mcp->out_mb = MBX_1|MBX_0;
	if (subcode & BIT_2) {
		mcp->mb[2] = LSW(start_addr);
		mcp->mb[3] = MSW(start_addr);
		mcp->mb[4] = LSW(end_addr);
		mcp->mb[5] = MSW(end_addr);
		mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
	}
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	if (!(subcode & (BIT_2 | BIT_5)))
		mcp->in_mb |= MBX_4|MBX_3;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1147,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
		    mcp->mb[4]);
		ha->isp_ops->fw_dump(vha, 0);
	} else {
		if (subcode & BIT_5)
			*sector_size = mcp->mb[1];
		else if (subcode & (BIT_6 | BIT_7)) {
			ql_dbg(ql_dbg_mbx, vha, 0x1148,
			    "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
		} else if (subcode & (BIT_3 | BIT_4)) {
			ql_dbg(ql_dbg_mbx, vha, 0x1149,
			    "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
		}
		ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
	}

	return rval;
}
5043 5044 5045 5046 5047 5048 5049 5050 5051 5052 5053 5054 5055 5056 5057 5058 5059 5060 5061 5062 5063 5064 5065 5066 5067 5068 5069 5070 5071 5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082 5083 5084 5085 5086 5087 5088 5089

int
qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
	uint32_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_MCTP_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
	mcp->mb[1] = LSW(addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[4] = MSW(size);
	mcp->mb[5] = LSW(size);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
	mcp->mb[8] = MSW(addr);
	/* Setting RAM ID to valid */
	mcp->mb[10] |= BIT_7;
	/* For MCTP RAM ID is 0x40 */
	mcp->mb[10] |= 0x40;

	mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
	    MBX_0;

	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x114e,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
		    "Done %s.\n", __func__);
	}

	return rval;
}