Kconfig 17.2 KB
Newer Older
C
Catalin Marinas 已提交
1 2
config ARM64
	def_bool y
3
	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
C
Catalin Marinas 已提交
4
	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
5
	select ARCH_HAS_SG_CHAIN
6
	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
7
	select ARCH_USE_CMPXCHG_LOCKREF
8
	select ARCH_SUPPORTS_ATOMIC_RMW
9
	select ARCH_WANT_OPTIONAL_GPIOLIB
10
	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
11
	select ARCH_WANT_FRAME_POINTERS
12
	select ARM_AMBA
13
	select ARM_ARCH_TIMER
14
	select ARM_GIC
A
AKASHI Takahiro 已提交
15
	select AUDIT_ARCH_COMPAT_GENERIC
16
	select ARM_GIC_V3
17
	select BUILDTIME_EXTABLE_SORT
18
	select CLONE_BACKWARDS
19
	select COMMON_CLK
20
	select CPU_PM if (SUSPEND || CPU_IDLE)
21
	select DCACHE_WORD_ACCESS
22
	select GENERIC_ALLOCATOR
C
Catalin Marinas 已提交
23
	select GENERIC_CLOCKEVENTS
24
	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
25
	select GENERIC_CPU_AUTOPROBE
M
Mark Salter 已提交
26
	select GENERIC_EARLY_IOREMAP
C
Catalin Marinas 已提交
27 28
	select GENERIC_IRQ_PROBE
	select GENERIC_IRQ_SHOW
A
Arnd Bergmann 已提交
29
	select GENERIC_PCI_IOMAP
30
	select GENERIC_SCHED_CLOCK
C
Catalin Marinas 已提交
31
	select GENERIC_SMP_IDLE_THREAD
32 33
	select GENERIC_STRNCPY_FROM_USER
	select GENERIC_STRNLEN_USER
C
Catalin Marinas 已提交
34
	select GENERIC_TIME_VSYSCALL
35
	select HANDLE_DOMAIN_IRQ
C
Catalin Marinas 已提交
36
	select HARDIRQS_SW_RESEND
37
	select HAVE_ALIGNED_STRUCT_PAGE if SLUB
A
AKASHI Takahiro 已提交
38
	select HAVE_ARCH_AUDITSYSCALL
39
	select HAVE_ARCH_JUMP_LABEL
V
Vijaya Kumar K 已提交
40
	select HAVE_ARCH_KGDB
A
AKASHI Takahiro 已提交
41
	select HAVE_ARCH_SECCOMP_FILTER
C
Catalin Marinas 已提交
42
	select HAVE_ARCH_TRACEHOOK
Z
Zi Shen Lim 已提交
43
	select HAVE_BPF_JIT
44
	select HAVE_C_RECORDMCOUNT
45
	select HAVE_CC_STACKPROTECTOR
46
	select HAVE_CMPXCHG_DOUBLE
47
	select HAVE_DEBUG_BUGVERBOSE
48
	select HAVE_DEBUG_KMEMLEAK
C
Catalin Marinas 已提交
49 50
	select HAVE_DMA_API_DEBUG
	select HAVE_DMA_ATTRS
L
Laura Abbott 已提交
51
	select HAVE_DMA_CONTIGUOUS
52
	select HAVE_DYNAMIC_FTRACE
53
	select HAVE_EFFICIENT_UNALIGNED_ACCESS
54
	select HAVE_FTRACE_MCOUNT_RECORD
A
AKASHI Takahiro 已提交
55 56
	select HAVE_FUNCTION_TRACER
	select HAVE_FUNCTION_GRAPH_TRACER
C
Catalin Marinas 已提交
57 58 59
	select HAVE_GENERIC_DMA_COHERENT
	select HAVE_HW_BREAKPOINT if PERF_EVENTS
	select HAVE_MEMBLOCK
60
	select HAVE_PATA_PLATFORM
C
Catalin Marinas 已提交
61
	select HAVE_PERF_EVENTS
62 63
	select HAVE_PERF_REGS
	select HAVE_PERF_USER_STACK_DUMP
64
	select HAVE_RCU_TABLE_FREE
65
	select HAVE_SYSCALL_TRACEPOINTS
C
Catalin Marinas 已提交
66
	select IRQ_DOMAIN
67
	select MODULES_USE_ELF_RELA
C
Catalin Marinas 已提交
68 69 70
	select NO_BOOTMEM
	select OF
	select OF_EARLY_FLATTREE
71
	select OF_RESERVED_MEM
C
Catalin Marinas 已提交
72
	select PERF_USE_VMALLOC
73 74
	select POWER_RESET
	select POWER_SUPPLY
C
Catalin Marinas 已提交
75 76
	select RTC_LIB
	select SPARSE_IRQ
77
	select SYSCTL_EXCEPTION_TRACE
L
Larry Bassel 已提交
78
	select HAVE_CONTEXT_TRACKING
C
Catalin Marinas 已提交
79 80 81 82 83 84 85 86 87 88 89 90
	help
	  ARM 64-bit (AArch64) Linux support.

config 64BIT
	def_bool y

config ARCH_PHYS_ADDR_T_64BIT
	def_bool y

config MMU
	def_bool y

91
config NO_IOPORT_MAP
92
	def_bool y if !PCI
C
Catalin Marinas 已提交
93 94 95 96 97 98 99 100 101 102

config STACKTRACE_SUPPORT
	def_bool y

config LOCKDEP_SUPPORT
	def_bool y

config TRACE_IRQFLAGS_SUPPORT
	def_bool y

103
config RWSEM_XCHGADD_ALGORITHM
C
Catalin Marinas 已提交
104 105 106 107 108 109 110 111 112 113 114
	def_bool y

config GENERIC_HWEIGHT
	def_bool y

config GENERIC_CSUM
        def_bool y

config GENERIC_CALIBRATE_DELAY
	def_bool y

115
config ZONE_DMA
C
Catalin Marinas 已提交
116 117
	def_bool y

S
Steve Capper 已提交
118 119 120
config HAVE_GENERIC_RCU_GUP
	def_bool y

C
Catalin Marinas 已提交
121 122 123 124 125 126 127 128 129 130 131 132 133 134 135
config ARCH_DMA_ADDR_T_64BIT
	def_bool y

config NEED_DMA_MAP_STATE
	def_bool y

config NEED_SG_DMA_LENGTH
	def_bool y

config SWIOTLB
	def_bool y

config IOMMU_HELPER
	def_bool SWIOTLB

136 137 138
config KERNEL_MODE_NEON
	def_bool y

139 140 141
config FIX_EARLYCON_MEM
	def_bool y

C
Catalin Marinas 已提交
142 143 144 145
source "init/Kconfig"

source "kernel/Kconfig.freezer"

146 147
menu "Platform selection"

148 149 150 151 152
config ARCH_SEATTLE
	bool "AMD Seattle SoC Family"
	help
	  This enables support for AMD Seattle SOC Family

153 154 155 156 157
config ARCH_THUNDER
	bool "Cavium Inc. Thunder SoC Family"
	help
	  This enables support for Cavium's Thunder Family of SoCs.

158 159 160 161
config ARCH_VEXPRESS
	bool "ARMv8 software model (Versatile Express)"
	select ARCH_REQUIRE_GPIOLIB
	select COMMON_CLK_VERSATILE
162
	select POWER_RESET_VEXPRESS
163 164 165 166
	select VEXPRESS_CONFIG
	help
	  This enables support for the ARMv8 software model (Versatile
	  Express).
C
Catalin Marinas 已提交
167

168 169 170 171 172
config ARCH_XGENE
	bool "AppliedMicro X-Gene SOC Family"
	help
	  This enables support for AppliedMicro X-Gene SOC Family

C
Catalin Marinas 已提交
173 174 175 176
endmenu

menu "Bus support"

177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196
config PCI
	bool "PCI support"
	help
	  This feature enables support for PCI bus system. If you say Y
	  here, the kernel will include drivers and infrastructure code
	  to support PCI bus devices.

config PCI_DOMAINS
	def_bool PCI

config PCI_DOMAINS_GENERIC
	def_bool PCI

config PCI_SYSCALL
	def_bool PCI

source "drivers/pci/Kconfig"
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/hotplug/Kconfig"

C
Catalin Marinas 已提交
197 198 199 200
endmenu

menu "Kernel Features"

201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308
menu "ARM errata workarounds via the alternatives framework"

config ARM64_ERRATUM_826319
	bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
	default y
	help
	  This option adds an alternative code sequence to work around ARM
	  erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
	  AXI master interface and an L2 cache.

	  If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
	  and is unable to accept a certain write via this interface, it will
	  not progress on read data presented on the read data channel and the
	  system can deadlock.

	  The workaround promotes data cache clean instructions to
	  data cache clean-and-invalidate.
	  Please note that this does not necessarily enable the workaround,
	  as it depends on the alternative framework, which will only patch
	  the kernel if an affected CPU is detected.

	  If unsure, say Y.

config ARM64_ERRATUM_827319
	bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
	default y
	help
	  This option adds an alternative code sequence to work around ARM
	  erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
	  master interface and an L2 cache.

	  Under certain conditions this erratum can cause a clean line eviction
	  to occur at the same time as another transaction to the same address
	  on the AMBA 5 CHI interface, which can cause data corruption if the
	  interconnect reorders the two transactions.

	  The workaround promotes data cache clean instructions to
	  data cache clean-and-invalidate.
	  Please note that this does not necessarily enable the workaround,
	  as it depends on the alternative framework, which will only patch
	  the kernel if an affected CPU is detected.

	  If unsure, say Y.

config ARM64_ERRATUM_824069
	bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
	default y
	help
	  This option adds an alternative code sequence to work around ARM
	  erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
	  to a coherent interconnect.

	  If a Cortex-A53 processor is executing a store or prefetch for
	  write instruction at the same time as a processor in another
	  cluster is executing a cache maintenance operation to the same
	  address, then this erratum might cause a clean cache line to be
	  incorrectly marked as dirty.

	  The workaround promotes data cache clean instructions to
	  data cache clean-and-invalidate.
	  Please note that this option does not necessarily enable the
	  workaround, as it depends on the alternative framework, which will
	  only patch the kernel if an affected CPU is detected.

	  If unsure, say Y.

config ARM64_ERRATUM_819472
	bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
	default y
	help
	  This option adds an alternative code sequence to work around ARM
	  erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
	  present when it is connected to a coherent interconnect.

	  If the processor is executing a load and store exclusive sequence at
	  the same time as a processor in another cluster is executing a cache
	  maintenance operation to the same address, then this erratum might
	  cause data corruption.

	  The workaround promotes data cache clean instructions to
	  data cache clean-and-invalidate.
	  Please note that this does not necessarily enable the workaround,
	  as it depends on the alternative framework, which will only patch
	  the kernel if an affected CPU is detected.

	  If unsure, say Y.

config ARM64_ERRATUM_832075
	bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
	default y
	help
	  This option adds an alternative code sequence to work around ARM
	  erratum 832075 on Cortex-A57 parts up to r1p2.

	  Affected Cortex-A57 parts might deadlock when exclusive load/store
	  instructions to Write-Back memory are mixed with Device loads.

	  The workaround is to promote device loads to use Load-Acquire
	  semantics.
	  Please note that this does not necessarily enable the workaround,
	  as it depends on the alternative framework, which will only patch
	  the kernel if an affected CPU is detected.

	  If unsure, say Y.

endmenu


309 310 311 312 313 314 315 316 317 318 319
choice
	prompt "Page size"
	default ARM64_4K_PAGES
	help
	  Page size (translation granule) configuration.

config ARM64_4K_PAGES
	bool "4KB"
	help
	  This feature enables 4KB pages support.

C
Catalin Marinas 已提交
320
config ARM64_64K_PAGES
321
	bool "64KB"
C
Catalin Marinas 已提交
322 323 324 325 326 327
	help
	  This feature enables 64KB pages support (4KB by default)
	  allowing only two levels of page tables and faster TLB
	  look-up. AArch32 emulation is not available when this feature
	  is enabled.

328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346
endchoice

choice
	prompt "Virtual address space size"
	default ARM64_VA_BITS_39 if ARM64_4K_PAGES
	default ARM64_VA_BITS_42 if ARM64_64K_PAGES
	help
	  Allows choosing one of multiple possible virtual address
	  space sizes. The level of translation table is determined by
	  a combination of page size and virtual address space size.

config ARM64_VA_BITS_39
	bool "39-bit"
	depends on ARM64_4K_PAGES

config ARM64_VA_BITS_42
	bool "42-bit"
	depends on ARM64_64K_PAGES

347 348
config ARM64_VA_BITS_48
	bool "48-bit"
349
	depends on !ARM_SMMU
350

351 352 353 354 355 356
endchoice

config ARM64_VA_BITS
	int
	default 39 if ARM64_VA_BITS_39
	default 42 if ARM64_VA_BITS_42
357
	default 48 if ARM64_VA_BITS_48
358

359 360 361
config ARM64_PGTABLE_LEVELS
	int
	default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
362
	default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
363 364
	default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
	default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
365

366 367 368 369 370
config CPU_BIG_ENDIAN
       bool "Build big-endian kernel"
       help
         Say Y if you plan on running a kernel in big-endian mode.

C
Catalin Marinas 已提交
371 372 373 374 375 376 377 378 379 380 381 382 383
config SMP
	bool "Symmetric Multi-Processing"
	help
	  This enables support for systems with more than one CPU.  If
	  you say N here, the kernel will run on single and
	  multiprocessor machines, but will use only one CPU of a
	  multiprocessor machine. If you say Y here, the kernel will run
	  on many, but not all, single processor machines. On a single
	  processor machine, the kernel will run faster if you say N
	  here.

	  If you don't know what to do here, say N.

384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399
config SCHED_MC
	bool "Multi-core scheduler support"
	depends on SMP
	help
	  Multi-core scheduler support improves the CPU scheduler's decision
	  making when dealing with multi-core CPU chips at a cost of slightly
	  increased overhead in some places. If unsure say N here.

config SCHED_SMT
	bool "SMT scheduler support"
	depends on SMP
	help
	  Improves the CPU scheduler's decision making when dealing with
	  MultiThreading at a cost of slightly increased overhead in some
	  places. If unsure say N here.

C
Catalin Marinas 已提交
400
config NR_CPUS
401 402
	int "Maximum number of CPUs (2-64)"
	range 2 64
C
Catalin Marinas 已提交
403
	depends on SMP
404
	# These have to remain sorted largest to smallest
405
	default "64"
C
Catalin Marinas 已提交
406

407 408 409 410 411 412 413
config HOTPLUG_CPU
	bool "Support for hot-pluggable CPUs"
	depends on SMP
	help
	  Say Y here to experiment with turning CPUs off and on.  CPUs
	  can be controlled through /sys/devices/system/cpu.

C
Catalin Marinas 已提交
414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443
source kernel/Kconfig.preempt

config HZ
	int
	default 100

config ARCH_HAS_HOLES_MEMORYMODEL
	def_bool y if SPARSEMEM

config ARCH_SPARSEMEM_ENABLE
	def_bool y
	select SPARSEMEM_VMEMMAP_ENABLE

config ARCH_SPARSEMEM_DEFAULT
	def_bool ARCH_SPARSEMEM_ENABLE

config ARCH_SELECT_MEMORY_MODEL
	def_bool ARCH_SPARSEMEM_ENABLE

config HAVE_ARCH_PFN_VALID
	def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM

config HW_PERF_EVENTS
	bool "Enable hardware performance counter support for perf events"
	depends on PERF_EVENTS
	default y
	help
	  Enable hardware performance counter support for perf events. If
	  disabled, perf events will use software events only.

S
Steve Capper 已提交
444 445 446 447 448 449 450 451 452
config SYS_SUPPORTS_HUGETLBFS
	def_bool y

config ARCH_WANT_GENERAL_HUGETLB
	def_bool y

config ARCH_WANT_HUGE_PMD_SHARE
	def_bool y if !ARM64_64K_PAGES

S
Steve Capper 已提交
453 454 455
config HAVE_ARCH_TRANSPARENT_HUGEPAGE
	def_bool y

456 457 458
config ARCH_HAS_CACHE_LINE_SIZE
	def_bool y

C
Catalin Marinas 已提交
459 460
source "mm/Kconfig"

A
AKASHI Takahiro 已提交
461 462 463 464 465 466 467 468 469 470 471 472 473
config SECCOMP
	bool "Enable seccomp to safely compute untrusted bytecode"
	---help---
	  This kernel feature is useful for number crunching applications
	  that may need to compute untrusted bytecode during their
	  execution. By using pipes or other transports made available to
	  the process as file descriptors supporting the read/write
	  syscalls, it's possible to isolate those applications in
	  their own address space using seccomp. Once seccomp is
	  enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
	  and the task is only allowed to execute a few safe syscalls
	  defined by each seccomp mode.

474 475 476 477 478
config XEN_DOM0
	def_bool y
	depends on XEN

config XEN
479
	bool "Xen guest support on ARM64"
480
	depends on ARM64 && OF
481
	select SWIOTLB_XEN
482 483 484
	help
	  Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.

485 486 487 488 489
config FORCE_MAX_ZONEORDER
	int
	default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
	default "11"

490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541
menuconfig ARMV8_DEPRECATED
	bool "Emulate deprecated/obsolete ARMv8 instructions"
	depends on COMPAT
	help
	  Legacy software support may require certain instructions
	  that have been deprecated or obsoleted in the architecture.

	  Enable this config to enable selective emulation of these
	  features.

	  If unsure, say Y

if ARMV8_DEPRECATED

config SWP_EMULATION
	bool "Emulate SWP/SWPB instructions"
	help
	  ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
	  they are always undefined. Say Y here to enable software
	  emulation of these instructions for userspace using LDXR/STXR.

	  In some older versions of glibc [<=2.8] SWP is used during futex
	  trylock() operations with the assumption that the code will not
	  be preempted. This invalid assumption may be more likely to fail
	  with SWP emulation enabled, leading to deadlock of the user
	  application.

	  NOTE: when accessing uncached shared regions, LDXR/STXR rely
	  on an external transaction monitoring block called a global
	  monitor to maintain update atomicity. If your system does not
	  implement a global monitor, this option can cause programs that
	  perform SWP operations to uncached memory to deadlock.

	  If unsure, say Y

config CP15_BARRIER_EMULATION
	bool "Emulate CP15 Barrier instructions"
	help
	  The CP15 barrier instructions - CP15ISB, CP15DSB, and
	  CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
	  strongly recommended to use the ISB, DSB, and DMB
	  instructions instead.

	  Say Y here to enable software emulation of these
	  instructions for AArch32 userspace code. When this option is
	  enabled, CP15 barrier usage is traced which can help
	  identify software that needs updating.

	  If unsure, say Y

endif

C
Catalin Marinas 已提交
542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561
endmenu

menu "Boot options"

config CMDLINE
	string "Default kernel command string"
	default ""
	help
	  Provide a set of default command-line options at build time by
	  entering them here. As a minimum, you should specify the the
	  root device (e.g. root=/dev/nfs).

config CMDLINE_FORCE
	bool "Always use the default kernel command string"
	help
	  Always use the default kernel command string, even if the boot
	  loader passes other arguments to the kernel.
	  This is useful if you cannot or don't want to change the
	  command-line options your boot loader passes to the kernel.

562 563 564
config EFI_STUB
	bool

M
Mark Salter 已提交
565 566 567 568 569 570
config EFI
	bool "UEFI runtime support"
	depends on OF && !CPU_BIG_ENDIAN
	select LIBFDT
	select UCS2_STRING
	select EFI_PARAMS_FROM_FDT
571
	select EFI_RUNTIME_WRAPPERS
572 573
	select EFI_STUB
	select EFI_ARMSTUB
M
Mark Salter 已提交
574 575 576 577
	default y
	help
	  This option provides support for runtime services provided
	  by UEFI firmware (such as non-volatile variables, realtime
M
Mark Salter 已提交
578 579 580
          clock, and platform reset). A UEFI stub is also provided to
	  allow the kernel to be booted as an EFI application. This
	  is only useful on systems that have UEFI firmware.
M
Mark Salter 已提交
581

Y
Yi Li 已提交
582 583 584 585 586 587 588 589 590 591 592
config DMI
	bool "Enable support for SMBIOS (DMI) tables"
	depends on EFI
	default y
	help
	  This enables SMBIOS/DMI feature for systems.

	  This option is only useful on systems that have UEFI firmware.
	  However, even with this option, the resultant kernel should
	  continue to boot on existing non-UEFI platforms.

C
Catalin Marinas 已提交
593 594 595 596 597 598 599 600 601 602
endmenu

menu "Userspace binary formats"

source "fs/Kconfig.binfmt"

config COMPAT
	bool "Kernel support for 32-bit EL0"
	depends on !ARM64_64K_PAGES
	select COMPAT_BINFMT_ELF
603
	select HAVE_UID16
604
	select OLD_SIGSUSPEND3
605
	select COMPAT_OLD_SIGACTION
C
Catalin Marinas 已提交
606 607 608 609 610 611 612 613 614 615 616 617 618 619
	help
	  This option enables support for a 32-bit EL0 running under a 64-bit
	  kernel at EL1. AArch32-specific components such as system calls,
	  the user helper functions, VFP support and the ptrace interface are
	  handled appropriately by the kernel.

	  If you want to execute 32-bit userspace applications, say Y.

config SYSVIPC_COMPAT
	def_bool y
	depends on COMPAT && SYSVIPC

endmenu

620 621 622 623 624 625 626 627 628 629 630 631
menu "Power management options"

source "kernel/power/Kconfig"

config ARCH_SUSPEND_POSSIBLE
	def_bool y

config ARM64_CPU_SUSPEND
	def_bool PM_SLEEP

endmenu

632 633 634 635
menu "CPU Power Management"

source "drivers/cpuidle/Kconfig"

636 637 638 639
source "drivers/cpufreq/Kconfig"

endmenu

C
Catalin Marinas 已提交
640 641 642 643
source "net/Kconfig"

source "drivers/Kconfig"

M
Mark Salter 已提交
644 645
source "drivers/firmware/Kconfig"

C
Catalin Marinas 已提交
646 647
source "fs/Kconfig"

M
Marc Zyngier 已提交
648 649
source "arch/arm64/kvm/Kconfig"

C
Catalin Marinas 已提交
650 651 652 653 654
source "arch/arm64/Kconfig.debug"

source "security/Kconfig"

source "crypto/Kconfig"
655 656 657
if CRYPTO
source "arch/arm64/crypto/Kconfig"
endif
C
Catalin Marinas 已提交
658 659

source "lib/Kconfig"