i915_debugfs.c 56.2 KB
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/*
 * Copyright © 2008 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 * Authors:
 *    Eric Anholt <eric@anholt.net>
 *    Keith Packard <keithp@keithp.com>
 *
 */

#include <linux/seq_file.h>
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#include <linux/debugfs.h>
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#include <linux/slab.h>
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#include <linux/export.h>
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#include "drmP.h"
#include "drm.h"
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#include "intel_drv.h"
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#include "intel_ringbuffer.h"
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#include "i915_drm.h"
#include "i915_drv.h"

#define DRM_I915_RING_DEBUG 1


#if defined(CONFIG_DEBUG_FS)

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enum {
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	ACTIVE_LIST,
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	INACTIVE_LIST,
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	PINNED_LIST,
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};
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static const char *yesno(int v)
{
	return v ? "yes" : "no";
}

static int i915_capabilities(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	const struct intel_device_info *info = INTEL_INFO(dev);

	seq_printf(m, "gen: %d\n", info->gen);
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	seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
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#define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
#define DEV_INFO_SEP ;
	DEV_INFO_FLAGS;
#undef DEV_INFO_FLAG
#undef DEV_INFO_SEP
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	return 0;
}
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static const char *get_pin_flag(struct drm_i915_gem_object *obj)
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{
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	if (obj->user_pin_count > 0)
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		return "P";
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	else if (obj->pin_count > 0)
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		return "p";
	else
		return " ";
}

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static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
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{
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	switch (obj->tiling_mode) {
	default:
	case I915_TILING_NONE: return " ";
	case I915_TILING_X: return "X";
	case I915_TILING_Y: return "Y";
	}
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}

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static const char *cache_level_str(int type)
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{
	switch (type) {
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	case I915_CACHE_NONE: return " uncached";
	case I915_CACHE_LLC: return " snooped (LLC)";
	case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
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	default: return "";
	}
}

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static void
describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
{
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	seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d %d%s%s%s",
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		   &obj->base,
		   get_pin_flag(obj),
		   get_tiling_flag(obj),
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		   obj->base.size / 1024,
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		   obj->base.read_domains,
		   obj->base.write_domain,
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		   obj->last_read_seqno,
		   obj->last_write_seqno,
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		   obj->last_fenced_seqno,
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		   cache_level_str(obj->cache_level),
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		   obj->dirty ? " dirty" : "",
		   obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
	if (obj->base.name)
		seq_printf(m, " (name: %d)", obj->base.name);
	if (obj->fence_reg != I915_FENCE_REG_NONE)
		seq_printf(m, " (fence: %d)", obj->fence_reg);
	if (obj->gtt_space != NULL)
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		seq_printf(m, " (gtt offset: %08x, size: %08x)",
			   obj->gtt_offset, (unsigned int)obj->gtt_space->size);
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	if (obj->pin_mappable || obj->fault_mappable) {
		char s[3], *t = s;
		if (obj->pin_mappable)
			*t++ = 'p';
		if (obj->fault_mappable)
			*t++ = 'f';
		*t = '\0';
		seq_printf(m, " (%s mappable)", s);
	}
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	if (obj->ring != NULL)
		seq_printf(m, " (%s)", obj->ring->name);
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}

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static int i915_gem_object_list_info(struct seq_file *m, void *data)
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{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
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	uintptr_t list = (uintptr_t) node->info_ent->data;
	struct list_head *head;
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	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct drm_i915_gem_object *obj;
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	size_t total_obj_size, total_gtt_size;
	int count, ret;
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	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
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	switch (list) {
	case ACTIVE_LIST:
		seq_printf(m, "Active:\n");
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		head = &dev_priv->mm.active_list;
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		break;
	case INACTIVE_LIST:
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		seq_printf(m, "Inactive:\n");
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		head = &dev_priv->mm.inactive_list;
		break;
	default:
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		mutex_unlock(&dev->struct_mutex);
		return -EINVAL;
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	}

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	total_obj_size = total_gtt_size = count = 0;
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	list_for_each_entry(obj, head, mm_list) {
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		seq_printf(m, "   ");
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		describe_obj(m, obj);
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		seq_printf(m, "\n");
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		total_obj_size += obj->base.size;
		total_gtt_size += obj->gtt_space->size;
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		count++;
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	}
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	mutex_unlock(&dev->struct_mutex);
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	seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
		   count, total_obj_size, total_gtt_size);
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	return 0;
}

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#define count_objects(list, member) do { \
	list_for_each_entry(obj, list, member) { \
		size += obj->gtt_space->size; \
		++count; \
		if (obj->map_and_fenceable) { \
			mappable_size += obj->gtt_space->size; \
			++mappable_count; \
		} \
	} \
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} while (0)
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static int i915_gem_object_info(struct seq_file *m, void* data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
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	u32 count, mappable_count;
	size_t size, mappable_size;
	struct drm_i915_gem_object *obj;
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	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

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	seq_printf(m, "%u objects, %zu bytes\n",
		   dev_priv->mm.object_count,
		   dev_priv->mm.object_memory);

	size = count = mappable_size = mappable_count = 0;
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	count_objects(&dev_priv->mm.bound_list, gtt_list);
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	seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
		   count, mappable_count, size, mappable_size);

	size = count = mappable_size = mappable_count = 0;
	count_objects(&dev_priv->mm.active_list, mm_list);
	seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
		   count, mappable_count, size, mappable_size);

	size = count = mappable_size = mappable_count = 0;
	count_objects(&dev_priv->mm.inactive_list, mm_list);
	seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
		   count, mappable_count, size, mappable_size);

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	size = count = 0;
	list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list)
		size += obj->base.size, ++count;
	seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);

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	size = count = mappable_size = mappable_count = 0;
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	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
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		if (obj->fault_mappable) {
			size += obj->gtt_space->size;
			++count;
		}
		if (obj->pin_mappable) {
			mappable_size += obj->gtt_space->size;
			++mappable_count;
		}
	}
	seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
		   mappable_count, mappable_size);
	seq_printf(m, "%u fault mappable objects, %zu bytes\n",
		   count, size);

	seq_printf(m, "%zu [%zu] gtt total\n",
		   dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
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	mutex_unlock(&dev->struct_mutex);

	return 0;
}

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static int i915_gem_gtt_info(struct seq_file *m, void* data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
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	uintptr_t list = (uintptr_t) node->info_ent->data;
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	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_i915_gem_object *obj;
	size_t total_obj_size, total_gtt_size;
	int count, ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

	total_obj_size = total_gtt_size = count = 0;
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	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
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		if (list == PINNED_LIST && obj->pin_count == 0)
			continue;

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		seq_printf(m, "   ");
		describe_obj(m, obj);
		seq_printf(m, "\n");
		total_obj_size += obj->base.size;
		total_gtt_size += obj->gtt_space->size;
		count++;
	}

	mutex_unlock(&dev->struct_mutex);

	seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
		   count, total_obj_size, total_gtt_size);

	return 0;
}

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static int i915_gem_pageflip_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	unsigned long flags;
	struct intel_crtc *crtc;

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
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		const char pipe = pipe_name(crtc->pipe);
		const char plane = plane_name(crtc->plane);
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		struct intel_unpin_work *work;

		spin_lock_irqsave(&dev->event_lock, flags);
		work = crtc->unpin_work;
		if (work == NULL) {
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			seq_printf(m, "No flip due on pipe %c (plane %c)\n",
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				   pipe, plane);
		} else {
			if (!work->pending) {
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				seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
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					   pipe, plane);
			} else {
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				seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
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					   pipe, plane);
			}
			if (work->enable_stall_check)
				seq_printf(m, "Stall check enabled, ");
			else
				seq_printf(m, "Stall check waiting for page flip ioctl, ");
			seq_printf(m, "%d prepares\n", work->pending);

			if (work->old_fb_obj) {
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				struct drm_i915_gem_object *obj = work->old_fb_obj;
				if (obj)
					seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
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			}
			if (work->pending_flip_obj) {
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				struct drm_i915_gem_object *obj = work->pending_flip_obj;
				if (obj)
					seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
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			}
		}
		spin_unlock_irqrestore(&dev->event_lock, flags);
	}

	return 0;
}

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static int i915_gem_request_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct drm_i915_gem_request *gem_request;
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	int ret, count;
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	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
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	count = 0;
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	if (!list_empty(&dev_priv->ring[RCS].request_list)) {
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		seq_printf(m, "Render requests:\n");
		list_for_each_entry(gem_request,
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				    &dev_priv->ring[RCS].request_list,
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				    list) {
			seq_printf(m, "    %d @ %d\n",
				   gem_request->seqno,
				   (int) (jiffies - gem_request->emitted_jiffies));
		}
		count++;
	}
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	if (!list_empty(&dev_priv->ring[VCS].request_list)) {
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		seq_printf(m, "BSD requests:\n");
		list_for_each_entry(gem_request,
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				    &dev_priv->ring[VCS].request_list,
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				    list) {
			seq_printf(m, "    %d @ %d\n",
				   gem_request->seqno,
				   (int) (jiffies - gem_request->emitted_jiffies));
		}
		count++;
	}
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	if (!list_empty(&dev_priv->ring[BCS].request_list)) {
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		seq_printf(m, "BLT requests:\n");
		list_for_each_entry(gem_request,
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				    &dev_priv->ring[BCS].request_list,
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				    list) {
			seq_printf(m, "    %d @ %d\n",
				   gem_request->seqno,
				   (int) (jiffies - gem_request->emitted_jiffies));
		}
		count++;
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	}
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	mutex_unlock(&dev->struct_mutex);

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	if (count == 0)
		seq_printf(m, "No requests\n");

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	return 0;
}

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static void i915_ring_seqno_info(struct seq_file *m,
				 struct intel_ring_buffer *ring)
{
	if (ring->get_seqno) {
		seq_printf(m, "Current sequence (%s): %d\n",
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			   ring->name, ring->get_seqno(ring, false));
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	}
}

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static int i915_gem_seqno_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
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	int ret, i;
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	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
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	for (i = 0; i < I915_NUM_RINGS; i++)
		i915_ring_seqno_info(m, &dev_priv->ring[i]);
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	mutex_unlock(&dev->struct_mutex);

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	return 0;
}


static int i915_interrupt_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
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	int ret, i, pipe;
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	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
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	if (IS_VALLEYVIEW(dev)) {
		seq_printf(m, "Display IER:\t%08x\n",
			   I915_READ(VLV_IER));
		seq_printf(m, "Display IIR:\t%08x\n",
			   I915_READ(VLV_IIR));
		seq_printf(m, "Display IIR_RW:\t%08x\n",
			   I915_READ(VLV_IIR_RW));
		seq_printf(m, "Display IMR:\t%08x\n",
			   I915_READ(VLV_IMR));
		for_each_pipe(pipe)
			seq_printf(m, "Pipe %c stat:\t%08x\n",
				   pipe_name(pipe),
				   I915_READ(PIPESTAT(pipe)));

		seq_printf(m, "Master IER:\t%08x\n",
			   I915_READ(VLV_MASTER_IER));

		seq_printf(m, "Render IER:\t%08x\n",
			   I915_READ(GTIER));
		seq_printf(m, "Render IIR:\t%08x\n",
			   I915_READ(GTIIR));
		seq_printf(m, "Render IMR:\t%08x\n",
			   I915_READ(GTIMR));

		seq_printf(m, "PM IER:\t\t%08x\n",
			   I915_READ(GEN6_PMIER));
		seq_printf(m, "PM IIR:\t\t%08x\n",
			   I915_READ(GEN6_PMIIR));
		seq_printf(m, "PM IMR:\t\t%08x\n",
			   I915_READ(GEN6_PMIMR));

		seq_printf(m, "Port hotplug:\t%08x\n",
			   I915_READ(PORT_HOTPLUG_EN));
		seq_printf(m, "DPFLIPSTAT:\t%08x\n",
			   I915_READ(VLV_DPFLIPSTAT));
		seq_printf(m, "DPINVGTT:\t%08x\n",
			   I915_READ(DPINVGTT));

	} else if (!HAS_PCH_SPLIT(dev)) {
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		seq_printf(m, "Interrupt enable:    %08x\n",
			   I915_READ(IER));
		seq_printf(m, "Interrupt identity:  %08x\n",
			   I915_READ(IIR));
		seq_printf(m, "Interrupt mask:      %08x\n",
			   I915_READ(IMR));
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		for_each_pipe(pipe)
			seq_printf(m, "Pipe %c stat:         %08x\n",
				   pipe_name(pipe),
				   I915_READ(PIPESTAT(pipe)));
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	} else {
		seq_printf(m, "North Display Interrupt enable:		%08x\n",
			   I915_READ(DEIER));
		seq_printf(m, "North Display Interrupt identity:	%08x\n",
			   I915_READ(DEIIR));
		seq_printf(m, "North Display Interrupt mask:		%08x\n",
			   I915_READ(DEIMR));
		seq_printf(m, "South Display Interrupt enable:		%08x\n",
			   I915_READ(SDEIER));
		seq_printf(m, "South Display Interrupt identity:	%08x\n",
			   I915_READ(SDEIIR));
		seq_printf(m, "South Display Interrupt mask:		%08x\n",
			   I915_READ(SDEIMR));
		seq_printf(m, "Graphics Interrupt enable:		%08x\n",
			   I915_READ(GTIER));
		seq_printf(m, "Graphics Interrupt identity:		%08x\n",
			   I915_READ(GTIIR));
		seq_printf(m, "Graphics Interrupt mask:		%08x\n",
			   I915_READ(GTIMR));
	}
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	seq_printf(m, "Interrupts received: %d\n",
		   atomic_read(&dev_priv->irq_received));
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	for (i = 0; i < I915_NUM_RINGS; i++) {
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		if (IS_GEN6(dev) || IS_GEN7(dev)) {
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			seq_printf(m, "Graphics Interrupt mask (%s):	%08x\n",
				   dev_priv->ring[i].name,
				   I915_READ_IMR(&dev_priv->ring[i]));
		}
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		i915_ring_seqno_info(m, &dev_priv->ring[i]);
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	}
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	mutex_unlock(&dev->struct_mutex);

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	return 0;
}

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static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
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	int i, ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
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	seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
	seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
	for (i = 0; i < dev_priv->num_fence_regs; i++) {
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		struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
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		seq_printf(m, "Fence %d, pin count = %d, object = ",
			   i, dev_priv->fence_regs[i].pin_count);
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		if (obj == NULL)
			seq_printf(m, "unused");
		else
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			describe_obj(m, obj);
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		seq_printf(m, "\n");
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	}

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	mutex_unlock(&dev->struct_mutex);
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	return 0;
}

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static int i915_hws_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct intel_ring_buffer *ring;
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	const volatile u32 __iomem *hws;
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	int i;

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	ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
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	hws = (volatile u32 __iomem *)ring->status_page.page_addr;
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	if (hws == NULL)
		return 0;

	for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
		seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
			   i * 4,
			   hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
	}
	return 0;
}

569 570 571
static const char *ring_str(int ring)
{
	switch (ring) {
572 573 574
	case RCS: return "render";
	case VCS: return "bsd";
	case BCS: return "blt";
575 576 577 578
	default: return "";
	}
}

579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608
static const char *pin_flag(int pinned)
{
	if (pinned > 0)
		return " P";
	else if (pinned < 0)
		return " p";
	else
		return "";
}

static const char *tiling_flag(int tiling)
{
	switch (tiling) {
	default:
	case I915_TILING_NONE: return "";
	case I915_TILING_X: return " X";
	case I915_TILING_Y: return " Y";
	}
}

static const char *dirty_flag(int dirty)
{
	return dirty ? " dirty" : "";
}

static const char *purgeable_flag(int purgeable)
{
	return purgeable ? " purgeable" : "";
}

609 610 611 612 613 614 615 616
static void print_error_buffers(struct seq_file *m,
				const char *name,
				struct drm_i915_error_buffer *err,
				int count)
{
	seq_printf(m, "%s [%d]:\n", name, count);

	while (count--) {
617
		seq_printf(m, "  %08x %8u %04x %04x %x %x%s%s%s%s%s%s%s",
618 619 620 621
			   err->gtt_offset,
			   err->size,
			   err->read_domains,
			   err->write_domain,
622
			   err->rseqno, err->wseqno,
623 624 625 626
			   pin_flag(err->pinned),
			   tiling_flag(err->tiling),
			   dirty_flag(err->dirty),
			   purgeable_flag(err->purgeable),
627
			   err->ring != -1 ? " " : "",
628
			   ring_str(err->ring),
629
			   cache_level_str(err->cache_level));
630 631 632 633 634 635 636 637 638 639 640

		if (err->name)
			seq_printf(m, " (name: %d)", err->name);
		if (err->fence_reg != I915_FENCE_REG_NONE)
			seq_printf(m, " (fence: %d)", err->fence_reg);

		seq_printf(m, "\n");
		err++;
	}
}

641 642 643 644 645
static void i915_ring_error_state(struct seq_file *m,
				  struct drm_device *dev,
				  struct drm_i915_error_state *error,
				  unsigned ring)
{
646
	BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
647
	seq_printf(m, "%s command stream:\n", ring_str(ring));
648 649
	seq_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
	seq_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
650 651 652 653
	seq_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
	seq_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
	seq_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
	seq_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
654 655 656
	if (ring == RCS && INTEL_INFO(dev)->gen >= 4) {
		seq_printf(m, "  INSTDONE1: 0x%08x\n", error->instdone1);
		seq_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
657
	}
658 659 660
	if (INTEL_INFO(dev)->gen >= 4)
		seq_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
	seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
661
	seq_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
662
	if (INTEL_INFO(dev)->gen >= 6) {
663
		seq_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
664
		seq_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
665 666 667 668
		seq_printf(m, "  SYNC_0: 0x%08x\n",
			   error->semaphore_mboxes[ring][0]);
		seq_printf(m, "  SYNC_1: 0x%08x\n",
			   error->semaphore_mboxes[ring][1]);
669
	}
670
	seq_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
B
Ben Widawsky 已提交
671
	seq_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
672 673
	seq_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
	seq_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
674 675
}

676 677 678 679 680
struct i915_error_state_file_priv {
	struct drm_device *dev;
	struct drm_i915_error_state *error;
};

681 682
static int i915_error_state(struct seq_file *m, void *unused)
{
683 684
	struct i915_error_state_file_priv *error_priv = m->private;
	struct drm_device *dev = error_priv->dev;
685
	drm_i915_private_t *dev_priv = dev->dev_private;
686
	struct drm_i915_error_state *error = error_priv->error;
687
	struct intel_ring_buffer *ring;
688
	int i, j, page, offset, elt;
689

690
	if (!error) {
691
		seq_printf(m, "no error state collected\n");
692
		return 0;
693 694
	}

695 696
	seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
		   error->time.tv_usec);
697
	seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
698
	seq_printf(m, "EIR: 0x%08x\n", error->eir);
699
	seq_printf(m, "IER: 0x%08x\n", error->ier);
700
	seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
B
Ben Widawsky 已提交
701
	seq_printf(m, "CCID: 0x%08x\n", error->ccid);
702

703
	for (i = 0; i < dev_priv->num_fence_regs; i++)
704 705
		seq_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);

706
	if (INTEL_INFO(dev)->gen >= 6) {
707
		seq_printf(m, "ERROR: 0x%08x\n", error->error);
708 709
		seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
	}
710

711 712
	for_each_ring(ring, dev_priv, i)
		i915_ring_error_state(m, dev, error, i);
713

714 715 716 717 718 719 720 721 722
	if (error->active_bo)
		print_error_buffers(m, "Active",
				    error->active_bo,
				    error->active_bo_count);

	if (error->pinned_bo)
		print_error_buffers(m, "Pinned",
				    error->pinned_bo,
				    error->pinned_bo_count);
723

724 725
	for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
		struct drm_i915_error_object *obj;
726

727
		if ((obj = error->ring[i].batchbuffer)) {
728 729 730
			seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
				   dev_priv->ring[i].name,
				   obj->gtt_offset);
731 732 733 734 735 736 737 738 739
			offset = 0;
			for (page = 0; page < obj->page_count; page++) {
				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
					seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);
					offset += 4;
				}
			}
		}

740 741 742 743 744
		if (error->ring[i].num_requests) {
			seq_printf(m, "%s --- %d requests\n",
				   dev_priv->ring[i].name,
				   error->ring[i].num_requests);
			for (j = 0; j < error->ring[i].num_requests; j++) {
745
				seq_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
746
					   error->ring[i].requests[j].seqno,
747 748
					   error->ring[i].requests[j].jiffies,
					   error->ring[i].requests[j].tail);
749 750 751 752
			}
		}

		if ((obj = error->ring[i].ringbuffer)) {
753 754 755 756 757 758 759 760 761 762 763
			seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
				   dev_priv->ring[i].name,
				   obj->gtt_offset);
			offset = 0;
			for (page = 0; page < obj->page_count; page++) {
				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
					seq_printf(m, "%08x :  %08x\n",
						   offset,
						   obj->pages[page][elt]);
					offset += 4;
				}
764 765 766
			}
		}
	}
767

768 769 770
	if (error->overlay)
		intel_overlay_print_error_state(m, error->overlay);

771 772 773
	if (error->display)
		intel_display_print_error_state(m, dev, error->display);

774 775
	return 0;
}
776

777 778 779 780 781 782 783 784 785
static ssize_t
i915_error_state_write(struct file *filp,
		       const char __user *ubuf,
		       size_t cnt,
		       loff_t *ppos)
{
	struct seq_file *m = filp->private_data;
	struct i915_error_state_file_priv *error_priv = m->private;
	struct drm_device *dev = error_priv->dev;
786
	int ret;
787 788 789

	DRM_DEBUG_DRIVER("Resetting error state\n");

790 791 792 793
	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842
	i915_destroy_error_state(dev);
	mutex_unlock(&dev->struct_mutex);

	return cnt;
}

static int i915_error_state_open(struct inode *inode, struct file *file)
{
	struct drm_device *dev = inode->i_private;
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct i915_error_state_file_priv *error_priv;
	unsigned long flags;

	error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
	if (!error_priv)
		return -ENOMEM;

	error_priv->dev = dev;

	spin_lock_irqsave(&dev_priv->error_lock, flags);
	error_priv->error = dev_priv->first_error;
	if (error_priv->error)
		kref_get(&error_priv->error->ref);
	spin_unlock_irqrestore(&dev_priv->error_lock, flags);

	return single_open(file, i915_error_state, error_priv);
}

static int i915_error_state_release(struct inode *inode, struct file *file)
{
	struct seq_file *m = file->private_data;
	struct i915_error_state_file_priv *error_priv = m->private;

	if (error_priv->error)
		kref_put(&error_priv->error->ref, i915_error_state_free);
	kfree(error_priv);

	return single_release(inode, file);
}

static const struct file_operations i915_error_state_fops = {
	.owner = THIS_MODULE,
	.open = i915_error_state_open,
	.read = seq_read,
	.write = i915_error_state_write,
	.llseek = default_llseek,
	.release = i915_error_state_release,
};

843 844 845 846 847
static int i915_rstdby_delays(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
848 849 850 851 852 853 854 855 856 857
	u16 crstanddelay;
	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

	crstanddelay = I915_READ16(CRSTANDVID);

	mutex_unlock(&dev->struct_mutex);
858 859 860 861 862 863 864 865 866 867 868

	seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));

	return 0;
}

static int i915_cur_delayinfo(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
869
	int ret;
870 871 872 873 874 875 876 877 878 879 880

	if (IS_GEN5(dev)) {
		u16 rgvswctl = I915_READ16(MEMSWCTL);
		u16 rgvstat = I915_READ16(MEMSTAT_ILK);

		seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
		seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
		seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
			   MEMSTAT_VID_SHIFT);
		seq_printf(m, "Current P-state: %d\n",
			   (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
881
	} else if (IS_GEN6(dev) || IS_GEN7(dev)) {
882 883 884
		u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
		u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
		u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
885 886 887
		u32 rpstat;
		u32 rpupei, rpcurup, rpprevup;
		u32 rpdownei, rpcurdown, rpprevdown;
888 889 890
		int max_freq;

		/* RPSTAT1 is in the GT power well */
891 892 893 894
		ret = mutex_lock_interruptible(&dev->struct_mutex);
		if (ret)
			return ret;

895
		gen6_gt_force_wake_get(dev_priv);
896

897 898 899 900 901 902 903 904
		rpstat = I915_READ(GEN6_RPSTAT1);
		rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
		rpcurup = I915_READ(GEN6_RP_CUR_UP);
		rpprevup = I915_READ(GEN6_RP_PREV_UP);
		rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
		rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
		rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);

905 906 907
		gen6_gt_force_wake_put(dev_priv);
		mutex_unlock(&dev->struct_mutex);

908
		seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
909
		seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
910 911 912 913 914 915
		seq_printf(m, "Render p-state ratio: %d\n",
			   (gt_perf_status & 0xff00) >> 8);
		seq_printf(m, "Render p-state VID: %d\n",
			   gt_perf_status & 0xff);
		seq_printf(m, "Render p-state limit: %d\n",
			   rp_state_limits & 0xff);
916
		seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
917
						GEN6_CAGF_SHIFT) * 50);
918 919 920 921 922 923 924 925 926 927 928 929
		seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
			   GEN6_CURICONT_MASK);
		seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
			   GEN6_CURBSYTAVG_MASK);
		seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
			   GEN6_CURBSYTAVG_MASK);
		seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
			   GEN6_CURIAVG_MASK);
		seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
			   GEN6_CURBSYTAVG_MASK);
		seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
			   GEN6_CURBSYTAVG_MASK);
930 931 932

		max_freq = (rp_state_cap & 0xff0000) >> 16;
		seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
933
			   max_freq * 50);
934 935 936

		max_freq = (rp_state_cap & 0xff00) >> 8;
		seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
937
			   max_freq * 50);
938 939 940

		max_freq = rp_state_cap & 0xff;
		seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
941
			   max_freq * 50);
942 943 944
	} else {
		seq_printf(m, "no P-state info available\n");
	}
945 946 947 948 949 950 951 952 953 954

	return 0;
}

static int i915_delayfreq_table(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	u32 delayfreq;
955 956 957 958 959
	int ret, i;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
960 961 962

	for (i = 0; i < 16; i++) {
		delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
963 964
		seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
			   (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
965 966
	}

967 968
	mutex_unlock(&dev->struct_mutex);

969 970 971 972 973 974 975 976 977 978 979 980 981 982
	return 0;
}

static inline int MAP_TO_MV(int map)
{
	return 1250 - (map * 25);
}

static int i915_inttoext_table(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	u32 inttoext;
983 984 985 986 987
	int ret, i;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
988 989 990 991 992 993

	for (i = 1; i <= 32; i++) {
		inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
		seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
	}

994 995
	mutex_unlock(&dev->struct_mutex);

996 997 998
	return 0;
}

999
static int ironlake_drpc_info(struct seq_file *m)
1000 1001 1002 1003
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016
	u32 rgvmodectl, rstdbyctl;
	u16 crstandvid;
	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

	rgvmodectl = I915_READ(MEMMODECTL);
	rstdbyctl = I915_READ(RSTDBYCTL);
	crstandvid = I915_READ16(CRSTANDVID);

	mutex_unlock(&dev->struct_mutex);
1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030

	seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
		   "yes" : "no");
	seq_printf(m, "Boost freq: %d\n",
		   (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
		   MEMMODE_BOOST_FREQ_SHIFT);
	seq_printf(m, "HW control enabled: %s\n",
		   rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
	seq_printf(m, "SW control enabled: %s\n",
		   rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
	seq_printf(m, "Gated voltage change: %s\n",
		   rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
	seq_printf(m, "Starting frequency: P%d\n",
		   (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1031
	seq_printf(m, "Max P-state: P%d\n",
1032
		   (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1033 1034 1035 1036 1037
	seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
	seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
	seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
	seq_printf(m, "Render standby enabled: %s\n",
		   (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061
	seq_printf(m, "Current RS state: ");
	switch (rstdbyctl & RSX_STATUS_MASK) {
	case RSX_STATUS_ON:
		seq_printf(m, "on\n");
		break;
	case RSX_STATUS_RC1:
		seq_printf(m, "RC1\n");
		break;
	case RSX_STATUS_RC1E:
		seq_printf(m, "RC1E\n");
		break;
	case RSX_STATUS_RS1:
		seq_printf(m, "RS1\n");
		break;
	case RSX_STATUS_RS2:
		seq_printf(m, "RS2 (RC6)\n");
		break;
	case RSX_STATUS_RS3:
		seq_printf(m, "RC3 (RC6+)\n");
		break;
	default:
		seq_printf(m, "unknown\n");
		break;
	}
1062 1063 1064 1065

	return 0;
}

1066 1067 1068 1069 1070 1071 1072
static int gen6_drpc_info(struct seq_file *m)
{

	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 rpmodectl1, gt_core_status, rcctl1;
1073
	unsigned forcewake_count;
1074 1075 1076 1077 1078 1079 1080
	int count=0, ret;


	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

1081 1082 1083 1084 1085 1086 1087
	spin_lock_irq(&dev_priv->gt_lock);
	forcewake_count = dev_priv->forcewake_count;
	spin_unlock_irq(&dev_priv->gt_lock);

	if (forcewake_count) {
		seq_printf(m, "RC information inaccurate because somebody "
			      "holds a forcewake reference \n");
1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108
	} else {
		/* NB: we cannot use forcewake, else we read the wrong values */
		while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
			udelay(10);
		seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
	}

	gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
	trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);

	rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
	rcctl1 = I915_READ(GEN6_RC_CONTROL);
	mutex_unlock(&dev->struct_mutex);

	seq_printf(m, "Video Turbo Mode: %s\n",
		   yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
	seq_printf(m, "HW control enabled: %s\n",
		   yesno(rpmodectl1 & GEN6_RP_ENABLE));
	seq_printf(m, "SW control enabled: %s\n",
		   yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
			  GEN6_RP_MEDIA_SW_MODE));
1109
	seq_printf(m, "RC1e Enabled: %s\n",
1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140
		   yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
	seq_printf(m, "RC6 Enabled: %s\n",
		   yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
	seq_printf(m, "Deep RC6 Enabled: %s\n",
		   yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
	seq_printf(m, "Deepest RC6 Enabled: %s\n",
		   yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
	seq_printf(m, "Current RC state: ");
	switch (gt_core_status & GEN6_RCn_MASK) {
	case GEN6_RC0:
		if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
			seq_printf(m, "Core Power Down\n");
		else
			seq_printf(m, "on\n");
		break;
	case GEN6_RC3:
		seq_printf(m, "RC3\n");
		break;
	case GEN6_RC6:
		seq_printf(m, "RC6\n");
		break;
	case GEN6_RC7:
		seq_printf(m, "RC7\n");
		break;
	default:
		seq_printf(m, "Unknown\n");
		break;
	}

	seq_printf(m, "Core Power Down: %s\n",
		   yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151

	/* Not exactly sure what this is */
	seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
		   I915_READ(GEN6_GT_GFX_RC6_LOCKED));
	seq_printf(m, "RC6 residency since boot: %u\n",
		   I915_READ(GEN6_GT_GFX_RC6));
	seq_printf(m, "RC6+ residency since boot: %u\n",
		   I915_READ(GEN6_GT_GFX_RC6p));
	seq_printf(m, "RC6++ residency since boot: %u\n",
		   I915_READ(GEN6_GT_GFX_RC6pp));

1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165
	return 0;
}

static int i915_drpc_info(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;

	if (IS_GEN6(dev) || IS_GEN7(dev))
		return gen6_drpc_info(m);
	else
		return ironlake_drpc_info(m);
}

1166 1167 1168 1169 1170 1171
static int i915_fbc_status(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;

1172
	if (!I915_HAS_FBC(dev)) {
1173 1174 1175 1176
		seq_printf(m, "FBC unsupported on this chipset\n");
		return 0;
	}

1177
	if (intel_fbc_enabled(dev)) {
1178 1179 1180 1181
		seq_printf(m, "FBC enabled\n");
	} else {
		seq_printf(m, "FBC disabled: ");
		switch (dev_priv->no_fbc_reason) {
C
Chris Wilson 已提交
1182 1183 1184
		case FBC_NO_OUTPUT:
			seq_printf(m, "no outputs");
			break;
1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199
		case FBC_STOLEN_TOO_SMALL:
			seq_printf(m, "not enough stolen memory");
			break;
		case FBC_UNSUPPORTED_MODE:
			seq_printf(m, "mode not supported");
			break;
		case FBC_MODE_TOO_LARGE:
			seq_printf(m, "mode too large");
			break;
		case FBC_BAD_PLANE:
			seq_printf(m, "FBC unsupported on plane");
			break;
		case FBC_NOT_TILED:
			seq_printf(m, "scanout buffer not tiled");
			break;
1200 1201 1202
		case FBC_MULTIPLE_PIPES:
			seq_printf(m, "multiple pipes are enabled");
			break;
1203 1204 1205
		case FBC_MODULE_PARAM:
			seq_printf(m, "disabled per module param (default off)");
			break;
1206 1207 1208 1209 1210 1211 1212 1213
		default:
			seq_printf(m, "unknown reason");
		}
		seq_printf(m, "\n");
	}
	return 0;
}

1214 1215 1216 1217 1218 1219 1220
static int i915_sr_status(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	bool sr_enabled = false;

1221
	if (HAS_PCH_SPLIT(dev))
1222
		sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1223
	else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1224 1225 1226 1227 1228 1229
		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
	else if (IS_I915GM(dev))
		sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
	else if (IS_PINEVIEW(dev))
		sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;

1230 1231
	seq_printf(m, "self-refresh: %s\n",
		   sr_enabled ? "enabled" : "disabled");
1232 1233 1234 1235

	return 0;
}

1236 1237 1238 1239 1240 1241
static int i915_emon_status(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	unsigned long temp, chipset, gfx;
1242 1243
	int ret;

1244 1245 1246
	if (!IS_GEN5(dev))
		return -ENODEV;

1247 1248 1249
	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
1250 1251 1252 1253

	temp = i915_mch_val(dev_priv);
	chipset = i915_chipset_val(dev_priv);
	gfx = i915_gfx_val(dev_priv);
1254
	mutex_unlock(&dev->struct_mutex);
1255 1256 1257 1258 1259 1260 1261 1262 1263

	seq_printf(m, "GMCH temp: %ld\n", temp);
	seq_printf(m, "Chipset power: %ld\n", chipset);
	seq_printf(m, "GFX power: %ld\n", gfx);
	seq_printf(m, "Total power: %ld\n", chipset + gfx);

	return 0;
}

1264 1265 1266 1267 1268 1269 1270 1271
static int i915_ring_freq_table(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	int ret;
	int gpu_freq, ia_freq;

1272
	if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1273 1274 1275 1276 1277 1278 1279 1280 1281 1282
		seq_printf(m, "unsupported on this chipset\n");
		return 0;
	}

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

	seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");

1283 1284
	for (gpu_freq = dev_priv->rps.min_delay;
	     gpu_freq <= dev_priv->rps.max_delay;
1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302
	     gpu_freq++) {
		I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
		I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
			   GEN6_PCODE_READ_MIN_FREQ_TABLE);
		if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
			      GEN6_PCODE_READY) == 0, 10)) {
			DRM_ERROR("pcode read of freq table timed out\n");
			continue;
		}
		ia_freq = I915_READ(GEN6_PCODE_DATA);
		seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
	}

	mutex_unlock(&dev->struct_mutex);

	return 0;
}

1303 1304 1305 1306 1307
static int i915_gfxec(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
1308 1309 1310 1311 1312
	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
1313 1314 1315

	seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));

1316 1317
	mutex_unlock(&dev->struct_mutex);

1318 1319 1320
	return 0;
}

1321 1322 1323 1324 1325 1326
static int i915_opregion(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct intel_opregion *opregion = &dev_priv->opregion;
1327
	void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1328 1329
	int ret;

1330 1331 1332
	if (data == NULL)
		return -ENOMEM;

1333 1334
	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
1335
		goto out;
1336

1337 1338 1339 1340
	if (opregion->header) {
		memcpy_fromio(data, opregion->header, OPREGION_SIZE);
		seq_write(m, data, OPREGION_SIZE);
	}
1341 1342 1343

	mutex_unlock(&dev->struct_mutex);

1344 1345
out:
	kfree(data);
1346 1347 1348
	return 0;
}

1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369
static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct intel_fbdev *ifbdev;
	struct intel_framebuffer *fb;
	int ret;

	ret = mutex_lock_interruptible(&dev->mode_config.mutex);
	if (ret)
		return ret;

	ifbdev = dev_priv->fbdev;
	fb = to_intel_framebuffer(ifbdev->helper.fb);

	seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
		   fb->base.width,
		   fb->base.height,
		   fb->base.depth,
		   fb->base.bits_per_pixel);
1370
	describe_obj(m, fb->obj);
1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381
	seq_printf(m, "\n");

	list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
		if (&fb->base == ifbdev->helper.fb)
			continue;

		seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
			   fb->base.width,
			   fb->base.height,
			   fb->base.depth,
			   fb->base.bits_per_pixel);
1382
		describe_obj(m, fb->obj);
1383 1384 1385 1386 1387 1388 1389 1390
		seq_printf(m, "\n");
	}

	mutex_unlock(&dev->mode_config.mutex);

	return 0;
}

1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401
static int i915_context_status(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	int ret;

	ret = mutex_lock_interruptible(&dev->mode_config.mutex);
	if (ret)
		return ret;

1402 1403 1404 1405 1406
	if (dev_priv->pwrctx) {
		seq_printf(m, "power context ");
		describe_obj(m, dev_priv->pwrctx);
		seq_printf(m, "\n");
	}
1407

1408 1409 1410 1411 1412
	if (dev_priv->renderctx) {
		seq_printf(m, "render context ");
		describe_obj(m, dev_priv->renderctx);
		seq_printf(m, "\n");
	}
1413 1414 1415 1416 1417 1418

	mutex_unlock(&dev->mode_config.mutex);

	return 0;
}

1419 1420 1421 1422 1423
static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
1424
	unsigned forcewake_count;
1425

1426 1427 1428
	spin_lock_irq(&dev_priv->gt_lock);
	forcewake_count = dev_priv->forcewake_count;
	spin_unlock_irq(&dev_priv->gt_lock);
1429

1430
	seq_printf(m, "forcewake count = %u\n", forcewake_count);
1431 1432 1433 1434

	return 0;
}

1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463
static const char *swizzle_string(unsigned swizzle)
{
	switch(swizzle) {
	case I915_BIT_6_SWIZZLE_NONE:
		return "none";
	case I915_BIT_6_SWIZZLE_9:
		return "bit9";
	case I915_BIT_6_SWIZZLE_9_10:
		return "bit9/bit10";
	case I915_BIT_6_SWIZZLE_9_11:
		return "bit9/bit11";
	case I915_BIT_6_SWIZZLE_9_10_11:
		return "bit9/bit10/bit11";
	case I915_BIT_6_SWIZZLE_9_17:
		return "bit9/bit17";
	case I915_BIT_6_SWIZZLE_9_10_17:
		return "bit9/bit10/bit17";
	case I915_BIT_6_SWIZZLE_UNKNOWN:
		return "unkown";
	}

	return "bug";
}

static int i915_swizzle_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
1464 1465 1466 1467 1468
	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481

	seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
		   swizzle_string(dev_priv->mm.bit_6_swizzle_x));
	seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
		   swizzle_string(dev_priv->mm.bit_6_swizzle_y));

	if (IS_GEN3(dev) || IS_GEN4(dev)) {
		seq_printf(m, "DDC = 0x%08x\n",
			   I915_READ(DCC));
		seq_printf(m, "C0DRB3 = 0x%04x\n",
			   I915_READ16(C0DRB3));
		seq_printf(m, "C1DRB3 = 0x%04x\n",
			   I915_READ16(C1DRB3));
1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494
	} else if (IS_GEN6(dev) || IS_GEN7(dev)) {
		seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
			   I915_READ(MAD_DIMM_C0));
		seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
			   I915_READ(MAD_DIMM_C1));
		seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
			   I915_READ(MAD_DIMM_C2));
		seq_printf(m, "TILECTL = 0x%08x\n",
			   I915_READ(TILECTL));
		seq_printf(m, "ARB_MODE = 0x%08x\n",
			   I915_READ(ARB_MODE));
		seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
			   I915_READ(DISP_ARB_CTL));
1495 1496 1497 1498 1499 1500
	}
	mutex_unlock(&dev->struct_mutex);

	return 0;
}

D
Daniel Vetter 已提交
1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537
static int i915_ppgtt_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_ring_buffer *ring;
	int i, ret;


	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
	if (INTEL_INFO(dev)->gen == 6)
		seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));

	for (i = 0; i < I915_NUM_RINGS; i++) {
		ring = &dev_priv->ring[i];

		seq_printf(m, "%s\n", ring->name);
		if (INTEL_INFO(dev)->gen == 7)
			seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
		seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
		seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
		seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
	}
	if (dev_priv->mm.aliasing_ppgtt) {
		struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;

		seq_printf(m, "aliasing PPGTT:\n");
		seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
	}
	seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
	mutex_unlock(&dev->struct_mutex);

	return 0;
}

J
Jesse Barnes 已提交
1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584
static int i915_dpio_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	int ret;


	if (!IS_VALLEYVIEW(dev)) {
		seq_printf(m, "unsupported\n");
		return 0;
	}

	ret = mutex_lock_interruptible(&dev->mode_config.mutex);
	if (ret)
		return ret;

	seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));

	seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
		   intel_dpio_read(dev_priv, _DPIO_DIV_A));
	seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
		   intel_dpio_read(dev_priv, _DPIO_DIV_B));

	seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
		   intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
	seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
		   intel_dpio_read(dev_priv, _DPIO_REFSFR_B));

	seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
		   intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
	seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
		   intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));

	seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
		   intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
	seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
		   intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));

	seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
		   intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));

	mutex_unlock(&dev->mode_config.mutex);

	return 0;
}

1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595
static ssize_t
i915_wedged_read(struct file *filp,
		 char __user *ubuf,
		 size_t max,
		 loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	drm_i915_private_t *dev_priv = dev->dev_private;
	char buf[80];
	int len;

1596
	len = snprintf(buf, sizeof(buf),
1597 1598 1599
		       "wedged :  %d\n",
		       atomic_read(&dev_priv->mm.wedged));

1600 1601
	if (len > sizeof(buf))
		len = sizeof(buf);
1602

1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616
	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
}

static ssize_t
i915_wedged_write(struct file *filp,
		  const char __user *ubuf,
		  size_t cnt,
		  loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	char buf[20];
	int val = 1;

	if (cnt > 0) {
1617
		if (cnt > sizeof(buf) - 1)
1618 1619 1620 1621 1622 1623 1624 1625 1626 1627
			return -EINVAL;

		if (copy_from_user(buf, ubuf, cnt))
			return -EFAULT;
		buf[cnt] = 0;

		val = simple_strtoul(buf, NULL, 0);
	}

	DRM_INFO("Manually setting wedged to %d\n", val);
1628
	i915_handle_error(dev, val);
1629 1630 1631 1632 1633 1634

	return cnt;
}

static const struct file_operations i915_wedged_fops = {
	.owner = THIS_MODULE,
1635
	.open = simple_open,
1636 1637
	.read = i915_wedged_read,
	.write = i915_wedged_write,
1638
	.llseek = default_llseek,
1639 1640
};

1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669
static ssize_t
i915_ring_stop_read(struct file *filp,
		    char __user *ubuf,
		    size_t max,
		    loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	drm_i915_private_t *dev_priv = dev->dev_private;
	char buf[20];
	int len;

	len = snprintf(buf, sizeof(buf),
		       "0x%08x\n", dev_priv->stop_rings);

	if (len > sizeof(buf))
		len = sizeof(buf);

	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
}

static ssize_t
i915_ring_stop_write(struct file *filp,
		     const char __user *ubuf,
		     size_t cnt,
		     loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	struct drm_i915_private *dev_priv = dev->dev_private;
	char buf[20];
1670
	int val = 0, ret;
1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684

	if (cnt > 0) {
		if (cnt > sizeof(buf) - 1)
			return -EINVAL;

		if (copy_from_user(buf, ubuf, cnt))
			return -EFAULT;
		buf[cnt] = 0;

		val = simple_strtoul(buf, NULL, 0);
	}

	DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);

1685 1686 1687 1688
	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701
	dev_priv->stop_rings = val;
	mutex_unlock(&dev->struct_mutex);

	return cnt;
}

static const struct file_operations i915_ring_stop_fops = {
	.owner = THIS_MODULE,
	.open = simple_open,
	.read = i915_ring_stop_read,
	.write = i915_ring_stop_write,
	.llseek = default_llseek,
};
1702

1703 1704 1705 1706 1707 1708 1709 1710 1711
static ssize_t
i915_max_freq_read(struct file *filp,
		   char __user *ubuf,
		   size_t max,
		   loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	drm_i915_private_t *dev_priv = dev->dev_private;
	char buf[80];
1712 1713 1714 1715 1716 1717 1718 1719
	int len, ret;

	if (!(IS_GEN6(dev) || IS_GEN7(dev)))
		return -ENODEV;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
1720

1721
	len = snprintf(buf, sizeof(buf),
1722
		       "max freq: %d\n", dev_priv->rps.max_delay * 50);
1723
	mutex_unlock(&dev->struct_mutex);
1724

1725 1726
	if (len > sizeof(buf))
		len = sizeof(buf);
1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739

	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
}

static ssize_t
i915_max_freq_write(struct file *filp,
		  const char __user *ubuf,
		  size_t cnt,
		  loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	struct drm_i915_private *dev_priv = dev->dev_private;
	char buf[20];
1740 1741 1742 1743
	int val = 1, ret;

	if (!(IS_GEN6(dev) || IS_GEN7(dev)))
		return -ENODEV;
1744 1745

	if (cnt > 0) {
1746
		if (cnt > sizeof(buf) - 1)
1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757
			return -EINVAL;

		if (copy_from_user(buf, ubuf, cnt))
			return -EFAULT;
		buf[cnt] = 0;

		val = simple_strtoul(buf, NULL, 0);
	}

	DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);

1758 1759 1760 1761
	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

1762 1763 1764
	/*
	 * Turbo will still be enabled, but won't go above the set value.
	 */
1765
	dev_priv->rps.max_delay = val / 50;
1766 1767

	gen6_set_rps(dev, val / 50);
1768
	mutex_unlock(&dev->struct_mutex);
1769 1770 1771 1772 1773 1774

	return cnt;
}

static const struct file_operations i915_max_freq_fops = {
	.owner = THIS_MODULE,
1775
	.open = simple_open,
1776 1777 1778 1779 1780
	.read = i915_max_freq_read,
	.write = i915_max_freq_write,
	.llseek = default_llseek,
};

1781 1782 1783 1784 1785 1786 1787
static ssize_t
i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
		   loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	drm_i915_private_t *dev_priv = dev->dev_private;
	char buf[80];
1788 1789 1790 1791 1792 1793 1794 1795
	int len, ret;

	if (!(IS_GEN6(dev) || IS_GEN7(dev)))
		return -ENODEV;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
1796 1797

	len = snprintf(buf, sizeof(buf),
1798
		       "min freq: %d\n", dev_priv->rps.min_delay * 50);
1799
	mutex_unlock(&dev->struct_mutex);
1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813

	if (len > sizeof(buf))
		len = sizeof(buf);

	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
}

static ssize_t
i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
		    loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	struct drm_i915_private *dev_priv = dev->dev_private;
	char buf[20];
1814 1815 1816 1817
	int val = 1, ret;

	if (!(IS_GEN6(dev) || IS_GEN7(dev)))
		return -ENODEV;
1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831

	if (cnt > 0) {
		if (cnt > sizeof(buf) - 1)
			return -EINVAL;

		if (copy_from_user(buf, ubuf, cnt))
			return -EFAULT;
		buf[cnt] = 0;

		val = simple_strtoul(buf, NULL, 0);
	}

	DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);

1832 1833 1834 1835
	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

1836 1837 1838
	/*
	 * Turbo will still be enabled, but won't go below the set value.
	 */
1839
	dev_priv->rps.min_delay = val / 50;
1840 1841

	gen6_set_rps(dev, val / 50);
1842
	mutex_unlock(&dev->struct_mutex);
1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854

	return cnt;
}

static const struct file_operations i915_min_freq_fops = {
	.owner = THIS_MODULE,
	.open = simple_open,
	.read = i915_min_freq_read,
	.write = i915_min_freq_write,
	.llseek = default_llseek,
};

1855 1856 1857 1858 1859 1860 1861 1862 1863 1864
static ssize_t
i915_cache_sharing_read(struct file *filp,
		   char __user *ubuf,
		   size_t max,
		   loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	drm_i915_private_t *dev_priv = dev->dev_private;
	char buf[80];
	u32 snpcr;
1865
	int len, ret;
1866

1867 1868 1869
	if (!(IS_GEN6(dev) || IS_GEN7(dev)))
		return -ENODEV;

1870 1871 1872 1873
	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

1874 1875 1876
	snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
	mutex_unlock(&dev_priv->dev->struct_mutex);

1877
	len = snprintf(buf, sizeof(buf),
1878 1879 1880
		       "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
		       GEN6_MBC_SNPCR_SHIFT);

1881 1882
	if (len > sizeof(buf))
		len = sizeof(buf);
1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898

	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
}

static ssize_t
i915_cache_sharing_write(struct file *filp,
		  const char __user *ubuf,
		  size_t cnt,
		  loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	struct drm_i915_private *dev_priv = dev->dev_private;
	char buf[20];
	u32 snpcr;
	int val = 1;

1899 1900 1901
	if (!(IS_GEN6(dev) || IS_GEN7(dev)))
		return -ENODEV;

1902
	if (cnt > 0) {
1903
		if (cnt > sizeof(buf) - 1)
1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928
			return -EINVAL;

		if (copy_from_user(buf, ubuf, cnt))
			return -EFAULT;
		buf[cnt] = 0;

		val = simple_strtoul(buf, NULL, 0);
	}

	if (val < 0 || val > 3)
		return -EINVAL;

	DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);

	/* Update the cache sharing policy here as well */
	snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
	snpcr &= ~GEN6_MBC_SNPCR_MASK;
	snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
	I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);

	return cnt;
}

static const struct file_operations i915_cache_sharing_fops = {
	.owner = THIS_MODULE,
1929
	.open = simple_open,
1930 1931 1932 1933 1934
	.read = i915_cache_sharing_read,
	.write = i915_cache_sharing_write,
	.llseek = default_llseek,
};

1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952
/* As the drm_debugfs_init() routines are called before dev->dev_private is
 * allocated we need to hook into the minor for release. */
static int
drm_add_fake_info_node(struct drm_minor *minor,
		       struct dentry *ent,
		       const void *key)
{
	struct drm_info_node *node;

	node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
	if (node == NULL) {
		debugfs_remove(ent);
		return -ENOMEM;
	}

	node->minor = minor;
	node->dent = ent;
	node->info_ent = (void *) key;
1953 1954 1955 1956

	mutex_lock(&minor->debugfs_lock);
	list_add(&node->list, &minor->debugfs_list);
	mutex_unlock(&minor->debugfs_lock);
1957 1958 1959 1960

	return 0;
}

1961 1962 1963 1964 1965
static int i915_forcewake_open(struct inode *inode, struct file *file)
{
	struct drm_device *dev = inode->i_private;
	struct drm_i915_private *dev_priv = dev->dev_private;

1966
	if (INTEL_INFO(dev)->gen < 6)
1967 1968 1969 1970 1971 1972 1973
		return 0;

	gen6_gt_force_wake_get(dev_priv);

	return 0;
}

1974
static int i915_forcewake_release(struct inode *inode, struct file *file)
1975 1976 1977 1978
{
	struct drm_device *dev = inode->i_private;
	struct drm_i915_private *dev_priv = dev->dev_private;

1979
	if (INTEL_INFO(dev)->gen < 6)
1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998
		return 0;

	gen6_gt_force_wake_put(dev_priv);

	return 0;
}

static const struct file_operations i915_forcewake_fops = {
	.owner = THIS_MODULE,
	.open = i915_forcewake_open,
	.release = i915_forcewake_release,
};

static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
{
	struct drm_device *dev = minor->dev;
	struct dentry *ent;

	ent = debugfs_create_file("i915_forcewake_user",
B
Ben Widawsky 已提交
1999
				  S_IRUSR,
2000 2001 2002 2003 2004
				  root, dev,
				  &i915_forcewake_fops);
	if (IS_ERR(ent))
		return PTR_ERR(ent);

B
Ben Widawsky 已提交
2005
	return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
2006 2007
}

2008 2009 2010 2011
static int i915_debugfs_create(struct dentry *root,
			       struct drm_minor *minor,
			       const char *name,
			       const struct file_operations *fops)
2012 2013 2014 2015
{
	struct drm_device *dev = minor->dev;
	struct dentry *ent;

2016
	ent = debugfs_create_file(name,
2017 2018
				  S_IRUGO | S_IWUSR,
				  root, dev,
2019
				  fops);
2020 2021 2022
	if (IS_ERR(ent))
		return PTR_ERR(ent);

2023
	return drm_add_fake_info_node(minor, ent, fops);
2024 2025
}

2026
static struct drm_info_list i915_debugfs_list[] = {
C
Chris Wilson 已提交
2027
	{"i915_capabilities", i915_capabilities, 0},
2028
	{"i915_gem_objects", i915_gem_object_info, 0},
2029
	{"i915_gem_gtt", i915_gem_gtt_info, 0},
2030
	{"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2031 2032
	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
	{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2033
	{"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2034 2035
	{"i915_gem_request", i915_gem_request_info, 0},
	{"i915_gem_seqno", i915_gem_seqno_info, 0},
2036
	{"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2037
	{"i915_gem_interrupt", i915_interrupt_info, 0},
2038 2039 2040
	{"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
	{"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
	{"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2041 2042 2043 2044 2045
	{"i915_rstdby_delays", i915_rstdby_delays, 0},
	{"i915_cur_delayinfo", i915_cur_delayinfo, 0},
	{"i915_delayfreq_table", i915_delayfreq_table, 0},
	{"i915_inttoext_table", i915_inttoext_table, 0},
	{"i915_drpc_info", i915_drpc_info, 0},
2046
	{"i915_emon_status", i915_emon_status, 0},
2047
	{"i915_ring_freq_table", i915_ring_freq_table, 0},
2048
	{"i915_gfxec", i915_gfxec, 0},
2049
	{"i915_fbc_status", i915_fbc_status, 0},
2050
	{"i915_sr_status", i915_sr_status, 0},
2051
	{"i915_opregion", i915_opregion, 0},
2052
	{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2053
	{"i915_context_status", i915_context_status, 0},
2054
	{"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2055
	{"i915_swizzle_info", i915_swizzle_info, 0},
D
Daniel Vetter 已提交
2056
	{"i915_ppgtt_info", i915_ppgtt_info, 0},
J
Jesse Barnes 已提交
2057
	{"i915_dpio", i915_dpio_info, 0},
2058
};
2059
#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2060

2061
int i915_debugfs_init(struct drm_minor *minor)
2062
{
2063 2064
	int ret;

2065 2066 2067
	ret = i915_debugfs_create(minor->debugfs_root, minor,
				  "i915_wedged",
				  &i915_wedged_fops);
2068 2069 2070
	if (ret)
		return ret;

2071
	ret = i915_forcewake_create(minor->debugfs_root, minor);
2072 2073
	if (ret)
		return ret;
2074 2075 2076 2077

	ret = i915_debugfs_create(minor->debugfs_root, minor,
				  "i915_max_freq",
				  &i915_max_freq_fops);
2078 2079
	if (ret)
		return ret;
2080

2081 2082 2083 2084 2085 2086
	ret = i915_debugfs_create(minor->debugfs_root, minor,
				  "i915_min_freq",
				  &i915_min_freq_fops);
	if (ret)
		return ret;

2087 2088 2089
	ret = i915_debugfs_create(minor->debugfs_root, minor,
				  "i915_cache_sharing",
				  &i915_cache_sharing_fops);
2090 2091
	if (ret)
		return ret;
2092

2093 2094 2095 2096 2097
	ret = i915_debugfs_create(minor->debugfs_root, minor,
				  "i915_ring_stop",
				  &i915_ring_stop_fops);
	if (ret)
		return ret;
2098

2099 2100 2101 2102 2103 2104
	ret = i915_debugfs_create(minor->debugfs_root, minor,
				  "i915_error_state",
				  &i915_error_state_fops);
	if (ret)
		return ret;

2105 2106
	return drm_debugfs_create_files(i915_debugfs_list,
					I915_DEBUGFS_ENTRIES,
2107 2108 2109
					minor->debugfs_root, minor);
}

2110
void i915_debugfs_cleanup(struct drm_minor *minor)
2111
{
2112 2113
	drm_debugfs_remove_files(i915_debugfs_list,
				 I915_DEBUGFS_ENTRIES, minor);
2114 2115
	drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
				 1, minor);
2116 2117
	drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
				 1, minor);
2118 2119
	drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
				 1, minor);
2120 2121
	drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
				 1, minor);
2122 2123
	drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
				 1, minor);
2124 2125
	drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
				 1, minor);
2126 2127
	drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
				 1, minor);
2128 2129 2130
}

#endif /* CONFIG_DEBUG_FS */