pageattr.c 31.4 KB
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/*
 * Copyright 2002 Andi Kleen, SuSE Labs.
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 * Thanks to Ben LaHaise for precious feedback.
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 */
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#include <linux/highmem.h>
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#include <linux/bootmem.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
#include <linux/debugfs.h>
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#include <linux/pfn.h>
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#include <linux/percpu.h>
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#include <asm/e820.h>
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#include <asm/processor.h>
#include <asm/tlbflush.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/uaccess.h>
#include <asm/pgalloc.h>
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#include <asm/proto.h>
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#include <asm/pat.h>
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/*
 * The current flushing context - we pass it instead of 5 arguments:
 */
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struct cpa_data {
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	unsigned long	*vaddr;
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	pgprot_t	mask_set;
	pgprot_t	mask_clr;
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	int		numpages;
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	int		flags;
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	unsigned long	pfn;
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	unsigned	force_split : 1;
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	int		curpage;
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	struct page	**pages;
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};

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/*
 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
 * entries change the page attribute in parallel to some other cpu
 * splitting a large page entry along with changing the attribute.
 */
static DEFINE_SPINLOCK(cpa_lock);

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#define CPA_FLUSHTLB 1
#define CPA_ARRAY 2
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#define CPA_PAGES_ARRAY 4
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#ifdef CONFIG_PROC_FS
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static unsigned long direct_pages_count[PG_LEVEL_NUM];

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void update_page_count(int level, unsigned long pages)
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{
	unsigned long flags;
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	/* Protect against CPA */
	spin_lock_irqsave(&pgd_lock, flags);
	direct_pages_count[level] += pages;
	spin_unlock_irqrestore(&pgd_lock, flags);
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}

static void split_page_count(int level)
{
	direct_pages_count[level]--;
	direct_pages_count[level - 1] += PTRS_PER_PTE;
}

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void arch_report_meminfo(struct seq_file *m)
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{
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	seq_printf(m, "DirectMap4k:    %8lu kB\n",
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			direct_pages_count[PG_LEVEL_4K] << 2);
#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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	seq_printf(m, "DirectMap2M:    %8lu kB\n",
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			direct_pages_count[PG_LEVEL_2M] << 11);
#else
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	seq_printf(m, "DirectMap4M:    %8lu kB\n",
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			direct_pages_count[PG_LEVEL_2M] << 12);
#endif
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#ifdef CONFIG_X86_64
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	if (direct_gbpages)
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		seq_printf(m, "DirectMap1G:    %8lu kB\n",
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			direct_pages_count[PG_LEVEL_1G] << 20);
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#endif
}
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#else
static inline void split_page_count(int level) { }
#endif
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#ifdef CONFIG_X86_64

static inline unsigned long highmap_start_pfn(void)
{
	return __pa(_text) >> PAGE_SHIFT;
}

static inline unsigned long highmap_end_pfn(void)
{
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	return __pa(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
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}

#endif

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#ifdef CONFIG_DEBUG_PAGEALLOC
# define debug_pagealloc 1
#else
# define debug_pagealloc 0
#endif

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static inline int
within(unsigned long addr, unsigned long start, unsigned long end)
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{
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	return addr >= start && addr < end;
}

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/*
 * Flushing functions
 */
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/**
 * clflush_cache_range - flush a cache range with clflush
 * @addr:	virtual start address
 * @size:	number of bytes to flush
 *
 * clflush is an unordered instruction which needs fencing with mfence
 * to avoid ordering issues.
 */
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void clflush_cache_range(void *vaddr, unsigned int size)
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{
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	void *vend = vaddr + size - 1;
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	mb();
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	for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
		clflush(vaddr);
	/*
	 * Flush any possible final partial cacheline:
	 */
	clflush(vend);

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	mb();
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}
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EXPORT_SYMBOL_GPL(clflush_cache_range);
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static void __cpa_flush_all(void *arg)
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{
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	unsigned long cache = (unsigned long)arg;

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	/*
	 * Flush all to work around Errata in early athlons regarding
	 * large page flushing.
	 */
	__flush_tlb_all();

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	if (cache && boot_cpu_data.x86 >= 4)
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		wbinvd();
}

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static void cpa_flush_all(unsigned long cache)
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{
	BUG_ON(irqs_disabled());

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	on_each_cpu(__cpa_flush_all, (void *) cache, 1);
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}

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static void __cpa_flush_range(void *arg)
{
	/*
	 * We could optimize that further and do individual per page
	 * tlb invalidates for a low number of pages. Caveat: we must
	 * flush the high aliases on 64bit as well.
	 */
	__flush_tlb_all();
}

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static void cpa_flush_range(unsigned long start, int numpages, int cache)
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{
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	unsigned int i, level;
	unsigned long addr;

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	BUG_ON(irqs_disabled());
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	WARN_ON(PAGE_ALIGN(start) != start);
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	on_each_cpu(__cpa_flush_range, NULL, 1);
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	if (!cache)
		return;

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	/*
	 * We only need to flush on one CPU,
	 * clflush is a MESI-coherent instruction that
	 * will cause all other CPUs to flush the same
	 * cachelines:
	 */
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	for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
		pte_t *pte = lookup_address(addr, &level);

		/*
		 * Only flush present addresses:
		 */
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		if (pte && (pte_val(*pte) & _PAGE_PRESENT))
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			clflush_cache_range((void *) addr, PAGE_SIZE);
	}
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}

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static void cpa_flush_array(unsigned long *start, int numpages, int cache,
			    int in_flags, struct page **pages)
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{
	unsigned int i, level;
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	unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
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	BUG_ON(irqs_disabled());

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	on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
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	if (!cache || do_wbinvd)
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		return;

	/*
	 * We only need to flush on one CPU,
	 * clflush is a MESI-coherent instruction that
	 * will cause all other CPUs to flush the same
	 * cachelines:
	 */
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	for (i = 0; i < numpages; i++) {
		unsigned long addr;
		pte_t *pte;

		if (in_flags & CPA_PAGES_ARRAY)
			addr = (unsigned long)page_address(pages[i]);
		else
			addr = start[i];

		pte = lookup_address(addr, &level);
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		/*
		 * Only flush present addresses:
		 */
		if (pte && (pte_val(*pte) & _PAGE_PRESENT))
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			clflush_cache_range((void *)addr, PAGE_SIZE);
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	}
}

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/*
 * Certain areas of memory on x86 require very specific protection flags,
 * for example the BIOS area or kernel text. Callers don't always get this
 * right (again, ioremap() on BIOS memory is not uncommon) so this function
 * checks and fixes these known static required protection bits.
 */
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static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
				   unsigned long pfn)
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{
	pgprot_t forbidden = __pgprot(0);

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	/*
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	 * The BIOS area between 640k and 1Mb needs to be executable for
	 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
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	 */
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	if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
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		pgprot_val(forbidden) |= _PAGE_NX;

	/*
	 * The kernel text needs to be executable for obvious reasons
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	 * Does not cover __inittext since that is gone later on. On
	 * 64bit we do not enforce !NX on the low mapping
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	 */
	if (within(address, (unsigned long)_text, (unsigned long)_etext))
		pgprot_val(forbidden) |= _PAGE_NX;
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	/*
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	 * The .rodata section needs to be read-only. Using the pfn
	 * catches all aliases.
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	 */
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	if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
		   __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
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		pgprot_val(forbidden) |= _PAGE_RW;
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#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
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	/*
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	 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
	 * kernel text mappings for the large page aligned text, rodata sections
	 * will be always read-only. For the kernel identity mappings covering
	 * the holes caused by this alignment can be anything that user asks.
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	 *
	 * This will preserve the large page mappings for kernel text/data
	 * at no extra cost.
	 */
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	if (kernel_set_to_readonly &&
	    within(address, (unsigned long)_text,
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		   (unsigned long)__end_rodata_hpage_align))
		pgprot_val(forbidden) |= _PAGE_RW;
#endif

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	prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
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	return prot;
}

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/*
 * Lookup the page table entry for a virtual address. Return a pointer
 * to the entry and the level of the mapping.
 *
 * Note: We return pud and pmd either when the entry is marked large
 * or when the present bit is not set. Otherwise we would return a
 * pointer to a nonexisting mapping.
 */
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pte_t *lookup_address(unsigned long address, unsigned int *level)
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{
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	pgd_t *pgd = pgd_offset_k(address);
	pud_t *pud;
	pmd_t *pmd;
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	*level = PG_LEVEL_NONE;

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	if (pgd_none(*pgd))
		return NULL;
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	pud = pud_offset(pgd, address);
	if (pud_none(*pud))
		return NULL;
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	*level = PG_LEVEL_1G;
	if (pud_large(*pud) || !pud_present(*pud))
		return (pte_t *)pud;

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	pmd = pmd_offset(pud, address);
	if (pmd_none(*pmd))
		return NULL;
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	*level = PG_LEVEL_2M;
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	if (pmd_large(*pmd) || !pmd_present(*pmd))
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		return (pte_t *)pmd;

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	*level = PG_LEVEL_4K;
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	return pte_offset_kernel(pmd, address);
}
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EXPORT_SYMBOL_GPL(lookup_address);
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/*
 * Set the new pmd in all the pgds we know about:
 */
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static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
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{
	/* change init_mm */
	set_pte_atomic(kpte, pte);
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#ifdef CONFIG_X86_32
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	if (!SHARED_KERNEL_PMD) {
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		struct page *page;

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		list_for_each_entry(page, &pgd_list, lru) {
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			pgd_t *pgd;
			pud_t *pud;
			pmd_t *pmd;

			pgd = (pgd_t *)page_address(page) + pgd_index(address);
			pud = pud_offset(pgd, address);
			pmd = pmd_offset(pud, address);
			set_pte_atomic((pte_t *)pmd, pte);
		}
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	}
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#endif
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}

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static int
try_preserve_large_page(pte_t *kpte, unsigned long address,
			struct cpa_data *cpa)
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{
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	unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
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	pte_t new_pte, old_pte, *tmp;
	pgprot_t old_prot, new_prot;
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	int i, do_split = 1;
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	unsigned int level;
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	if (cpa->force_split)
		return 1;

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	spin_lock_irqsave(&pgd_lock, flags);
	/*
	 * Check for races, another CPU might have split this page
	 * up already:
	 */
	tmp = lookup_address(address, &level);
	if (tmp != kpte)
		goto out_unlock;

	switch (level) {
	case PG_LEVEL_2M:
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		psize = PMD_PAGE_SIZE;
		pmask = PMD_PAGE_MASK;
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		break;
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#ifdef CONFIG_X86_64
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	case PG_LEVEL_1G:
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		psize = PUD_PAGE_SIZE;
		pmask = PUD_PAGE_MASK;
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		break;
#endif
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	default:
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		do_split = -EINVAL;
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		goto out_unlock;
	}

	/*
	 * Calculate the number of pages, which fit into this large
	 * page starting at address:
	 */
	nextpage_addr = (address + psize) & pmask;
	numpages = (nextpage_addr - address) >> PAGE_SHIFT;
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	if (numpages < cpa->numpages)
		cpa->numpages = numpages;
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	/*
	 * We are safe now. Check whether the new pgprot is the same:
	 */
	old_pte = *kpte;
	old_prot = new_prot = pte_pgprot(old_pte);

	pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
	pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
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	/*
	 * old_pte points to the large page base address. So we need
	 * to add the offset of the virtual address:
	 */
	pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
	cpa->pfn = pfn;

	new_prot = static_protections(new_prot, address, pfn);
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	/*
	 * We need to check the full range, whether
	 * static_protection() requires a different pgprot for one of
	 * the pages in the range we try to preserve:
	 */
	addr = address + PAGE_SIZE;
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	pfn++;
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	for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
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		pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
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		if (pgprot_val(chk_prot) != pgprot_val(new_prot))
			goto out_unlock;
	}

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	/*
	 * If there are no changes, return. maxpages has been updated
	 * above:
	 */
	if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
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		do_split = 0;
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		goto out_unlock;
	}

	/*
	 * We need to change the attributes. Check, whether we can
	 * change the large page in one go. We request a split, when
	 * the address is not aligned and the number of pages is
	 * smaller than the number of pages in the large page. Note
	 * that we limited the number of possible pages already to
	 * the number of pages in the large page.
	 */
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	if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
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		/*
		 * The address is aligned and the number of pages
		 * covers the full page.
		 */
		new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
		__set_pmd_pte(kpte, address, new_pte);
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		cpa->flags |= CPA_FLUSHTLB;
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		do_split = 0;
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	}

out_unlock:
	spin_unlock_irqrestore(&pgd_lock, flags);
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	return do_split;
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}

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static int split_large_page(pte_t *kpte, unsigned long address)
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{
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	unsigned long flags, pfn, pfninc = 1;
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	unsigned int i, level;
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	pte_t *pbase, *tmp;
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	pgprot_t ref_prot;
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	struct page *base;

	if (!debug_pagealloc)
		spin_unlock(&cpa_lock);
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	base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
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	if (!debug_pagealloc)
		spin_lock(&cpa_lock);
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	if (!base)
		return -ENOMEM;
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	spin_lock_irqsave(&pgd_lock, flags);
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	/*
	 * Check for races, another CPU might have split this page
	 * up for us already:
	 */
	tmp = lookup_address(address, &level);
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	if (tmp != kpte)
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		goto out_unlock;

	pbase = (pte_t *)page_address(base);
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	paravirt_alloc_pte(&init_mm, page_to_pfn(base));
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	ref_prot = pte_pgprot(pte_clrhuge(*kpte));
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	/*
	 * If we ever want to utilize the PAT bit, we need to
	 * update this function to make sure it's converted from
	 * bit 12 to bit 7 when we cross from the 2MB level to
	 * the 4K level:
	 */
	WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
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#ifdef CONFIG_X86_64
	if (level == PG_LEVEL_1G) {
		pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
		pgprot_val(ref_prot) |= _PAGE_PSE;
	}
#endif

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	/*
	 * Get the target pfn from the original entry:
	 */
	pfn = pte_pfn(*kpte);
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	for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
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		set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
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	if (address >= (unsigned long)__va(0) &&
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		address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
		split_page_count(level);

#ifdef CONFIG_X86_64
	if (address >= (unsigned long)__va(1UL<<32) &&
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		address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
		split_page_count(level);
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#endif
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	/*
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	 * Install the new, split up pagetable.
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	 *
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	 * We use the standard kernel pagetable protections for the new
	 * pagetable protections, the actual ptes set above control the
	 * primary protection behavior:
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	 */
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	__set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
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	/*
	 * Intel Atom errata AAH41 workaround.
	 *
	 * The real fix should be in hw or in a microcode update, but
	 * we also probabilistically try to reduce the window of having
	 * a large TLB mixed with 4K TLBs while instruction fetches are
	 * going on.
	 */
	__flush_tlb_all();

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	base = NULL;

out_unlock:
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	/*
	 * If we dropped out via the lookup_address check under
	 * pgd_lock then stick the page back into the pool:
	 */
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	if (base)
		__free_page(base);
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	spin_unlock_irqrestore(&pgd_lock, flags);
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	return 0;
}

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static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
			       int primary)
{
	/*
	 * Ignore all non primary paths.
	 */
	if (!primary)
		return 0;

	/*
	 * Ignore the NULL PTE for kernel identity mapping, as it is expected
	 * to have holes.
	 * Also set numpages to '1' indicating that we processed cpa req for
	 * one virtual address page and its pfn. TBD: numpages can be set based
	 * on the initial value and the level returned by lookup_address().
	 */
	if (within(vaddr, PAGE_OFFSET,
		   PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
		cpa->numpages = 1;
		cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
		return 0;
	} else {
		WARN(1, KERN_WARNING "CPA: called for zero pte. "
			"vaddr = %lx cpa->vaddr = %lx\n", vaddr,
			*cpa->vaddr);

		return -EFAULT;
	}
}

T
Thomas Gleixner 已提交
605
static int __change_page_attr(struct cpa_data *cpa, int primary)
606
{
607
	unsigned long address;
608 609
	int do_split, err;
	unsigned int level;
T
Thomas Gleixner 已提交
610
	pte_t *kpte, old_pte;
L
Linus Torvalds 已提交
611

612 613 614 615 616 617
	if (cpa->flags & CPA_PAGES_ARRAY) {
		struct page *page = cpa->pages[cpa->curpage];
		if (unlikely(PageHighMem(page)))
			return 0;
		address = (unsigned long)page_address(page);
	} else if (cpa->flags & CPA_ARRAY)
618 619 620
		address = cpa->vaddr[cpa->curpage];
	else
		address = *cpa->vaddr;
621
repeat:
622
	kpte = lookup_address(address, &level);
L
Linus Torvalds 已提交
623
	if (!kpte)
624
		return __cpa_process_fault(cpa, address, primary);
T
Thomas Gleixner 已提交
625 626

	old_pte = *kpte;
627 628
	if (!pte_val(old_pte))
		return __cpa_process_fault(cpa, address, primary);
629

T
Thomas Gleixner 已提交
630
	if (level == PG_LEVEL_4K) {
T
Thomas Gleixner 已提交
631
		pte_t new_pte;
632
		pgprot_t new_prot = pte_pgprot(old_pte);
T
Thomas Gleixner 已提交
633
		unsigned long pfn = pte_pfn(old_pte);
I
Ingo Molnar 已提交
634

T
Thomas Gleixner 已提交
635 636
		pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
		pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
I
Ingo Molnar 已提交
637

T
Thomas Gleixner 已提交
638
		new_prot = static_protections(new_prot, address, pfn);
I
Ingo Molnar 已提交
639

640 641 642 643 644
		/*
		 * We need to keep the pfn from the existing PTE,
		 * after all we're only going to change it's attributes
		 * not the memory it points to
		 */
T
Thomas Gleixner 已提交
645 646
		new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
		cpa->pfn = pfn;
647 648 649 650 651
		/*
		 * Do we really change anything ?
		 */
		if (pte_val(old_pte) != pte_val(new_pte)) {
			set_pte_atomic(kpte, new_pte);
652
			cpa->flags |= CPA_FLUSHTLB;
653
		}
654
		cpa->numpages = 1;
655
		return 0;
L
Linus Torvalds 已提交
656
	}
657 658 659 660 661

	/*
	 * Check, whether we can keep the large page intact
	 * and just change the pte:
	 */
I
Ingo Molnar 已提交
662
	do_split = try_preserve_large_page(kpte, address, cpa);
663 664
	/*
	 * When the range fits into the existing large page,
665
	 * return. cp->numpages and cpa->tlbflush have been updated in
666 667
	 * try_large_page:
	 */
I
Ingo Molnar 已提交
668 669
	if (do_split <= 0)
		return do_split;
670 671 672 673

	/*
	 * We have to split the large page:
	 */
I
Ingo Molnar 已提交
674 675
	err = split_large_page(kpte, address);
	if (!err) {
676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694
		/*
	 	 * Do a global flush tlb after splitting the large page
	 	 * and before we do the actual change page attribute in the PTE.
	 	 *
	 	 * With out this, we violate the TLB application note, that says
	 	 * "The TLBs may contain both ordinary and large-page
		 *  translations for a 4-KByte range of linear addresses. This
		 *  may occur if software modifies the paging structures so that
		 *  the page size used for the address range changes. If the two
		 *  translations differ with respect to page frame or attributes
		 *  (e.g., permissions), processor behavior is undefined and may
		 *  be implementation-specific."
	 	 *
	 	 * We do this global tlb flush inside the cpa_lock, so that we
		 * don't allow any other cpu, with stale tlb entries change the
		 * page attribute in parallel, that also falls into the
		 * just split large page entry.
	 	 */
		flush_tlb_all();
I
Ingo Molnar 已提交
695 696
		goto repeat;
	}
I
Ingo Molnar 已提交
697

I
Ingo Molnar 已提交
698
	return err;
699
}
L
Linus Torvalds 已提交
700

T
Thomas Gleixner 已提交
701 702 703
static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);

static int cpa_process_alias(struct cpa_data *cpa)
L
Linus Torvalds 已提交
704
{
T
Thomas Gleixner 已提交
705
	struct cpa_data alias_cpa;
T
Tejun Heo 已提交
706
	unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
707
	unsigned long vaddr;
T
Tejun Heo 已提交
708
	int ret;
709

Y
Yinghai Lu 已提交
710
	if (cpa->pfn >= max_pfn_mapped)
T
Thomas Gleixner 已提交
711
		return 0;
712

713
#ifdef CONFIG_X86_64
Y
Yinghai Lu 已提交
714
	if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
715 716
		return 0;
#endif
717 718 719 720
	/*
	 * No need to redo, when the primary call touched the direct
	 * mapping already:
	 */
721 722 723 724 725 726
	if (cpa->flags & CPA_PAGES_ARRAY) {
		struct page *page = cpa->pages[cpa->curpage];
		if (unlikely(PageHighMem(page)))
			return 0;
		vaddr = (unsigned long)page_address(page);
	} else if (cpa->flags & CPA_ARRAY)
727 728 729 730 731
		vaddr = cpa->vaddr[cpa->curpage];
	else
		vaddr = *cpa->vaddr;

	if (!(within(vaddr, PAGE_OFFSET,
732
		    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
733

734
		alias_cpa = *cpa;
T
Tejun Heo 已提交
735
		alias_cpa.vaddr = &laddr;
736
		alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
737

738
		ret = __change_page_attr_set_clr(&alias_cpa, 0);
T
Tejun Heo 已提交
739 740
		if (ret)
			return ret;
741
	}
742 743

#ifdef CONFIG_X86_64
A
Arjan van de Ven 已提交
744
	/*
T
Tejun Heo 已提交
745 746
	 * If the primary call didn't touch the high mapping already
	 * and the physical address is inside the kernel map, we need
747
	 * to touch the high mapped kernel as well:
A
Arjan van de Ven 已提交
748
	 */
T
Tejun Heo 已提交
749 750 751 752 753 754 755
	if (!within(vaddr, (unsigned long)_text, _brk_end) &&
	    within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
		unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
					       __START_KERNEL_map - phys_base;
		alias_cpa = *cpa;
		alias_cpa.vaddr = &temp_cpa_vaddr;
		alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
T
Thomas Gleixner 已提交
756

T
Tejun Heo 已提交
757 758 759 760 761 762
		/*
		 * The high mapping range is imprecise, so ignore the
		 * return value.
		 */
		__change_page_attr_set_clr(&alias_cpa, 0);
	}
A
Arjan van de Ven 已提交
763
#endif
T
Tejun Heo 已提交
764 765

	return 0;
L
Linus Torvalds 已提交
766 767
}

T
Thomas Gleixner 已提交
768
static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
769
{
770
	int ret, numpages = cpa->numpages;
771

772 773 774 775 776
	while (numpages) {
		/*
		 * Store the remaining nr of pages for the large page
		 * preservation check.
		 */
777
		cpa->numpages = numpages;
778
		/* for array changes, we can't use large page */
779
		if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
780
			cpa->numpages = 1;
T
Thomas Gleixner 已提交
781

782 783
		if (!debug_pagealloc)
			spin_lock(&cpa_lock);
T
Thomas Gleixner 已提交
784
		ret = __change_page_attr(cpa, checkalias);
785 786
		if (!debug_pagealloc)
			spin_unlock(&cpa_lock);
787 788 789
		if (ret)
			return ret;

T
Thomas Gleixner 已提交
790 791 792 793 794 795
		if (checkalias) {
			ret = cpa_process_alias(cpa);
			if (ret)
				return ret;
		}

796 797 798 799 800
		/*
		 * Adjust the number of pages with the result of the
		 * CPA operation. Either a large page has been
		 * preserved or a single page update happened.
		 */
801 802
		BUG_ON(cpa->numpages > numpages);
		numpages -= cpa->numpages;
803
		if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
804 805 806 807
			cpa->curpage++;
		else
			*cpa->vaddr += cpa->numpages * PAGE_SIZE;

808
	}
809 810 811
	return 0;
}

812 813 814 815 816 817
static inline int cache_attr(pgprot_t attr)
{
	return pgprot_val(attr) &
		(_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
}

818
static int change_page_attr_set_clr(unsigned long *addr, int numpages,
819
				    pgprot_t mask_set, pgprot_t mask_clr,
820 821
				    int force_split, int in_flag,
				    struct page **pages)
822
{
T
Thomas Gleixner 已提交
823
	struct cpa_data cpa;
824
	int ret, cache, checkalias;
825
	unsigned long baddr = 0;
826 827 828 829 830 831 832

	/*
	 * Check, if we are requested to change a not supported
	 * feature:
	 */
	mask_set = canon_pgprot(mask_set);
	mask_clr = canon_pgprot(mask_clr);
833
	if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
834 835
		return 0;

836
	/* Ensure we are PAGE_SIZE aligned */
837
	if (in_flag & CPA_ARRAY) {
838 839 840 841 842 843 844
		int i;
		for (i = 0; i < numpages; i++) {
			if (addr[i] & ~PAGE_MASK) {
				addr[i] &= PAGE_MASK;
				WARN_ON_ONCE(1);
			}
		}
845 846 847 848 849 850 851 852 853 854 855 856
	} else if (!(in_flag & CPA_PAGES_ARRAY)) {
		/*
		 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
		 * No need to cehck in that case
		 */
		if (*addr & ~PAGE_MASK) {
			*addr &= PAGE_MASK;
			/*
			 * People should not be passing in unaligned addresses:
			 */
			WARN_ON_ONCE(1);
		}
857 858 859 860 861
		/*
		 * Save address for cache flush. *addr is modified in the call
		 * to __change_page_attr_set_clr() below.
		 */
		baddr = *addr;
862 863
	}

864 865 866
	/* Must avoid aliasing mappings in the highmem code */
	kmap_flush_unused();

N
Nick Piggin 已提交
867 868
	vm_unmap_aliases();

T
Thomas Gleixner 已提交
869
	cpa.vaddr = addr;
870
	cpa.pages = pages;
T
Thomas Gleixner 已提交
871 872 873
	cpa.numpages = numpages;
	cpa.mask_set = mask_set;
	cpa.mask_clr = mask_clr;
874 875
	cpa.flags = 0;
	cpa.curpage = 0;
876
	cpa.force_split = force_split;
T
Thomas Gleixner 已提交
877

878 879
	if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
		cpa.flags |= in_flag;
880

881 882 883 884
	/* No alias checking for _NX bit modifications */
	checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;

	ret = __change_page_attr_set_clr(&cpa, checkalias);
885

886 887 888
	/*
	 * Check whether we really changed something:
	 */
889
	if (!(cpa.flags & CPA_FLUSHTLB))
890
		goto out;
891

892 893 894 895 896 897
	/*
	 * No need to flush, when we did not set any of the caching
	 * attributes:
	 */
	cache = cache_attr(mask_set);

898 899 900
	/*
	 * On success we use clflush, when the CPU supports it to
	 * avoid the wbindv. If the CPU does not support it and in the
901
	 * error case we fall back to cpa_flush_all (which uses
902 903
	 * wbindv):
	 */
904
	if (!ret && cpu_has_clflush) {
905 906 907 908
		if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
			cpa_flush_array(addr, numpages, cache,
					cpa.flags, pages);
		} else
909
			cpa_flush_range(baddr, numpages, cache);
910
	} else
911
		cpa_flush_all(cache);
912

913
out:
914 915 916
	return ret;
}

917 918
static inline int change_page_attr_set(unsigned long *addr, int numpages,
				       pgprot_t mask, int array)
919
{
920
	return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
921
		(array ? CPA_ARRAY : 0), NULL);
922 923
}

924 925
static inline int change_page_attr_clear(unsigned long *addr, int numpages,
					 pgprot_t mask, int array)
926
{
927
	return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
928
		(array ? CPA_ARRAY : 0), NULL);
929 930
}

931 932 933 934 935 936 937 938 939 940 941 942 943 944
static inline int cpa_set_pages_array(struct page **pages, int numpages,
				       pgprot_t mask)
{
	return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
		CPA_PAGES_ARRAY, pages);
}

static inline int cpa_clear_pages_array(struct page **pages, int numpages,
					 pgprot_t mask)
{
	return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
		CPA_PAGES_ARRAY, pages);
}

945
int _set_memory_uc(unsigned long addr, int numpages)
946
{
947 948 949
	/*
	 * for now UC MINUS. see comments in ioremap_nocache()
	 */
950 951
	return change_page_attr_set(&addr, numpages,
				    __pgprot(_PAGE_CACHE_UC_MINUS), 0);
952
}
953 954 955

int set_memory_uc(unsigned long addr, int numpages)
{
956 957
	int ret;

958 959 960
	/*
	 * for now UC MINUS. see comments in ioremap_nocache()
	 */
961 962 963 964 965 966 967 968 969 970
	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
			    _PAGE_CACHE_UC_MINUS, NULL);
	if (ret)
		goto out_err;

	ret = _set_memory_uc(addr, numpages);
	if (ret)
		goto out_free;

	return 0;
971

972 973 974 975
out_free:
	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
out_err:
	return ret;
976
}
977 978
EXPORT_SYMBOL(set_memory_uc);

979 980
int set_memory_array_uc(unsigned long *addr, int addrinarray)
{
981 982 983
	int i, j;
	int ret;

984 985 986 987
	/*
	 * for now UC MINUS. see comments in ioremap_nocache()
	 */
	for (i = 0; i < addrinarray; i++) {
988 989 990 991
		ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
					_PAGE_CACHE_UC_MINUS, NULL);
		if (ret)
			goto out_free;
992 993
	}

994
	ret = change_page_attr_set(addr, addrinarray,
995
				    __pgprot(_PAGE_CACHE_UC_MINUS), 1);
996 997 998 999 1000 1001 1002 1003 1004 1005
	if (ret)
		goto out_free;

	return 0;

out_free:
	for (j = 0; j < i; j++)
		free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);

	return ret;
1006 1007 1008
}
EXPORT_SYMBOL(set_memory_array_uc);

1009 1010
int _set_memory_wc(unsigned long addr, int numpages)
{
1011
	int ret;
1012 1013
	unsigned long addr_copy = addr;

1014 1015 1016
	ret = change_page_attr_set(&addr, numpages,
				    __pgprot(_PAGE_CACHE_UC_MINUS), 0);
	if (!ret) {
1017 1018 1019 1020
		ret = change_page_attr_set_clr(&addr_copy, numpages,
					       __pgprot(_PAGE_CACHE_WC),
					       __pgprot(_PAGE_CACHE_MASK),
					       0, 0, NULL);
1021 1022
	}
	return ret;
1023 1024 1025 1026
}

int set_memory_wc(unsigned long addr, int numpages)
{
1027 1028
	int ret;

1029
	if (!pat_enabled)
1030 1031
		return set_memory_uc(addr, numpages);

1032 1033 1034 1035
	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
		_PAGE_CACHE_WC, NULL);
	if (ret)
		goto out_err;
1036

1037 1038 1039 1040 1041 1042 1043 1044 1045 1046
	ret = _set_memory_wc(addr, numpages);
	if (ret)
		goto out_free;

	return 0;

out_free:
	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
out_err:
	return ret;
1047 1048 1049
}
EXPORT_SYMBOL(set_memory_wc);

1050
int _set_memory_wb(unsigned long addr, int numpages)
1051
{
1052 1053
	return change_page_attr_clear(&addr, numpages,
				      __pgprot(_PAGE_CACHE_MASK), 0);
1054
}
1055 1056 1057

int set_memory_wb(unsigned long addr, int numpages)
{
1058 1059 1060 1061 1062 1063
	int ret;

	ret = _set_memory_wb(addr, numpages);
	if (ret)
		return ret;

1064
	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1065
	return 0;
1066
}
1067 1068
EXPORT_SYMBOL(set_memory_wb);

1069 1070 1071
int set_memory_array_wb(unsigned long *addr, int addrinarray)
{
	int i;
1072 1073 1074 1075
	int ret;

	ret = change_page_attr_clear(addr, addrinarray,
				      __pgprot(_PAGE_CACHE_MASK), 1);
1076 1077
	if (ret)
		return ret;
1078

1079 1080
	for (i = 0; i < addrinarray; i++)
		free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1081

1082
	return 0;
1083 1084 1085
}
EXPORT_SYMBOL(set_memory_array_wb);

1086 1087
int set_memory_x(unsigned long addr, int numpages)
{
1088
	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1089 1090 1091 1092 1093
}
EXPORT_SYMBOL(set_memory_x);

int set_memory_nx(unsigned long addr, int numpages)
{
1094
	return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1095 1096 1097 1098 1099
}
EXPORT_SYMBOL(set_memory_nx);

int set_memory_ro(unsigned long addr, int numpages)
{
1100
	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1101
}
1102
EXPORT_SYMBOL_GPL(set_memory_ro);
1103 1104 1105

int set_memory_rw(unsigned long addr, int numpages)
{
1106
	return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1107
}
1108
EXPORT_SYMBOL_GPL(set_memory_rw);
I
Ingo Molnar 已提交
1109 1110 1111

int set_memory_np(unsigned long addr, int numpages)
{
1112
	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
I
Ingo Molnar 已提交
1113
}
1114

1115 1116
int set_memory_4k(unsigned long addr, int numpages)
{
1117
	return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1118
					__pgprot(0), 1, 0, NULL);
1119 1120
}

1121 1122 1123 1124
int set_pages_uc(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);

T
Thomas Gleixner 已提交
1125
	return set_memory_uc(addr, numpages);
1126 1127 1128
}
EXPORT_SYMBOL(set_pages_uc);

1129 1130 1131 1132 1133 1134 1135 1136
int set_pages_array_uc(struct page **pages, int addrinarray)
{
	unsigned long start;
	unsigned long end;
	int i;
	int free_idx;

	for (i = 0; i < addrinarray; i++) {
1137 1138 1139
		if (PageHighMem(pages[i]))
			continue;
		start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151
		end = start + PAGE_SIZE;
		if (reserve_memtype(start, end, _PAGE_CACHE_UC_MINUS, NULL))
			goto err_out;
	}

	if (cpa_set_pages_array(pages, addrinarray,
			__pgprot(_PAGE_CACHE_UC_MINUS)) == 0) {
		return 0; /* Success */
	}
err_out:
	free_idx = i;
	for (i = 0; i < free_idx; i++) {
1152 1153 1154
		if (PageHighMem(pages[i]))
			continue;
		start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1155 1156 1157 1158 1159 1160 1161
		end = start + PAGE_SIZE;
		free_memtype(start, end);
	}
	return -EINVAL;
}
EXPORT_SYMBOL(set_pages_array_uc);

1162 1163 1164 1165
int set_pages_wb(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);

T
Thomas Gleixner 已提交
1166
	return set_memory_wb(addr, numpages);
1167 1168 1169
}
EXPORT_SYMBOL(set_pages_wb);

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int set_pages_array_wb(struct page **pages, int addrinarray)
{
	int retval;
	unsigned long start;
	unsigned long end;
	int i;

	retval = cpa_clear_pages_array(pages, addrinarray,
			__pgprot(_PAGE_CACHE_MASK));
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	if (retval)
		return retval;
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	for (i = 0; i < addrinarray; i++) {
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		if (PageHighMem(pages[i]))
			continue;
		start = page_to_pfn(pages[i]) << PAGE_SHIFT;
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		end = start + PAGE_SIZE;
		free_memtype(start, end);
	}

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	return 0;
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}
EXPORT_SYMBOL(set_pages_array_wb);

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int set_pages_x(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);

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	return set_memory_x(addr, numpages);
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}
EXPORT_SYMBOL(set_pages_x);

int set_pages_nx(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);

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	return set_memory_nx(addr, numpages);
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}
EXPORT_SYMBOL(set_pages_nx);

int set_pages_ro(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);

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	return set_memory_ro(addr, numpages);
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}

int set_pages_rw(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);
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	return set_memory_rw(addr, numpages);
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}

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#ifdef CONFIG_DEBUG_PAGEALLOC
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static int __set_pages_p(struct page *page, int numpages)
{
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	unsigned long tempaddr = (unsigned long) page_address(page);
	struct cpa_data cpa = { .vaddr = &tempaddr,
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				.numpages = numpages,
				.mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
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				.mask_clr = __pgprot(0),
				.flags = 0};
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	/*
	 * No alias checking needed for setting present flag. otherwise,
	 * we may need to break large pages for 64-bit kernel text
	 * mappings (this adds to complexity if we want to do this from
	 * atomic context especially). Let's keep it simple!
	 */
	return __change_page_attr_set_clr(&cpa, 0);
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}

static int __set_pages_np(struct page *page, int numpages)
{
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	unsigned long tempaddr = (unsigned long) page_address(page);
	struct cpa_data cpa = { .vaddr = &tempaddr,
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				.numpages = numpages,
				.mask_set = __pgprot(0),
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				.mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
				.flags = 0};
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	/*
	 * No alias checking needed for setting not present flag. otherwise,
	 * we may need to break large pages for 64-bit kernel text
	 * mappings (this adds to complexity if we want to do this from
	 * atomic context especially). Let's keep it simple!
	 */
	return __change_page_attr_set_clr(&cpa, 0);
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}

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void kernel_map_pages(struct page *page, int numpages, int enable)
{
	if (PageHighMem(page))
		return;
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	if (!enable) {
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		debug_check_no_locks_freed(page_address(page),
					   numpages * PAGE_SIZE);
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	}
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	/*
	 * If page allocator is not up yet then do not call c_p_a():
	 */
	if (!debug_pagealloc_enabled)
		return;

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	/*
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	 * The return value is ignored as the calls cannot fail.
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	 * Large pages for identity mappings are not used at boot time
	 * and hence no memory allocations during large page split.
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	 */
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	if (enable)
		__set_pages_p(page, numpages);
	else
		__set_pages_np(page, numpages);
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	/*
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	 * We should perform an IPI and flush all tlbs,
	 * but that can deadlock->flush only current cpu:
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	 */
	__flush_tlb_all();
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}

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#ifdef CONFIG_HIBERNATION

bool kernel_page_present(struct page *page)
{
	unsigned int level;
	pte_t *pte;

	if (PageHighMem(page))
		return false;

	pte = lookup_address((unsigned long)page_address(page), &level);
	return (pte_val(*pte) & _PAGE_PRESENT);
}

#endif /* CONFIG_HIBERNATION */

#endif /* CONFIG_DEBUG_PAGEALLOC */
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/*
 * The testcases use internal knowledge of the implementation that shouldn't
 * be exposed to the rest of the kernel. Include these directly here.
 */
#ifdef CONFIG_CPA_DEBUG
#include "pageattr-test.c"
#endif