pageattr.c 30.5 KB
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/*
 * Copyright 2002 Andi Kleen, SuSE Labs.
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 * Thanks to Ben LaHaise for precious feedback.
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 */
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#include <linux/highmem.h>
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#include <linux/bootmem.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
#include <linux/debugfs.h>
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#include <asm/e820.h>
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#include <asm/processor.h>
#include <asm/tlbflush.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/uaccess.h>
#include <asm/pgalloc.h>
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#include <asm/proto.h>
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#include <asm/pat.h>
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/*
 * The current flushing context - we pass it instead of 5 arguments:
 */
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struct cpa_data {
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	unsigned long	*vaddr;
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	pgprot_t	mask_set;
	pgprot_t	mask_clr;
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	int		numpages;
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	int		flags;
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	unsigned long	pfn;
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	unsigned	force_split : 1;
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	int		curpage;
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	struct page	**pages;
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};

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/*
 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
 * entries change the page attribute in parallel to some other cpu
 * splitting a large page entry along with changing the attribute.
 */
static DEFINE_SPINLOCK(cpa_lock);

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#define CPA_FLUSHTLB 1
#define CPA_ARRAY 2
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#define CPA_PAGES_ARRAY 4
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#ifdef CONFIG_PROC_FS
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static unsigned long direct_pages_count[PG_LEVEL_NUM];

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void update_page_count(int level, unsigned long pages)
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{
	unsigned long flags;
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	/* Protect against CPA */
	spin_lock_irqsave(&pgd_lock, flags);
	direct_pages_count[level] += pages;
	spin_unlock_irqrestore(&pgd_lock, flags);
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}

static void split_page_count(int level)
{
	direct_pages_count[level]--;
	direct_pages_count[level - 1] += PTRS_PER_PTE;
}

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void arch_report_meminfo(struct seq_file *m)
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{
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	seq_printf(m, "DirectMap4k:    %8lu kB\n",
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			direct_pages_count[PG_LEVEL_4K] << 2);
#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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	seq_printf(m, "DirectMap2M:    %8lu kB\n",
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			direct_pages_count[PG_LEVEL_2M] << 11);
#else
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	seq_printf(m, "DirectMap4M:    %8lu kB\n",
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			direct_pages_count[PG_LEVEL_2M] << 12);
#endif
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#ifdef CONFIG_X86_64
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	if (direct_gbpages)
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		seq_printf(m, "DirectMap1G:    %8lu kB\n",
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			direct_pages_count[PG_LEVEL_1G] << 20);
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#endif
}
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#else
static inline void split_page_count(int level) { }
#endif
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#ifdef CONFIG_X86_64

static inline unsigned long highmap_start_pfn(void)
{
	return __pa(_text) >> PAGE_SHIFT;
}

static inline unsigned long highmap_end_pfn(void)
{
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	return __pa(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
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}

#endif

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#ifdef CONFIG_DEBUG_PAGEALLOC
# define debug_pagealloc 1
#else
# define debug_pagealloc 0
#endif

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static inline int
within(unsigned long addr, unsigned long start, unsigned long end)
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{
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	return addr >= start && addr < end;
}

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/*
 * Flushing functions
 */
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/**
 * clflush_cache_range - flush a cache range with clflush
 * @addr:	virtual start address
 * @size:	number of bytes to flush
 *
 * clflush is an unordered instruction which needs fencing with mfence
 * to avoid ordering issues.
 */
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void clflush_cache_range(void *vaddr, unsigned int size)
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{
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	void *vend = vaddr + size - 1;
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	mb();
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	for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
		clflush(vaddr);
	/*
	 * Flush any possible final partial cacheline:
	 */
	clflush(vend);

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	mb();
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}

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static void __cpa_flush_all(void *arg)
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{
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	unsigned long cache = (unsigned long)arg;

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	/*
	 * Flush all to work around Errata in early athlons regarding
	 * large page flushing.
	 */
	__flush_tlb_all();

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	if (cache && boot_cpu_data.x86_model >= 4)
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		wbinvd();
}

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static void cpa_flush_all(unsigned long cache)
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{
	BUG_ON(irqs_disabled());

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	on_each_cpu(__cpa_flush_all, (void *) cache, 1);
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}

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static void __cpa_flush_range(void *arg)
{
	/*
	 * We could optimize that further and do individual per page
	 * tlb invalidates for a low number of pages. Caveat: we must
	 * flush the high aliases on 64bit as well.
	 */
	__flush_tlb_all();
}

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static void cpa_flush_range(unsigned long start, int numpages, int cache)
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{
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	unsigned int i, level;
	unsigned long addr;

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	BUG_ON(irqs_disabled());
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	WARN_ON(PAGE_ALIGN(start) != start);
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	on_each_cpu(__cpa_flush_range, NULL, 1);
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	if (!cache)
		return;

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	/*
	 * We only need to flush on one CPU,
	 * clflush is a MESI-coherent instruction that
	 * will cause all other CPUs to flush the same
	 * cachelines:
	 */
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	for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
		pte_t *pte = lookup_address(addr, &level);

		/*
		 * Only flush present addresses:
		 */
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		if (pte && (pte_val(*pte) & _PAGE_PRESENT))
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			clflush_cache_range((void *) addr, PAGE_SIZE);
	}
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}

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static void cpa_flush_array(unsigned long *start, int numpages, int cache,
			    int in_flags, struct page **pages)
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{
	unsigned int i, level;

	BUG_ON(irqs_disabled());

	on_each_cpu(__cpa_flush_range, NULL, 1);

	if (!cache)
		return;

	/* 4M threshold */
	if (numpages >= 1024) {
		if (boot_cpu_data.x86_model >= 4)
			wbinvd();
		return;
	}
	/*
	 * We only need to flush on one CPU,
	 * clflush is a MESI-coherent instruction that
	 * will cause all other CPUs to flush the same
	 * cachelines:
	 */
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	for (i = 0; i < numpages; i++) {
		unsigned long addr;
		pte_t *pte;

		if (in_flags & CPA_PAGES_ARRAY)
			addr = (unsigned long)page_address(pages[i]);
		else
			addr = start[i];

		pte = lookup_address(addr, &level);
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		/*
		 * Only flush present addresses:
		 */
		if (pte && (pte_val(*pte) & _PAGE_PRESENT))
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			clflush_cache_range((void *)addr, PAGE_SIZE);
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	}
}

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/*
 * Certain areas of memory on x86 require very specific protection flags,
 * for example the BIOS area or kernel text. Callers don't always get this
 * right (again, ioremap() on BIOS memory is not uncommon) so this function
 * checks and fixes these known static required protection bits.
 */
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static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
				   unsigned long pfn)
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{
	pgprot_t forbidden = __pgprot(0);

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	/*
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	 * The BIOS area between 640k and 1Mb needs to be executable for
	 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
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	 */
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	if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
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		pgprot_val(forbidden) |= _PAGE_NX;

	/*
	 * The kernel text needs to be executable for obvious reasons
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	 * Does not cover __inittext since that is gone later on. On
	 * 64bit we do not enforce !NX on the low mapping
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	 */
	if (within(address, (unsigned long)_text, (unsigned long)_etext))
		pgprot_val(forbidden) |= _PAGE_NX;
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	/*
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	 * The .rodata section needs to be read-only. Using the pfn
	 * catches all aliases.
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	 */
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	if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
		   __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
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		pgprot_val(forbidden) |= _PAGE_RW;
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	prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
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	return prot;
}

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/*
 * Lookup the page table entry for a virtual address. Return a pointer
 * to the entry and the level of the mapping.
 *
 * Note: We return pud and pmd either when the entry is marked large
 * or when the present bit is not set. Otherwise we would return a
 * pointer to a nonexisting mapping.
 */
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pte_t *lookup_address(unsigned long address, unsigned int *level)
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{
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	pgd_t *pgd = pgd_offset_k(address);
	pud_t *pud;
	pmd_t *pmd;
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	*level = PG_LEVEL_NONE;

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	if (pgd_none(*pgd))
		return NULL;
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	pud = pud_offset(pgd, address);
	if (pud_none(*pud))
		return NULL;
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	*level = PG_LEVEL_1G;
	if (pud_large(*pud) || !pud_present(*pud))
		return (pte_t *)pud;

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	pmd = pmd_offset(pud, address);
	if (pmd_none(*pmd))
		return NULL;
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	*level = PG_LEVEL_2M;
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	if (pmd_large(*pmd) || !pmd_present(*pmd))
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		return (pte_t *)pmd;

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	*level = PG_LEVEL_4K;
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	return pte_offset_kernel(pmd, address);
}
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EXPORT_SYMBOL_GPL(lookup_address);
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/*
 * Set the new pmd in all the pgds we know about:
 */
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static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
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{
	/* change init_mm */
	set_pte_atomic(kpte, pte);
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#ifdef CONFIG_X86_32
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	if (!SHARED_KERNEL_PMD) {
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		struct page *page;

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		list_for_each_entry(page, &pgd_list, lru) {
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			pgd_t *pgd;
			pud_t *pud;
			pmd_t *pmd;

			pgd = (pgd_t *)page_address(page) + pgd_index(address);
			pud = pud_offset(pgd, address);
			pmd = pmd_offset(pud, address);
			set_pte_atomic((pte_t *)pmd, pte);
		}
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	}
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#endif
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}

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static int
try_preserve_large_page(pte_t *kpte, unsigned long address,
			struct cpa_data *cpa)
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{
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	unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
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	pte_t new_pte, old_pte, *tmp;
	pgprot_t old_prot, new_prot;
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	int i, do_split = 1;
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	unsigned int level;
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	if (cpa->force_split)
		return 1;

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	spin_lock_irqsave(&pgd_lock, flags);
	/*
	 * Check for races, another CPU might have split this page
	 * up already:
	 */
	tmp = lookup_address(address, &level);
	if (tmp != kpte)
		goto out_unlock;

	switch (level) {
	case PG_LEVEL_2M:
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		psize = PMD_PAGE_SIZE;
		pmask = PMD_PAGE_MASK;
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		break;
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#ifdef CONFIG_X86_64
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	case PG_LEVEL_1G:
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		psize = PUD_PAGE_SIZE;
		pmask = PUD_PAGE_MASK;
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		break;
#endif
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	default:
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		do_split = -EINVAL;
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		goto out_unlock;
	}

	/*
	 * Calculate the number of pages, which fit into this large
	 * page starting at address:
	 */
	nextpage_addr = (address + psize) & pmask;
	numpages = (nextpage_addr - address) >> PAGE_SHIFT;
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	if (numpages < cpa->numpages)
		cpa->numpages = numpages;
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	/*
	 * We are safe now. Check whether the new pgprot is the same:
	 */
	old_pte = *kpte;
	old_prot = new_prot = pte_pgprot(old_pte);

	pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
	pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
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	/*
	 * old_pte points to the large page base address. So we need
	 * to add the offset of the virtual address:
	 */
	pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
	cpa->pfn = pfn;

	new_prot = static_protections(new_prot, address, pfn);
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	/*
	 * We need to check the full range, whether
	 * static_protection() requires a different pgprot for one of
	 * the pages in the range we try to preserve:
	 */
	addr = address + PAGE_SIZE;
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	pfn++;
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	for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
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		pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
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		if (pgprot_val(chk_prot) != pgprot_val(new_prot))
			goto out_unlock;
	}

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	/*
	 * If there are no changes, return. maxpages has been updated
	 * above:
	 */
	if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
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		do_split = 0;
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		goto out_unlock;
	}

	/*
	 * We need to change the attributes. Check, whether we can
	 * change the large page in one go. We request a split, when
	 * the address is not aligned and the number of pages is
	 * smaller than the number of pages in the large page. Note
	 * that we limited the number of possible pages already to
	 * the number of pages in the large page.
	 */
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	if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
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		/*
		 * The address is aligned and the number of pages
		 * covers the full page.
		 */
		new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
		__set_pmd_pte(kpte, address, new_pte);
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		cpa->flags |= CPA_FLUSHTLB;
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		do_split = 0;
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	}

out_unlock:
	spin_unlock_irqrestore(&pgd_lock, flags);
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	return do_split;
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}

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static int split_large_page(pte_t *kpte, unsigned long address)
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{
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	unsigned long flags, pfn, pfninc = 1;
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	unsigned int i, level;
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	pte_t *pbase, *tmp;
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	pgprot_t ref_prot;
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	struct page *base;

	if (!debug_pagealloc)
		spin_unlock(&cpa_lock);
	base = alloc_pages(GFP_KERNEL, 0);
	if (!debug_pagealloc)
		spin_lock(&cpa_lock);
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	if (!base)
		return -ENOMEM;
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	spin_lock_irqsave(&pgd_lock, flags);
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	/*
	 * Check for races, another CPU might have split this page
	 * up for us already:
	 */
	tmp = lookup_address(address, &level);
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	if (tmp != kpte)
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		goto out_unlock;

	pbase = (pte_t *)page_address(base);
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	paravirt_alloc_pte(&init_mm, page_to_pfn(base));
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	ref_prot = pte_pgprot(pte_clrhuge(*kpte));
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	/*
	 * If we ever want to utilize the PAT bit, we need to
	 * update this function to make sure it's converted from
	 * bit 12 to bit 7 when we cross from the 2MB level to
	 * the 4K level:
	 */
	WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
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#ifdef CONFIG_X86_64
	if (level == PG_LEVEL_1G) {
		pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
		pgprot_val(ref_prot) |= _PAGE_PSE;
	}
#endif

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	/*
	 * Get the target pfn from the original entry:
	 */
	pfn = pte_pfn(*kpte);
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	for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
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		set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
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	if (address >= (unsigned long)__va(0) &&
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		address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
		split_page_count(level);

#ifdef CONFIG_X86_64
	if (address >= (unsigned long)__va(1UL<<32) &&
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		address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
		split_page_count(level);
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#endif
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	/*
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	 * Install the new, split up pagetable.
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	 *
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	 * We use the standard kernel pagetable protections for the new
	 * pagetable protections, the actual ptes set above control the
	 * primary protection behavior:
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	 */
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	__set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
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	/*
	 * Intel Atom errata AAH41 workaround.
	 *
	 * The real fix should be in hw or in a microcode update, but
	 * we also probabilistically try to reduce the window of having
	 * a large TLB mixed with 4K TLBs while instruction fetches are
	 * going on.
	 */
	__flush_tlb_all();

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	base = NULL;

out_unlock:
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	/*
	 * If we dropped out via the lookup_address check under
	 * pgd_lock then stick the page back into the pool:
	 */
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	if (base)
		__free_page(base);
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	spin_unlock_irqrestore(&pgd_lock, flags);
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	return 0;
}

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static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
			       int primary)
{
	/*
	 * Ignore all non primary paths.
	 */
	if (!primary)
		return 0;

	/*
	 * Ignore the NULL PTE for kernel identity mapping, as it is expected
	 * to have holes.
	 * Also set numpages to '1' indicating that we processed cpa req for
	 * one virtual address page and its pfn. TBD: numpages can be set based
	 * on the initial value and the level returned by lookup_address().
	 */
	if (within(vaddr, PAGE_OFFSET,
		   PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
		cpa->numpages = 1;
		cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
		return 0;
	} else {
		WARN(1, KERN_WARNING "CPA: called for zero pte. "
			"vaddr = %lx cpa->vaddr = %lx\n", vaddr,
			*cpa->vaddr);

		return -EFAULT;
	}
}

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static int __change_page_attr(struct cpa_data *cpa, int primary)
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{
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	unsigned long address;
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	int do_split, err;
	unsigned int level;
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	pte_t *kpte, old_pte;
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598 599 600
	if (cpa->flags & CPA_PAGES_ARRAY)
		address = (unsigned long)page_address(cpa->pages[cpa->curpage]);
	else if (cpa->flags & CPA_ARRAY)
601 602 603
		address = cpa->vaddr[cpa->curpage];
	else
		address = *cpa->vaddr;
604
repeat:
605
	kpte = lookup_address(address, &level);
L
Linus Torvalds 已提交
606
	if (!kpte)
607
		return __cpa_process_fault(cpa, address, primary);
T
Thomas Gleixner 已提交
608 609

	old_pte = *kpte;
610 611
	if (!pte_val(old_pte))
		return __cpa_process_fault(cpa, address, primary);
612

T
Thomas Gleixner 已提交
613
	if (level == PG_LEVEL_4K) {
T
Thomas Gleixner 已提交
614
		pte_t new_pte;
615
		pgprot_t new_prot = pte_pgprot(old_pte);
T
Thomas Gleixner 已提交
616
		unsigned long pfn = pte_pfn(old_pte);
I
Ingo Molnar 已提交
617

T
Thomas Gleixner 已提交
618 619
		pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
		pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
I
Ingo Molnar 已提交
620

T
Thomas Gleixner 已提交
621
		new_prot = static_protections(new_prot, address, pfn);
I
Ingo Molnar 已提交
622

623 624 625 626 627
		/*
		 * We need to keep the pfn from the existing PTE,
		 * after all we're only going to change it's attributes
		 * not the memory it points to
		 */
T
Thomas Gleixner 已提交
628 629
		new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
		cpa->pfn = pfn;
630 631 632 633 634
		/*
		 * Do we really change anything ?
		 */
		if (pte_val(old_pte) != pte_val(new_pte)) {
			set_pte_atomic(kpte, new_pte);
635
			cpa->flags |= CPA_FLUSHTLB;
636
		}
637
		cpa->numpages = 1;
638
		return 0;
L
Linus Torvalds 已提交
639
	}
640 641 642 643 644

	/*
	 * Check, whether we can keep the large page intact
	 * and just change the pte:
	 */
I
Ingo Molnar 已提交
645
	do_split = try_preserve_large_page(kpte, address, cpa);
646 647
	/*
	 * When the range fits into the existing large page,
648
	 * return. cp->numpages and cpa->tlbflush have been updated in
649 650
	 * try_large_page:
	 */
I
Ingo Molnar 已提交
651 652
	if (do_split <= 0)
		return do_split;
653 654 655 656

	/*
	 * We have to split the large page:
	 */
I
Ingo Molnar 已提交
657 658
	err = split_large_page(kpte, address);
	if (!err) {
659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677
		/*
	 	 * Do a global flush tlb after splitting the large page
	 	 * and before we do the actual change page attribute in the PTE.
	 	 *
	 	 * With out this, we violate the TLB application note, that says
	 	 * "The TLBs may contain both ordinary and large-page
		 *  translations for a 4-KByte range of linear addresses. This
		 *  may occur if software modifies the paging structures so that
		 *  the page size used for the address range changes. If the two
		 *  translations differ with respect to page frame or attributes
		 *  (e.g., permissions), processor behavior is undefined and may
		 *  be implementation-specific."
	 	 *
	 	 * We do this global tlb flush inside the cpa_lock, so that we
		 * don't allow any other cpu, with stale tlb entries change the
		 * page attribute in parallel, that also falls into the
		 * just split large page entry.
	 	 */
		flush_tlb_all();
I
Ingo Molnar 已提交
678 679
		goto repeat;
	}
I
Ingo Molnar 已提交
680

I
Ingo Molnar 已提交
681
	return err;
682
}
L
Linus Torvalds 已提交
683

T
Thomas Gleixner 已提交
684 685 686
static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);

static int cpa_process_alias(struct cpa_data *cpa)
L
Linus Torvalds 已提交
687
{
T
Thomas Gleixner 已提交
688
	struct cpa_data alias_cpa;
689
	int ret = 0;
690
	unsigned long temp_cpa_vaddr, vaddr;
691

Y
Yinghai Lu 已提交
692
	if (cpa->pfn >= max_pfn_mapped)
T
Thomas Gleixner 已提交
693
		return 0;
694

695
#ifdef CONFIG_X86_64
Y
Yinghai Lu 已提交
696
	if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
697 698
		return 0;
#endif
699 700 701 702
	/*
	 * No need to redo, when the primary call touched the direct
	 * mapping already:
	 */
703 704 705
	if (cpa->flags & CPA_PAGES_ARRAY)
		vaddr = (unsigned long)page_address(cpa->pages[cpa->curpage]);
	else if (cpa->flags & CPA_ARRAY)
706 707 708 709 710
		vaddr = cpa->vaddr[cpa->curpage];
	else
		vaddr = *cpa->vaddr;

	if (!(within(vaddr, PAGE_OFFSET,
711
		    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
712

713
		alias_cpa = *cpa;
714 715
		temp_cpa_vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
		alias_cpa.vaddr = &temp_cpa_vaddr;
716
		alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
717

718 719 720

		ret = __change_page_attr_set_clr(&alias_cpa, 0);
	}
721 722

#ifdef CONFIG_X86_64
T
Thomas Gleixner 已提交
723 724
	if (ret)
		return ret;
725 726 727 728
	/*
	 * No need to redo, when the primary call touched the high
	 * mapping already:
	 */
729
	if (within(vaddr, (unsigned long) _text, _brk_end))
730 731
		return 0;

A
Arjan van de Ven 已提交
732
	/*
733 734
	 * If the physical address is inside the kernel map, we need
	 * to touch the high mapped kernel as well:
A
Arjan van de Ven 已提交
735
	 */
T
Thomas Gleixner 已提交
736 737
	if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn()))
		return 0;
738

T
Thomas Gleixner 已提交
739
	alias_cpa = *cpa;
740 741
	temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
	alias_cpa.vaddr = &temp_cpa_vaddr;
742
	alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
T
Thomas Gleixner 已提交
743 744 745 746 747

	/*
	 * The high mapping range is imprecise, so ignore the return value.
	 */
	__change_page_attr_set_clr(&alias_cpa, 0);
A
Arjan van de Ven 已提交
748
#endif
T
Thomas Gleixner 已提交
749
	return ret;
L
Linus Torvalds 已提交
750 751
}

T
Thomas Gleixner 已提交
752
static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
753
{
754
	int ret, numpages = cpa->numpages;
755

756 757 758 759 760
	while (numpages) {
		/*
		 * Store the remaining nr of pages for the large page
		 * preservation check.
		 */
761
		cpa->numpages = numpages;
762
		/* for array changes, we can't use large page */
763
		if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
764
			cpa->numpages = 1;
T
Thomas Gleixner 已提交
765

766 767
		if (!debug_pagealloc)
			spin_lock(&cpa_lock);
T
Thomas Gleixner 已提交
768
		ret = __change_page_attr(cpa, checkalias);
769 770
		if (!debug_pagealloc)
			spin_unlock(&cpa_lock);
771 772 773
		if (ret)
			return ret;

T
Thomas Gleixner 已提交
774 775 776 777 778 779
		if (checkalias) {
			ret = cpa_process_alias(cpa);
			if (ret)
				return ret;
		}

780 781 782 783 784
		/*
		 * Adjust the number of pages with the result of the
		 * CPA operation. Either a large page has been
		 * preserved or a single page update happened.
		 */
785 786
		BUG_ON(cpa->numpages > numpages);
		numpages -= cpa->numpages;
787
		if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
788 789 790 791
			cpa->curpage++;
		else
			*cpa->vaddr += cpa->numpages * PAGE_SIZE;

792
	}
793 794 795
	return 0;
}

796 797 798 799 800 801
static inline int cache_attr(pgprot_t attr)
{
	return pgprot_val(attr) &
		(_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
}

802
static int change_page_attr_set_clr(unsigned long *addr, int numpages,
803
				    pgprot_t mask_set, pgprot_t mask_clr,
804 805
				    int force_split, int in_flag,
				    struct page **pages)
806
{
T
Thomas Gleixner 已提交
807
	struct cpa_data cpa;
808
	int ret, cache, checkalias;
809 810 811 812 813 814 815

	/*
	 * Check, if we are requested to change a not supported
	 * feature:
	 */
	mask_set = canon_pgprot(mask_set);
	mask_clr = canon_pgprot(mask_clr);
816
	if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
817 818
		return 0;

819
	/* Ensure we are PAGE_SIZE aligned */
820
	if (in_flag & CPA_ARRAY) {
821 822 823 824 825 826 827
		int i;
		for (i = 0; i < numpages; i++) {
			if (addr[i] & ~PAGE_MASK) {
				addr[i] &= PAGE_MASK;
				WARN_ON_ONCE(1);
			}
		}
828 829 830 831 832 833 834 835 836 837 838 839
	} else if (!(in_flag & CPA_PAGES_ARRAY)) {
		/*
		 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
		 * No need to cehck in that case
		 */
		if (*addr & ~PAGE_MASK) {
			*addr &= PAGE_MASK;
			/*
			 * People should not be passing in unaligned addresses:
			 */
			WARN_ON_ONCE(1);
		}
840 841
	}

842 843 844
	/* Must avoid aliasing mappings in the highmem code */
	kmap_flush_unused();

N
Nick Piggin 已提交
845 846
	vm_unmap_aliases();

847 848 849 850 851 852 853
	/*
	 * If we're called with lazy mmu updates enabled, the
	 * in-memory pte state may be stale.  Flush pending updates to
	 * bring them up to date.
	 */
	arch_flush_lazy_mmu_mode();

T
Thomas Gleixner 已提交
854
	cpa.vaddr = addr;
855
	cpa.pages = pages;
T
Thomas Gleixner 已提交
856 857 858
	cpa.numpages = numpages;
	cpa.mask_set = mask_set;
	cpa.mask_clr = mask_clr;
859 860
	cpa.flags = 0;
	cpa.curpage = 0;
861
	cpa.force_split = force_split;
T
Thomas Gleixner 已提交
862

863 864
	if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
		cpa.flags |= in_flag;
865

866 867 868 869
	/* No alias checking for _NX bit modifications */
	checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;

	ret = __change_page_attr_set_clr(&cpa, checkalias);
870

871 872 873
	/*
	 * Check whether we really changed something:
	 */
874
	if (!(cpa.flags & CPA_FLUSHTLB))
875
		goto out;
876

877 878 879 880 881 882
	/*
	 * No need to flush, when we did not set any of the caching
	 * attributes:
	 */
	cache = cache_attr(mask_set);

883 884 885
	/*
	 * On success we use clflush, when the CPU supports it to
	 * avoid the wbindv. If the CPU does not support it and in the
886
	 * error case we fall back to cpa_flush_all (which uses
887 888
	 * wbindv):
	 */
889
	if (!ret && cpu_has_clflush) {
890 891 892 893
		if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
			cpa_flush_array(addr, numpages, cache,
					cpa.flags, pages);
		} else
894 895
			cpa_flush_range(*addr, numpages, cache);
	} else
896
		cpa_flush_all(cache);
897

898 899 900 901 902 903 904
	/*
	 * If we've been called with lazy mmu updates enabled, then
	 * make sure that everything gets flushed out before we
	 * return.
	 */
	arch_flush_lazy_mmu_mode();

905
out:
906 907 908
	return ret;
}

909 910
static inline int change_page_attr_set(unsigned long *addr, int numpages,
				       pgprot_t mask, int array)
911
{
912
	return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
913
		(array ? CPA_ARRAY : 0), NULL);
914 915
}

916 917
static inline int change_page_attr_clear(unsigned long *addr, int numpages,
					 pgprot_t mask, int array)
918
{
919
	return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
920
		(array ? CPA_ARRAY : 0), NULL);
921 922
}

923 924 925 926 927 928 929 930 931 932 933 934 935 936
static inline int cpa_set_pages_array(struct page **pages, int numpages,
				       pgprot_t mask)
{
	return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
		CPA_PAGES_ARRAY, pages);
}

static inline int cpa_clear_pages_array(struct page **pages, int numpages,
					 pgprot_t mask)
{
	return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
		CPA_PAGES_ARRAY, pages);
}

937
int _set_memory_uc(unsigned long addr, int numpages)
938
{
939 940 941
	/*
	 * for now UC MINUS. see comments in ioremap_nocache()
	 */
942 943
	return change_page_attr_set(&addr, numpages,
				    __pgprot(_PAGE_CACHE_UC_MINUS), 0);
944
}
945 946 947

int set_memory_uc(unsigned long addr, int numpages)
{
948 949
	int ret;

950 951 952
	/*
	 * for now UC MINUS. see comments in ioremap_nocache()
	 */
953 954 955 956 957 958 959 960 961 962
	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
			    _PAGE_CACHE_UC_MINUS, NULL);
	if (ret)
		goto out_err;

	ret = _set_memory_uc(addr, numpages);
	if (ret)
		goto out_free;

	return 0;
963

964 965 966 967
out_free:
	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
out_err:
	return ret;
968
}
969 970
EXPORT_SYMBOL(set_memory_uc);

971 972
int set_memory_array_uc(unsigned long *addr, int addrinarray)
{
973 974 975
	int i, j;
	int ret;

976 977 978 979
	/*
	 * for now UC MINUS. see comments in ioremap_nocache()
	 */
	for (i = 0; i < addrinarray; i++) {
980 981 982 983
		ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
					_PAGE_CACHE_UC_MINUS, NULL);
		if (ret)
			goto out_free;
984 985
	}

986
	ret = change_page_attr_set(addr, addrinarray,
987
				    __pgprot(_PAGE_CACHE_UC_MINUS), 1);
988 989 990 991 992 993 994 995 996 997
	if (ret)
		goto out_free;

	return 0;

out_free:
	for (j = 0; j < i; j++)
		free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);

	return ret;
998 999 1000
}
EXPORT_SYMBOL(set_memory_array_uc);

1001 1002
int _set_memory_wc(unsigned long addr, int numpages)
{
1003 1004
	return change_page_attr_set(&addr, numpages,
				    __pgprot(_PAGE_CACHE_WC), 0);
1005 1006 1007 1008
}

int set_memory_wc(unsigned long addr, int numpages)
{
1009 1010
	int ret;

1011
	if (!pat_enabled)
1012 1013
		return set_memory_uc(addr, numpages);

1014 1015 1016 1017
	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
		_PAGE_CACHE_WC, NULL);
	if (ret)
		goto out_err;
1018

1019 1020 1021 1022 1023 1024 1025 1026 1027 1028
	ret = _set_memory_wc(addr, numpages);
	if (ret)
		goto out_free;

	return 0;

out_free:
	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
out_err:
	return ret;
1029 1030 1031
}
EXPORT_SYMBOL(set_memory_wc);

1032
int _set_memory_wb(unsigned long addr, int numpages)
1033
{
1034 1035
	return change_page_attr_clear(&addr, numpages,
				      __pgprot(_PAGE_CACHE_MASK), 0);
1036
}
1037 1038 1039

int set_memory_wb(unsigned long addr, int numpages)
{
1040 1041 1042 1043 1044 1045
	int ret;

	ret = _set_memory_wb(addr, numpages);
	if (ret)
		return ret;

1046
	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1047
	return 0;
1048
}
1049 1050
EXPORT_SYMBOL(set_memory_wb);

1051 1052 1053
int set_memory_array_wb(unsigned long *addr, int addrinarray)
{
	int i;
1054 1055 1056 1057
	int ret;

	ret = change_page_attr_clear(addr, addrinarray,
				      __pgprot(_PAGE_CACHE_MASK), 1);
1058 1059
	if (ret)
		return ret;
1060

1061 1062
	for (i = 0; i < addrinarray; i++)
		free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1063

1064
	return 0;
1065 1066 1067
}
EXPORT_SYMBOL(set_memory_array_wb);

1068 1069
int set_memory_x(unsigned long addr, int numpages)
{
1070
	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1071 1072 1073 1074 1075
}
EXPORT_SYMBOL(set_memory_x);

int set_memory_nx(unsigned long addr, int numpages)
{
1076
	return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1077 1078 1079 1080 1081
}
EXPORT_SYMBOL(set_memory_nx);

int set_memory_ro(unsigned long addr, int numpages)
{
1082
	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1083
}
1084
EXPORT_SYMBOL_GPL(set_memory_ro);
1085 1086 1087

int set_memory_rw(unsigned long addr, int numpages)
{
1088
	return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1089
}
1090
EXPORT_SYMBOL_GPL(set_memory_rw);
I
Ingo Molnar 已提交
1091 1092 1093

int set_memory_np(unsigned long addr, int numpages)
{
1094
	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
I
Ingo Molnar 已提交
1095
}
1096

1097 1098
int set_memory_4k(unsigned long addr, int numpages)
{
1099
	return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1100
					__pgprot(0), 1, 0, NULL);
1101 1102
}

1103 1104 1105 1106
int set_pages_uc(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);

T
Thomas Gleixner 已提交
1107
	return set_memory_uc(addr, numpages);
1108 1109 1110
}
EXPORT_SYMBOL(set_pages_uc);

1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139
int set_pages_array_uc(struct page **pages, int addrinarray)
{
	unsigned long start;
	unsigned long end;
	int i;
	int free_idx;

	for (i = 0; i < addrinarray; i++) {
		start = (unsigned long)page_address(pages[i]);
		end = start + PAGE_SIZE;
		if (reserve_memtype(start, end, _PAGE_CACHE_UC_MINUS, NULL))
			goto err_out;
	}

	if (cpa_set_pages_array(pages, addrinarray,
			__pgprot(_PAGE_CACHE_UC_MINUS)) == 0) {
		return 0; /* Success */
	}
err_out:
	free_idx = i;
	for (i = 0; i < free_idx; i++) {
		start = (unsigned long)page_address(pages[i]);
		end = start + PAGE_SIZE;
		free_memtype(start, end);
	}
	return -EINVAL;
}
EXPORT_SYMBOL(set_pages_array_uc);

1140 1141 1142 1143
int set_pages_wb(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);

T
Thomas Gleixner 已提交
1144
	return set_memory_wb(addr, numpages);
1145 1146 1147
}
EXPORT_SYMBOL(set_pages_wb);

1148 1149 1150 1151 1152 1153 1154 1155 1156
int set_pages_array_wb(struct page **pages, int addrinarray)
{
	int retval;
	unsigned long start;
	unsigned long end;
	int i;

	retval = cpa_clear_pages_array(pages, addrinarray,
			__pgprot(_PAGE_CACHE_MASK));
1157 1158
	if (retval)
		return retval;
1159 1160 1161 1162 1163 1164 1165

	for (i = 0; i < addrinarray; i++) {
		start = (unsigned long)page_address(pages[i]);
		end = start + PAGE_SIZE;
		free_memtype(start, end);
	}

1166
	return 0;
1167 1168 1169
}
EXPORT_SYMBOL(set_pages_array_wb);

1170 1171 1172 1173
int set_pages_x(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);

T
Thomas Gleixner 已提交
1174
	return set_memory_x(addr, numpages);
1175 1176 1177 1178 1179 1180 1181
}
EXPORT_SYMBOL(set_pages_x);

int set_pages_nx(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);

T
Thomas Gleixner 已提交
1182
	return set_memory_nx(addr, numpages);
1183 1184 1185 1186 1187 1188 1189
}
EXPORT_SYMBOL(set_pages_nx);

int set_pages_ro(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);

T
Thomas Gleixner 已提交
1190
	return set_memory_ro(addr, numpages);
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}

int set_pages_rw(struct page *page, int numpages)
{
	unsigned long addr = (unsigned long)page_address(page);
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	return set_memory_rw(addr, numpages);
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}

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#ifdef CONFIG_DEBUG_PAGEALLOC
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static int __set_pages_p(struct page *page, int numpages)
{
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	unsigned long tempaddr = (unsigned long) page_address(page);
	struct cpa_data cpa = { .vaddr = &tempaddr,
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				.numpages = numpages,
				.mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
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				.mask_clr = __pgprot(0),
				.flags = 0};
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	/*
	 * No alias checking needed for setting present flag. otherwise,
	 * we may need to break large pages for 64-bit kernel text
	 * mappings (this adds to complexity if we want to do this from
	 * atomic context especially). Let's keep it simple!
	 */
	return __change_page_attr_set_clr(&cpa, 0);
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}

static int __set_pages_np(struct page *page, int numpages)
{
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	unsigned long tempaddr = (unsigned long) page_address(page);
	struct cpa_data cpa = { .vaddr = &tempaddr,
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				.numpages = numpages,
				.mask_set = __pgprot(0),
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				.mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
				.flags = 0};
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	/*
	 * No alias checking needed for setting not present flag. otherwise,
	 * we may need to break large pages for 64-bit kernel text
	 * mappings (this adds to complexity if we want to do this from
	 * atomic context especially). Let's keep it simple!
	 */
	return __change_page_attr_set_clr(&cpa, 0);
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}

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void kernel_map_pages(struct page *page, int numpages, int enable)
{
	if (PageHighMem(page))
		return;
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	if (!enable) {
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		debug_check_no_locks_freed(page_address(page),
					   numpages * PAGE_SIZE);
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	}
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	/*
	 * If page allocator is not up yet then do not call c_p_a():
	 */
	if (!debug_pagealloc_enabled)
		return;

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	/*
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	 * The return value is ignored as the calls cannot fail.
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	 * Large pages for identity mappings are not used at boot time
	 * and hence no memory allocations during large page split.
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	 */
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	if (enable)
		__set_pages_p(page, numpages);
	else
		__set_pages_np(page, numpages);
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	/*
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	 * We should perform an IPI and flush all tlbs,
	 * but that can deadlock->flush only current cpu:
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	 */
	__flush_tlb_all();
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}

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#ifdef CONFIG_HIBERNATION

bool kernel_page_present(struct page *page)
{
	unsigned int level;
	pte_t *pte;

	if (PageHighMem(page))
		return false;

	pte = lookup_address((unsigned long)page_address(page), &level);
	return (pte_val(*pte) & _PAGE_PRESENT);
}

#endif /* CONFIG_HIBERNATION */

#endif /* CONFIG_DEBUG_PAGEALLOC */
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/*
 * The testcases use internal knowledge of the implementation that shouldn't
 * be exposed to the rest of the kernel. Include these directly here.
 */
#ifdef CONFIG_CPA_DEBUG
#include "pageattr-test.c"
#endif