nand_base.c 101.5 KB
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/*
 *  drivers/mtd/nand.c
 *
 *  Overview:
 *   This is the generic MTD driver for NAND flash devices. It should be
 *   capable of working with almost all NAND chips currently available.
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 *
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 *	Additional technical information is available on
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 *	http://www.linux-mtd.infradead.org/doc/nand.html
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 *
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 *  Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
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 *		  2002-2006 Thomas Gleixner (tglx@linutronix.de)
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 *
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 *  Credits:
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 *	David Woodhouse for adding multichip support
 *
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 *	Aleph One Ltd. and Toby Churchill Ltd. for supporting the
 *	rework for 2K page size chips
 *
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 *  TODO:
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 *	Enable cached programming for 2k page size chips
 *	Check, if mtd->ecctype should be set to MTD_ECC_HW
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 *	if we have HW ECC support.
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 *	BBT table is not serialized, has to be fixed
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 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

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#include <linux/module.h>
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#include <linux/delay.h>
#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/nand_bch.h>
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#include <linux/interrupt.h>
#include <linux/bitops.h>
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#include <linux/leds.h>
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#include <linux/io.h>
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#include <linux/mtd/partitions.h>

/* Define default oob placement schemes for large and small page devices */
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static struct nand_ecclayout nand_oob_8 = {
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	.eccbytes = 3,
	.eccpos = {0, 1, 2},
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	.oobfree = {
		{.offset = 3,
		 .length = 2},
		{.offset = 6,
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		 .length = 2} }
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};

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static struct nand_ecclayout nand_oob_16 = {
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	.eccbytes = 6,
	.eccpos = {0, 1, 2, 3, 6, 7},
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	.oobfree = {
		{.offset = 8,
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		 . length = 8} }
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};

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static struct nand_ecclayout nand_oob_64 = {
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	.eccbytes = 24,
	.eccpos = {
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		   40, 41, 42, 43, 44, 45, 46, 47,
		   48, 49, 50, 51, 52, 53, 54, 55,
		   56, 57, 58, 59, 60, 61, 62, 63},
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	.oobfree = {
		{.offset = 2,
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		 .length = 38} }
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};

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static struct nand_ecclayout nand_oob_128 = {
	.eccbytes = 48,
	.eccpos = {
		   80, 81, 82, 83, 84, 85, 86, 87,
		   88, 89, 90, 91, 92, 93, 94, 95,
		   96, 97, 98, 99, 100, 101, 102, 103,
		   104, 105, 106, 107, 108, 109, 110, 111,
		   112, 113, 114, 115, 116, 117, 118, 119,
		   120, 121, 122, 123, 124, 125, 126, 127},
	.oobfree = {
		{.offset = 2,
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		 .length = 78} }
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};

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static int nand_get_device(struct mtd_info *mtd, int new_state);
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static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
			     struct mtd_oob_ops *ops);

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/*
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 * For devices which display every fart in the system on a separate LED. Is
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 * compiled away when LED support is disabled.
 */
DEFINE_LED_TRIGGER(nand_led_trigger);

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static int check_offs_len(struct mtd_info *mtd,
					loff_t ofs, uint64_t len)
{
	struct nand_chip *chip = mtd->priv;
	int ret = 0;

	/* Start address must align on block boundary */
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	if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) {
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		pr_debug("%s: unaligned address\n", __func__);
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		ret = -EINVAL;
	}

	/* Length must align on block boundary */
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	if (len & ((1ULL << chip->phys_erase_shift) - 1)) {
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		pr_debug("%s: length not block aligned\n", __func__);
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		ret = -EINVAL;
	}

	return ret;
}

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/**
 * nand_release_device - [GENERIC] release chip
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 * @mtd: MTD device structure
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 *
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 * Release chip lock and wake up anyone waiting on the device.
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 */
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static void nand_release_device(struct mtd_info *mtd)
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{
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	struct nand_chip *chip = mtd->priv;
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	/* Release the controller and the chip */
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	spin_lock(&chip->controller->lock);
	chip->controller->active = NULL;
	chip->state = FL_READY;
	wake_up(&chip->controller->wq);
	spin_unlock(&chip->controller->lock);
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}

/**
 * nand_read_byte - [DEFAULT] read one byte from the chip
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 * @mtd: MTD device structure
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 *
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 * Default read function for 8bit buswidth
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 */
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static uint8_t nand_read_byte(struct mtd_info *mtd)
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{
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	struct nand_chip *chip = mtd->priv;
	return readb(chip->IO_ADDR_R);
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}

/**
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 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
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 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
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 * @mtd: MTD device structure
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 *
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 * Default read function for 16bit buswidth with endianness conversion.
 *
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 */
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static uint8_t nand_read_byte16(struct mtd_info *mtd)
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{
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	struct nand_chip *chip = mtd->priv;
	return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
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}

/**
 * nand_read_word - [DEFAULT] read one word from the chip
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 * @mtd: MTD device structure
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 *
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 * Default read function for 16bit buswidth without endianness conversion.
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 */
static u16 nand_read_word(struct mtd_info *mtd)
{
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	struct nand_chip *chip = mtd->priv;
	return readw(chip->IO_ADDR_R);
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}

/**
 * nand_select_chip - [DEFAULT] control CE line
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 * @mtd: MTD device structure
 * @chipnr: chipnumber to select, -1 for deselect
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 *
 * Default select function for 1 chip devices.
 */
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static void nand_select_chip(struct mtd_info *mtd, int chipnr)
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{
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	struct nand_chip *chip = mtd->priv;

	switch (chipnr) {
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	case -1:
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		chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
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		break;
	case 0:
		break;

	default:
		BUG();
	}
}

/**
 * nand_write_buf - [DEFAULT] write buffer to chip
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 * @mtd: MTD device structure
 * @buf: data buffer
 * @len: number of bytes to write
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 *
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 * Default write function for 8bit buswidth.
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 */
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static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
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{
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	struct nand_chip *chip = mtd->priv;
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	iowrite8_rep(chip->IO_ADDR_W, buf, len);
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}

/**
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 * nand_read_buf - [DEFAULT] read chip data into buffer
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 * @mtd: MTD device structure
 * @buf: buffer to store date
 * @len: number of bytes to read
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 *
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 * Default read function for 8bit buswidth.
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 */
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static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
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{
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	struct nand_chip *chip = mtd->priv;
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	ioread8_rep(chip->IO_ADDR_R, buf, len);
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}

/**
 * nand_write_buf16 - [DEFAULT] write buffer to chip
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 * @mtd: MTD device structure
 * @buf: data buffer
 * @len: number of bytes to write
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 *
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 * Default write function for 16bit buswidth.
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 */
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static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
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{
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	struct nand_chip *chip = mtd->priv;
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	u16 *p = (u16 *) buf;
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	iowrite16_rep(chip->IO_ADDR_W, p, len >> 1);
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}

/**
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 * nand_read_buf16 - [DEFAULT] read chip data into buffer
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 * @mtd: MTD device structure
 * @buf: buffer to store date
 * @len: number of bytes to read
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 *
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 * Default read function for 16bit buswidth.
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 */
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static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
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{
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	struct nand_chip *chip = mtd->priv;
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	u16 *p = (u16 *) buf;

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	ioread16_rep(chip->IO_ADDR_R, p, len >> 1);
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}

/**
 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
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 * @mtd: MTD device structure
 * @ofs: offset from device start
 * @getchip: 0, if the chip is already selected
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 *
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 * Check, if the block is bad.
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 */
static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
{
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	int page, chipnr, res = 0, i = 0;
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	struct nand_chip *chip = mtd->priv;
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	u16 bad;

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	if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
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		ofs += mtd->erasesize - mtd->writesize;

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	page = (int)(ofs >> chip->page_shift) & chip->pagemask;

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	if (getchip) {
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		chipnr = (int)(ofs >> chip->chip_shift);
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		nand_get_device(mtd, FL_READING);
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		/* Select the NAND device */
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		chip->select_chip(mtd, chipnr);
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	}
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	do {
		if (chip->options & NAND_BUSWIDTH_16) {
			chip->cmdfunc(mtd, NAND_CMD_READOOB,
					chip->badblockpos & 0xFE, page);
			bad = cpu_to_le16(chip->read_word(mtd));
			if (chip->badblockpos & 0x1)
				bad >>= 8;
			else
				bad &= 0xFF;
		} else {
			chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
					page);
			bad = chip->read_byte(mtd);
		}

		if (likely(chip->badblockbits == 8))
			res = bad != 0xFF;
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		else
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			res = hweight8(bad) < chip->badblockbits;
		ofs += mtd->writesize;
		page = (int)(ofs >> chip->page_shift) & chip->pagemask;
		i++;
	} while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE));
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	if (getchip) {
		chip->select_chip(mtd, -1);
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		nand_release_device(mtd);
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	}
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	return res;
}

/**
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 * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
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 * @mtd: MTD device structure
 * @ofs: offset from device start
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 *
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 * This is the default implementation, which can be overridden by a hardware
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 * specific driver. It provides the details for writing a bad block marker to a
 * block.
 */
static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
{
	struct nand_chip *chip = mtd->priv;
	struct mtd_oob_ops ops;
	uint8_t buf[2] = { 0, 0 };
	int ret = 0, res, i = 0;

	ops.datbuf = NULL;
	ops.oobbuf = buf;
	ops.ooboffs = chip->badblockpos;
	if (chip->options & NAND_BUSWIDTH_16) {
		ops.ooboffs &= ~0x01;
		ops.len = ops.ooblen = 2;
	} else {
		ops.len = ops.ooblen = 1;
	}
	ops.mode = MTD_OPS_PLACE_OOB;

	/* Write to first/last page(s) if necessary */
	if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
		ofs += mtd->erasesize - mtd->writesize;
	do {
		res = nand_do_write_oob(mtd, ofs, &ops);
		if (!ret)
			ret = res;

		i++;
		ofs += mtd->writesize;
	} while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2);

	return ret;
}

/**
 * nand_block_markbad_lowlevel - mark a block bad
 * @mtd: MTD device structure
 * @ofs: offset from device start
 *
 * This function performs the generic NAND bad block marking steps (i.e., bad
 * block table(s) and/or marker(s)). We only allow the hardware driver to
 * specify how to write bad block markers to OOB (chip->block_markbad).
 *
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 * We try operations in the following order:
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 *  (1) erase the affected block, to allow OOB marker to be written cleanly
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 *  (2) write bad block marker to OOB area of affected block (unless flag
 *      NAND_BBT_NO_OOB_BBM is present)
 *  (3) update the BBT
 * Note that we retain the first error encountered in (2) or (3), finish the
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 * procedures, and dump the error in the end.
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*/
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static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)
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{
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	struct nand_chip *chip = mtd->priv;
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	int res, ret = 0;
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	if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) {
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		struct erase_info einfo;

		/* Attempt erase before marking OOB */
		memset(&einfo, 0, sizeof(einfo));
		einfo.mtd = mtd;
		einfo.addr = ofs;
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		einfo.len = 1ULL << chip->phys_erase_shift;
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		nand_erase_nand(mtd, &einfo, 0);
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		/* Write bad block marker to OOB */
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		nand_get_device(mtd, FL_WRITING);
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		ret = chip->block_markbad(mtd, ofs);
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		nand_release_device(mtd);
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	}
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	/* Mark block bad in BBT */
	if (chip->bbt) {
		res = nand_markbad_bbt(mtd, ofs);
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		if (!ret)
			ret = res;
	}

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	if (!ret)
		mtd->ecc_stats.badblocks++;
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	return ret;
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}

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/**
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 * nand_check_wp - [GENERIC] check if the chip is write protected
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 * @mtd: MTD device structure
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 *
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 * Check, if the device is write protected. The function expects, that the
 * device is already selected.
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 */
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static int nand_check_wp(struct mtd_info *mtd)
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{
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	struct nand_chip *chip = mtd->priv;
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	/* Broken xD cards report WP despite being writable */
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	if (chip->options & NAND_BROKEN_XD)
		return 0;

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	/* Check the WP bit */
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	chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
	return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
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}

/**
 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
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 * @mtd: MTD device structure
 * @ofs: offset from device start
 * @getchip: 0, if the chip is already selected
 * @allowbbt: 1, if its allowed to access the bbt area
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 *
 * Check, if the block is bad. Either by reading the bad block table or
 * calling of the scan function.
 */
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static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
			       int allowbbt)
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{
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	struct nand_chip *chip = mtd->priv;
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	if (!chip->bbt)
		return chip->block_bad(mtd, ofs, getchip);
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	/* Return info from the table */
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	return nand_isbad_bbt(mtd, ofs, allowbbt);
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}

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/**
 * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
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 * @mtd: MTD device structure
 * @timeo: Timeout
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 *
 * Helper function for nand_wait_ready used when needing to wait in interrupt
 * context.
 */
static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo)
{
	struct nand_chip *chip = mtd->priv;
	int i;

	/* Wait for the device to get ready */
	for (i = 0; i < timeo; i++) {
		if (chip->dev_ready(mtd))
			break;
		touch_softlockup_watchdog();
		mdelay(1);
	}
}

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/* Wait for the ready pin, after a command. The timeout is caught later. */
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void nand_wait_ready(struct mtd_info *mtd)
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{
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	struct nand_chip *chip = mtd->priv;
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	unsigned long timeo = jiffies + msecs_to_jiffies(20);
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	/* 400ms timeout */
	if (in_interrupt() || oops_in_progress)
		return panic_nand_wait_ready(mtd, 400);

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	led_trigger_event(nand_led_trigger, LED_FULL);
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	/* Wait until command is processed or timeout occurs */
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	do {
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		if (chip->dev_ready(mtd))
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			break;
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		touch_softlockup_watchdog();
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	} while (time_before(jiffies, timeo));
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	led_trigger_event(nand_led_trigger, LED_OFF);
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}
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EXPORT_SYMBOL_GPL(nand_wait_ready);
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/**
 * nand_command - [DEFAULT] Send command to NAND device
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 * @mtd: MTD device structure
 * @command: the command to be sent
 * @column: the column address for this command, -1 if none
 * @page_addr: the page address for this command, -1 if none
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 *
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 * Send command to NAND device. This function is used for small page devices
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 * (512 Bytes per page).
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 */
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static void nand_command(struct mtd_info *mtd, unsigned int command,
			 int column, int page_addr)
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{
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	register struct nand_chip *chip = mtd->priv;
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	int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
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	/* Write out the command to the device */
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	if (command == NAND_CMD_SEQIN) {
		int readcmd;

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		if (column >= mtd->writesize) {
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			/* OOB area */
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			column -= mtd->writesize;
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			readcmd = NAND_CMD_READOOB;
		} else if (column < 256) {
			/* First 256 bytes --> READ0 */
			readcmd = NAND_CMD_READ0;
		} else {
			column -= 256;
			readcmd = NAND_CMD_READ1;
		}
535
		chip->cmd_ctrl(mtd, readcmd, ctrl);
536
		ctrl &= ~NAND_CTRL_CHANGE;
L
Linus Torvalds 已提交
537
	}
538
	chip->cmd_ctrl(mtd, command, ctrl);
L
Linus Torvalds 已提交
539

540
	/* Address cycle, when necessary */
541 542 543 544
	ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
	/* Serially input address */
	if (column != -1) {
		/* Adjust columns for 16 bit buswidth */
545
		if (chip->options & NAND_BUSWIDTH_16)
546
			column >>= 1;
547
		chip->cmd_ctrl(mtd, column, ctrl);
548 549 550
		ctrl &= ~NAND_CTRL_CHANGE;
	}
	if (page_addr != -1) {
551
		chip->cmd_ctrl(mtd, page_addr, ctrl);
552
		ctrl &= ~NAND_CTRL_CHANGE;
553
		chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
554
		/* One more address cycle for devices > 32MiB */
555 556
		if (chip->chipsize > (32 << 20))
			chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
L
Linus Torvalds 已提交
557
	}
558
	chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
559 560

	/*
561 562
	 * Program and erase have their own busy handlers status and sequential
	 * in needs no delay
563
	 */
L
Linus Torvalds 已提交
564
	switch (command) {
565

L
Linus Torvalds 已提交
566 567 568 569 570 571 572 573
	case NAND_CMD_PAGEPROG:
	case NAND_CMD_ERASE1:
	case NAND_CMD_ERASE2:
	case NAND_CMD_SEQIN:
	case NAND_CMD_STATUS:
		return;

	case NAND_CMD_RESET:
574
		if (chip->dev_ready)
L
Linus Torvalds 已提交
575
			break;
576 577
		udelay(chip->chip_delay);
		chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
578
			       NAND_CTRL_CLE | NAND_CTRL_CHANGE);
579 580
		chip->cmd_ctrl(mtd,
			       NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
581 582
		while (!(chip->read_byte(mtd) & NAND_STATUS_READY))
				;
L
Linus Torvalds 已提交
583 584
		return;

585
		/* This applies to read commands */
L
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586
	default:
587
		/*
L
Linus Torvalds 已提交
588 589
		 * If we don't have access to the busy pin, we apply the given
		 * command delay
590
		 */
591 592
		if (!chip->dev_ready) {
			udelay(chip->chip_delay);
L
Linus Torvalds 已提交
593
			return;
594
		}
L
Linus Torvalds 已提交
595
	}
596 597 598 599
	/*
	 * Apply this short delay always to ensure that we do wait tWB in
	 * any case on any machine.
	 */
600
	ndelay(100);
601 602

	nand_wait_ready(mtd);
L
Linus Torvalds 已提交
603 604 605 606
}

/**
 * nand_command_lp - [DEFAULT] Send command to NAND large page device
607 608 609 610
 * @mtd: MTD device structure
 * @command: the command to be sent
 * @column: the column address for this command, -1 if none
 * @page_addr: the page address for this command, -1 if none
L
Linus Torvalds 已提交
611
 *
612
 * Send command to NAND device. This is the version for the new large page
613 614
 * devices. We don't have the separate regions as we have in the small page
 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
L
Linus Torvalds 已提交
615
 */
616 617
static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
			    int column, int page_addr)
L
Linus Torvalds 已提交
618
{
619
	register struct nand_chip *chip = mtd->priv;
L
Linus Torvalds 已提交
620 621 622

	/* Emulate NAND_CMD_READOOB */
	if (command == NAND_CMD_READOOB) {
J
Joern Engel 已提交
623
		column += mtd->writesize;
L
Linus Torvalds 已提交
624 625
		command = NAND_CMD_READ0;
	}
626

627
	/* Command latch cycle */
628
	chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
L
Linus Torvalds 已提交
629 630

	if (column != -1 || page_addr != -1) {
631
		int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
L
Linus Torvalds 已提交
632 633 634 635

		/* Serially input address */
		if (column != -1) {
			/* Adjust columns for 16 bit buswidth */
636
			if (chip->options & NAND_BUSWIDTH_16)
L
Linus Torvalds 已提交
637
				column >>= 1;
638
			chip->cmd_ctrl(mtd, column, ctrl);
639
			ctrl &= ~NAND_CTRL_CHANGE;
640
			chip->cmd_ctrl(mtd, column >> 8, ctrl);
641
		}
L
Linus Torvalds 已提交
642
		if (page_addr != -1) {
643 644
			chip->cmd_ctrl(mtd, page_addr, ctrl);
			chip->cmd_ctrl(mtd, page_addr >> 8,
645
				       NAND_NCE | NAND_ALE);
L
Linus Torvalds 已提交
646
			/* One more address cycle for devices > 128MiB */
647 648
			if (chip->chipsize > (128 << 20))
				chip->cmd_ctrl(mtd, page_addr >> 16,
649
					       NAND_NCE | NAND_ALE);
L
Linus Torvalds 已提交
650 651
		}
	}
652
	chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
653 654

	/*
655 656
	 * Program and erase have their own busy handlers status, sequential
	 * in, and deplete1 need no delay.
657
	 */
L
Linus Torvalds 已提交
658
	switch (command) {
659

L
Linus Torvalds 已提交
660 661 662 663 664
	case NAND_CMD_CACHEDPROG:
	case NAND_CMD_PAGEPROG:
	case NAND_CMD_ERASE1:
	case NAND_CMD_ERASE2:
	case NAND_CMD_SEQIN:
665
	case NAND_CMD_RNDIN:
L
Linus Torvalds 已提交
666
	case NAND_CMD_STATUS:
667
		return;
L
Linus Torvalds 已提交
668 669

	case NAND_CMD_RESET:
670
		if (chip->dev_ready)
L
Linus Torvalds 已提交
671
			break;
672
		udelay(chip->chip_delay);
673 674 675 676
		chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
			       NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
		chip->cmd_ctrl(mtd, NAND_CMD_NONE,
			       NAND_NCE | NAND_CTRL_CHANGE);
677 678
		while (!(chip->read_byte(mtd) & NAND_STATUS_READY))
				;
L
Linus Torvalds 已提交
679 680
		return;

681 682 683 684 685 686 687 688
	case NAND_CMD_RNDOUT:
		/* No ready / busy check necessary */
		chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
			       NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
		chip->cmd_ctrl(mtd, NAND_CMD_NONE,
			       NAND_NCE | NAND_CTRL_CHANGE);
		return;

L
Linus Torvalds 已提交
689
	case NAND_CMD_READ0:
690 691 692 693
		chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
			       NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
		chip->cmd_ctrl(mtd, NAND_CMD_NONE,
			       NAND_NCE | NAND_CTRL_CHANGE);
694

695
		/* This applies to read commands */
L
Linus Torvalds 已提交
696
	default:
697
		/*
L
Linus Torvalds 已提交
698
		 * If we don't have access to the busy pin, we apply the given
699
		 * command delay.
700
		 */
701 702
		if (!chip->dev_ready) {
			udelay(chip->chip_delay);
L
Linus Torvalds 已提交
703
			return;
704
		}
L
Linus Torvalds 已提交
705
	}
706

707 708 709 710
	/*
	 * Apply this short delay always to ensure that we do wait tWB in
	 * any case on any machine.
	 */
711
	ndelay(100);
712 713

	nand_wait_ready(mtd);
L
Linus Torvalds 已提交
714 715
}

716 717
/**
 * panic_nand_get_device - [GENERIC] Get chip for selected access
718 719 720
 * @chip: the nand chip descriptor
 * @mtd: MTD device structure
 * @new_state: the state which is requested
721 722 723 724 725 726
 *
 * Used when in panic, no locks are taken.
 */
static void panic_nand_get_device(struct nand_chip *chip,
		      struct mtd_info *mtd, int new_state)
{
727
	/* Hardware controller shared among independent devices */
728 729 730 731
	chip->controller->active = chip;
	chip->state = new_state;
}

L
Linus Torvalds 已提交
732 733
/**
 * nand_get_device - [GENERIC] Get chip for selected access
734 735
 * @mtd: MTD device structure
 * @new_state: the state which is requested
L
Linus Torvalds 已提交
736 737 738
 *
 * Get the device and lock it for exclusive access
 */
739
static int
740
nand_get_device(struct mtd_info *mtd, int new_state)
L
Linus Torvalds 已提交
741
{
742
	struct nand_chip *chip = mtd->priv;
743 744
	spinlock_t *lock = &chip->controller->lock;
	wait_queue_head_t *wq = &chip->controller->wq;
745
	DECLARE_WAITQUEUE(wait, current);
746
retry:
747 748
	spin_lock(lock);

749
	/* Hardware controller shared among independent devices */
750 751
	if (!chip->controller->active)
		chip->controller->active = chip;
T
Thomas Gleixner 已提交
752

753 754
	if (chip->controller->active == chip && chip->state == FL_READY) {
		chip->state = new_state;
755
		spin_unlock(lock);
756 757 758
		return 0;
	}
	if (new_state == FL_PM_SUSPENDED) {
759 760 761 762 763
		if (chip->controller->active->state == FL_PM_SUSPENDED) {
			chip->state = FL_PM_SUSPENDED;
			spin_unlock(lock);
			return 0;
		}
764 765 766 767 768 769
	}
	set_current_state(TASK_UNINTERRUPTIBLE);
	add_wait_queue(wq, &wait);
	spin_unlock(lock);
	schedule();
	remove_wait_queue(wq, &wait);
L
Linus Torvalds 已提交
770 771 772
	goto retry;
}

773
/**
774 775 776 777
 * panic_nand_wait - [GENERIC] wait until the command is done
 * @mtd: MTD device structure
 * @chip: NAND chip structure
 * @timeo: timeout
778 779 780
 *
 * Wait for command done. This is a helper function for nand_wait used when
 * we are in interrupt context. May happen when in panic and trying to write
781
 * an oops through mtdoops.
782 783 784 785 786 787 788 789 790 791 792 793 794 795
 */
static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
			    unsigned long timeo)
{
	int i;
	for (i = 0; i < timeo; i++) {
		if (chip->dev_ready) {
			if (chip->dev_ready(mtd))
				break;
		} else {
			if (chip->read_byte(mtd) & NAND_STATUS_READY)
				break;
		}
		mdelay(1);
796
	}
797 798
}

L
Linus Torvalds 已提交
799
/**
800 801 802
 * nand_wait - [DEFAULT] wait until the command is done
 * @mtd: MTD device structure
 * @chip: NAND chip structure
L
Linus Torvalds 已提交
803
 *
804 805 806
 * Wait for command done. This applies to erase and program only. Erase can
 * take up to 400ms and program up to 20ms according to general NAND and
 * SmartMedia specs.
R
Randy Dunlap 已提交
807
 */
808
static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
L
Linus Torvalds 已提交
809 810
{

811
	int status, state = chip->state;
812
	unsigned long timeo = (state == FL_ERASING ? 400 : 20);
L
Linus Torvalds 已提交
813

814 815
	led_trigger_event(nand_led_trigger, LED_FULL);

816 817 818 819
	/*
	 * Apply this short delay always to ensure that we do wait tWB in any
	 * case on any machine.
	 */
820
	ndelay(100);
L
Linus Torvalds 已提交
821

822
	chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
L
Linus Torvalds 已提交
823

824 825 826
	if (in_interrupt() || oops_in_progress)
		panic_nand_wait(mtd, chip, timeo);
	else {
827
		timeo = jiffies + msecs_to_jiffies(timeo);
828 829 830 831 832 833 834 835 836
		while (time_before(jiffies, timeo)) {
			if (chip->dev_ready) {
				if (chip->dev_ready(mtd))
					break;
			} else {
				if (chip->read_byte(mtd) & NAND_STATUS_READY)
					break;
			}
			cond_resched();
L
Linus Torvalds 已提交
837 838
		}
	}
839 840
	led_trigger_event(nand_led_trigger, LED_OFF);

841
	status = (int)chip->read_byte(mtd);
842 843
	/* This can happen if in case of timeout or buggy dev_ready */
	WARN_ON(!(status & NAND_STATUS_READY));
L
Linus Torvalds 已提交
844 845 846
	return status;
}

847
/**
848 849 850 851
 * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks
 * @mtd: mtd info
 * @ofs: offset to start unlock from
 * @len: length to unlock
852 853 854 855
 * @invert: when = 0, unlock the range of blocks within the lower and
 *                    upper boundary address
 *          when = 1, unlock the range of blocks outside the boundaries
 *                    of the lower and upper boundary address
856
 *
857
 * Returs unlock status.
858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877
 */
static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,
					uint64_t len, int invert)
{
	int ret = 0;
	int status, page;
	struct nand_chip *chip = mtd->priv;

	/* Submit address of first page to unlock */
	page = ofs >> chip->page_shift;
	chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask);

	/* Submit address of last page to unlock */
	page = (ofs + len) >> chip->page_shift;
	chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1,
				(page | invert) & chip->pagemask);

	/* Call wait ready function */
	status = chip->waitfunc(mtd, chip);
	/* See if device thinks it succeeded */
878
	if (status & NAND_STATUS_FAIL) {
879
		pr_debug("%s: error status = 0x%08x\n",
880 881 882 883 884 885 886 887
					__func__, status);
		ret = -EIO;
	}

	return ret;
}

/**
888 889 890 891
 * nand_unlock - [REPLACEABLE] unlocks specified locked blocks
 * @mtd: mtd info
 * @ofs: offset to start unlock from
 * @len: length to unlock
892
 *
893
 * Returns unlock status.
894 895 896 897 898 899 900
 */
int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
{
	int ret = 0;
	int chipnr;
	struct nand_chip *chip = mtd->priv;

901
	pr_debug("%s: start = 0x%012llx, len = %llu\n",
902 903 904 905 906 907 908 909 910
			__func__, (unsigned long long)ofs, len);

	if (check_offs_len(mtd, ofs, len))
		ret = -EINVAL;

	/* Align to last block address if size addresses end of the device */
	if (ofs + len == mtd->size)
		len -= mtd->erasesize;

911
	nand_get_device(mtd, FL_UNLOCKING);
912 913 914 915 916 917 918 919

	/* Shift to get chip number */
	chipnr = ofs >> chip->chip_shift;

	chip->select_chip(mtd, chipnr);

	/* Check, if it is write protected */
	if (nand_check_wp(mtd)) {
920
		pr_debug("%s: device is write protected!\n",
921 922 923 924 925 926 927 928
					__func__);
		ret = -EIO;
		goto out;
	}

	ret = __nand_unlock(mtd, ofs, len, 0);

out:
929
	chip->select_chip(mtd, -1);
930 931 932 933
	nand_release_device(mtd);

	return ret;
}
934
EXPORT_SYMBOL(nand_unlock);
935 936

/**
937 938 939 940
 * nand_lock - [REPLACEABLE] locks all blocks present in the device
 * @mtd: mtd info
 * @ofs: offset to start unlock from
 * @len: length to unlock
941
 *
942 943 944 945
 * This feature is not supported in many NAND parts. 'Micron' NAND parts do
 * have this feature, but it allows only to lock all blocks, not for specified
 * range for block. Implementing 'lock' feature by making use of 'unlock', for
 * now.
946
 *
947
 * Returns lock status.
948 949 950 951 952 953 954
 */
int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
{
	int ret = 0;
	int chipnr, status, page;
	struct nand_chip *chip = mtd->priv;

955
	pr_debug("%s: start = 0x%012llx, len = %llu\n",
956 957 958 959 960
			__func__, (unsigned long long)ofs, len);

	if (check_offs_len(mtd, ofs, len))
		ret = -EINVAL;

961
	nand_get_device(mtd, FL_LOCKING);
962 963 964 965 966 967 968 969

	/* Shift to get chip number */
	chipnr = ofs >> chip->chip_shift;

	chip->select_chip(mtd, chipnr);

	/* Check, if it is write protected */
	if (nand_check_wp(mtd)) {
970
		pr_debug("%s: device is write protected!\n",
971 972 973 974 975 976 977 978 979 980 981 982 983
					__func__);
		status = MTD_ERASE_FAILED;
		ret = -EIO;
		goto out;
	}

	/* Submit address of first page to lock */
	page = ofs >> chip->page_shift;
	chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask);

	/* Call wait ready function */
	status = chip->waitfunc(mtd, chip);
	/* See if device thinks it succeeded */
984
	if (status & NAND_STATUS_FAIL) {
985
		pr_debug("%s: error status = 0x%08x\n",
986 987 988 989 990 991 992 993
					__func__, status);
		ret = -EIO;
		goto out;
	}

	ret = __nand_unlock(mtd, ofs, len, 0x1);

out:
994
	chip->select_chip(mtd, -1);
995 996 997 998
	nand_release_device(mtd);

	return ret;
}
999
EXPORT_SYMBOL(nand_lock);
1000

1001
/**
1002
 * nand_read_page_raw - [INTERN] read raw page data without ecc
1003 1004 1005
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: buffer to store read data
1006
 * @oob_required: caller requires OOB data read to chip->oob_poi
1007
 * @page: page number to read
1008
 *
1009
 * Not for syndrome calculating ECC controllers, which use a special oob layout.
1010 1011
 */
static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1012
			      uint8_t *buf, int oob_required, int page)
1013 1014
{
	chip->read_buf(mtd, buf, mtd->writesize);
1015 1016
	if (oob_required)
		chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1017 1018 1019
	return 0;
}

1020
/**
1021
 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
1022 1023 1024
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: buffer to store read data
1025
 * @oob_required: caller requires OOB data read to chip->oob_poi
1026
 * @page: page number to read
1027 1028 1029
 *
 * We need a special oob layout and handling even when OOB isn't used.
 */
1030
static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
1031 1032
				       struct nand_chip *chip, uint8_t *buf,
				       int oob_required, int page)
1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063
{
	int eccsize = chip->ecc.size;
	int eccbytes = chip->ecc.bytes;
	uint8_t *oob = chip->oob_poi;
	int steps, size;

	for (steps = chip->ecc.steps; steps > 0; steps--) {
		chip->read_buf(mtd, buf, eccsize);
		buf += eccsize;

		if (chip->ecc.prepad) {
			chip->read_buf(mtd, oob, chip->ecc.prepad);
			oob += chip->ecc.prepad;
		}

		chip->read_buf(mtd, oob, eccbytes);
		oob += eccbytes;

		if (chip->ecc.postpad) {
			chip->read_buf(mtd, oob, chip->ecc.postpad);
			oob += chip->ecc.postpad;
		}
	}

	size = mtd->oobsize - (oob - chip->oob_poi);
	if (size)
		chip->read_buf(mtd, oob, size);

	return 0;
}

L
Linus Torvalds 已提交
1064
/**
1065
 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
1066 1067 1068
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: buffer to store read data
1069
 * @oob_required: caller requires OOB data read to chip->oob_poi
1070
 * @page: page number to read
1071
 */
1072
static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1073
				uint8_t *buf, int oob_required, int page)
L
Linus Torvalds 已提交
1074
{
1075 1076 1077 1078
	int i, eccsize = chip->ecc.size;
	int eccbytes = chip->ecc.bytes;
	int eccsteps = chip->ecc.steps;
	uint8_t *p = buf;
1079 1080
	uint8_t *ecc_calc = chip->buffers->ecccalc;
	uint8_t *ecc_code = chip->buffers->ecccode;
1081
	uint32_t *eccpos = chip->ecc.layout->eccpos;
1082
	unsigned int max_bitflips = 0;
1083

1084
	chip->ecc.read_page_raw(mtd, chip, buf, 1, page);
1085 1086 1087 1088 1089

	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
		chip->ecc.calculate(mtd, p, &ecc_calc[i]);

	for (i = 0; i < chip->ecc.total; i++)
1090
		ecc_code[i] = chip->oob_poi[eccpos[i]];
1091 1092 1093 1094 1095 1096 1097 1098

	eccsteps = chip->ecc.steps;
	p = buf;

	for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
		int stat;

		stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
1099
		if (stat < 0) {
1100
			mtd->ecc_stats.failed++;
1101
		} else {
1102
			mtd->ecc_stats.corrected += stat;
1103 1104
			max_bitflips = max_t(unsigned int, max_bitflips, stat);
		}
1105
	}
1106
	return max_bitflips;
1107
}
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1108

1109
/**
1110
 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
1111 1112 1113 1114 1115
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @data_offs: offset of requested data within the page
 * @readlen: data length
 * @bufpoi: buffer to store read data
1116
 */
1117 1118
static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
			uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
1119 1120 1121 1122 1123 1124 1125
{
	int start_step, end_step, num_steps;
	uint32_t *eccpos = chip->ecc.layout->eccpos;
	uint8_t *p;
	int data_col_addr, i, gaps = 0;
	int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
	int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
1126
	int index = 0;
1127
	unsigned int max_bitflips = 0;
1128

1129
	/* Column address within the page aligned to ECC size (256bytes) */
1130 1131 1132 1133
	start_step = data_offs / chip->ecc.size;
	end_step = (data_offs + readlen - 1) / chip->ecc.size;
	num_steps = end_step - start_step + 1;

1134
	/* Data size aligned to ECC ecc.size */
1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145
	datafrag_len = num_steps * chip->ecc.size;
	eccfrag_len = num_steps * chip->ecc.bytes;

	data_col_addr = start_step * chip->ecc.size;
	/* If we read not a page aligned data */
	if (data_col_addr != 0)
		chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);

	p = bufpoi + data_col_addr;
	chip->read_buf(mtd, p, datafrag_len);

1146
	/* Calculate ECC */
1147 1148 1149
	for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
		chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);

1150 1151
	/*
	 * The performance is faster if we position offsets according to
1152
	 * ecc.pos. Let's make sure that there are no gaps in ECC positions.
1153
	 */
1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164
	for (i = 0; i < eccfrag_len - 1; i++) {
		if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=
			eccpos[i + start_step * chip->ecc.bytes + 1]) {
			gaps = 1;
			break;
		}
	}
	if (gaps) {
		chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
		chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
	} else {
1165
		/*
1166
		 * Send the command to read the particular ECC bytes take care
1167 1168
		 * about buswidth alignment in read_buf.
		 */
1169 1170 1171
		index = start_step * chip->ecc.bytes;

		aligned_pos = eccpos[index] & ~(busw - 1);
1172
		aligned_len = eccfrag_len;
1173
		if (eccpos[index] & (busw - 1))
1174
			aligned_len++;
1175
		if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))
1176 1177
			aligned_len++;

1178 1179
		chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
					mtd->writesize + aligned_pos, -1);
1180 1181 1182 1183
		chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);
	}

	for (i = 0; i < eccfrag_len; i++)
1184
		chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];
1185 1186 1187 1188 1189

	p = bufpoi + data_col_addr;
	for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
		int stat;

1190 1191
		stat = chip->ecc.correct(mtd, p,
			&chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
1192
		if (stat < 0) {
1193
			mtd->ecc_stats.failed++;
1194
		} else {
1195
			mtd->ecc_stats.corrected += stat;
1196 1197
			max_bitflips = max_t(unsigned int, max_bitflips, stat);
		}
1198
	}
1199
	return max_bitflips;
1200 1201
}

1202
/**
1203
 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
1204 1205 1206
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: buffer to store read data
1207
 * @oob_required: caller requires OOB data read to chip->oob_poi
1208
 * @page: page number to read
1209
 *
1210
 * Not for syndrome calculating ECC controllers which need a special oob layout.
1211
 */
1212
static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1213
				uint8_t *buf, int oob_required, int page)
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1214
{
1215 1216 1217 1218
	int i, eccsize = chip->ecc.size;
	int eccbytes = chip->ecc.bytes;
	int eccsteps = chip->ecc.steps;
	uint8_t *p = buf;
1219 1220
	uint8_t *ecc_calc = chip->buffers->ecccalc;
	uint8_t *ecc_code = chip->buffers->ecccode;
1221
	uint32_t *eccpos = chip->ecc.layout->eccpos;
1222
	unsigned int max_bitflips = 0;
1223 1224 1225 1226 1227

	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
		chip->ecc.hwctl(mtd, NAND_ECC_READ);
		chip->read_buf(mtd, p, eccsize);
		chip->ecc.calculate(mtd, p, &ecc_calc[i]);
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1228
	}
1229
	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
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1230

1231
	for (i = 0; i < chip->ecc.total; i++)
1232
		ecc_code[i] = chip->oob_poi[eccpos[i]];
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1233

1234 1235
	eccsteps = chip->ecc.steps;
	p = buf;
1236

1237 1238
	for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
		int stat;
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1239

1240
		stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
1241
		if (stat < 0) {
1242
			mtd->ecc_stats.failed++;
1243
		} else {
1244
			mtd->ecc_stats.corrected += stat;
1245 1246
			max_bitflips = max_t(unsigned int, max_bitflips, stat);
		}
1247
	}
1248
	return max_bitflips;
1249
}
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1250

1251
/**
1252
 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
1253 1254 1255
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: buffer to store read data
1256
 * @oob_required: caller requires OOB data read to chip->oob_poi
1257
 * @page: page number to read
1258
 *
1259 1260 1261 1262 1263
 * Hardware ECC for large page chips, require OOB to be read first. For this
 * ECC mode, the write_page method is re-used from ECC_HW. These methods
 * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
 * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
 * the data area, by overwriting the NAND manufacturer bad block markings.
1264 1265
 */
static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
1266
	struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
1267 1268 1269 1270 1271 1272 1273 1274
{
	int i, eccsize = chip->ecc.size;
	int eccbytes = chip->ecc.bytes;
	int eccsteps = chip->ecc.steps;
	uint8_t *p = buf;
	uint8_t *ecc_code = chip->buffers->ecccode;
	uint32_t *eccpos = chip->ecc.layout->eccpos;
	uint8_t *ecc_calc = chip->buffers->ecccalc;
1275
	unsigned int max_bitflips = 0;
1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292

	/* Read the OOB area first */
	chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
	chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);

	for (i = 0; i < chip->ecc.total; i++)
		ecc_code[i] = chip->oob_poi[eccpos[i]];

	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
		int stat;

		chip->ecc.hwctl(mtd, NAND_ECC_READ);
		chip->read_buf(mtd, p, eccsize);
		chip->ecc.calculate(mtd, p, &ecc_calc[i]);

		stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
1293
		if (stat < 0) {
1294
			mtd->ecc_stats.failed++;
1295
		} else {
1296
			mtd->ecc_stats.corrected += stat;
1297 1298
			max_bitflips = max_t(unsigned int, max_bitflips, stat);
		}
1299
	}
1300
	return max_bitflips;
1301 1302
}

1303
/**
1304
 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
1305 1306 1307
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: buffer to store read data
1308
 * @oob_required: caller requires OOB data read to chip->oob_poi
1309
 * @page: page number to read
1310
 *
1311 1312
 * The hw generator calculates the error syndrome automatically. Therefore we
 * need a special oob layout and handling.
1313 1314
 */
static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1315
				   uint8_t *buf, int oob_required, int page)
1316 1317 1318 1319 1320
{
	int i, eccsize = chip->ecc.size;
	int eccbytes = chip->ecc.bytes;
	int eccsteps = chip->ecc.steps;
	uint8_t *p = buf;
1321
	uint8_t *oob = chip->oob_poi;
1322
	unsigned int max_bitflips = 0;
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1323

1324 1325
	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
		int stat;
1326

1327 1328
		chip->ecc.hwctl(mtd, NAND_ECC_READ);
		chip->read_buf(mtd, p, eccsize);
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1329

1330 1331 1332 1333
		if (chip->ecc.prepad) {
			chip->read_buf(mtd, oob, chip->ecc.prepad);
			oob += chip->ecc.prepad;
		}
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1334

1335 1336 1337
		chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
		chip->read_buf(mtd, oob, eccbytes);
		stat = chip->ecc.correct(mtd, p, oob, NULL);
1338

1339
		if (stat < 0) {
1340
			mtd->ecc_stats.failed++;
1341
		} else {
1342
			mtd->ecc_stats.corrected += stat;
1343 1344
			max_bitflips = max_t(unsigned int, max_bitflips, stat);
		}
1345

1346
		oob += eccbytes;
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1347

1348 1349 1350
		if (chip->ecc.postpad) {
			chip->read_buf(mtd, oob, chip->ecc.postpad);
			oob += chip->ecc.postpad;
1351
		}
1352
	}
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1353

1354
	/* Calculate remaining oob bytes */
1355
	i = mtd->oobsize - (oob - chip->oob_poi);
1356 1357
	if (i)
		chip->read_buf(mtd, oob, i);
1358

1359
	return max_bitflips;
1360
}
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1361

1362
/**
1363
 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
1364 1365 1366 1367
 * @chip: nand chip structure
 * @oob: oob destination address
 * @ops: oob ops structure
 * @len: size of oob to transfer
1368 1369
 */
static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
1370
				  struct mtd_oob_ops *ops, size_t len)
1371
{
1372
	switch (ops->mode) {
1373

1374 1375
	case MTD_OPS_PLACE_OOB:
	case MTD_OPS_RAW:
1376 1377 1378
		memcpy(oob, chip->oob_poi + ops->ooboffs, len);
		return oob + len;

1379
	case MTD_OPS_AUTO_OOB: {
1380
		struct nand_oobfree *free = chip->ecc.layout->oobfree;
1381 1382
		uint32_t boffs = 0, roffs = ops->ooboffs;
		size_t bytes = 0;
1383

1384
		for (; free->length && len; free++, len -= bytes) {
1385
			/* Read request not from offset 0? */
1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399
			if (unlikely(roffs)) {
				if (roffs >= free->length) {
					roffs -= free->length;
					continue;
				}
				boffs = free->offset + roffs;
				bytes = min_t(size_t, len,
					      (free->length - roffs));
				roffs = 0;
			} else {
				bytes = min_t(size_t, len, free->length);
				boffs = free->offset;
			}
			memcpy(oob, chip->oob_poi + boffs, bytes);
1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410
			oob += bytes;
		}
		return oob;
	}
	default:
		BUG();
	}
	return NULL;
}

/**
1411
 * nand_do_read_ops - [INTERN] Read data with ECC
1412 1413 1414
 * @mtd: MTD device structure
 * @from: offset to read from
 * @ops: oob ops structure
1415 1416 1417
 *
 * Internal function. Called with chip held.
 */
1418 1419
static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
			    struct mtd_oob_ops *ops)
1420
{
1421
	int chipnr, page, realpage, col, bytes, aligned, oob_required;
1422 1423 1424
	struct nand_chip *chip = mtd->priv;
	struct mtd_ecc_stats stats;
	int ret = 0;
1425
	uint32_t readlen = ops->len;
1426
	uint32_t oobreadlen = ops->ooblen;
1427
	uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ?
1428 1429
		mtd->oobavail : mtd->oobsize;

1430
	uint8_t *bufpoi, *oob, *buf;
1431
	unsigned int max_bitflips = 0;
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1432

1433
	stats = mtd->ecc_stats;
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1434

1435 1436
	chipnr = (int)(from >> chip->chip_shift);
	chip->select_chip(mtd, chipnr);
1437

1438 1439
	realpage = (int)(from >> chip->page_shift);
	page = realpage & chip->pagemask;
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1440

1441
	col = (int)(from & (mtd->writesize - 1));
1442

1443 1444
	buf = ops->datbuf;
	oob = ops->oobbuf;
1445
	oob_required = oob ? 1 : 0;
1446

1447
	while (1) {
1448 1449
		bytes = min(mtd->writesize - col, readlen);
		aligned = (bytes == mtd->writesize);
1450

1451
		/* Is the current page in the buffer? */
1452
		if (realpage != chip->pagebuf || oob) {
1453
			bufpoi = aligned ? buf : chip->buffers->databuf;
1454

1455
			chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
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1456

1457 1458 1459 1460
			/*
			 * Now read the page into the buffer.  Absent an error,
			 * the read methods return max bitflips per ecc step.
			 */
1461
			if (unlikely(ops->mode == MTD_OPS_RAW))
1462
				ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,
1463 1464
							      oob_required,
							      page);
1465 1466
			else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
				 !oob)
1467 1468
				ret = chip->ecc.read_subpage(mtd, chip,
							col, bytes, bufpoi);
1469
			else
1470
				ret = chip->ecc.read_page(mtd, chip, bufpoi,
1471
							  oob_required, page);
1472 1473 1474 1475
			if (ret < 0) {
				if (!aligned)
					/* Invalidate page cache */
					chip->pagebuf = -1;
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1476
				break;
1477
			}
1478

1479 1480
			max_bitflips = max_t(unsigned int, max_bitflips, ret);

1481 1482
			/* Transfer not aligned data */
			if (!aligned) {
1483
				if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
1484
				    !(mtd->ecc_stats.failed - stats.failed) &&
1485
				    (ops->mode != MTD_OPS_RAW)) {
1486
					chip->pagebuf = realpage;
1487 1488
					chip->pagebuf_bitflips = ret;
				} else {
1489 1490
					/* Invalidate page cache */
					chip->pagebuf = -1;
1491
				}
1492
				memcpy(buf, chip->buffers->databuf + col, bytes);
1493 1494
			}

1495 1496 1497
			buf += bytes;

			if (unlikely(oob)) {
1498 1499 1500 1501 1502 1503 1504
				int toread = min(oobreadlen, max_oobsize);

				if (toread) {
					oob = nand_transfer_oob(chip,
						oob, ops, toread);
					oobreadlen -= toread;
				}
1505
			}
1506 1507 1508 1509 1510 1511 1512 1513

			if (chip->options & NAND_NEED_READRDY) {
				/* Apply delay or wait for ready/busy pin */
				if (!chip->dev_ready)
					udelay(chip->chip_delay);
				else
					nand_wait_ready(mtd);
			}
1514
		} else {
1515
			memcpy(buf, chip->buffers->databuf + col, bytes);
1516
			buf += bytes;
1517 1518
			max_bitflips = max_t(unsigned int, max_bitflips,
					     chip->pagebuf_bitflips);
1519
		}
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1520

1521
		readlen -= bytes;
1522

1523
		if (!readlen)
1524
			break;
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1525

1526
		/* For subsequent reads align to page boundary */
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1527 1528 1529 1530
		col = 0;
		/* Increment page address */
		realpage++;

1531
		page = realpage & chip->pagemask;
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1532 1533 1534
		/* Check, if we cross a chip boundary */
		if (!page) {
			chipnr++;
1535 1536
			chip->select_chip(mtd, -1);
			chip->select_chip(mtd, chipnr);
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1537 1538
		}
	}
1539
	chip->select_chip(mtd, -1);
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1540

1541
	ops->retlen = ops->len - (size_t) readlen;
1542 1543
	if (oob)
		ops->oobretlen = ops->ooblen - oobreadlen;
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1544

1545
	if (ret < 0)
1546 1547
		return ret;

1548 1549 1550
	if (mtd->ecc_stats.failed - stats.failed)
		return -EBADMSG;

1551
	return max_bitflips;
1552 1553 1554
}

/**
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Lucas De Marchi 已提交
1555
 * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
1556 1557 1558 1559 1560
 * @mtd: MTD device structure
 * @from: offset to read from
 * @len: number of bytes to read
 * @retlen: pointer to variable to store the number of read bytes
 * @buf: the databuffer to put data
1561
 *
1562
 * Get hold of the chip and call nand_do_read.
1563 1564 1565 1566
 */
static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
		     size_t *retlen, uint8_t *buf)
{
1567
	struct mtd_oob_ops ops;
1568 1569
	int ret;

1570
	nand_get_device(mtd, FL_READING);
1571 1572 1573
	ops.len = len;
	ops.datbuf = buf;
	ops.oobbuf = NULL;
1574
	ops.mode = MTD_OPS_PLACE_OOB;
1575 1576
	ret = nand_do_read_ops(mtd, from, &ops);
	*retlen = ops.retlen;
1577 1578
	nand_release_device(mtd);
	return ret;
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1579 1580
}

1581
/**
1582
 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
1583 1584 1585
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @page: page number to read
1586 1587
 */
static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1588
			     int page)
1589
{
1590
	chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1591
	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1592
	return 0;
1593 1594 1595
}

/**
1596
 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
1597
 *			    with syndromes
1598 1599 1600
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @page: page number to read
1601 1602
 */
static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1603
				  int page)
1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629
{
	uint8_t *buf = chip->oob_poi;
	int length = mtd->oobsize;
	int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
	int eccsize = chip->ecc.size;
	uint8_t *bufpoi = buf;
	int i, toread, sndrnd = 0, pos;

	chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
	for (i = 0; i < chip->ecc.steps; i++) {
		if (sndrnd) {
			pos = eccsize + i * (eccsize + chunk);
			if (mtd->writesize > 512)
				chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
			else
				chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
		} else
			sndrnd = 1;
		toread = min_t(int, length, chunk);
		chip->read_buf(mtd, bufpoi, toread);
		bufpoi += toread;
		length -= toread;
	}
	if (length > 0)
		chip->read_buf(mtd, bufpoi, length);

1630
	return 0;
1631 1632 1633
}

/**
1634
 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
1635 1636 1637
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @page: page number to write
1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652
 */
static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
			      int page)
{
	int status = 0;
	const uint8_t *buf = chip->oob_poi;
	int length = mtd->oobsize;

	chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
	chip->write_buf(mtd, buf, length);
	/* Send command to program the OOB data */
	chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);

	status = chip->waitfunc(mtd, chip);

S
Savin Zlobec 已提交
1653
	return status & NAND_STATUS_FAIL ? -EIO : 0;
1654 1655 1656
}

/**
1657
 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
1658 1659 1660 1661
 *			     with syndrome - only for large page flash
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @page: page number to write
1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679
 */
static int nand_write_oob_syndrome(struct mtd_info *mtd,
				   struct nand_chip *chip, int page)
{
	int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
	int eccsize = chip->ecc.size, length = mtd->oobsize;
	int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
	const uint8_t *bufpoi = chip->oob_poi;

	/*
	 * data-ecc-data-ecc ... ecc-oob
	 * or
	 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
	 */
	if (!chip->ecc.prepad && !chip->ecc.postpad) {
		pos = steps * (eccsize + chunk);
		steps = 0;
	} else
1680
		pos = eccsize;
1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714

	chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
	for (i = 0; i < steps; i++) {
		if (sndcmd) {
			if (mtd->writesize <= 512) {
				uint32_t fill = 0xFFFFFFFF;

				len = eccsize;
				while (len > 0) {
					int num = min_t(int, len, 4);
					chip->write_buf(mtd, (uint8_t *)&fill,
							num);
					len -= num;
				}
			} else {
				pos = eccsize + i * (eccsize + chunk);
				chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
			}
		} else
			sndcmd = 1;
		len = min_t(int, length, chunk);
		chip->write_buf(mtd, bufpoi, len);
		bufpoi += len;
		length -= len;
	}
	if (length > 0)
		chip->write_buf(mtd, bufpoi, length);

	chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
	status = chip->waitfunc(mtd, chip);

	return status & NAND_STATUS_FAIL ? -EIO : 0;
}

L
Linus Torvalds 已提交
1715
/**
1716
 * nand_do_read_oob - [INTERN] NAND read out-of-band
1717 1718 1719
 * @mtd: MTD device structure
 * @from: offset to read from
 * @ops: oob operations description structure
L
Linus Torvalds 已提交
1720
 *
1721
 * NAND read out-of-band data from the spare area.
L
Linus Torvalds 已提交
1722
 */
1723 1724
static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
			    struct mtd_oob_ops *ops)
L
Linus Torvalds 已提交
1725
{
1726
	int page, realpage, chipnr;
1727
	struct nand_chip *chip = mtd->priv;
1728
	struct mtd_ecc_stats stats;
1729 1730
	int readlen = ops->ooblen;
	int len;
1731
	uint8_t *buf = ops->oobbuf;
1732
	int ret = 0;
1733

1734
	pr_debug("%s: from = 0x%08Lx, len = %i\n",
1735
			__func__, (unsigned long long)from, readlen);
L
Linus Torvalds 已提交
1736

1737 1738
	stats = mtd->ecc_stats;

1739
	if (ops->mode == MTD_OPS_AUTO_OOB)
1740
		len = chip->ecc.layout->oobavail;
1741 1742 1743 1744
	else
		len = mtd->oobsize;

	if (unlikely(ops->ooboffs >= len)) {
1745 1746
		pr_debug("%s: attempt to start read outside oob\n",
				__func__);
1747 1748 1749 1750 1751 1752 1753
		return -EINVAL;
	}

	/* Do not allow reads past end of device */
	if (unlikely(from >= mtd->size ||
		     ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
					(from >> chip->page_shift)) * len)) {
1754 1755
		pr_debug("%s: attempt to read beyond end of device\n",
				__func__);
1756 1757
		return -EINVAL;
	}
1758

1759
	chipnr = (int)(from >> chip->chip_shift);
1760
	chip->select_chip(mtd, chipnr);
L
Linus Torvalds 已提交
1761

1762 1763 1764
	/* Shift to get page */
	realpage = (int)(from >> chip->page_shift);
	page = realpage & chip->pagemask;
L
Linus Torvalds 已提交
1765

1766
	while (1) {
1767
		if (ops->mode == MTD_OPS_RAW)
1768
			ret = chip->ecc.read_oob_raw(mtd, chip, page);
1769
		else
1770 1771 1772 1773
			ret = chip->ecc.read_oob(mtd, chip, page);

		if (ret < 0)
			break;
1774 1775 1776

		len = min(len, readlen);
		buf = nand_transfer_oob(chip, buf, ops, len);
1777

1778 1779 1780 1781 1782 1783 1784 1785
		if (chip->options & NAND_NEED_READRDY) {
			/* Apply delay or wait for ready/busy pin */
			if (!chip->dev_ready)
				udelay(chip->chip_delay);
			else
				nand_wait_ready(mtd);
		}

1786
		readlen -= len;
S
Savin Zlobec 已提交
1787 1788 1789
		if (!readlen)
			break;

1790 1791 1792 1793 1794 1795 1796 1797 1798
		/* Increment page address */
		realpage++;

		page = realpage & chip->pagemask;
		/* Check, if we cross a chip boundary */
		if (!page) {
			chipnr++;
			chip->select_chip(mtd, -1);
			chip->select_chip(mtd, chipnr);
L
Linus Torvalds 已提交
1799 1800
		}
	}
1801
	chip->select_chip(mtd, -1);
L
Linus Torvalds 已提交
1802

1803 1804 1805 1806
	ops->oobretlen = ops->ooblen - readlen;

	if (ret < 0)
		return ret;
1807 1808 1809 1810 1811

	if (mtd->ecc_stats.failed - stats.failed)
		return -EBADMSG;

	return  mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
L
Linus Torvalds 已提交
1812 1813 1814
}

/**
1815
 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1816 1817 1818
 * @mtd: MTD device structure
 * @from: offset to read from
 * @ops: oob operation description structure
L
Linus Torvalds 已提交
1819
 *
1820
 * NAND read data and/or out-of-band data.
L
Linus Torvalds 已提交
1821
 */
1822 1823
static int nand_read_oob(struct mtd_info *mtd, loff_t from,
			 struct mtd_oob_ops *ops)
L
Linus Torvalds 已提交
1824
{
1825 1826 1827
	int ret = -ENOTSUPP;

	ops->retlen = 0;
L
Linus Torvalds 已提交
1828 1829

	/* Do not allow reads past end of device */
1830
	if (ops->datbuf && (from + ops->len) > mtd->size) {
1831 1832
		pr_debug("%s: attempt to read beyond end of device\n",
				__func__);
L
Linus Torvalds 已提交
1833 1834 1835
		return -EINVAL;
	}

1836
	nand_get_device(mtd, FL_READING);
L
Linus Torvalds 已提交
1837

1838
	switch (ops->mode) {
1839 1840 1841
	case MTD_OPS_PLACE_OOB:
	case MTD_OPS_AUTO_OOB:
	case MTD_OPS_RAW:
1842
		break;
L
Linus Torvalds 已提交
1843

1844 1845 1846
	default:
		goto out;
	}
L
Linus Torvalds 已提交
1847

1848 1849 1850 1851
	if (!ops->datbuf)
		ret = nand_do_read_oob(mtd, from, ops);
	else
		ret = nand_do_read_ops(mtd, from, ops);
1852

1853
out:
1854 1855 1856
	nand_release_device(mtd);
	return ret;
}
1857

L
Linus Torvalds 已提交
1858

1859
/**
1860
 * nand_write_page_raw - [INTERN] raw page write function
1861 1862 1863
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: data buffer
1864
 * @oob_required: must write chip->oob_poi to OOB
1865
 *
1866
 * Not for syndrome calculating ECC controllers, which use a special oob layout.
1867
 */
1868
static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1869
				const uint8_t *buf, int oob_required)
1870 1871
{
	chip->write_buf(mtd, buf, mtd->writesize);
1872 1873
	if (oob_required)
		chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1874 1875

	return 0;
L
Linus Torvalds 已提交
1876 1877
}

1878
/**
1879
 * nand_write_page_raw_syndrome - [INTERN] raw page write function
1880 1881 1882
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: data buffer
1883
 * @oob_required: must write chip->oob_poi to OOB
1884 1885 1886
 *
 * We need a special oob layout and handling even when ECC isn't checked.
 */
1887
static int nand_write_page_raw_syndrome(struct mtd_info *mtd,
1888
					struct nand_chip *chip,
1889
					const uint8_t *buf, int oob_required)
1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916
{
	int eccsize = chip->ecc.size;
	int eccbytes = chip->ecc.bytes;
	uint8_t *oob = chip->oob_poi;
	int steps, size;

	for (steps = chip->ecc.steps; steps > 0; steps--) {
		chip->write_buf(mtd, buf, eccsize);
		buf += eccsize;

		if (chip->ecc.prepad) {
			chip->write_buf(mtd, oob, chip->ecc.prepad);
			oob += chip->ecc.prepad;
		}

		chip->read_buf(mtd, oob, eccbytes);
		oob += eccbytes;

		if (chip->ecc.postpad) {
			chip->write_buf(mtd, oob, chip->ecc.postpad);
			oob += chip->ecc.postpad;
		}
	}

	size = mtd->oobsize - (oob - chip->oob_poi);
	if (size)
		chip->write_buf(mtd, oob, size);
1917 1918

	return 0;
1919
}
1920
/**
1921
 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
1922 1923 1924
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: data buffer
1925
 * @oob_required: must write chip->oob_poi to OOB
1926
 */
1927
static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1928
				  const uint8_t *buf, int oob_required)
1929
{
1930 1931 1932
	int i, eccsize = chip->ecc.size;
	int eccbytes = chip->ecc.bytes;
	int eccsteps = chip->ecc.steps;
1933
	uint8_t *ecc_calc = chip->buffers->ecccalc;
1934
	const uint8_t *p = buf;
1935
	uint32_t *eccpos = chip->ecc.layout->eccpos;
1936

1937
	/* Software ECC calculation */
1938 1939
	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
		chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1940

1941 1942
	for (i = 0; i < chip->ecc.total; i++)
		chip->oob_poi[eccpos[i]] = ecc_calc[i];
1943

1944
	return chip->ecc.write_page_raw(mtd, chip, buf, 1);
1945
}
1946

1947
/**
1948
 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
1949 1950 1951
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: data buffer
1952
 * @oob_required: must write chip->oob_poi to OOB
1953
 */
1954
static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1955
				  const uint8_t *buf, int oob_required)
1956 1957 1958 1959
{
	int i, eccsize = chip->ecc.size;
	int eccbytes = chip->ecc.bytes;
	int eccsteps = chip->ecc.steps;
1960
	uint8_t *ecc_calc = chip->buffers->ecccalc;
1961
	const uint8_t *p = buf;
1962
	uint32_t *eccpos = chip->ecc.layout->eccpos;
1963

1964 1965
	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
		chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
1966
		chip->write_buf(mtd, p, eccsize);
1967
		chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1968 1969
	}

1970 1971 1972 1973
	for (i = 0; i < chip->ecc.total; i++)
		chip->oob_poi[eccpos[i]] = ecc_calc[i];

	chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1974 1975

	return 0;
1976 1977
}

1978 1979 1980 1981 1982

/**
 * nand_write_subpage_hwecc - [REPLACABLE] hardware ECC based subpage write
 * @mtd:	mtd info structure
 * @chip:	nand chip info structure
1983
 * @offset:	column address of subpage within the page
1984
 * @data_len:	data length
1985
 * @buf:	data buffer
1986 1987 1988 1989
 * @oob_required: must write chip->oob_poi to OOB
 */
static int nand_write_subpage_hwecc(struct mtd_info *mtd,
				struct nand_chip *chip, uint32_t offset,
1990
				uint32_t data_len, const uint8_t *buf,
1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008
				int oob_required)
{
	uint8_t *oob_buf  = chip->oob_poi;
	uint8_t *ecc_calc = chip->buffers->ecccalc;
	int ecc_size      = chip->ecc.size;
	int ecc_bytes     = chip->ecc.bytes;
	int ecc_steps     = chip->ecc.steps;
	uint32_t *eccpos  = chip->ecc.layout->eccpos;
	uint32_t start_step = offset / ecc_size;
	uint32_t end_step   = (offset + data_len - 1) / ecc_size;
	int oob_bytes       = mtd->oobsize / ecc_steps;
	int step, i;

	for (step = 0; step < ecc_steps; step++) {
		/* configure controller for WRITE access */
		chip->ecc.hwctl(mtd, NAND_ECC_WRITE);

		/* write data (untouched subpages already masked by 0xFF) */
2009
		chip->write_buf(mtd, buf, ecc_size);
2010 2011 2012 2013 2014

		/* mask ECC of un-touched subpages by padding 0xFF */
		if ((step < start_step) || (step > end_step))
			memset(ecc_calc, 0xff, ecc_bytes);
		else
2015
			chip->ecc.calculate(mtd, buf, ecc_calc);
2016 2017 2018 2019 2020 2021

		/* mask OOB of un-touched subpages by padding 0xFF */
		/* if oob_required, preserve OOB metadata of written subpage */
		if (!oob_required || (step < start_step) || (step > end_step))
			memset(oob_buf, 0xff, oob_bytes);

2022
		buf += ecc_size;
2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039
		ecc_calc += ecc_bytes;
		oob_buf  += oob_bytes;
	}

	/* copy calculated ECC for whole page to chip->buffer->oob */
	/* this include masked-value(0xFF) for unwritten subpages */
	ecc_calc = chip->buffers->ecccalc;
	for (i = 0; i < chip->ecc.total; i++)
		chip->oob_poi[eccpos[i]] = ecc_calc[i];

	/* write OOB buffer to NAND device */
	chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);

	return 0;
}


2040
/**
2041
 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
2042 2043 2044
 * @mtd: mtd info structure
 * @chip: nand chip info structure
 * @buf: data buffer
2045
 * @oob_required: must write chip->oob_poi to OOB
L
Linus Torvalds 已提交
2046
 *
2047 2048
 * The hw generator calculates the error syndrome automatically. Therefore we
 * need a special oob layout and handling.
2049
 */
2050
static int nand_write_page_syndrome(struct mtd_info *mtd,
2051 2052
				    struct nand_chip *chip,
				    const uint8_t *buf, int oob_required)
L
Linus Torvalds 已提交
2053
{
2054 2055 2056 2057 2058
	int i, eccsize = chip->ecc.size;
	int eccbytes = chip->ecc.bytes;
	int eccsteps = chip->ecc.steps;
	const uint8_t *p = buf;
	uint8_t *oob = chip->oob_poi;
L
Linus Torvalds 已提交
2059

2060
	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
L
Linus Torvalds 已提交
2061

2062 2063
		chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
		chip->write_buf(mtd, p, eccsize);
2064

2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076
		if (chip->ecc.prepad) {
			chip->write_buf(mtd, oob, chip->ecc.prepad);
			oob += chip->ecc.prepad;
		}

		chip->ecc.calculate(mtd, p, oob);
		chip->write_buf(mtd, oob, eccbytes);
		oob += eccbytes;

		if (chip->ecc.postpad) {
			chip->write_buf(mtd, oob, chip->ecc.postpad);
			oob += chip->ecc.postpad;
L
Linus Torvalds 已提交
2077 2078
		}
	}
2079 2080

	/* Calculate remaining oob bytes */
2081
	i = mtd->oobsize - (oob - chip->oob_poi);
2082 2083
	if (i)
		chip->write_buf(mtd, oob, i);
2084 2085

	return 0;
2086 2087 2088
}

/**
2089
 * nand_write_page - [REPLACEABLE] write one page
2090 2091
 * @mtd: MTD device structure
 * @chip: NAND chip descriptor
2092 2093
 * @offset: address offset within the page
 * @data_len: length of actual data to be written
2094
 * @buf: the data to write
2095
 * @oob_required: must write chip->oob_poi to OOB
2096 2097 2098
 * @page: page number to write
 * @cached: cached programming
 * @raw: use _raw version of write_page
2099 2100
 */
static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
2101 2102
		uint32_t offset, int data_len, const uint8_t *buf,
		int oob_required, int page, int cached, int raw)
2103
{
2104 2105 2106 2107 2108 2109 2110
	int status, subpage;

	if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
		chip->ecc.write_subpage)
		subpage = offset || (data_len < mtd->writesize);
	else
		subpage = 0;
2111 2112 2113

	chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);

2114
	if (unlikely(raw))
2115 2116 2117 2118 2119
		status = chip->ecc.write_page_raw(mtd, chip, buf,
							oob_required);
	else if (subpage)
		status = chip->ecc.write_subpage(mtd, chip, offset, data_len,
							 buf, oob_required);
2120
	else
2121 2122 2123 2124
		status = chip->ecc.write_page(mtd, chip, buf, oob_required);

	if (status < 0)
		return status;
2125 2126

	/*
2127
	 * Cached progamming disabled for now. Not sure if it's worth the
2128
	 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s).
2129 2130 2131
	 */
	cached = 0;

2132
	if (!cached || !NAND_HAS_CACHEPROG(chip)) {
2133 2134

		chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
2135
		status = chip->waitfunc(mtd, chip);
2136 2137
		/*
		 * See if operation failed and additional status checks are
2138
		 * available.
2139 2140 2141 2142 2143 2144 2145 2146 2147
		 */
		if ((status & NAND_STATUS_FAIL) && (chip->errstat))
			status = chip->errstat(mtd, chip, FL_WRITING, status,
					       page);

		if (status & NAND_STATUS_FAIL)
			return -EIO;
	} else {
		chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
2148
		status = chip->waitfunc(mtd, chip);
2149 2150 2151
	}

	return 0;
L
Linus Torvalds 已提交
2152 2153
}

2154
/**
2155
 * nand_fill_oob - [INTERN] Transfer client buffer to oob
2156
 * @mtd: MTD device structure
2157 2158 2159
 * @oob: oob data buffer
 * @len: oob data write length
 * @ops: oob ops structure
2160
 */
2161 2162
static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,
			      struct mtd_oob_ops *ops)
2163
{
2164 2165 2166 2167 2168 2169 2170 2171
	struct nand_chip *chip = mtd->priv;

	/*
	 * Initialise to all 0xFF, to avoid the possibility of left over OOB
	 * data from a previous OOB read.
	 */
	memset(chip->oob_poi, 0xff, mtd->oobsize);

2172
	switch (ops->mode) {
2173

2174 2175
	case MTD_OPS_PLACE_OOB:
	case MTD_OPS_RAW:
2176 2177 2178
		memcpy(chip->oob_poi + ops->ooboffs, oob, len);
		return oob + len;

2179
	case MTD_OPS_AUTO_OOB: {
2180
		struct nand_oobfree *free = chip->ecc.layout->oobfree;
2181 2182
		uint32_t boffs = 0, woffs = ops->ooboffs;
		size_t bytes = 0;
2183

2184
		for (; free->length && len; free++, len -= bytes) {
2185
			/* Write request not from offset 0? */
2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198
			if (unlikely(woffs)) {
				if (woffs >= free->length) {
					woffs -= free->length;
					continue;
				}
				boffs = free->offset + woffs;
				bytes = min_t(size_t, len,
					      (free->length - woffs));
				woffs = 0;
			} else {
				bytes = min_t(size_t, len, free->length);
				boffs = free->offset;
			}
2199
			memcpy(chip->oob_poi + boffs, oob, bytes);
2200 2201 2202 2203 2204 2205 2206 2207 2208 2209
			oob += bytes;
		}
		return oob;
	}
	default:
		BUG();
	}
	return NULL;
}

2210
#define NOTALIGNED(x)	((x & (chip->subpagesize - 1)) != 0)
L
Linus Torvalds 已提交
2211 2212

/**
2213
 * nand_do_write_ops - [INTERN] NAND write with ECC
2214 2215 2216
 * @mtd: MTD device structure
 * @to: offset to write to
 * @ops: oob operations description structure
L
Linus Torvalds 已提交
2217
 *
2218
 * NAND write with ECC.
L
Linus Torvalds 已提交
2219
 */
2220 2221
static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
			     struct mtd_oob_ops *ops)
L
Linus Torvalds 已提交
2222
{
2223
	int chipnr, realpage, page, blockmask, column;
2224
	struct nand_chip *chip = mtd->priv;
2225
	uint32_t writelen = ops->len;
2226 2227

	uint32_t oobwritelen = ops->ooblen;
2228
	uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ?
2229 2230
				mtd->oobavail : mtd->oobsize;

2231 2232
	uint8_t *oob = ops->oobbuf;
	uint8_t *buf = ops->datbuf;
2233
	int ret;
2234
	int oob_required = oob ? 1 : 0;
L
Linus Torvalds 已提交
2235

2236
	ops->retlen = 0;
2237 2238
	if (!writelen)
		return 0;
L
Linus Torvalds 已提交
2239

2240
	/* Reject writes, which are not page aligned */
2241
	if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
2242 2243
		pr_notice("%s: attempt to write non page aligned data\n",
			   __func__);
L
Linus Torvalds 已提交
2244 2245 2246
		return -EINVAL;
	}

2247
	column = to & (mtd->writesize - 1);
L
Linus Torvalds 已提交
2248

2249 2250 2251
	chipnr = (int)(to >> chip->chip_shift);
	chip->select_chip(mtd, chipnr);

L
Linus Torvalds 已提交
2252
	/* Check, if it is write protected */
2253 2254 2255 2256
	if (nand_check_wp(mtd)) {
		ret = -EIO;
		goto err_out;
	}
L
Linus Torvalds 已提交
2257

2258 2259 2260 2261 2262 2263
	realpage = (int)(to >> chip->page_shift);
	page = realpage & chip->pagemask;
	blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;

	/* Invalidate the page cache, when we write to the cached page */
	if (to <= (chip->pagebuf << chip->page_shift) &&
2264
	    (chip->pagebuf << chip->page_shift) < (to + ops->len))
2265
		chip->pagebuf = -1;
2266

2267
	/* Don't allow multipage oob writes with offset */
2268 2269 2270 2271
	if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {
		ret = -EINVAL;
		goto err_out;
	}
2272

2273
	while (1) {
2274
		int bytes = mtd->writesize;
2275
		int cached = writelen > bytes && page != blockmask;
2276 2277
		uint8_t *wbuf = buf;

2278
		/* Partial page write? */
2279 2280 2281 2282 2283 2284 2285 2286
		if (unlikely(column || writelen < (mtd->writesize - 1))) {
			cached = 0;
			bytes = min_t(int, bytes - column, (int) writelen);
			chip->pagebuf = -1;
			memset(chip->buffers->databuf, 0xff, mtd->writesize);
			memcpy(&chip->buffers->databuf[column], buf, bytes);
			wbuf = chip->buffers->databuf;
		}
L
Linus Torvalds 已提交
2287

2288 2289
		if (unlikely(oob)) {
			size_t len = min(oobwritelen, oobmaxlen);
2290
			oob = nand_fill_oob(mtd, oob, len, ops);
2291
			oobwritelen -= len;
2292 2293 2294
		} else {
			/* We still need to erase leftover OOB data */
			memset(chip->oob_poi, 0xff, mtd->oobsize);
2295
		}
2296 2297 2298
		ret = chip->write_page(mtd, chip, column, bytes, wbuf,
					oob_required, page, cached,
					(ops->mode == MTD_OPS_RAW));
2299 2300 2301 2302 2303 2304 2305
		if (ret)
			break;

		writelen -= bytes;
		if (!writelen)
			break;

2306
		column = 0;
2307 2308 2309 2310 2311 2312 2313 2314 2315
		buf += bytes;
		realpage++;

		page = realpage & chip->pagemask;
		/* Check, if we cross a chip boundary */
		if (!page) {
			chipnr++;
			chip->select_chip(mtd, -1);
			chip->select_chip(mtd, chipnr);
L
Linus Torvalds 已提交
2316 2317
		}
	}
2318 2319

	ops->retlen = ops->len - writelen;
2320 2321
	if (unlikely(oob))
		ops->oobretlen = ops->ooblen;
2322 2323 2324

err_out:
	chip->select_chip(mtd, -1);
L
Linus Torvalds 已提交
2325 2326 2327
	return ret;
}

2328 2329
/**
 * panic_nand_write - [MTD Interface] NAND write with ECC
2330 2331 2332 2333 2334
 * @mtd: MTD device structure
 * @to: offset to write to
 * @len: number of bytes to write
 * @retlen: pointer to variable to store the number of written bytes
 * @buf: the data to write
2335 2336 2337 2338 2339 2340 2341 2342
 *
 * NAND write with ECC. Used when performing writes in interrupt context, this
 * may for example be called by mtdoops when writing an oops while in panic.
 */
static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
			    size_t *retlen, const uint8_t *buf)
{
	struct nand_chip *chip = mtd->priv;
2343
	struct mtd_oob_ops ops;
2344 2345
	int ret;

2346
	/* Wait for the device to get ready */
2347 2348
	panic_nand_wait(mtd, chip, 400);

2349
	/* Grab the device */
2350 2351
	panic_nand_get_device(chip, mtd, FL_WRITING);

2352 2353 2354
	ops.len = len;
	ops.datbuf = (uint8_t *)buf;
	ops.oobbuf = NULL;
2355
	ops.mode = MTD_OPS_PLACE_OOB;
2356

2357
	ret = nand_do_write_ops(mtd, to, &ops);
2358

2359
	*retlen = ops.retlen;
2360 2361 2362
	return ret;
}

2363
/**
2364
 * nand_write - [MTD Interface] NAND write with ECC
2365 2366 2367 2368 2369
 * @mtd: MTD device structure
 * @to: offset to write to
 * @len: number of bytes to write
 * @retlen: pointer to variable to store the number of written bytes
 * @buf: the data to write
2370
 *
2371
 * NAND write with ECC.
2372
 */
2373 2374
static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
			  size_t *retlen, const uint8_t *buf)
2375
{
2376
	struct mtd_oob_ops ops;
2377 2378
	int ret;

2379
	nand_get_device(mtd, FL_WRITING);
2380 2381 2382
	ops.len = len;
	ops.datbuf = (uint8_t *)buf;
	ops.oobbuf = NULL;
2383
	ops.mode = MTD_OPS_PLACE_OOB;
2384 2385
	ret = nand_do_write_ops(mtd, to, &ops);
	*retlen = ops.retlen;
2386
	nand_release_device(mtd);
2387
	return ret;
2388
}
2389

L
Linus Torvalds 已提交
2390
/**
2391
 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
2392 2393 2394
 * @mtd: MTD device structure
 * @to: offset to write to
 * @ops: oob operation description structure
L
Linus Torvalds 已提交
2395
 *
2396
 * NAND write out-of-band.
L
Linus Torvalds 已提交
2397
 */
2398 2399
static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
			     struct mtd_oob_ops *ops)
L
Linus Torvalds 已提交
2400
{
2401
	int chipnr, page, status, len;
2402
	struct nand_chip *chip = mtd->priv;
L
Linus Torvalds 已提交
2403

2404
	pr_debug("%s: to = 0x%08x, len = %i\n",
2405
			 __func__, (unsigned int)to, (int)ops->ooblen);
L
Linus Torvalds 已提交
2406

2407
	if (ops->mode == MTD_OPS_AUTO_OOB)
2408 2409 2410 2411
		len = chip->ecc.layout->oobavail;
	else
		len = mtd->oobsize;

L
Linus Torvalds 已提交
2412
	/* Do not allow write past end of page */
2413
	if ((ops->ooboffs + ops->ooblen) > len) {
2414 2415
		pr_debug("%s: attempt to write past end of page\n",
				__func__);
L
Linus Torvalds 已提交
2416 2417 2418
		return -EINVAL;
	}

2419
	if (unlikely(ops->ooboffs >= len)) {
2420 2421
		pr_debug("%s: attempt to start write outside oob\n",
				__func__);
2422 2423 2424
		return -EINVAL;
	}

2425
	/* Do not allow write past end of device */
2426 2427 2428 2429
	if (unlikely(to >= mtd->size ||
		     ops->ooboffs + ops->ooblen >
			((mtd->size >> chip->page_shift) -
			 (to >> chip->page_shift)) * len)) {
2430 2431
		pr_debug("%s: attempt to write beyond end of device\n",
				__func__);
2432 2433 2434
		return -EINVAL;
	}

2435
	chipnr = (int)(to >> chip->chip_shift);
2436
	chip->select_chip(mtd, chipnr);
L
Linus Torvalds 已提交
2437

2438 2439 2440 2441 2442 2443 2444 2445 2446
	/* Shift to get page */
	page = (int)(to >> chip->page_shift);

	/*
	 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
	 * of my DiskOnChip 2000 test units) will clear the whole data page too
	 * if we don't do this. I have no clue why, but I seem to have 'fixed'
	 * it in the doc2000 driver in August 1999.  dwmw2.
	 */
2447
	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
L
Linus Torvalds 已提交
2448 2449

	/* Check, if it is write protected */
2450 2451
	if (nand_check_wp(mtd)) {
		chip->select_chip(mtd, -1);
2452
		return -EROFS;
2453
	}
2454

L
Linus Torvalds 已提交
2455
	/* Invalidate the page cache, if we write to the cached page */
2456 2457
	if (page == chip->pagebuf)
		chip->pagebuf = -1;
L
Linus Torvalds 已提交
2458

2459
	nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);
2460

2461
	if (ops->mode == MTD_OPS_RAW)
2462 2463 2464
		status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);
	else
		status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
L
Linus Torvalds 已提交
2465

2466 2467
	chip->select_chip(mtd, -1);

2468 2469
	if (status)
		return status;
L
Linus Torvalds 已提交
2470

2471
	ops->oobretlen = ops->ooblen;
L
Linus Torvalds 已提交
2472

2473
	return 0;
2474 2475 2476 2477
}

/**
 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2478 2479 2480
 * @mtd: MTD device structure
 * @to: offset to write to
 * @ops: oob operation description structure
2481 2482 2483 2484 2485 2486 2487 2488 2489
 */
static int nand_write_oob(struct mtd_info *mtd, loff_t to,
			  struct mtd_oob_ops *ops)
{
	int ret = -ENOTSUPP;

	ops->retlen = 0;

	/* Do not allow writes past end of device */
2490
	if (ops->datbuf && (to + ops->len) > mtd->size) {
2491 2492
		pr_debug("%s: attempt to write beyond end of device\n",
				__func__);
2493 2494 2495
		return -EINVAL;
	}

2496
	nand_get_device(mtd, FL_WRITING);
2497

2498
	switch (ops->mode) {
2499 2500 2501
	case MTD_OPS_PLACE_OOB:
	case MTD_OPS_AUTO_OOB:
	case MTD_OPS_RAW:
2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512
		break;

	default:
		goto out;
	}

	if (!ops->datbuf)
		ret = nand_do_write_oob(mtd, to, ops);
	else
		ret = nand_do_write_ops(mtd, to, ops);

2513
out:
L
Linus Torvalds 已提交
2514 2515 2516 2517 2518
	nand_release_device(mtd);
	return ret;
}

/**
2519
 * single_erase_cmd - [GENERIC] NAND standard block erase command function
2520 2521
 * @mtd: MTD device structure
 * @page: the page address of the block which will be erased
L
Linus Torvalds 已提交
2522
 *
2523
 * Standard erase command for NAND chips.
L
Linus Torvalds 已提交
2524
 */
2525
static void single_erase_cmd(struct mtd_info *mtd, int page)
L
Linus Torvalds 已提交
2526
{
2527
	struct nand_chip *chip = mtd->priv;
L
Linus Torvalds 已提交
2528
	/* Send commands to erase a block */
2529 2530
	chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
	chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
L
Linus Torvalds 已提交
2531 2532 2533 2534
}

/**
 * nand_erase - [MTD Interface] erase block(s)
2535 2536
 * @mtd: MTD device structure
 * @instr: erase instruction
L
Linus Torvalds 已提交
2537
 *
2538
 * Erase one ore more blocks.
L
Linus Torvalds 已提交
2539
 */
2540
static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
L
Linus Torvalds 已提交
2541
{
2542
	return nand_erase_nand(mtd, instr, 0);
L
Linus Torvalds 已提交
2543
}
2544

L
Linus Torvalds 已提交
2545
/**
2546
 * nand_erase_nand - [INTERN] erase block(s)
2547 2548 2549
 * @mtd: MTD device structure
 * @instr: erase instruction
 * @allowbbt: allow erasing the bbt area
L
Linus Torvalds 已提交
2550
 *
2551
 * Erase one ore more blocks.
L
Linus Torvalds 已提交
2552
 */
2553 2554
int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
		    int allowbbt)
L
Linus Torvalds 已提交
2555
{
2556
	int page, status, pages_per_block, ret, chipnr;
2557
	struct nand_chip *chip = mtd->priv;
2558
	loff_t len;
L
Linus Torvalds 已提交
2559

2560 2561 2562
	pr_debug("%s: start = 0x%012llx, len = %llu\n",
			__func__, (unsigned long long)instr->addr,
			(unsigned long long)instr->len);
L
Linus Torvalds 已提交
2563

2564
	if (check_offs_len(mtd, instr->addr, instr->len))
L
Linus Torvalds 已提交
2565 2566 2567
		return -EINVAL;

	/* Grab the lock and see if the device is available */
2568
	nand_get_device(mtd, FL_ERASING);
L
Linus Torvalds 已提交
2569 2570

	/* Shift to get first page */
2571 2572
	page = (int)(instr->addr >> chip->page_shift);
	chipnr = (int)(instr->addr >> chip->chip_shift);
L
Linus Torvalds 已提交
2573 2574

	/* Calculate pages in each block */
2575
	pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
L
Linus Torvalds 已提交
2576 2577

	/* Select the NAND device */
2578
	chip->select_chip(mtd, chipnr);
L
Linus Torvalds 已提交
2579 2580 2581

	/* Check, if it is write protected */
	if (nand_check_wp(mtd)) {
2582 2583
		pr_debug("%s: device is write protected!\n",
				__func__);
L
Linus Torvalds 已提交
2584 2585 2586 2587 2588 2589 2590 2591 2592 2593
		instr->state = MTD_ERASE_FAILED;
		goto erase_exit;
	}

	/* Loop through the pages */
	len = instr->len;

	instr->state = MTD_ERASING;

	while (len) {
W
Wolfram Sang 已提交
2594
		/* Check if we have a bad block, we do not erase bad blocks! */
2595 2596
		if (nand_block_checkbad(mtd, ((loff_t) page) <<
					chip->page_shift, 0, allowbbt)) {
2597 2598
			pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
				    __func__, page);
L
Linus Torvalds 已提交
2599 2600 2601
			instr->state = MTD_ERASE_FAILED;
			goto erase_exit;
		}
2602

2603 2604
		/*
		 * Invalidate the page cache, if we erase the block which
2605
		 * contains the current cached page.
2606 2607 2608 2609
		 */
		if (page <= chip->pagebuf && chip->pagebuf <
		    (page + pages_per_block))
			chip->pagebuf = -1;
L
Linus Torvalds 已提交
2610

2611
		chip->erase_cmd(mtd, page & chip->pagemask);
2612

2613
		status = chip->waitfunc(mtd, chip);
L
Linus Torvalds 已提交
2614

2615 2616 2617 2618 2619 2620 2621
		/*
		 * See if operation failed and additional status checks are
		 * available
		 */
		if ((status & NAND_STATUS_FAIL) && (chip->errstat))
			status = chip->errstat(mtd, chip, FL_ERASING,
					       status, page);
2622

L
Linus Torvalds 已提交
2623
		/* See if block erase succeeded */
2624
		if (status & NAND_STATUS_FAIL) {
2625 2626
			pr_debug("%s: failed erase, page 0x%08x\n",
					__func__, page);
L
Linus Torvalds 已提交
2627
			instr->state = MTD_ERASE_FAILED;
2628 2629
			instr->fail_addr =
				((loff_t)page << chip->page_shift);
L
Linus Torvalds 已提交
2630 2631
			goto erase_exit;
		}
2632

L
Linus Torvalds 已提交
2633
		/* Increment page address and decrement length */
2634
		len -= (1ULL << chip->phys_erase_shift);
L
Linus Torvalds 已提交
2635 2636 2637
		page += pages_per_block;

		/* Check, if we cross a chip boundary */
2638
		if (len && !(page & chip->pagemask)) {
L
Linus Torvalds 已提交
2639
			chipnr++;
2640 2641
			chip->select_chip(mtd, -1);
			chip->select_chip(mtd, chipnr);
L
Linus Torvalds 已提交
2642 2643 2644 2645
		}
	}
	instr->state = MTD_ERASE_DONE;

2646
erase_exit:
L
Linus Torvalds 已提交
2647 2648 2649 2650

	ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;

	/* Deselect and wake up anyone waiting on the device */
2651
	chip->select_chip(mtd, -1);
L
Linus Torvalds 已提交
2652 2653
	nand_release_device(mtd);

2654 2655 2656 2657
	/* Do call back function */
	if (!ret)
		mtd_erase_callback(instr);

L
Linus Torvalds 已提交
2658 2659 2660 2661 2662 2663
	/* Return more or less happy */
	return ret;
}

/**
 * nand_sync - [MTD Interface] sync
2664
 * @mtd: MTD device structure
L
Linus Torvalds 已提交
2665
 *
2666
 * Sync is actually a wait for chip ready function.
L
Linus Torvalds 已提交
2667
 */
2668
static void nand_sync(struct mtd_info *mtd)
L
Linus Torvalds 已提交
2669
{
2670
	pr_debug("%s: called\n", __func__);
L
Linus Torvalds 已提交
2671 2672

	/* Grab the lock and see if the device is available */
2673
	nand_get_device(mtd, FL_SYNCING);
L
Linus Torvalds 已提交
2674
	/* Release it and go back */
2675
	nand_release_device(mtd);
L
Linus Torvalds 已提交
2676 2677 2678
}

/**
2679
 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2680 2681
 * @mtd: MTD device structure
 * @offs: offset relative to mtd start
L
Linus Torvalds 已提交
2682
 */
2683
static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
L
Linus Torvalds 已提交
2684
{
2685
	return nand_block_checkbad(mtd, offs, 1, 0);
L
Linus Torvalds 已提交
2686 2687 2688
}

/**
2689
 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2690 2691
 * @mtd: MTD device structure
 * @ofs: offset relative to mtd start
L
Linus Torvalds 已提交
2692
 */
2693
static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
L
Linus Torvalds 已提交
2694 2695 2696
{
	int ret;

2697 2698
	ret = nand_block_isbad(mtd, ofs);
	if (ret) {
2699
		/* If it was bad already, return success and do nothing */
L
Linus Torvalds 已提交
2700 2701
		if (ret > 0)
			return 0;
2702 2703
		return ret;
	}
L
Linus Torvalds 已提交
2704

2705
	return nand_block_markbad_lowlevel(mtd, ofs);
L
Linus Torvalds 已提交
2706 2707
}

2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719
/**
 * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand
 * @mtd: MTD device structure
 * @chip: nand chip info structure
 * @addr: feature address.
 * @subfeature_param: the subfeature parameters, a four bytes array.
 */
static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
			int addr, uint8_t *subfeature_param)
{
	int status;

2720 2721 2722
	if (!chip->onfi_version ||
	    !(le16_to_cpu(chip->onfi_params.opt_cmd)
	      & ONFI_OPT_CMD_SET_GET_FEATURES))
2723 2724 2725 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742
		return -EINVAL;

	chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);
	chip->write_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
	status = chip->waitfunc(mtd, chip);
	if (status & NAND_STATUS_FAIL)
		return -EIO;
	return 0;
}

/**
 * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand
 * @mtd: MTD device structure
 * @chip: nand chip info structure
 * @addr: feature address.
 * @subfeature_param: the subfeature parameters, a four bytes array.
 */
static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
			int addr, uint8_t *subfeature_param)
{
2743 2744 2745
	if (!chip->onfi_version ||
	    !(le16_to_cpu(chip->onfi_params.opt_cmd)
	      & ONFI_OPT_CMD_SET_GET_FEATURES))
2746 2747 2748 2749 2750 2751 2752 2753 2754 2755
		return -EINVAL;

	/* clear the sub feature parameters */
	memset(subfeature_param, 0, ONFI_SUBFEATURE_PARAM_LEN);

	chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);
	chip->read_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
	return 0;
}

2756 2757
/**
 * nand_suspend - [MTD Interface] Suspend the NAND flash
2758
 * @mtd: MTD device structure
2759 2760 2761
 */
static int nand_suspend(struct mtd_info *mtd)
{
2762
	return nand_get_device(mtd, FL_PM_SUSPENDED);
2763 2764 2765 2766
}

/**
 * nand_resume - [MTD Interface] Resume the NAND flash
2767
 * @mtd: MTD device structure
2768 2769 2770
 */
static void nand_resume(struct mtd_info *mtd)
{
2771
	struct nand_chip *chip = mtd->priv;
2772

2773
	if (chip->state == FL_PM_SUSPENDED)
2774 2775
		nand_release_device(mtd);
	else
2776 2777
		pr_err("%s called for a chip which is not in suspended state\n",
			__func__);
2778 2779
}

2780
/* Set default functions */
2781
static void nand_set_defaults(struct nand_chip *chip, int busw)
T
Thomas Gleixner 已提交
2782
{
L
Linus Torvalds 已提交
2783
	/* check for proper chip_delay setup, set 20us if not */
2784 2785
	if (!chip->chip_delay)
		chip->chip_delay = 20;
L
Linus Torvalds 已提交
2786 2787

	/* check, if a user supplied command function given */
2788 2789
	if (chip->cmdfunc == NULL)
		chip->cmdfunc = nand_command;
L
Linus Torvalds 已提交
2790 2791

	/* check, if a user supplied wait function given */
2792 2793 2794 2795 2796
	if (chip->waitfunc == NULL)
		chip->waitfunc = nand_wait;

	if (!chip->select_chip)
		chip->select_chip = nand_select_chip;
2797

2798 2799 2800 2801 2802 2803
	/* set for ONFI nand */
	if (!chip->onfi_set_features)
		chip->onfi_set_features = nand_onfi_set_features;
	if (!chip->onfi_get_features)
		chip->onfi_get_features = nand_onfi_get_features;

2804 2805
	/* If called twice, pointers that depend on busw may need to be reset */
	if (!chip->read_byte || chip->read_byte == nand_read_byte)
2806 2807 2808 2809 2810 2811 2812
		chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
	if (!chip->read_word)
		chip->read_word = nand_read_word;
	if (!chip->block_bad)
		chip->block_bad = nand_block_bad;
	if (!chip->block_markbad)
		chip->block_markbad = nand_default_block_markbad;
2813
	if (!chip->write_buf || chip->write_buf == nand_write_buf)
2814
		chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2815
	if (!chip->read_buf || chip->read_buf == nand_read_buf)
2816 2817 2818
		chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
	if (!chip->scan_bbt)
		chip->scan_bbt = nand_default_bbt;
2819 2820 2821 2822 2823 2824 2825

	if (!chip->controller) {
		chip->controller = &chip->hwcontrol;
		spin_lock_init(&chip->controller->lock);
		init_waitqueue_head(&chip->controller->wq);
	}

T
Thomas Gleixner 已提交
2826 2827
}

2828
/* Sanitize ONFI strings so we can safely print them */
2829 2830 2831 2832
static void sanitize_string(uint8_t *s, size_t len)
{
	ssize_t i;

2833
	/* Null terminate */
2834 2835
	s[len - 1] = 0;

2836
	/* Remove non printable chars */
2837 2838 2839 2840 2841
	for (i = 0; i < len - 1; i++) {
		if (s[i] < ' ' || s[i] > 127)
			s[i] = '?';
	}

2842
	/* Remove trailing spaces */
2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 2854 2855 2856 2857
	strim(s);
}

static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
{
	int i;
	while (len--) {
		crc ^= *p++ << 8;
		for (i = 0; i < 8; i++)
			crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
	}

	return crc;
}

2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871
/* Parse the Extended Parameter Page. */
static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,
		struct nand_chip *chip, struct nand_onfi_params *p)
{
	struct onfi_ext_param_page *ep;
	struct onfi_ext_section *s;
	struct onfi_ext_ecc_info *ecc;
	uint8_t *cursor;
	int ret = -EINVAL;
	int len;
	int i;

	len = le16_to_cpu(p->ext_param_page_length) * 16;
	ep = kmalloc(len, GFP_KERNEL);
2872 2873
	if (!ep)
		return -ENOMEM;
2874 2875 2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914

	/* Send our own NAND_CMD_PARAM. */
	chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);

	/* Use the Change Read Column command to skip the ONFI param pages. */
	chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
			sizeof(*p) * p->num_of_param_pages , -1);

	/* Read out the Extended Parameter Page. */
	chip->read_buf(mtd, (uint8_t *)ep, len);
	if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2)
		!= le16_to_cpu(ep->crc))) {
		pr_debug("fail in the CRC.\n");
		goto ext_out;
	}

	/*
	 * Check the signature.
	 * Do not strictly follow the ONFI spec, maybe changed in future.
	 */
	if (strncmp(ep->sig, "EPPS", 4)) {
		pr_debug("The signature is invalid.\n");
		goto ext_out;
	}

	/* find the ECC section. */
	cursor = (uint8_t *)(ep + 1);
	for (i = 0; i < ONFI_EXT_SECTION_MAX; i++) {
		s = ep->sections + i;
		if (s->type == ONFI_SECTION_TYPE_2)
			break;
		cursor += s->length * 16;
	}
	if (i == ONFI_EXT_SECTION_MAX) {
		pr_debug("We can not find the ECC section.\n");
		goto ext_out;
	}

	/* get the info we want. */
	ecc = (struct onfi_ext_ecc_info *)cursor;

2915 2916 2917
	if (!ecc->codeword_size) {
		pr_debug("Invalid codeword size\n");
		goto ext_out;
2918 2919
	}

2920 2921
	chip->ecc_strength_ds = ecc->ecc_bits;
	chip->ecc_step_ds = 1 << ecc->codeword_size;
2922
	ret = 0;
2923 2924 2925 2926 2927 2928

ext_out:
	kfree(ep);
	return ret;
}

2929
/*
2930
 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
2931 2932
 */
static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
2933
					int *busw)
2934 2935 2936 2937 2938
{
	struct nand_onfi_params *p = &chip->onfi_params;
	int i;
	int val;

2939
	/* Try ONFI for unknown chip or LP */
2940 2941 2942 2943 2944
	chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
	if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
		chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')
		return 0;

2945 2946 2947 2948 2949 2950 2951 2952 2953
	/*
	 * ONFI must be probed in 8-bit mode or with NAND_BUSWIDTH_AUTO, not
	 * with NAND_BUSWIDTH_16
	 */
	if (chip->options & NAND_BUSWIDTH_16) {
		pr_err("ONFI cannot be probed in 16-bit mode; aborting\n");
		return 0;
	}

2954 2955 2956 2957 2958 2959 2960 2961 2962
	chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
	for (i = 0; i < 3; i++) {
		chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
		if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
				le16_to_cpu(p->crc)) {
			break;
		}
	}

2963 2964
	if (i == 3) {
		pr_err("Could not find valid ONFI parameter page; aborting\n");
2965
		return 0;
2966
	}
2967

2968
	/* Check version */
2969
	val = le16_to_cpu(p->revision);
2970 2971 2972
	if (val & (1 << 5))
		chip->onfi_version = 23;
	else if (val & (1 << 4))
2973 2974 2975 2976 2977
		chip->onfi_version = 22;
	else if (val & (1 << 3))
		chip->onfi_version = 21;
	else if (val & (1 << 2))
		chip->onfi_version = 20;
2978
	else if (val & (1 << 1))
2979
		chip->onfi_version = 10;
2980 2981

	if (!chip->onfi_version) {
2982
		pr_info("%s: unsupported ONFI version: %d\n", __func__, val);
2983 2984
		return 0;
	}
2985 2986 2987 2988 2989

	sanitize_string(p->manufacturer, sizeof(p->manufacturer));
	sanitize_string(p->model, sizeof(p->model));
	if (!mtd->name)
		mtd->name = p->model;
2990

2991
	mtd->writesize = le32_to_cpu(p->byte_per_page);
2992 2993 2994 2995 2996 2997 2998 2999 3000

	/*
	 * pages_per_block and blocks_per_lun may not be a power-of-2 size
	 * (don't ask me who thought of this...). MTD assumes that these
	 * dimensions will be power-of-2, so just truncate the remaining area.
	 */
	mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);
	mtd->erasesize *= mtd->writesize;

3001
	mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
3002 3003 3004

	/* See erasesize comment */
	chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
3005
	chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
3006
	chip->bits_per_cell = p->bits_per_cell;
3007 3008

	if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS)
3009
		*busw = NAND_BUSWIDTH_16;
3010 3011
	else
		*busw = 0;
3012

3013 3014 3015
	if (p->ecc_bits != 0xff) {
		chip->ecc_strength_ds = p->ecc_bits;
		chip->ecc_step_ds = 512;
3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029
	} else if (chip->onfi_version >= 21 &&
		(onfi_feature(chip) & ONFI_FEATURE_EXT_PARAM_PAGE)) {

		/*
		 * The nand_flash_detect_ext_param_page() uses the
		 * Change Read Column command which maybe not supported
		 * by the chip->cmdfunc. So try to update the chip->cmdfunc
		 * now. We do not replace user supplied command function.
		 */
		if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
			chip->cmdfunc = nand_command_lp;

		/* The Extended Parameter Page is supported since ONFI 2.1. */
		if (nand_flash_detect_ext_param_page(mtd, chip, p))
3030 3031 3032
			pr_warn("Failed to detect ONFI extended param page\n");
	} else {
		pr_warn("Could not retrieve ONFI ECC requirements\n");
3033 3034
	}

3035 3036 3037
	return 1;
}

3038 3039 3040 3041 3042 3043 3044 3045
/*
 * nand_id_has_period - Check if an ID string has a given wraparound period
 * @id_data: the ID string
 * @arrlen: the length of the @id_data array
 * @period: the period of repitition
 *
 * Check if an ID string is repeated within a given sequence of bytes at
 * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a
3046
 * period of 3). This is a helper function for nand_id_len(). Returns non-zero
3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096
 * if the repetition has a period of @period; otherwise, returns zero.
 */
static int nand_id_has_period(u8 *id_data, int arrlen, int period)
{
	int i, j;
	for (i = 0; i < period; i++)
		for (j = i + period; j < arrlen; j += period)
			if (id_data[i] != id_data[j])
				return 0;
	return 1;
}

/*
 * nand_id_len - Get the length of an ID string returned by CMD_READID
 * @id_data: the ID string
 * @arrlen: the length of the @id_data array

 * Returns the length of the ID string, according to known wraparound/trailing
 * zero patterns. If no pattern exists, returns the length of the array.
 */
static int nand_id_len(u8 *id_data, int arrlen)
{
	int last_nonzero, period;

	/* Find last non-zero byte */
	for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)
		if (id_data[last_nonzero])
			break;

	/* All zeros */
	if (last_nonzero < 0)
		return 0;

	/* Calculate wraparound period */
	for (period = 1; period < arrlen; period++)
		if (nand_id_has_period(id_data, arrlen, period))
			break;

	/* There's a repeated pattern */
	if (period < arrlen)
		return period;

	/* There are trailing zeros */
	if (last_nonzero < arrlen - 1)
		return last_nonzero + 1;

	/* No pattern detected */
	return arrlen;
}

3097 3098 3099 3100 3101 3102 3103 3104 3105 3106
/* Extract the bits of per cell from the 3rd byte of the extended ID */
static int nand_get_bits_per_cell(u8 cellinfo)
{
	int bits;

	bits = cellinfo & NAND_CI_CELLTYPE_MSK;
	bits >>= NAND_CI_CELLTYPE_SHIFT;
	return bits + 1;
}

3107 3108 3109 3110 3111 3112 3113 3114
/*
 * Many new NAND share similar device ID codes, which represent the size of the
 * chip. The rest of the parameters must be decoded according to generic or
 * manufacturer-specific "extended ID" decoding patterns.
 */
static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
				u8 id_data[8], int *busw)
{
3115
	int extid, id_len;
3116
	/* The 3rd id byte holds MLC / multichip data */
3117
	chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
3118 3119 3120
	/* The 4th id byte is the important one */
	extid = id_data[3];

3121 3122
	id_len = nand_id_len(id_data, 8);

3123 3124 3125
	/*
	 * Field definitions are in the following datasheets:
	 * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
3126
	 * New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44)
3127
	 * Hynix MLC   (6 byte ID): Hynix H27UBG8T2B (p.22)
3128
	 *
3129 3130
	 * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung
	 * ID to decide what to do.
3131
	 */
3132
	if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG &&
3133
			!nand_is_slc(chip) && id_data[5] != 0x00) {
3134 3135 3136 3137
		/* Calc pagesize */
		mtd->writesize = 2048 << (extid & 0x03);
		extid >>= 2;
		/* Calc oobsize */
3138
		switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
3139 3140 3141 3142 3143 3144 3145 3146 3147
		case 1:
			mtd->oobsize = 128;
			break;
		case 2:
			mtd->oobsize = 218;
			break;
		case 3:
			mtd->oobsize = 400;
			break;
3148
		case 4:
3149 3150
			mtd->oobsize = 436;
			break;
3151 3152 3153 3154 3155 3156 3157
		case 5:
			mtd->oobsize = 512;
			break;
		case 6:
		default: /* Other cases are "reserved" (unknown) */
			mtd->oobsize = 640;
			break;
3158 3159 3160 3161 3162 3163
		}
		extid >>= 2;
		/* Calc blocksize */
		mtd->erasesize = (128 * 1024) <<
			(((extid >> 1) & 0x04) | (extid & 0x03));
		*busw = 0;
3164
	} else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
3165
			!nand_is_slc(chip)) {
3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204
		unsigned int tmp;

		/* Calc pagesize */
		mtd->writesize = 2048 << (extid & 0x03);
		extid >>= 2;
		/* Calc oobsize */
		switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
		case 0:
			mtd->oobsize = 128;
			break;
		case 1:
			mtd->oobsize = 224;
			break;
		case 2:
			mtd->oobsize = 448;
			break;
		case 3:
			mtd->oobsize = 64;
			break;
		case 4:
			mtd->oobsize = 32;
			break;
		case 5:
			mtd->oobsize = 16;
			break;
		default:
			mtd->oobsize = 640;
			break;
		}
		extid >>= 2;
		/* Calc blocksize */
		tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
		if (tmp < 0x03)
			mtd->erasesize = (128 * 1024) << tmp;
		else if (tmp == 0x03)
			mtd->erasesize = 768 * 1024;
		else
			mtd->erasesize = (64 * 1024) << tmp;
		*busw = 0;
3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217
	} else {
		/* Calc pagesize */
		mtd->writesize = 1024 << (extid & 0x03);
		extid >>= 2;
		/* Calc oobsize */
		mtd->oobsize = (8 << (extid & 0x01)) *
			(mtd->writesize >> 9);
		extid >>= 2;
		/* Calc blocksize. Blocksize is multiples of 64KiB */
		mtd->erasesize = (64 * 1024) << (extid & 0x03);
		extid >>= 2;
		/* Get buswidth information */
		*busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
3218 3219 3220 3221 3222 3223 3224 3225 3226 3227

		/*
		 * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
		 * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
		 * follows:
		 * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
		 *                         110b -> 24nm
		 * - ID byte 5, bit[7]:    1 -> BENAND, 0 -> raw SLC
		 */
		if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA &&
3228
				nand_is_slc(chip) &&
3229 3230 3231 3232 3233
				(id_data[5] & 0x7) == 0x6 /* 24nm */ &&
				!(id_data[4] & 0x80) /* !BENAND */) {
			mtd->oobsize = 32 * mtd->writesize >> 9;
		}

3234 3235 3236
	}
}

3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252
/*
 * Old devices have chip data hardcoded in the device ID table. nand_decode_id
 * decodes a matching ID table entry and assigns the MTD size parameters for
 * the chip.
 */
static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,
				struct nand_flash_dev *type, u8 id_data[8],
				int *busw)
{
	int maf_id = id_data[0];

	mtd->erasesize = type->erasesize;
	mtd->writesize = type->pagesize;
	mtd->oobsize = mtd->writesize / 32;
	*busw = type->options & NAND_BUSWIDTH_16;

3253 3254 3255
	/* All legacy ID NAND are small-page, SLC */
	chip->bits_per_cell = 1;

3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269
	/*
	 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
	 * some Spansion chips have erasesize that conflicts with size
	 * listed in nand_ids table.
	 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
	 */
	if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00
			&& id_data[6] == 0x00 && id_data[7] == 0x00
			&& mtd->writesize == 512) {
		mtd->erasesize = 128 * 1024;
		mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
	}
}

3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291
/*
 * Set the bad block marker/indicator (BBM/BBI) patterns according to some
 * heuristic patterns using various detected parameters (e.g., manufacturer,
 * page size, cell-type information).
 */
static void nand_decode_bbm_options(struct mtd_info *mtd,
				    struct nand_chip *chip, u8 id_data[8])
{
	int maf_id = id_data[0];

	/* Set the bad block position */
	if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))
		chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
	else
		chip->badblockpos = NAND_SMALL_BADBLOCK_POS;

	/*
	 * Bad block marker is stored in the last page of each block on Samsung
	 * and Hynix MLC devices; stored in first two pages of each block on
	 * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
	 * AMD/Spansion, and Macronix.  All others scan only the first page.
	 */
3292
	if (!nand_is_slc(chip) &&
3293 3294 3295
			(maf_id == NAND_MFR_SAMSUNG ||
			 maf_id == NAND_MFR_HYNIX))
		chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
3296
	else if ((nand_is_slc(chip) &&
3297 3298 3299 3300 3301 3302 3303 3304 3305 3306
				(maf_id == NAND_MFR_SAMSUNG ||
				 maf_id == NAND_MFR_HYNIX ||
				 maf_id == NAND_MFR_TOSHIBA ||
				 maf_id == NAND_MFR_AMD ||
				 maf_id == NAND_MFR_MACRONIX)) ||
			(mtd->writesize == 2048 &&
			 maf_id == NAND_MFR_MICRON))
		chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
}

3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319
static inline bool is_full_id_nand(struct nand_flash_dev *type)
{
	return type->id_len;
}

static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,
		   struct nand_flash_dev *type, u8 *id_data, int *busw)
{
	if (!strncmp(type->id, id_data, type->id_len)) {
		mtd->writesize = type->pagesize;
		mtd->erasesize = type->erasesize;
		mtd->oobsize = type->oobsize;

3320
		chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
3321 3322
		chip->chipsize = (uint64_t)type->chipsize << 20;
		chip->options |= type->options;
3323 3324
		chip->ecc_strength_ds = NAND_ECC_STRENGTH(type);
		chip->ecc_step_ds = NAND_ECC_STEP(type);
3325 3326 3327 3328 3329 3330 3331 3332

		*busw = type->options & NAND_BUSWIDTH_16;

		return true;
	}
	return false;
}

T
Thomas Gleixner 已提交
3333
/*
3334
 * Get the flash and manufacturer id and lookup if the type is supported.
T
Thomas Gleixner 已提交
3335 3336
 */
static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
3337
						  struct nand_chip *chip,
3338 3339
						  int busw,
						  int *maf_id, int *dev_id,
3340
						  struct nand_flash_dev *type)
T
Thomas Gleixner 已提交
3341
{
3342
	int i, maf_idx;
3343
	u8 id_data[8];
L
Linus Torvalds 已提交
3344 3345

	/* Select the device */
3346
	chip->select_chip(mtd, 0);
L
Linus Torvalds 已提交
3347

3348 3349
	/*
	 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
3350
	 * after power-up.
3351 3352 3353
	 */
	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

L
Linus Torvalds 已提交
3354
	/* Send the command for reading device ID */
3355
	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
L
Linus Torvalds 已提交
3356 3357

	/* Read manufacturer and device IDs */
3358
	*maf_id = chip->read_byte(mtd);
3359
	*dev_id = chip->read_byte(mtd);
L
Linus Torvalds 已提交
3360

3361 3362
	/*
	 * Try again to make sure, as some systems the bus-hold or other
3363 3364 3365 3366 3367 3368 3369
	 * interface concerns can cause random data which looks like a
	 * possibly credible NAND flash to appear. If the two results do
	 * not match, ignore the device completely.
	 */

	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

3370 3371
	/* Read entire ID string */
	for (i = 0; i < 8; i++)
3372
		id_data[i] = chip->read_byte(mtd);
3373

3374
	if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
3375
		pr_info("%s: second ID read did not match "
3376 3377
			"%02x,%02x against %02x,%02x\n", __func__,
			*maf_id, *dev_id, id_data[0], id_data[1]);
3378 3379 3380
		return ERR_PTR(-ENODEV);
	}

T
Thomas Gleixner 已提交
3381
	if (!type)
3382 3383
		type = nand_flash_ids;

3384 3385 3386 3387 3388 3389 3390 3391
	for (; type->name != NULL; type++) {
		if (is_full_id_nand(type)) {
			if (find_full_id_nand(mtd, chip, type, id_data, &busw))
				goto ident_done;
		} else if (*dev_id == type->dev_id) {
				break;
		}
	}
3392

3393 3394
	chip->onfi_version = 0;
	if (!type->name || !type->pagesize) {
3395
		/* Check is chip is ONFI compliant */
3396
		if (nand_flash_detect_onfi(mtd, chip, &busw))
3397
			goto ident_done;
3398 3399
	}

3400
	if (!type->name)
T
Thomas Gleixner 已提交
3401 3402
		return ERR_PTR(-ENODEV);

3403 3404 3405
	if (!mtd->name)
		mtd->name = type->name;

3406
	chip->chipsize = (uint64_t)type->chipsize << 20;
T
Thomas Gleixner 已提交
3407

3408
	if (!type->pagesize && chip->init_size) {
3409
		/* Set the pagesize, oobsize, erasesize by the driver */
3410 3411
		busw = chip->init_size(mtd, chip, id_data);
	} else if (!type->pagesize) {
3412 3413
		/* Decode parameters from extended ID */
		nand_decode_ext_id(mtd, chip, id_data, &busw);
T
Thomas Gleixner 已提交
3414
	} else {
3415
		nand_decode_id(mtd, chip, type, id_data, &busw);
T
Thomas Gleixner 已提交
3416
	}
3417 3418
	/* Get chip options */
	chip->options |= type->options;
3419

3420 3421 3422
	/*
	 * Check if chip is not a Samsung device. Do not clear the
	 * options for chips which do not have an extended id.
3423 3424 3425 3426 3427
	 */
	if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
		chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
ident_done:

T
Thomas Gleixner 已提交
3428
	/* Try to identify manufacturer */
3429
	for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
T
Thomas Gleixner 已提交
3430 3431 3432
		if (nand_manuf_ids[maf_idx].id == *maf_id)
			break;
	}
3433

3434 3435 3436 3437 3438 3439 3440 3441 3442
	if (chip->options & NAND_BUSWIDTH_AUTO) {
		WARN_ON(chip->options & NAND_BUSWIDTH_16);
		chip->options |= busw;
		nand_set_defaults(chip, busw);
	} else if (busw != (chip->options & NAND_BUSWIDTH_16)) {
		/*
		 * Check, if buswidth is correct. Hardware drivers should set
		 * chip correct!
		 */
3443
		pr_info("NAND device: Manufacturer ID:"
3444 3445
			" 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
			*dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
3446
		pr_warn("NAND bus width %d instead %d bit\n",
3447 3448
			   (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
			   busw ? 16 : 8);
T
Thomas Gleixner 已提交
3449 3450
		return ERR_PTR(-EINVAL);
	}
3451

3452 3453
	nand_decode_bbm_options(mtd, chip, id_data);

T
Thomas Gleixner 已提交
3454
	/* Calculate the address shift from the page size */
3455
	chip->page_shift = ffs(mtd->writesize) - 1;
3456
	/* Convert chipsize to number of pages per chip -1 */
3457
	chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
3458

3459
	chip->bbt_erase_shift = chip->phys_erase_shift =
T
Thomas Gleixner 已提交
3460
		ffs(mtd->erasesize) - 1;
3461 3462
	if (chip->chipsize & 0xffffffff)
		chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
3463 3464 3465 3466
	else {
		chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
		chip->chip_shift += 32 - 1;
	}
L
Linus Torvalds 已提交
3467

A
Artem Bityutskiy 已提交
3468
	chip->badblockbits = 8;
3469
	chip->erase_cmd = single_erase_cmd;
T
Thomas Gleixner 已提交
3470

3471
	/* Do not replace user supplied command function! */
3472 3473
	if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
		chip->cmdfunc = nand_command_lp;
T
Thomas Gleixner 已提交
3474

3475
	pr_info("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s)\n",
3476
		*maf_id, *dev_id, nand_manuf_ids[maf_idx].name,
3477 3478 3479 3480 3481
		chip->onfi_version ? chip->onfi_params.model : type->name);

	pr_info("NAND device: %dMiB, %s, page size: %d, OOB size: %d\n",
		(int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC",
		mtd->writesize, mtd->oobsize);
T
Thomas Gleixner 已提交
3482 3483 3484 3485 3486

	return type;
}

/**
3487
 * nand_scan_ident - [NAND Interface] Scan for the NAND device
3488 3489 3490
 * @mtd: MTD device structure
 * @maxchips: number of chips to scan for
 * @table: alternative NAND ID table
T
Thomas Gleixner 已提交
3491
 *
3492 3493
 * This is the first phase of the normal nand_scan() function. It reads the
 * flash ID and sets up MTD fields accordingly.
T
Thomas Gleixner 已提交
3494
 *
3495
 * The mtd->owner field must be set to the module of the caller.
T
Thomas Gleixner 已提交
3496
 */
3497 3498
int nand_scan_ident(struct mtd_info *mtd, int maxchips,
		    struct nand_flash_dev *table)
T
Thomas Gleixner 已提交
3499
{
3500
	int i, busw, nand_maf_id, nand_dev_id;
3501
	struct nand_chip *chip = mtd->priv;
T
Thomas Gleixner 已提交
3502 3503 3504
	struct nand_flash_dev *type;

	/* Get buswidth to select the correct functions */
3505
	busw = chip->options & NAND_BUSWIDTH_16;
T
Thomas Gleixner 已提交
3506
	/* Set the default functions */
3507
	nand_set_defaults(chip, busw);
T
Thomas Gleixner 已提交
3508 3509

	/* Read the flash type */
3510 3511
	type = nand_get_flash_type(mtd, chip, busw,
				&nand_maf_id, &nand_dev_id, table);
T
Thomas Gleixner 已提交
3512 3513

	if (IS_ERR(type)) {
3514
		if (!(chip->options & NAND_SCAN_SILENT_NODEV))
3515
			pr_warn("No NAND device found\n");
3516
		chip->select_chip(mtd, -1);
T
Thomas Gleixner 已提交
3517
		return PTR_ERR(type);
L
Linus Torvalds 已提交
3518 3519
	}

3520 3521
	chip->select_chip(mtd, -1);

T
Thomas Gleixner 已提交
3522
	/* Check for a chip array */
3523
	for (i = 1; i < maxchips; i++) {
3524
		chip->select_chip(mtd, i);
3525 3526
		/* See comment in nand_get_flash_type for reset */
		chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
L
Linus Torvalds 已提交
3527
		/* Send the command for reading device ID */
3528
		chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
L
Linus Torvalds 已提交
3529
		/* Read manufacturer and device IDs */
3530
		if (nand_maf_id != chip->read_byte(mtd) ||
3531 3532
		    nand_dev_id != chip->read_byte(mtd)) {
			chip->select_chip(mtd, -1);
L
Linus Torvalds 已提交
3533
			break;
3534 3535
		}
		chip->select_chip(mtd, -1);
L
Linus Torvalds 已提交
3536 3537
	}
	if (i > 1)
3538
		pr_info("%d NAND chips detected\n", i);
3539

L
Linus Torvalds 已提交
3540
	/* Store the number of chips and calc total size for mtd */
3541 3542
	chip->numchips = i;
	mtd->size = i * chip->chipsize;
T
Thomas Gleixner 已提交
3543

3544 3545
	return 0;
}
3546
EXPORT_SYMBOL(nand_scan_ident);
3547 3548 3549 3550


/**
 * nand_scan_tail - [NAND Interface] Scan for the NAND device
3551
 * @mtd: MTD device structure
3552
 *
3553 3554 3555
 * This is the second phase of the normal nand_scan() function. It fills out
 * all the uninitialized function pointers with the defaults and scans for a
 * bad block table if appropriate.
3556 3557 3558 3559 3560
 */
int nand_scan_tail(struct mtd_info *mtd)
{
	int i;
	struct nand_chip *chip = mtd->priv;
3561
	struct nand_ecc_ctrl *ecc = &chip->ecc;
3562

3563 3564 3565 3566
	/* New bad blocks should be marked in OOB, flash-based BBT, or both */
	BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
			!(chip->bbt_options & NAND_BBT_USE_FLASH));

3567 3568 3569 3570 3571
	if (!(chip->options & NAND_OWN_BUFFERS))
		chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
	if (!chip->buffers)
		return -ENOMEM;

3572
	/* Set the internal oob buffer location, just after the page data */
3573
	chip->oob_poi = chip->buffers->databuf + mtd->writesize;
L
Linus Torvalds 已提交
3574

T
Thomas Gleixner 已提交
3575
	/*
3576
	 * If no default placement scheme is given, select an appropriate one.
T
Thomas Gleixner 已提交
3577
	 */
3578
	if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) {
3579
		switch (mtd->oobsize) {
L
Linus Torvalds 已提交
3580
		case 8:
3581
			ecc->layout = &nand_oob_8;
L
Linus Torvalds 已提交
3582 3583
			break;
		case 16:
3584
			ecc->layout = &nand_oob_16;
L
Linus Torvalds 已提交
3585 3586
			break;
		case 64:
3587
			ecc->layout = &nand_oob_64;
L
Linus Torvalds 已提交
3588
			break;
3589
		case 128:
3590
			ecc->layout = &nand_oob_128;
3591
			break;
L
Linus Torvalds 已提交
3592
		default:
3593 3594
			pr_warn("No oob scheme defined for oobsize %d\n",
				   mtd->oobsize);
L
Linus Torvalds 已提交
3595 3596 3597
			BUG();
		}
	}
3598

3599 3600 3601
	if (!chip->write_page)
		chip->write_page = nand_write_page;

3602
	/*
3603
	 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
T
Thomas Gleixner 已提交
3604
	 * selected and we have 256 byte pagesize fallback to software ECC
3605
	 */
3606

3607
	switch (ecc->mode) {
3608 3609
	case NAND_ECC_HW_OOB_FIRST:
		/* Similar to NAND_ECC_HW, but a separate read_page handle */
3610
		if (!ecc->calculate || !ecc->correct || !ecc->hwctl) {
3611
			pr_warn("No ECC functions supplied; "
3612
				   "hardware ECC not possible\n");
3613 3614
			BUG();
		}
3615 3616
		if (!ecc->read_page)
			ecc->read_page = nand_read_page_hwecc_oob_first;
3617

T
Thomas Gleixner 已提交
3618
	case NAND_ECC_HW:
3619
		/* Use standard hwecc read page function? */
3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635
		if (!ecc->read_page)
			ecc->read_page = nand_read_page_hwecc;
		if (!ecc->write_page)
			ecc->write_page = nand_write_page_hwecc;
		if (!ecc->read_page_raw)
			ecc->read_page_raw = nand_read_page_raw;
		if (!ecc->write_page_raw)
			ecc->write_page_raw = nand_write_page_raw;
		if (!ecc->read_oob)
			ecc->read_oob = nand_read_oob_std;
		if (!ecc->write_oob)
			ecc->write_oob = nand_write_oob_std;
		if (!ecc->read_subpage)
			ecc->read_subpage = nand_read_subpage;
		if (!ecc->write_subpage)
			ecc->write_subpage = nand_write_subpage_hwecc;
3636

T
Thomas Gleixner 已提交
3637
	case NAND_ECC_HW_SYNDROME:
3638 3639 3640 3641 3642
		if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) &&
		    (!ecc->read_page ||
		     ecc->read_page == nand_read_page_hwecc ||
		     !ecc->write_page ||
		     ecc->write_page == nand_write_page_hwecc)) {
3643
			pr_warn("No ECC functions supplied; "
3644
				   "hardware ECC not possible\n");
T
Thomas Gleixner 已提交
3645 3646
			BUG();
		}
3647
		/* Use standard syndrome read/write page function? */
3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662
		if (!ecc->read_page)
			ecc->read_page = nand_read_page_syndrome;
		if (!ecc->write_page)
			ecc->write_page = nand_write_page_syndrome;
		if (!ecc->read_page_raw)
			ecc->read_page_raw = nand_read_page_raw_syndrome;
		if (!ecc->write_page_raw)
			ecc->write_page_raw = nand_write_page_raw_syndrome;
		if (!ecc->read_oob)
			ecc->read_oob = nand_read_oob_syndrome;
		if (!ecc->write_oob)
			ecc->write_oob = nand_write_oob_syndrome;

		if (mtd->writesize >= ecc->size) {
			if (!ecc->strength) {
3663 3664 3665
				pr_warn("Driver must set ecc.strength when using hardware ECC\n");
				BUG();
			}
T
Thomas Gleixner 已提交
3666
			break;
3667
		}
3668
		pr_warn("%d byte HW ECC not possible on "
3669
			   "%d byte page size, fallback to SW ECC\n",
3670 3671
			   ecc->size, mtd->writesize);
		ecc->mode = NAND_ECC_SOFT;
3672

T
Thomas Gleixner 已提交
3673
	case NAND_ECC_SOFT:
3674 3675 3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686
		ecc->calculate = nand_calculate_ecc;
		ecc->correct = nand_correct_data;
		ecc->read_page = nand_read_page_swecc;
		ecc->read_subpage = nand_read_subpage;
		ecc->write_page = nand_write_page_swecc;
		ecc->read_page_raw = nand_read_page_raw;
		ecc->write_page_raw = nand_write_page_raw;
		ecc->read_oob = nand_read_oob_std;
		ecc->write_oob = nand_write_oob_std;
		if (!ecc->size)
			ecc->size = 256;
		ecc->bytes = 3;
		ecc->strength = 1;
L
Linus Torvalds 已提交
3687
		break;
3688

3689 3690
	case NAND_ECC_SOFT_BCH:
		if (!mtd_nand_has_bch()) {
3691
			pr_warn("CONFIG_MTD_ECC_BCH not enabled\n");
3692 3693
			BUG();
		}
3694 3695 3696 3697 3698 3699 3700 3701 3702
		ecc->calculate = nand_bch_calculate_ecc;
		ecc->correct = nand_bch_correct_data;
		ecc->read_page = nand_read_page_swecc;
		ecc->read_subpage = nand_read_subpage;
		ecc->write_page = nand_write_page_swecc;
		ecc->read_page_raw = nand_read_page_raw;
		ecc->write_page_raw = nand_write_page_raw;
		ecc->read_oob = nand_read_oob_std;
		ecc->write_oob = nand_write_oob_std;
3703 3704 3705
		/*
		 * Board driver should supply ecc.size and ecc.bytes values to
		 * select how many bits are correctable; see nand_bch_init()
3706 3707
		 * for details. Otherwise, default to 4 bits for large page
		 * devices.
3708
		 */
3709 3710 3711
		if (!ecc->size && (mtd->oobsize >= 64)) {
			ecc->size = 512;
			ecc->bytes = 7;
3712
		}
3713 3714 3715
		ecc->priv = nand_bch_init(mtd, ecc->size, ecc->bytes,
					       &ecc->layout);
		if (!ecc->priv) {
3716
			pr_warn("BCH ECC initialization failed!\n");
3717 3718
			BUG();
		}
3719
		ecc->strength = ecc->bytes * 8 / fls(8 * ecc->size);
3720 3721
		break;

3722
	case NAND_ECC_NONE:
3723
		pr_warn("NAND_ECC_NONE selected by board driver. "
3724
			   "This is not recommended!\n");
3725 3726 3727 3728 3729 3730 3731 3732 3733
		ecc->read_page = nand_read_page_raw;
		ecc->write_page = nand_write_page_raw;
		ecc->read_oob = nand_read_oob_std;
		ecc->read_page_raw = nand_read_page_raw;
		ecc->write_page_raw = nand_write_page_raw;
		ecc->write_oob = nand_write_oob_std;
		ecc->size = mtd->writesize;
		ecc->bytes = 0;
		ecc->strength = 0;
L
Linus Torvalds 已提交
3734
		break;
3735

L
Linus Torvalds 已提交
3736
	default:
3737
		pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode);
3738
		BUG();
L
Linus Torvalds 已提交
3739
	}
3740

3741
	/* For many systems, the standard OOB write also works for raw */
3742 3743 3744 3745
	if (!ecc->read_oob_raw)
		ecc->read_oob_raw = ecc->read_oob;
	if (!ecc->write_oob_raw)
		ecc->write_oob_raw = ecc->write_oob;
3746

3747 3748
	/*
	 * The number of bytes available for a client to place data into
3749
	 * the out of band area.
3750
	 */
3751 3752 3753 3754 3755
	ecc->layout->oobavail = 0;
	for (i = 0; ecc->layout->oobfree[i].length
			&& i < ARRAY_SIZE(ecc->layout->oobfree); i++)
		ecc->layout->oobavail += ecc->layout->oobfree[i].length;
	mtd->oobavail = ecc->layout->oobavail;
3756

T
Thomas Gleixner 已提交
3757 3758
	/*
	 * Set the number of read / write steps for one page depending on ECC
3759
	 * mode.
T
Thomas Gleixner 已提交
3760
	 */
3761 3762
	ecc->steps = mtd->writesize / ecc->size;
	if (ecc->steps * ecc->size != mtd->writesize) {
3763
		pr_warn("Invalid ECC parameters\n");
T
Thomas Gleixner 已提交
3764
		BUG();
L
Linus Torvalds 已提交
3765
	}
3766
	ecc->total = ecc->steps * ecc->bytes;
3767

3768
	/* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
3769
	if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
3770
		switch (ecc->steps) {
3771 3772 3773 3774 3775
		case 2:
			mtd->subpage_sft = 1;
			break;
		case 4:
		case 8:
3776
		case 16:
3777 3778 3779 3780 3781 3782
			mtd->subpage_sft = 2;
			break;
		}
	}
	chip->subpagesize = mtd->writesize >> mtd->subpage_sft;

3783
	/* Initialize state */
3784
	chip->state = FL_READY;
L
Linus Torvalds 已提交
3785 3786

	/* Invalidate the pagebuffer reference */
3787
	chip->pagebuf = -1;
L
Linus Torvalds 已提交
3788

3789
	/* Large page NAND with SOFT_ECC should support subpage reads */
3790
	if ((ecc->mode == NAND_ECC_SOFT) && (chip->page_shift > 9))
3791 3792
		chip->options |= NAND_SUBPAGE_READ;

L
Linus Torvalds 已提交
3793
	/* Fill in remaining MTD driver data */
3794
	mtd->type = nand_is_slc(chip) ? MTD_NANDFLASH : MTD_MLCNANDFLASH;
3795 3796
	mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
						MTD_CAP_NANDFLASH;
3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 3810 3811
	mtd->_erase = nand_erase;
	mtd->_point = NULL;
	mtd->_unpoint = NULL;
	mtd->_read = nand_read;
	mtd->_write = nand_write;
	mtd->_panic_write = panic_nand_write;
	mtd->_read_oob = nand_read_oob;
	mtd->_write_oob = nand_write_oob;
	mtd->_sync = nand_sync;
	mtd->_lock = NULL;
	mtd->_unlock = NULL;
	mtd->_suspend = nand_suspend;
	mtd->_resume = nand_resume;
	mtd->_block_isbad = nand_block_isbad;
	mtd->_block_markbad = nand_block_markbad;
3812
	mtd->writebufsize = mtd->writesize;
L
Linus Torvalds 已提交
3813

M
Mike Dunn 已提交
3814
	/* propagate ecc info to mtd_info */
3815 3816 3817
	mtd->ecclayout = ecc->layout;
	mtd->ecc_strength = ecc->strength;
	mtd->ecc_step_size = ecc->size;
3818 3819 3820 3821 3822 3823 3824
	/*
	 * Initialize bitflip_threshold to its default prior scan_bbt() call.
	 * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be
	 * properly set.
	 */
	if (!mtd->bitflip_threshold)
		mtd->bitflip_threshold = mtd->ecc_strength;
L
Linus Torvalds 已提交
3825

3826
	/* Check, if we should skip the bad block table scan */
3827
	if (chip->options & NAND_SKIP_BBTSCAN)
3828
		return 0;
L
Linus Torvalds 已提交
3829 3830

	/* Build bad block table */
3831
	return chip->scan_bbt(mtd);
L
Linus Torvalds 已提交
3832
}
3833
EXPORT_SYMBOL(nand_scan_tail);
L
Linus Torvalds 已提交
3834

3835 3836
/*
 * is_module_text_address() isn't exported, and it's mostly a pointless
3837
 * test if this is a module _anyway_ -- they'd have to try _really_ hard
3838 3839
 * to call us from in-kernel code if the core NAND support is modular.
 */
3840 3841 3842 3843
#ifdef MODULE
#define caller_is_module() (1)
#else
#define caller_is_module() \
3844
	is_module_text_address((unsigned long)__builtin_return_address(0))
3845 3846 3847 3848
#endif

/**
 * nand_scan - [NAND Interface] Scan for the NAND device
3849 3850
 * @mtd: MTD device structure
 * @maxchips: number of chips to scan for
3851
 *
3852 3853 3854 3855
 * This fills out all the uninitialized function pointers with the defaults.
 * The flash ID is read and the mtd/chip structures are filled with the
 * appropriate values. The mtd->owner field must be set to the module of the
 * caller.
3856 3857 3858 3859 3860 3861 3862
 */
int nand_scan(struct mtd_info *mtd, int maxchips)
{
	int ret;

	/* Many callers got this wrong, so check for it for a while... */
	if (!mtd->owner && caller_is_module()) {
3863
		pr_crit("%s called with NULL mtd->owner!\n", __func__);
3864 3865 3866
		BUG();
	}

3867
	ret = nand_scan_ident(mtd, maxchips, NULL);
3868 3869 3870 3871
	if (!ret)
		ret = nand_scan_tail(mtd);
	return ret;
}
3872
EXPORT_SYMBOL(nand_scan);
3873

L
Linus Torvalds 已提交
3874
/**
3875
 * nand_release - [NAND Interface] Free resources held by the NAND device
3876 3877
 * @mtd: MTD device structure
 */
3878
void nand_release(struct mtd_info *mtd)
L
Linus Torvalds 已提交
3879
{
3880
	struct nand_chip *chip = mtd->priv;
L
Linus Torvalds 已提交
3881

3882 3883 3884
	if (chip->ecc.mode == NAND_ECC_SOFT_BCH)
		nand_bch_free((struct nand_bch_control *)chip->ecc.priv);

3885
	mtd_device_unregister(mtd);
L
Linus Torvalds 已提交
3886

J
Jesper Juhl 已提交
3887
	/* Free bad block table memory */
3888
	kfree(chip->bbt);
3889 3890
	if (!(chip->options & NAND_OWN_BUFFERS))
		kfree(chip->buffers);
3891 3892 3893 3894 3895

	/* Free bad block descriptor memory */
	if (chip->badblock_pattern && chip->badblock_pattern->options
			& NAND_BBT_DYNAMICSTRUCT)
		kfree(chip->badblock_pattern);
L
Linus Torvalds 已提交
3896
}
3897
EXPORT_SYMBOL_GPL(nand_release);
3898 3899 3900 3901 3902 3903 3904 3905 3906 3907 3908 3909 3910 3911 3912

static int __init nand_base_init(void)
{
	led_trigger_register_simple("nand-disk", &nand_led_trigger);
	return 0;
}

static void __exit nand_base_exit(void)
{
	led_trigger_unregister_simple(nand_led_trigger);
}

module_init(nand_base_init);
module_exit(nand_base_exit);

3913
MODULE_LICENSE("GPL");
3914 3915
MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");
MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
3916
MODULE_DESCRIPTION("Generic NAND flash driver code");