timers.c 5.3 KB
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/***************************************************************************/

/*
 *	timers.c -- generic ColdFire hardware timer support.
 *
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 *	Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
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 */

/***************************************************************************/

#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched.h>
#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/profile.h>
#include <linux/clocksource.h>
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#include <asm/io.h>
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#include <asm/traps.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcftimer.h>
#include <asm/mcfsim.h>

/***************************************************************************/

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/*
 *	By default use timer1 as the system clock timer.
 */
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#define	FREQ	(MCF_BUSCLK / 16)
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#define	TA(a)	(MCFTIMER_BASE1 + (a))
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/*
 *	These provide the underlying interrupt vector support.
 *	Unfortunately it is a little different on each ColdFire.
 */
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void coldfire_profile_init(void);
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#if defined(CONFIG_M532x) || defined(CONFIG_M5441x)
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#define	__raw_readtrr	__raw_readl
#define	__raw_writetrr	__raw_writel
#else
#define	__raw_readtrr	__raw_readw
#define	__raw_writetrr	__raw_writew
#endif

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static u32 mcftmr_cycles_per_jiffy;
static u32 mcftmr_cnt;

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static irq_handler_t timer_interrupt;

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/***************************************************************************/

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static void init_timer_irq(void)
{
#ifdef MCFSIM_ICR_AUTOVEC
	/* Timer1 is always used as system timer */
	writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
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		MCFSIM_TIMER1ICR);
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	mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);

#ifdef CONFIG_HIGHPROFILE
	/* Timer2 is to be used as a high speed profile timer  */
	writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
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		MCFSIM_TIMER2ICR);
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	mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
#endif
#endif /* MCFSIM_ICR_AUTOVEC */
}

/***************************************************************************/

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static irqreturn_t mcftmr_tick(int irq, void *dummy)
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{
	/* Reset the ColdFire timer */
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	__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
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	mcftmr_cnt += mcftmr_cycles_per_jiffy;
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	return timer_interrupt(irq, dummy);
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}

/***************************************************************************/

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static struct irqaction mcftmr_timer_irq = {
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	.name	 = "timer",
	.flags	 = IRQF_DISABLED | IRQF_TIMER,
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	.handler = mcftmr_tick,
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};

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/***************************************************************************/

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static cycle_t mcftmr_read_clk(struct clocksource *cs)
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{
	unsigned long flags;
	u32 cycles;
	u16 tcn;

	local_irq_save(flags);
	tcn = __raw_readw(TA(MCFTIMER_TCN));
	cycles = mcftmr_cnt;
	local_irq_restore(flags);

	return cycles + tcn;
}

/***************************************************************************/

static struct clocksource mcftmr_clk = {
	.name	= "tmr",
	.rating	= 250,
	.read	= mcftmr_read_clk,
	.mask	= CLOCKSOURCE_MASK(32),
	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
};

/***************************************************************************/
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void hw_timer_init(irq_handler_t handler)
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{
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	__raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
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	mcftmr_cycles_per_jiffy = FREQ / HZ;
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	/*
	 *	The coldfire timer runs from 0 to TRR included, then 0
	 *	again and so on.  It counts thus actually TRR + 1 steps
	 *	for 1 tick, not TRR.  So if you want n cycles,
	 *	initialize TRR with n - 1.
	 */
	__raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
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	__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
		MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
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	clocksource_register_hz(&mcftmr_clk, FREQ);
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	timer_interrupt = handler;
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	init_timer_irq();
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	setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
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#ifdef CONFIG_HIGHPROFILE
	coldfire_profile_init();
#endif
}

/***************************************************************************/
#ifdef CONFIG_HIGHPROFILE
/***************************************************************************/

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/*
 *	By default use timer2 as the profiler clock timer.
 */
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#define	PA(a)	(MCFTIMER_BASE2 + (a))
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/*
 *	Choose a reasonably fast profile timer. Make it an odd value to
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 *	try and get good coverage of kernel operations.
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 */
#define	PROFILEHZ	1013

/*
 *	Use the other timer to provide high accuracy profiling info.
 */
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irqreturn_t coldfire_profile_tick(int irq, void *dummy)
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{
	/* Reset ColdFire timer2 */
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	__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
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	if (current->pid)
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		profile_tick(CPU_PROFILING);
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	return IRQ_HANDLED;
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}

/***************************************************************************/

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static struct irqaction coldfire_profile_irq = {
	.name	 = "profile timer",
	.flags	 = IRQF_DISABLED | IRQF_TIMER,
	.handler = coldfire_profile_tick,
};

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void coldfire_profile_init(void)
{
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	printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
	       PROFILEHZ);

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	/* Set up TIMER 2 as high speed profile clock */
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	__raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
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	__raw_writetrr(((MCF_BUSCLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
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	__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
		MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
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	setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
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}

/***************************************************************************/
#endif	/* CONFIG_HIGHPROFILE */
/***************************************************************************/