rtl8187_dev.c 46.4 KB
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/*
 * Linux device driver for RTL8187
 *
 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
 *
 * Based on the r8187 driver, which is:
 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
 *
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 * The driver was extended to the RTL8187B in 2008 by:
 * 	Herton Ronaldo Krzesinski <herton@mandriva.com.br>
 *	Hin-Tak Leung <htl10@users.sourceforge.net>
 *	Larry Finger <Larry.Finger@lwfinger.net>
 *
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 * Magic delays and register offsets below are taken from the original
 * r8187 driver sources.  Thanks to Realtek for their support!
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 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/usb.h>
#include <linux/delay.h>
#include <linux/etherdevice.h>
#include <linux/eeprom_93cx6.h>
#include <net/mac80211.h>

#include "rtl8187.h"
#include "rtl8187_rtl8225.h"
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#ifdef CONFIG_RTL8187_LEDS
#include "rtl8187_leds.h"
#endif
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#include "rtl8187_rfkill.h"
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MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
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MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
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MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
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MODULE_LICENSE("GPL");

static struct usb_device_id rtl8187_table[] __devinitdata = {
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	/* Asus */
	{USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
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	/* Belkin */
	{USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
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	/* Realtek */
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	{USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
	{USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
	{USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
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	{USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
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	/* Surecom */
	{USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
	/* Logitech */
	{USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
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	/* Netgear */
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	{USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
	{USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
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	{USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
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	/* HP */
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	{USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
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	/* Sitecom */
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	{USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
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	{USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
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	/* Sphairon Access Systems GmbH */
	{USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
	/* Dick Smith Electronics */
	{USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
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	/* Abocom */
	{USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
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	/* Qcom */
	{USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
	/* AirLive */
	{USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
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	/* Linksys */
	{USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
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	{}
};

MODULE_DEVICE_TABLE(usb, rtl8187_table);

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static const struct ieee80211_rate rtl818x_rates[] = {
	{ .bitrate = 10, .hw_value = 0, },
	{ .bitrate = 20, .hw_value = 1, },
	{ .bitrate = 55, .hw_value = 2, },
	{ .bitrate = 110, .hw_value = 3, },
	{ .bitrate = 60, .hw_value = 4, },
	{ .bitrate = 90, .hw_value = 5, },
	{ .bitrate = 120, .hw_value = 6, },
	{ .bitrate = 180, .hw_value = 7, },
	{ .bitrate = 240, .hw_value = 8, },
	{ .bitrate = 360, .hw_value = 9, },
	{ .bitrate = 480, .hw_value = 10, },
	{ .bitrate = 540, .hw_value = 11, },
};

static const struct ieee80211_channel rtl818x_channels[] = {
	{ .center_freq = 2412 },
	{ .center_freq = 2417 },
	{ .center_freq = 2422 },
	{ .center_freq = 2427 },
	{ .center_freq = 2432 },
	{ .center_freq = 2437 },
	{ .center_freq = 2442 },
	{ .center_freq = 2447 },
	{ .center_freq = 2452 },
	{ .center_freq = 2457 },
	{ .center_freq = 2462 },
	{ .center_freq = 2467 },
	{ .center_freq = 2472 },
	{ .center_freq = 2484 },
};

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static void rtl8187_iowrite_async_cb(struct urb *urb)
{
	kfree(urb->context);
}

static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
				  void *data, u16 len)
{
	struct usb_ctrlrequest *dr;
	struct urb *urb;
	struct rtl8187_async_write_data {
		u8 data[4];
		struct usb_ctrlrequest dr;
	} *buf;
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	int rc;
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	buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
	if (!buf)
		return;

	urb = usb_alloc_urb(0, GFP_ATOMIC);
	if (!urb) {
		kfree(buf);
		return;
	}

	dr = &buf->dr;

	dr->bRequestType = RTL8187_REQT_WRITE;
	dr->bRequest = RTL8187_REQ_SET_REG;
	dr->wValue = addr;
	dr->wIndex = 0;
	dr->wLength = cpu_to_le16(len);

	memcpy(buf, data, len);

	usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
			     (unsigned char *)dr, buf, len,
			     rtl8187_iowrite_async_cb, buf);
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	usb_anchor_urb(urb, &priv->anchored);
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	rc = usb_submit_urb(urb, GFP_ATOMIC);
	if (rc < 0) {
		kfree(buf);
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		usb_unanchor_urb(urb);
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	}
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	usb_free_urb(urb);
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}

static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
					   __le32 *addr, u32 val)
{
	__le32 buf = cpu_to_le32(val);

	rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
			      &buf, sizeof(buf));
}

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void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
{
	struct rtl8187_priv *priv = dev->priv;

	data <<= 8;
	data |= addr | 0x80;

	rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
	rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
	rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
	rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
}

static void rtl8187_tx_cb(struct urb *urb)
{
	struct sk_buff *skb = (struct sk_buff *)urb->context;
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	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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	struct ieee80211_hw *hw = info->rate_driver_data[0];
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	struct rtl8187_priv *priv = hw->priv;
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	skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
					  sizeof(struct rtl8187_tx_hdr));
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	ieee80211_tx_info_clear_status(info);
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	if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
		if (priv->is_rtl8187b) {
			skb_queue_tail(&priv->b_tx_status.queue, skb);

			/* queue is "full", discard last items */
			while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
				struct sk_buff *old_skb;

				dev_dbg(&priv->udev->dev,
					"transmit status queue full\n");

				old_skb = skb_dequeue(&priv->b_tx_status.queue);
				ieee80211_tx_status_irqsafe(hw, old_skb);
			}
			return;
		} else {
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			info->flags |= IEEE80211_TX_STAT_ACK;
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		}
	}
	if (priv->is_rtl8187b)
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		ieee80211_tx_status_irqsafe(hw, skb);
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	else {
		/* Retry information for the RTI8187 is only available by
		 * reading a register in the device. We are in interrupt mode
		 * here, thus queue the skb and finish on a work queue. */
		skb_queue_tail(&priv->b_tx_status.queue, skb);
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		ieee80211_queue_delayed_work(hw, &priv->work, 0);
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	}
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}

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static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
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{
	struct rtl8187_priv *priv = dev->priv;
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	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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	unsigned int ep;
	void *buf;
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	struct urb *urb;
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	__le16 rts_dur = 0;
	u32 flags;
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	int rc;
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	urb = usb_alloc_urb(0, GFP_ATOMIC);
	if (!urb) {
		kfree_skb(skb);
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		return NETDEV_TX_OK;
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	}

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	flags = skb->len;
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	flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
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	flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
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	if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
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		flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
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	if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
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		flags |= RTL818X_TX_DESC_FLAG_RTS;
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		flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
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		rts_dur = ieee80211_rts_duration(dev, priv->vif,
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						 skb->len, info);
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	} else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
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		flags |= RTL818X_TX_DESC_FLAG_CTS;
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		flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
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	}
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	if (!priv->is_rtl8187b) {
		struct rtl8187_tx_hdr *hdr =
			(struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
		hdr->flags = cpu_to_le32(flags);
		hdr->len = 0;
		hdr->rts_duration = rts_dur;
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		hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
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		buf = hdr;

		ep = 2;
	} else {
		/* fc needs to be calculated before skb_push() */
		unsigned int epmap[4] = { 6, 7, 5, 4 };
		struct ieee80211_hdr *tx_hdr =
			(struct ieee80211_hdr *)(skb->data);
		u16 fc = le16_to_cpu(tx_hdr->frame_control);

		struct rtl8187b_tx_hdr *hdr =
			(struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
		struct ieee80211_rate *txrate =
			ieee80211_get_tx_rate(dev, info);
		memset(hdr, 0, sizeof(*hdr));
		hdr->flags = cpu_to_le32(flags);
		hdr->rts_duration = rts_dur;
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		hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
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		hdr->tx_duration =
			ieee80211_generic_frame_duration(dev, priv->vif,
							 skb->len, txrate);
		buf = hdr;

		if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
			ep = 12;
		else
			ep = epmap[skb_get_queue_mapping(skb)];
	}
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	info->rate_driver_data[0] = dev;
	info->rate_driver_data[1] = urb;
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	usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
			  buf, skb->len, rtl8187_tx_cb, skb);
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	urb->transfer_flags |= URB_ZERO_PACKET;
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	usb_anchor_urb(urb, &priv->anchored);
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	rc = usb_submit_urb(urb, GFP_ATOMIC);
	if (rc < 0) {
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		usb_unanchor_urb(urb);
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		kfree_skb(skb);
	}
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	usb_free_urb(urb);
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	return NETDEV_TX_OK;
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}

static void rtl8187_rx_cb(struct urb *urb)
{
	struct sk_buff *skb = (struct sk_buff *)urb->context;
	struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
	struct ieee80211_hw *dev = info->dev;
	struct rtl8187_priv *priv = dev->priv;
	struct ieee80211_rx_status rx_status = { 0 };
	int rate, signal;
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	u32 flags;
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	unsigned long f;
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	spin_lock_irqsave(&priv->rx_queue.lock, f);
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	__skb_unlink(skb, &priv->rx_queue);
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	spin_unlock_irqrestore(&priv->rx_queue.lock, f);
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	skb_put(skb, urb->actual_length);
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	if (unlikely(urb->status)) {
		dev_kfree_skb_irq(skb);
		return;
	}

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	if (!priv->is_rtl8187b) {
		struct rtl8187_rx_hdr *hdr =
			(typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
		flags = le32_to_cpu(hdr->flags);
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		/* As with the RTL8187B below, the AGC is used to calculate
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		 * signal strength. In this case, the scaling
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		 * constants are derived from the output of p54usb.
		 */
		signal = -4 - ((27 * hdr->agc) >> 6);
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		rx_status.antenna = (hdr->signal >> 7) & 1;
		rx_status.mactime = le64_to_cpu(hdr->mac_time);
	} else {
		struct rtl8187b_rx_hdr *hdr =
			(typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
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		/* The Realtek datasheet for the RTL8187B shows that the RX
		 * header contains the following quantities: signal quality,
		 * RSSI, AGC, the received power in dB, and the measured SNR.
		 * In testing, none of these quantities show qualitative
		 * agreement with AP signal strength, except for the AGC,
		 * which is inversely proportional to the strength of the
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		 * signal. In the following, the signal strength
		 * is derived from the AGC. The arbitrary scaling constants
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		 * are chosen to make the results close to the values obtained
		 * for a BCM4312 using b43 as the driver. The noise is ignored
		 * for now.
		 */
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		flags = le32_to_cpu(hdr->flags);
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		signal = 14 - hdr->agc / 2;
		rx_status.antenna = (hdr->rssi >> 7) & 1;
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		rx_status.mactime = le64_to_cpu(hdr->mac_time);
	}
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	rx_status.signal = signal;
	priv->signal = signal;
	rate = (flags >> 20) & 0xF;
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	skb_trim(skb, flags & 0x0FFF);
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	rx_status.rate_idx = rate;
	rx_status.freq = dev->conf.channel->center_freq;
	rx_status.band = dev->conf.channel->band;
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	rx_status.flag |= RX_FLAG_TSFT;
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	if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
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		rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
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	memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
	ieee80211_rx_irqsafe(dev, skb);
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	skb = dev_alloc_skb(RTL8187_MAX_RX);
	if (unlikely(!skb)) {
		/* TODO check rx queue length and refill *somewhere* */
		return;
	}

	info = (struct rtl8187_rx_info *)skb->cb;
	info->urb = urb;
	info->dev = dev;
	urb->transfer_buffer = skb_tail_pointer(skb);
	urb->context = skb;
	skb_queue_tail(&priv->rx_queue, skb);

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	usb_anchor_urb(urb, &priv->anchored);
	if (usb_submit_urb(urb, GFP_ATOMIC)) {
		usb_unanchor_urb(urb);
		skb_unlink(skb, &priv->rx_queue);
		dev_kfree_skb_irq(skb);
	}
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}

static int rtl8187_init_urbs(struct ieee80211_hw *dev)
{
	struct rtl8187_priv *priv = dev->priv;
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	struct urb *entry = NULL;
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	struct sk_buff *skb;
	struct rtl8187_rx_info *info;
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	int ret = 0;
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	while (skb_queue_len(&priv->rx_queue) < 16) {
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		skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
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		if (!skb) {
			ret = -ENOMEM;
			goto err;
		}
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		entry = usb_alloc_urb(0, GFP_KERNEL);
		if (!entry) {
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			ret = -ENOMEM;
			goto err;
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		}
		usb_fill_bulk_urb(entry, priv->udev,
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				  usb_rcvbulkpipe(priv->udev,
				  priv->is_rtl8187b ? 3 : 1),
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				  skb_tail_pointer(skb),
				  RTL8187_MAX_RX, rtl8187_rx_cb, skb);
		info = (struct rtl8187_rx_info *)skb->cb;
		info->urb = entry;
		info->dev = dev;
		skb_queue_tail(&priv->rx_queue, skb);
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		usb_anchor_urb(entry, &priv->anchored);
		ret = usb_submit_urb(entry, GFP_KERNEL);
		if (ret) {
			skb_unlink(skb, &priv->rx_queue);
			usb_unanchor_urb(entry);
			goto err;
		}
		usb_free_urb(entry);
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	}
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	return ret;
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err:
	usb_free_urb(entry);
	kfree_skb(skb);
	usb_kill_anchored_urbs(&priv->anchored);
	return ret;
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}

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static void rtl8187b_status_cb(struct urb *urb)
{
	struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
	struct rtl8187_priv *priv = hw->priv;
	u64 val;
	unsigned int cmd_type;

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	if (unlikely(urb->status))
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		return;

	/*
	 * Read from status buffer:
	 *
	 * bits [30:31] = cmd type:
	 * - 0 indicates tx beacon interrupt
	 * - 1 indicates tx close descriptor
	 *
	 * In the case of tx beacon interrupt:
	 * [0:9] = Last Beacon CW
	 * [10:29] = reserved
	 * [30:31] = 00b
	 * [32:63] = Last Beacon TSF
	 *
	 * If it's tx close descriptor:
	 * [0:7] = Packet Retry Count
	 * [8:14] = RTS Retry Count
	 * [15] = TOK
	 * [16:27] = Sequence No
	 * [28] = LS
	 * [29] = FS
	 * [30:31] = 01b
	 * [32:47] = unused (reserved?)
	 * [48:63] = MAC Used Time
	 */
	val = le64_to_cpu(priv->b_tx_status.buf);

	cmd_type = (val >> 30) & 0x3;
	if (cmd_type == 1) {
		unsigned int pkt_rc, seq_no;
		bool tok;
		struct sk_buff *skb;
		struct ieee80211_hdr *ieee80211hdr;
		unsigned long flags;

		pkt_rc = val & 0xFF;
		tok = val & (1 << 15);
		seq_no = (val >> 16) & 0xFFF;

		spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
		skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
			ieee80211hdr = (struct ieee80211_hdr *)skb->data;

			/*
			 * While testing, it was discovered that the seq_no
			 * doesn't actually contains the sequence number.
			 * Instead of returning just the 12 bits of sequence
			 * number, hardware is returning entire sequence control
			 * (fragment number plus sequence number) in a 12 bit
			 * only field overflowing after some time. As a
			 * workaround, just consider the lower bits, and expect
			 * it's unlikely we wrongly ack some sent data
			 */
			if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
			    & 0xFFF) == seq_no)
				break;
		}
		if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
			struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);

			__skb_unlink(skb, &priv->b_tx_status.queue);
			if (tok)
				info->flags |= IEEE80211_TX_STAT_ACK;
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			info->status.rates[0].count = pkt_rc + 1;
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			ieee80211_tx_status_irqsafe(hw, skb);
		}
		spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
	}

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	usb_anchor_urb(urb, &priv->anchored);
	if (usb_submit_urb(urb, GFP_ATOMIC))
		usb_unanchor_urb(urb);
529 530 531 532 533 534
}

static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
{
	struct rtl8187_priv *priv = dev->priv;
	struct urb *entry;
535
	int ret = 0;
536 537 538 539 540 541 542 543 544

	entry = usb_alloc_urb(0, GFP_KERNEL);
	if (!entry)
		return -ENOMEM;

	usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
			  &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
			  rtl8187b_status_cb, dev);

545 546 547 548 549
	usb_anchor_urb(entry, &priv->anchored);
	ret = usb_submit_urb(entry, GFP_KERNEL);
	if (ret)
		usb_unanchor_urb(entry);
	usb_free_urb(entry);
550

551
	return ret;
552 553
}

554
static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
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{
	struct rtl8187_priv *priv = dev->priv;
	u8 reg;
	int i;

	reg = rtl818x_ioread8(priv, &priv->map->CMD);
	reg &= (1 << 1);
	reg |= RTL818X_CMD_RESET;
	rtl818x_iowrite8(priv, &priv->map->CMD, reg);

	i = 10;
	do {
		msleep(2);
		if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
		      RTL818X_CMD_RESET))
			break;
	} while (--i);

	if (!i) {
		printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
		return -ETIMEDOUT;
	}

	/* reload registers from eeprom */
	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);

	i = 10;
	do {
		msleep(4);
		if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
		      RTL818X_EEPROM_CMD_CONFIG))
			break;
	} while (--i);

	if (!i) {
		printk(KERN_ERR "%s: eeprom reset timeout!\n",
		       wiphy_name(dev->wiphy));
		return -ETIMEDOUT;
	}

595 596 597 598 599 600 601 602 603 604 605 606 607 608 609
	return 0;
}

static int rtl8187_init_hw(struct ieee80211_hw *dev)
{
	struct rtl8187_priv *priv = dev->priv;
	u8 reg;
	int res;

	/* reset */
	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
			 RTL818X_EEPROM_CMD_CONFIG);
	reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
	rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
			 RTL818X_CONFIG3_ANAPARAM_WRITE);
610 611 612 613
	rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
			  RTL8187_RTL8225_ANAPARAM_ON);
	rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
			  RTL8187_RTL8225_ANAPARAM2_ON);
614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630
	rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
			 ~RTL818X_CONFIG3_ANAPARAM_WRITE);
	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
			 RTL818X_EEPROM_CMD_NORMAL);

	rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);

	msleep(200);
	rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
	rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
	rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
	msleep(200);

	res = rtl8187_cmd_reset(dev);
	if (res)
		return res;

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	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
	reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
633 634
	rtl818x_iowrite8(priv, &priv->map->CONFIG3,
			reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
635 636 637 638
	rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
			  RTL8187_RTL8225_ANAPARAM_ON);
	rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
			  RTL8187_RTL8225_ANAPARAM2_ON);
639 640
	rtl818x_iowrite8(priv, &priv->map->CONFIG3,
			reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
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	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);

	/* setup card */
	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
645
	rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
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	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
648
	rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
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	rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);

	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);

	rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
	reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
	reg &= 0x3F;
	reg |= 0x80;
	rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);

	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);

	rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
	rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
663
	rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
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	// TODO: set RESP_RATE and BRSR properly
	rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
	rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);

	/* host_usb_init */
	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
671
	rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
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	reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
	rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
675
	rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
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	rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
	rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
	rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
	msleep(100);

	rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
	rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
	rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
685 686
	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
			 RTL818X_EEPROM_CMD_CONFIG);
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	rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
688 689
	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
			 RTL818X_EEPROM_CMD_NORMAL);
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	rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
	msleep(100);

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	priv->rf->init(dev);
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	rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
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	reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
	rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
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	rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
	rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
	rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
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	rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
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	return 0;
}

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static const u8 rtl8187b_reg_table[][3] = {
	{0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
	{0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
	{0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
	{0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},

	{0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
	{0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
	{0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
	{0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
	{0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
	{0xF7, 0x07, 1}, {0xF8, 0x08, 1},

	{0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
	{0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
	{0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
	{0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
	{0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
	{0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
	{0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
	{0x73, 0x9A, 2},

	{0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
	{0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
	{0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
	{0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
732
	{0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
733

734 735
	{0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
	{0x8F, 0x00, 0}
736 737 738 739 740 741 742 743 744 745 746 747 748 749
};

static int rtl8187b_init_hw(struct ieee80211_hw *dev)
{
	struct rtl8187_priv *priv = dev->priv;
	int res, i;
	u8 reg;

	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
			 RTL818X_EEPROM_CMD_CONFIG);

	reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
	reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
	rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
750 751 752 753 754 755
	rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
			  RTL8187B_RTL8225_ANAPARAM2_ON);
	rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
			  RTL8187B_RTL8225_ANAPARAM_ON);
	rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
			 RTL8187B_RTL8225_ANAPARAM3_ON);
756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825

	rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
	reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
	rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
	rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));

	reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
	reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
	rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);

	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
			 RTL818X_EEPROM_CMD_NORMAL);

	res = rtl8187_cmd_reset(dev);
	if (res)
		return res;

	rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
	reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
	reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
	rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
	reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
	reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
	       RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
	rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);

	rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);

	rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
	rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
	rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);

	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
			 RTL818X_EEPROM_CMD_CONFIG);
	reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
	rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
			 RTL818X_EEPROM_CMD_NORMAL);

	rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
	for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
		rtl818x_iowrite8_idx(priv,
				     (u8 *)(uintptr_t)
				     (rtl8187b_reg_table[i][0] | 0xFF00),
				     rtl8187b_reg_table[i][1],
				     rtl8187b_reg_table[i][2]);
	}

	rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
	rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);

	rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
	rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
	rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);

	rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);

	rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);

	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
			 RTL818X_EEPROM_CMD_CONFIG);
	reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
	reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
	rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
			 RTL818X_EEPROM_CMD_NORMAL);

	rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
	rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
L
Larry Finger 已提交
826
	msleep(100);
827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859

	priv->rf->init(dev);

	reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
	rtl818x_iowrite8(priv, &priv->map->CMD, reg);
	rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);

	rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
	rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
	rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
	rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
	rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
	rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
	rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);

	reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
	rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
	rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
	rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
	rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
	rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
	rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
	rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
	rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
	rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
	rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
	rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
	rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);

	rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);

	rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);

860 861 862 863 864 865 866
	priv->slot_time = 0x9;
	priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
	priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
	priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
	priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
	rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);

867 868 869
	/* ENEDCA flag must always be set, transmit issues? */
	rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);

870 871 872
	return 0;
}

873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900
static void rtl8187_work(struct work_struct *work)
{
	/* The RTL8187 returns the retry count through register 0xFFFA. In
	 * addition, it appears to be a cumulative retry count, not the
	 * value for the current TX packet. When multiple TX entries are
	 * queued, the retry count will be valid for the last one in the queue.
	 * The "error" should not matter for purposes of rate setting. */
	struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
				    work.work);
	struct ieee80211_tx_info *info;
	struct ieee80211_hw *dev = priv->dev;
	static u16 retry;
	u16 tmp;

	mutex_lock(&priv->conf_mutex);
	tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
	while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
		struct sk_buff *old_skb;

		old_skb = skb_dequeue(&priv->b_tx_status.queue);
		info = IEEE80211_SKB_CB(old_skb);
		info->status.rates[0].count = tmp - retry + 1;
		ieee80211_tx_status_irqsafe(dev, old_skb);
	}
	retry = tmp;
	mutex_unlock(&priv->conf_mutex);
}

901
static int rtl8187_start(struct ieee80211_hw *dev)
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902 903 904 905 906
{
	struct rtl8187_priv *priv = dev->priv;
	u32 reg;
	int ret;

907 908
	mutex_lock(&priv->conf_mutex);

909 910
	ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
				     rtl8187b_init_hw(dev);
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Michael Wu 已提交
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	if (ret)
912
		goto rtl8187_start_exit;
913 914

	init_usb_anchor(&priv->anchored);
915
	priv->dev = dev;
916

917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937
	if (priv->is_rtl8187b) {
		reg = RTL818X_RX_CONF_MGMT |
		      RTL818X_RX_CONF_DATA |
		      RTL818X_RX_CONF_BROADCAST |
		      RTL818X_RX_CONF_NICMAC |
		      RTL818X_RX_CONF_BSSID |
		      (7 << 13 /* RX FIFO threshold NONE */) |
		      (7 << 10 /* MAX RX DMA */) |
		      RTL818X_RX_CONF_RX_AUTORESETPHY |
		      RTL818X_RX_CONF_ONLYERLPKT |
		      RTL818X_RX_CONF_MULTICAST;
		priv->rx_conf = reg;
		rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);

		rtl818x_iowrite32(priv, &priv->map->TX_CONF,
				  RTL818X_TX_CONF_HW_SEQNUM |
				  RTL818X_TX_CONF_DISREQQSIZE |
				  (7 << 8  /* short retry limit */) |
				  (7 << 0  /* long retry limit */) |
				  (7 << 21 /* MAX TX DMA */));
		rtl8187_init_urbs(dev);
938
		rtl8187b_init_status_urb(dev);
939
		goto rtl8187_start_exit;
940 941
	}

M
Michael Wu 已提交
942 943
	rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);

944 945 946
	rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
	rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);

M
Michael Wu 已提交
947 948 949 950 951 952 953 954 955 956 957 958
	rtl8187_init_urbs(dev);

	reg = RTL818X_RX_CONF_ONLYERLPKT |
	      RTL818X_RX_CONF_RX_AUTORESETPHY |
	      RTL818X_RX_CONF_BSSID |
	      RTL818X_RX_CONF_MGMT |
	      RTL818X_RX_CONF_DATA |
	      (7 << 13 /* RX FIFO threshold NONE */) |
	      (7 << 10 /* MAX RX DMA */) |
	      RTL818X_RX_CONF_BROADCAST |
	      RTL818X_RX_CONF_NICMAC;

959
	priv->rx_conf = reg;
M
Michael Wu 已提交
960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981
	rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);

	reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
	reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
	reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
	rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);

	reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
	reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
	reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
	reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
	rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);

	reg  = RTL818X_TX_CONF_CW_MIN |
	       (7 << 21 /* MAX TX DMA */) |
	       RTL818X_TX_CONF_NO_ICV;
	rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);

	reg = rtl818x_ioread8(priv, &priv->map->CMD);
	reg |= RTL818X_CMD_TX_ENABLE;
	reg |= RTL818X_CMD_RX_ENABLE;
	rtl818x_iowrite8(priv, &priv->map->CMD, reg);
982
	INIT_DELAYED_WORK(&priv->work, rtl8187_work);
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Michael Wu 已提交
983

984 985 986
rtl8187_start_exit:
	mutex_unlock(&priv->conf_mutex);
	return ret;
M
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987 988
}

989
static void rtl8187_stop(struct ieee80211_hw *dev)
M
Michael Wu 已提交
990 991 992 993 994
{
	struct rtl8187_priv *priv = dev->priv;
	struct sk_buff *skb;
	u32 reg;

995
	mutex_lock(&priv->conf_mutex);
M
Michael Wu 已提交
996 997 998 999 1000 1001 1002
	rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);

	reg = rtl818x_ioread8(priv, &priv->map->CMD);
	reg &= ~RTL818X_CMD_TX_ENABLE;
	reg &= ~RTL818X_CMD_RX_ENABLE;
	rtl818x_iowrite8(priv, &priv->map->CMD, reg);

M
Michael Wu 已提交
1003
	priv->rf->stop(dev);
M
Michael Wu 已提交
1004 1005 1006 1007 1008 1009

	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
	reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
	rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);

1010 1011
	while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
		dev_kfree_skb_any(skb);
1012 1013

	usb_kill_anchored_urbs(&priv->anchored);
1014 1015
	mutex_unlock(&priv->conf_mutex);

1016 1017
	if (!priv->is_rtl8187b)
		cancel_delayed_work_sync(&priv->work);
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1018 1019 1020 1021 1022 1023
}

static int rtl8187_add_interface(struct ieee80211_hw *dev,
				 struct ieee80211_if_init_conf *conf)
{
	struct rtl8187_priv *priv = dev->priv;
1024
	int i;
1025
	int ret = -EOPNOTSUPP;
M
Michael Wu 已提交
1026

1027
	mutex_lock(&priv->conf_mutex);
1028
	if (priv->mode != NL80211_IFTYPE_MONITOR)
1029
		goto exit;
M
Michael Wu 已提交
1030 1031

	switch (conf->type) {
1032
	case NL80211_IFTYPE_STATION:
M
Michael Wu 已提交
1033 1034 1035
		priv->mode = conf->type;
		break;
	default:
1036
		goto exit;
M
Michael Wu 已提交
1037 1038
	}

1039
	ret = 0;
1040 1041
	priv->vif = conf->vif;

1042 1043 1044 1045 1046
	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
	for (i = 0; i < ETH_ALEN; i++)
		rtl818x_iowrite8(priv, &priv->map->MAC[i],
				 ((u8 *)conf->mac_addr)[i]);
	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
M
Michael Wu 已提交
1047

1048
exit:
1049
	mutex_unlock(&priv->conf_mutex);
1050
	return ret;
M
Michael Wu 已提交
1051 1052 1053 1054 1055 1056
}

static void rtl8187_remove_interface(struct ieee80211_hw *dev,
				     struct ieee80211_if_init_conf *conf)
{
	struct rtl8187_priv *priv = dev->priv;
1057
	mutex_lock(&priv->conf_mutex);
1058
	priv->mode = NL80211_IFTYPE_MONITOR;
1059
	priv->vif = NULL;
1060
	mutex_unlock(&priv->conf_mutex);
M
Michael Wu 已提交
1061 1062
}

1063
static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
M
Michael Wu 已提交
1064 1065
{
	struct rtl8187_priv *priv = dev->priv;
1066
	struct ieee80211_conf *conf = &dev->conf;
M
Michael Wu 已提交
1067 1068
	u32 reg;

1069
	mutex_lock(&priv->conf_mutex);
M
Michael Wu 已提交
1070 1071 1072 1073 1074 1075 1076 1077 1078 1079
	reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
	/* Enable TX loopback on MAC level to avoid TX during channel
	 * changes, as this has be seen to causes problems and the
	 * card will stop work until next reset
	 */
	rtl818x_iowrite32(priv, &priv->map->TX_CONF,
			  reg | RTL818X_TX_CONF_LOOPBACK_MAC);
	priv->rf->set_chan(dev, conf);
	msleep(10);
	rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
M
Michael Wu 已提交
1080 1081 1082 1083 1084

	rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
	rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
	rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
	rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1085
	mutex_unlock(&priv->conf_mutex);
M
Michael Wu 已提交
1086 1087 1088
	return 0;
}

1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101
/*
 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
 * example. Thus we have to use raw values for AC_*_PARAM register addresses.
 */
static __le32 *rtl8187b_ac_addr[4] = {
	(__le32 *) 0xFFF0, /* AC_VO */
	(__le32 *) 0xFFF4, /* AC_VI */
	(__le32 *) 0xFFFC, /* AC_BK */
	(__le32 *) 0xFFF8, /* AC_BE */
};

#define SIFS_TIME 0xa

1102 1103
static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
			     bool use_short_preamble)
1104
{
1105
	if (priv->is_rtl8187b) {
1106
		u8 difs, eifs;
1107
		u16 ack_timeout;
1108
		int queue;
1109 1110

		if (use_short_slot) {
1111
			priv->slot_time = 0x9;
1112 1113 1114
			difs = 0x1c;
			eifs = 0x53;
		} else {
1115
			priv->slot_time = 0x14;
1116 1117 1118
			difs = 0x32;
			eifs = 0x5b;
		}
1119
		rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1120
		rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140
		rtl818x_iowrite8(priv, &priv->map->DIFS, difs);

		/*
		 * BRSR+1 on 8187B is in fact EIFS register
		 * Value in units of 4 us
		 */
		rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);

		/*
		 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
		 * register. In units of 4 us like eifs register
		 * ack_timeout = ack duration + plcp + difs + preamble
		 */
		ack_timeout = 112 + 48 + difs;
		if (use_short_preamble)
			ack_timeout += 72;
		else
			ack_timeout += 144;
		rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
				 DIV_ROUND_UP(ack_timeout, 4));
1141 1142 1143 1144 1145

		for (queue = 0; queue < 4; queue++)
			rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
					 priv->aifsn[queue] * priv->slot_time +
					 SIFS_TIME);
1146
	} else {
1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165
		rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
		if (use_short_slot) {
			rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
			rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
			rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
		} else {
			rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
			rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
			rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
		}
	}
}

static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
				     struct ieee80211_vif *vif,
				     struct ieee80211_bss_conf *info,
				     u32 changed)
{
	struct rtl8187_priv *priv = dev->priv;
1166 1167 1168 1169 1170 1171 1172 1173 1174
	int i;
	u8 reg;

	if (changed & BSS_CHANGED_BSSID) {
		mutex_lock(&priv->conf_mutex);
		for (i = 0; i < ETH_ALEN; i++)
			rtl818x_iowrite8(priv, &priv->map->BSSID[i],
					 info->bssid[i]);

1175 1176 1177 1178 1179
		if (priv->is_rtl8187b)
			reg = RTL818X_MSR_ENEDCA;
		else
			reg = 0;

1180
		if (is_valid_ether_addr(info->bssid)) {
1181
			reg |= RTL818X_MSR_INFRA;
1182 1183
			rtl818x_iowrite8(priv, &priv->map->MSR, reg);
		} else {
1184
			reg |= RTL818X_MSR_NO_LINK;
1185 1186 1187 1188 1189
			rtl818x_iowrite8(priv, &priv->map->MSR, reg);
		}

		mutex_unlock(&priv->conf_mutex);
	}
1190

1191 1192 1193
	if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
		rtl8187_conf_erp(priv, info->use_short_slot,
				 info->use_short_preamble);
1194 1195
}

1196 1197 1198 1199 1200 1201
static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
				     int mc_count, struct dev_addr_list *mc_list)
{
	return mc_count;
}

1202 1203 1204
static void rtl8187_configure_filter(struct ieee80211_hw *dev,
				     unsigned int changed_flags,
				     unsigned int *total_flags,
1205
				     u64 multicast)
1206 1207 1208 1209 1210 1211 1212 1213 1214
{
	struct rtl8187_priv *priv = dev->priv;

	if (changed_flags & FIF_FCSFAIL)
		priv->rx_conf ^= RTL818X_RX_CONF_FCS;
	if (changed_flags & FIF_CONTROL)
		priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
	if (changed_flags & FIF_OTHER_BSS)
		priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1215
	if (*total_flags & FIF_ALLMULTI || multicast > 0)
1216
		priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1217 1218 1219 1220
	else
		priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;

	*total_flags = 0;
1221 1222 1223 1224 1225 1226 1227

	if (priv->rx_conf & RTL818X_RX_CONF_FCS)
		*total_flags |= FIF_FCSFAIL;
	if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
		*total_flags |= FIF_CONTROL;
	if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
		*total_flags |= FIF_OTHER_BSS;
1228 1229
	if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
		*total_flags |= FIF_ALLMULTI;
1230 1231 1232 1233

	rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
}

1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269
static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
			   const struct ieee80211_tx_queue_params *params)
{
	struct rtl8187_priv *priv = dev->priv;
	u8 cw_min, cw_max;

	if (queue > 3)
		return -EINVAL;

	cw_min = fls(params->cw_min);
	cw_max = fls(params->cw_max);

	if (priv->is_rtl8187b) {
		priv->aifsn[queue] = params->aifs;

		/*
		 * This is the structure of AC_*_PARAM registers in 8187B:
		 * - TXOP limit field, bit offset = 16
		 * - ECWmax, bit offset = 12
		 * - ECWmin, bit offset = 8
		 * - AIFS, bit offset = 0
		 */
		rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
				  (params->txop << 16) | (cw_max << 12) |
				  (cw_min << 8) | (params->aifs *
				  priv->slot_time + SIFS_TIME));
	} else {
		if (queue != 0)
			return -EINVAL;

		rtl818x_iowrite8(priv, &priv->map->CW_VAL,
				 cw_min | (cw_max << 4));
	}
	return 0;
}

M
Michael Wu 已提交
1270 1271
static const struct ieee80211_ops rtl8187_ops = {
	.tx			= rtl8187_tx,
1272
	.start			= rtl8187_start,
M
Michael Wu 已提交
1273 1274 1275 1276
	.stop			= rtl8187_stop,
	.add_interface		= rtl8187_add_interface,
	.remove_interface	= rtl8187_remove_interface,
	.config			= rtl8187_config,
1277
	.bss_info_changed	= rtl8187_bss_info_changed,
1278
	.prepare_multicast	= rtl8187_prepare_multicast,
1279
	.configure_filter	= rtl8187_configure_filter,
1280 1281
	.conf_tx		= rtl8187_conf_tx,
	.rfkill_poll		= rtl8187_rfkill_poll
M
Michael Wu 已提交
1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322
};

static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
{
	struct ieee80211_hw *dev = eeprom->data;
	struct rtl8187_priv *priv = dev->priv;
	u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);

	eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
	eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
	eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
	eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
}

static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
{
	struct ieee80211_hw *dev = eeprom->data;
	struct rtl8187_priv *priv = dev->priv;
	u8 reg = RTL818X_EEPROM_CMD_PROGRAM;

	if (eeprom->reg_data_in)
		reg |= RTL818X_EEPROM_CMD_WRITE;
	if (eeprom->reg_data_out)
		reg |= RTL818X_EEPROM_CMD_READ;
	if (eeprom->reg_data_clock)
		reg |= RTL818X_EEPROM_CMD_CK;
	if (eeprom->reg_chip_select)
		reg |= RTL818X_EEPROM_CMD_CS;

	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
	udelay(10);
}

static int __devinit rtl8187_probe(struct usb_interface *intf,
				   const struct usb_device_id *id)
{
	struct usb_device *udev = interface_to_usbdev(intf);
	struct ieee80211_hw *dev;
	struct rtl8187_priv *priv;
	struct eeprom_93cx6 eeprom;
	struct ieee80211_channel *channel;
1323
	const char *chip_name;
M
Michael Wu 已提交
1324
	u16 txpwr, reg;
1325
	u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
M
Michael Wu 已提交
1326 1327 1328 1329 1330 1331 1332 1333 1334
	int err, i;

	dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
	if (!dev) {
		printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
		return -ENOMEM;
	}

	priv = dev->priv;
1335
	priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
M
Michael Wu 已提交
1336

1337 1338 1339 1340 1341 1342 1343 1344
	/* allocate "DMA aware" buffer for register accesses */
	priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
	if (!priv->io_dmabuf) {
		err = -ENOMEM;
		goto err_free_dev;
	}
	mutex_init(&priv->io_mutex);

M
Michael Wu 已提交
1345 1346 1347 1348 1349 1350 1351
	SET_IEEE80211_DEV(dev, &intf->dev);
	usb_set_intfdata(intf, dev);
	priv->udev = udev;

	usb_get_dev(udev);

	skb_queue_head_init(&priv->rx_queue);
1352 1353 1354 1355

	BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
	BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));

M
Michael Wu 已提交
1356 1357 1358
	memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
	memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
	priv->map = (struct rtl818x_csr *)0xFF00;
1359 1360 1361 1362 1363 1364 1365 1366 1367

	priv->band.band = IEEE80211_BAND_2GHZ;
	priv->band.channels = priv->channels;
	priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
	priv->band.bitrates = priv->rates;
	priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
	dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;


1368
	priv->mode = NL80211_IFTYPE_MONITOR;
M
Michael Wu 已提交
1369
	dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1370
		     IEEE80211_HW_SIGNAL_DBM |
1371
		     IEEE80211_HW_RX_INCLUDES_FCS;
M
Michael Wu 已提交
1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395

	eeprom.data = dev;
	eeprom.register_read = rtl8187_eeprom_register_read;
	eeprom.register_write = rtl8187_eeprom_register_write;
	if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
		eeprom.width = PCI_EEPROM_WIDTH_93C66;
	else
		eeprom.width = PCI_EEPROM_WIDTH_93C46;

	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
	udelay(10);

	eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
			       (__le16 __force *)dev->wiphy->perm_addr, 3);
	if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
		printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
		       "generated MAC address\n");
		random_ether_addr(dev->wiphy->perm_addr);
	}

	channel = priv->channels;
	for (i = 0; i < 3; i++) {
		eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
				  &txpwr);
1396 1397
		(*channel++).hw_value = txpwr & 0xFF;
		(*channel++).hw_value = txpwr >> 8;
M
Michael Wu 已提交
1398 1399 1400 1401
	}
	for (i = 0; i < 2; i++) {
		eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
				  &txpwr);
1402 1403
		(*channel++).hw_value = txpwr & 0xFF;
		(*channel++).hw_value = txpwr >> 8;
M
Michael Wu 已提交
1404 1405 1406 1407 1408
	}

	eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
			  &priv->txpwr_base);

M
Michael Wu 已提交
1409 1410
	reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
	rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
M
Michael Wu 已提交
1411 1412 1413 1414
	/* 0 means asic B-cut, we should use SW 3 wire
	 * bit-by-bit banging for radio. 1 means we can use
	 * USB specific request to write radio registers */
	priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
M
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	rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
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	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);

1418 1419 1420 1421 1422
	if (!priv->is_rtl8187b) {
		u32 reg32;
		reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
		reg32 &= RTL818X_TX_CONF_HWVER_MASK;
		switch (reg32) {
1423 1424 1425 1426 1427 1428 1429 1430
		case RTL818X_TX_CONF_R8187vD_B:
			/* Some RTL8187B devices have a USB ID of 0x8187
			 * detect them here */
			chip_name = "RTL8187BvB(early)";
			priv->is_rtl8187b = 1;
			priv->hw_rev = RTL8187BvB;
			break;
		case RTL818X_TX_CONF_R8187vD:
1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464
			chip_name = "RTL8187vD";
			break;
		default:
			chip_name = "RTL8187vB (default)";
		}
       } else {
		/*
		 * Force USB request to write radio registers for 8187B, Realtek
		 * only uses it in their sources
		 */
		/*if (priv->asic_rev == 0) {
			printk(KERN_WARNING "rtl8187: Forcing use of USB "
			       "requests to write to radio registers\n");
			priv->asic_rev = 1;
		}*/
		switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
		case RTL818X_R8187B_B:
			chip_name = "RTL8187BvB";
			priv->hw_rev = RTL8187BvB;
			break;
		case RTL818X_R8187B_D:
			chip_name = "RTL8187BvD";
			priv->hw_rev = RTL8187BvD;
			break;
		case RTL818X_R8187B_E:
			chip_name = "RTL8187BvE";
			priv->hw_rev = RTL8187BvE;
			break;
		default:
			chip_name = "RTL8187BvB (default)";
			priv->hw_rev = RTL8187BvB;
		}
	}

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	if (!priv->is_rtl8187b) {
		for (i = 0; i < 2; i++) {
			eeprom_93cx6_read(&eeprom,
					  RTL8187_EEPROM_TXPWR_CHAN_6 + i,
					  &txpwr);
			(*channel++).hw_value = txpwr & 0xFF;
			(*channel++).hw_value = txpwr >> 8;
		}
	} else {
		eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
				  &txpwr);
		(*channel++).hw_value = txpwr & 0xFF;

		eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
		(*channel++).hw_value = txpwr & 0xFF;

		eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
		(*channel++).hw_value = txpwr & 0xFF;
		(*channel++).hw_value = txpwr >> 8;
	}
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	/* Handle the differing rfkill GPIO bit in different models */
	priv->rfkill_mask = RFKILL_MASK_8187_89_97;
	if (product_id == 0x8197 || product_id == 0x8198) {
		eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
		if (reg & 0xFF00)
			priv->rfkill_mask = RFKILL_MASK_8198;
	}
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	/*
	 * XXX: Once this driver supports anything that requires
	 *	beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
	 */
1497 1498
	dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);

1499 1500 1501 1502
	if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
		printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
		       " info!\n");

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	priv->rf = rtl8187_detect_rf(dev);
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	dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
				  sizeof(struct rtl8187_tx_hdr) :
				  sizeof(struct rtl8187b_tx_hdr);
	if (!priv->is_rtl8187b)
		dev->queues = 1;
	else
		dev->queues = 4;
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	err = ieee80211_register_hw(dev);
	if (err) {
		printk(KERN_ERR "rtl8187: Cannot register device\n");
1515
		goto err_free_dmabuf;
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	}
1517
	mutex_init(&priv->conf_mutex);
1518
	skb_queue_head_init(&priv->b_tx_status.queue);
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1520
	printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
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Johannes Berg 已提交
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	       wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1522
	       chip_name, priv->asic_rev, priv->rf->name, priv->rfkill_mask);
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1524 1525 1526 1527 1528
#ifdef CONFIG_RTL8187_LEDS
	eeprom_93cx6_read(&eeprom, 0x3F, &reg);
	reg &= 0xFF;
	rtl8187_leds_init(dev, reg);
#endif
1529
	rtl8187_rfkill_init(dev);
1530

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	return 0;

1533 1534
 err_free_dmabuf:
	kfree(priv->io_dmabuf);
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 err_free_dev:
	ieee80211_free_hw(dev);
	usb_set_intfdata(intf, NULL);
	usb_put_dev(udev);
	return err;
}

static void __devexit rtl8187_disconnect(struct usb_interface *intf)
{
	struct ieee80211_hw *dev = usb_get_intfdata(intf);
	struct rtl8187_priv *priv;

	if (!dev)
		return;

1550 1551 1552
#ifdef CONFIG_RTL8187_LEDS
	rtl8187_leds_exit(dev);
#endif
1553
	rtl8187_rfkill_exit(dev);
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	ieee80211_unregister_hw(dev);

	priv = dev->priv;
1557
	usb_reset_device(priv->udev);
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	usb_put_dev(interface_to_usbdev(intf));
1559
	kfree(priv->io_dmabuf);
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	ieee80211_free_hw(dev);
}

static struct usb_driver rtl8187_driver = {
	.name		= KBUILD_MODNAME,
	.id_table	= rtl8187_table,
	.probe		= rtl8187_probe,
1567
	.disconnect	= __devexit_p(rtl8187_disconnect),
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};

static int __init rtl8187_init(void)
{
	return usb_register(&rtl8187_driver);
}

static void __exit rtl8187_exit(void)
{
	usb_deregister(&rtl8187_driver);
}

module_init(rtl8187_init);
module_exit(rtl8187_exit);