hda_intel.c 64.3 KB
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/*
 *
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 *  hda_intel.c - Implementation of primary alsa driver code base
 *                for Intel HD Audio.
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 *
 *  Copyright(c) 2004 Intel Corporation. All rights reserved.
 *
 *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
 *                     PeiSen Hou <pshou@realtek.com.tw>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License as published by the Free
 *  Software Foundation; either version 2 of the License, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 *  more details.
 *
 *  You should have received a copy of the GNU General Public License along with
 *  this program; if not, write to the Free Software Foundation, Inc., 59
 *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 *
 *  CONTACTS:
 *
 *  Matt Jared		matt.jared@intel.com
 *  Andy Kopp		andy.kopp@intel.com
 *  Dan Kogan		dan.d.kogan@intel.com
 *
 *  CHANGES:
 *
 *  2004.12.01	Major rewrite by tiwai, merged the work of pshou
 * 
 */

#include <linux/delay.h>
#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/dma-mapping.h>
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#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/pci.h>
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#include <linux/mutex.h>
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#include <linux/io.h>
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#include <linux/pm_runtime.h>
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#include <linux/clocksource.h>
#include <linux/time.h>
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#include <linux/completion.h>
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#ifdef CONFIG_X86
/* for snoop control */
#include <asm/pgtable.h>
#include <asm/cacheflush.h>
#endif
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#include <sound/core.h>
#include <sound/initval.h>
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#include <sound/hdaudio.h>
#include <sound/hda_i915.h>
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#include <linux/vgaarb.h>
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#include <linux/vga_switcheroo.h>
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#include <linux/firmware.h>
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#include "hda_codec.h"
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#include "hda_controller.h"
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#include "hda_intel.h"
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#define CREATE_TRACE_POINTS
#include "hda_intel_trace.h"

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/* position fix mode */
enum {
	POS_FIX_AUTO,
	POS_FIX_LPIB,
	POS_FIX_POSBUF,
	POS_FIX_VIACOMBO,
	POS_FIX_COMBO,
};

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/* Defines for ATI HD Audio support in SB450 south bridge */
#define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
#define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02

/* Defines for Nvidia HDA support */
#define NVIDIA_HDA_TRANSREG_ADDR      0x4e
#define NVIDIA_HDA_ENABLE_COHBITS     0x0f
#define NVIDIA_HDA_ISTRM_COH          0x4d
#define NVIDIA_HDA_OSTRM_COH          0x4c
#define NVIDIA_HDA_ENABLE_COHBIT      0x01

/* Defines for Intel SCH HDA snoop control */
#define INTEL_SCH_HDA_DEVC      0x78
#define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)

/* Define IN stream 0 FIFO size offset in VIA controller */
#define VIA_IN_STREAM0_FIFO_SIZE_OFFSET	0x90
/* Define VIA HD Audio Device ID*/
#define VIA_HDAC_DEVICE_ID		0x3288

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/* max number of SDs */
/* ICH, ATI and VIA have 4 playback and 4 capture */
#define ICH6_NUM_CAPTURE	4
#define ICH6_NUM_PLAYBACK	4

/* ULI has 6 playback and 5 capture */
#define ULI_NUM_CAPTURE		5
#define ULI_NUM_PLAYBACK	6

/* ATI HDMI may have up to 8 playbacks and 0 capture */
#define ATIHDMI_NUM_CAPTURE	0
#define ATIHDMI_NUM_PLAYBACK	8

/* TERA has 4 playback and 3 capture */
#define TERA_NUM_CAPTURE	3
#define TERA_NUM_PLAYBACK	4

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static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
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static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
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static char *model[SNDRV_CARDS];
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static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int probe_only[SNDRV_CARDS];
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static int jackpoll_ms[SNDRV_CARDS];
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static bool single_cmd;
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static int enable_msi = -1;
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#ifdef CONFIG_SND_HDA_PATCH_LOADER
static char *patch[SNDRV_CARDS];
#endif
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#ifdef CONFIG_SND_HDA_INPUT_BEEP
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static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
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					CONFIG_SND_HDA_INPUT_BEEP_MODE};
#endif
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module_param_array(index, int, NULL, 0444);
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MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
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module_param_array(id, charp, NULL, 0444);
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MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
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module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
module_param_array(model, charp, NULL, 0444);
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MODULE_PARM_DESC(model, "Use the given board model.");
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module_param_array(position_fix, int, NULL, 0444);
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MODULE_PARM_DESC(position_fix, "DMA pointer read method."
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		 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
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module_param_array(bdl_pos_adj, int, NULL, 0644);
MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
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module_param_array(probe_mask, int, NULL, 0444);
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MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
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module_param_array(probe_only, int, NULL, 0444);
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MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
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module_param_array(jackpoll_ms, int, NULL, 0444);
MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
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module_param(single_cmd, bool, 0444);
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MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
		 "(for debugging only).");
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module_param(enable_msi, bint, 0444);
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MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
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#ifdef CONFIG_SND_HDA_PATCH_LOADER
module_param_array(patch, charp, NULL, 0444);
MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
#endif
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#ifdef CONFIG_SND_HDA_INPUT_BEEP
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module_param_array(beep_mode, bool, NULL, 0444);
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MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
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			    "(0=off, 1=on) (default=1).");
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#endif
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#ifdef CONFIG_PM
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static int param_set_xint(const char *val, const struct kernel_param *kp);
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static const struct kernel_param_ops param_ops_xint = {
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	.set = param_set_xint,
	.get = param_get_int,
};
#define param_check_xint param_check_int

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static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
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module_param(power_save, xint, 0644);
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MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
		 "(in second, 0 = disable).");
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/* reset the HD-audio controller in power save mode.
 * this may give more power-saving, but will take longer time to
 * wake up.
 */
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static bool power_save_controller = 1;
module_param(power_save_controller, bool, 0644);
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MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
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#else
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#define power_save	0
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#endif /* CONFIG_PM */
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static int align_buffer_size = -1;
module_param(align_buffer_size, bint, 0644);
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MODULE_PARM_DESC(align_buffer_size,
		"Force buffer and period sizes to be multiple of 128 bytes.");

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#ifdef CONFIG_X86
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static int hda_snoop = -1;
module_param_named(snoop, hda_snoop, bint, 0444);
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MODULE_PARM_DESC(snoop, "Enable/disable snooping");
#else
#define hda_snoop		true
#endif


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MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
			 "{Intel, ICH6M},"
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			 "{Intel, ICH7},"
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			 "{Intel, ESB2},"
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			 "{Intel, ICH8},"
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			 "{Intel, ICH9},"
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			 "{Intel, ICH10},"
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			 "{Intel, PCH},"
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			 "{Intel, CPT},"
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			 "{Intel, PPT},"
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			 "{Intel, LPT},"
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			 "{Intel, LPT_LP},"
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			 "{Intel, WPT_LP},"
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			 "{Intel, SPT},"
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			 "{Intel, SPT_LP},"
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			 "{Intel, HPT},"
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			 "{Intel, PBG},"
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			 "{Intel, SCH},"
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			 "{ATI, SB450},"
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			 "{ATI, SB600},"
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			 "{ATI, RS600},"
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			 "{ATI, RS690},"
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			 "{ATI, RS780},"
			 "{ATI, R600},"
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			 "{ATI, RV630},"
			 "{ATI, RV610},"
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			 "{ATI, RV670},"
			 "{ATI, RV635},"
			 "{ATI, RV620},"
			 "{ATI, RV770},"
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			 "{VIA, VT8251},"
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			 "{VIA, VT8237A},"
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			 "{SiS, SIS966},"
			 "{ULI, M5461}}");
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MODULE_DESCRIPTION("Intel HDA driver");

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#if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
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#if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
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#define SUPPORT_VGA_SWITCHEROO
#endif
#endif


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/*
 */

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/* driver types */
enum {
	AZX_DRIVER_ICH,
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	AZX_DRIVER_PCH,
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	AZX_DRIVER_SCH,
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	AZX_DRIVER_HDMI,
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	AZX_DRIVER_ATI,
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	AZX_DRIVER_ATIHDMI,
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	AZX_DRIVER_ATIHDMI_NS,
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	AZX_DRIVER_VIA,
	AZX_DRIVER_SIS,
	AZX_DRIVER_ULI,
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	AZX_DRIVER_NVIDIA,
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	AZX_DRIVER_TERA,
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	AZX_DRIVER_CTX,
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	AZX_DRIVER_CTHDA,
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	AZX_DRIVER_CMEDIA,
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	AZX_DRIVER_GENERIC,
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	AZX_NUM_DRIVERS, /* keep this as last entry */
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};

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#define azx_get_snoop_type(chip) \
	(((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
#define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)

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/* quirks for old Intel chipsets */
#define AZX_DCAPS_INTEL_ICH \
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	(AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
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/* quirks for Intel PCH */
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#define AZX_DCAPS_INTEL_PCH_BASE \
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	(AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
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	 AZX_DCAPS_REVERSE_ASSIGN | AZX_DCAPS_SNOOP_TYPE(SCH))
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/* PCH up to IVB; bound with i915 audio component for HDMI, no runtime PM */
#define AZX_DCAPS_INTEL_PCH_NOPM \
	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_POWERWELL)

/* PCH for HSW/BDW; with runtime PM, but no i915 binding */
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#define AZX_DCAPS_INTEL_PCH \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME)
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/* HSW HDMI */
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#define AZX_DCAPS_INTEL_HASWELL \
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	(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
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	 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
	 AZX_DCAPS_SNOOP_TYPE(SCH))
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/* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
#define AZX_DCAPS_INTEL_BROADWELL \
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	(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
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	 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
	 AZX_DCAPS_SNOOP_TYPE(SCH))
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#define AZX_DCAPS_INTEL_BAYTRAIL \
	(AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_I915_POWERWELL)

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#define AZX_DCAPS_INTEL_BRASWELL \
	(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_I915_POWERWELL)

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#define AZX_DCAPS_INTEL_SKYLAKE \
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	(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
	 AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_BROXTON \
	(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
	 AZX_DCAPS_I915_POWERWELL)

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/* quirks for ATI SB / AMD Hudson */
#define AZX_DCAPS_PRESET_ATI_SB \
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	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
	 AZX_DCAPS_SNOOP_TYPE(ATI))
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/* quirks for ATI/AMD HDMI */
#define AZX_DCAPS_PRESET_ATI_HDMI \
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	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
	 AZX_DCAPS_NO_MSI64)
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/* quirks for ATI HDMI with snoop off */
#define AZX_DCAPS_PRESET_ATI_HDMI_NS \
	(AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)

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/* quirks for Nvidia */
#define AZX_DCAPS_PRESET_NVIDIA \
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	(AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI | /*AZX_DCAPS_ALIGN_BUFSIZE |*/ \
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	 AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
	 AZX_DCAPS_SNOOP_TYPE(NVIDIA))
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#define AZX_DCAPS_PRESET_CTHDA \
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	(AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
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	 AZX_DCAPS_NO_64BIT |\
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	 AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
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/*
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 * vga_switcheroo support
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 */
#ifdef SUPPORT_VGA_SWITCHEROO
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#define use_vga_switcheroo(chip)	((chip)->use_vga_switcheroo)
#else
#define use_vga_switcheroo(chip)	0
#endif

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#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
					((pci)->device == 0x0c0c) || \
					((pci)->device == 0x0d0c) || \
					((pci)->device == 0x160c))

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static char *driver_short_names[] = {
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	[AZX_DRIVER_ICH] = "HDA Intel",
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	[AZX_DRIVER_PCH] = "HDA Intel PCH",
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	[AZX_DRIVER_SCH] = "HDA Intel MID",
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	[AZX_DRIVER_HDMI] = "HDA Intel HDMI",
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	[AZX_DRIVER_ATI] = "HDA ATI SB",
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	[AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
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	[AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
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	[AZX_DRIVER_VIA] = "HDA VIA VT82xx",
	[AZX_DRIVER_SIS] = "HDA SIS966",
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	[AZX_DRIVER_ULI] = "HDA ULI M5461",
	[AZX_DRIVER_NVIDIA] = "HDA NVidia",
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	[AZX_DRIVER_TERA] = "HDA Teradici", 
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	[AZX_DRIVER_CTX] = "HDA Creative", 
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	[AZX_DRIVER_CTHDA] = "HDA Creative",
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	[AZX_DRIVER_CMEDIA] = "HDA C-Media",
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	[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
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};

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#ifdef CONFIG_X86
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static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
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{
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	int pages;

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	if (azx_snoop(chip))
		return;
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	if (!dmab || !dmab->area || !dmab->bytes)
		return;

#ifdef CONFIG_SND_DMA_SGBUF
	if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
		struct snd_sg_buf *sgbuf = dmab->private_data;
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		if (chip->driver_type == AZX_DRIVER_CMEDIA)
			return; /* deal with only CORB/RIRB buffers */
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		if (on)
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			set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
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		else
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			set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
		return;
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	}
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#endif

	pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
	if (on)
		set_memory_wc((unsigned long)dmab->area, pages);
	else
		set_memory_wb((unsigned long)dmab->area, pages);
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}

static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
				 bool on)
{
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	__mark_pages_wc(chip, buf, on);
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}
static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
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				   struct snd_pcm_substream *substream, bool on)
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{
	if (azx_dev->wc_marked != on) {
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		__mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
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		azx_dev->wc_marked = on;
	}
}
#else
/* NOP for other archs */
static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
				 bool on)
{
}
static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
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				   struct snd_pcm_substream *substream, bool on)
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{
}
#endif

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static int azx_acquire_irq(struct azx *chip, int do_disconnect);
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/*
 * initialize the PCI registers
 */
/* update bits in a PCI register byte */
static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
			    unsigned char mask, unsigned char val)
{
	unsigned char data;

	pci_read_config_byte(pci, reg, &data);
	data &= ~mask;
	data |= (val & mask);
	pci_write_config_byte(pci, reg, data);
}

static void azx_init_pci(struct azx *chip)
{
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	int snoop_type = azx_get_snoop_type(chip);

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	/* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
	 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
	 * Ensuring these bits are 0 clears playback static on some HD Audio
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	 * codecs.
	 * The PCI register TCSEL is defined in the Intel manuals.
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	 */
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	if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
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		dev_dbg(chip->card->dev, "Clearing TCSEL\n");
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		update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
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	}
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	/* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
	 * we need to enable snoop.
	 */
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	if (snoop_type == AZX_SNOOP_TYPE_ATI) {
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		dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
			azx_snoop(chip));
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		update_pci_byte(chip->pci,
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				ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
				azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
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	}

	/* For NVIDIA HDA, enable snoop */
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	if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
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		dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
			azx_snoop(chip));
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		update_pci_byte(chip->pci,
				NVIDIA_HDA_TRANSREG_ADDR,
				0x0f, NVIDIA_HDA_ENABLE_COHBITS);
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		update_pci_byte(chip->pci,
				NVIDIA_HDA_ISTRM_COH,
				0x01, NVIDIA_HDA_ENABLE_COHBIT);
		update_pci_byte(chip->pci,
				NVIDIA_HDA_OSTRM_COH,
				0x01, NVIDIA_HDA_ENABLE_COHBIT);
494 495 496
	}

	/* Enable SCH/PCH snoop if needed */
497
	if (snoop_type == AZX_SNOOP_TYPE_SCH) {
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498
		unsigned short snoop;
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499
		pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
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500 501 502 503 504 505
		if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
		    (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
			snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
			if (!azx_snoop(chip))
				snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
			pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
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506 507 508
			pci_read_config_word(chip->pci,
				INTEL_SCH_HDA_DEVC, &snoop);
		}
509 510 511
		dev_dbg(chip->card->dev, "SCH snoop: %s\n",
			(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
			"Disabled" : "Enabled");
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512
        }
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513 514
}

515 516
static void hda_intel_init_chip(struct azx *chip, bool full_reset)
{
517
	struct hdac_bus *bus = azx_bus(chip);
518 519

	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
520
		snd_hdac_set_codec_wakeup(bus, true);
521 522
	azx_init_chip(chip, full_reset);
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
523
		snd_hdac_set_codec_wakeup(bus, false);
524 525
}

526 527 528 529
/* calculate runtime delay from LPIB */
static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
				   unsigned int pos)
{
530
	struct snd_pcm_substream *substream = azx_dev->core.substream;
531 532 533 534 535 536 537 538 539
	int stream = substream->stream;
	unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
	int delay;

	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
		delay = pos - lpib_pos;
	else
		delay = lpib_pos - pos;
	if (delay < 0) {
540
		if (delay >= azx_dev->core.delay_negative_threshold)
541 542
			delay = 0;
		else
543
			delay += azx_dev->core.bufsize;
544 545
	}

546
	if (delay >= azx_dev->core.period_bytes) {
547 548
		dev_info(chip->card->dev,
			 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
549
			 delay, azx_dev->core.period_bytes);
550 551 552 553 554 555 556 557
		delay = 0;
		chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
		chip->get_delay[stream] = NULL;
	}

	return bytes_to_frames(substream->runtime, delay);
}

558 559
static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);

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/* called from IRQ */
static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
{
563
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
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564 565 566 567 568 569
	int ok;

	ok = azx_position_ok(chip, azx_dev);
	if (ok == 1) {
		azx_dev->irq_pending = 0;
		return ok;
570
	} else if (ok == 0) {
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571 572
		/* bogus IRQ, process it later */
		azx_dev->irq_pending = 1;
573
		schedule_work(&hda->irq_pending_work);
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574 575 576 577
	}
	return 0;
}

578 579 580
/* Enable/disable i915 display power for the link */
static int azx_intel_link_power(struct azx *chip, bool enable)
{
581
	struct hdac_bus *bus = azx_bus(chip);
582

583
	return snd_hdac_display_power(bus, enable);
584 585
}

586 587 588 589 590 591 592 593 594 595 596
/*
 * Check whether the current DMA position is acceptable for updating
 * periods.  Returns non-zero if it's OK.
 *
 * Many HD-audio controllers appear pretty inaccurate about
 * the update-IRQ timing.  The IRQ is issued before actually the
 * data is processed.  So, we need to process it afterwords in a
 * workqueue.
 */
static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
{
597
	struct snd_pcm_substream *substream = azx_dev->core.substream;
598
	int stream = substream->stream;
599
	u32 wallclk;
600 601
	unsigned int pos;

602 603
	wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;
	if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)
604 605
		return -1;	/* bogus (too early) interrupt */

606 607 608 609 610 611 612 613
	if (chip->get_position[stream])
		pos = chip->get_position[stream](chip, azx_dev);
	else { /* use the position buffer as default */
		pos = azx_get_pos_posbuf(chip, azx_dev);
		if (!pos || pos == (u32)-1) {
			dev_info(chip->card->dev,
				 "Invalid position buffer, using LPIB read method instead.\n");
			chip->get_position[stream] = azx_get_pos_lpib;
614 615 616
			if (chip->get_position[0] == azx_get_pos_lpib &&
			    chip->get_position[1] == azx_get_pos_lpib)
				azx_bus(chip)->use_posbuf = false;
617 618 619 620 621 622 623 624 625
			pos = azx_get_pos_lpib(chip, azx_dev);
			chip->get_delay[stream] = NULL;
		} else {
			chip->get_position[stream] = azx_get_pos_posbuf;
			if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
				chip->get_delay[stream] = azx_get_delay_from_lpib;
		}
	}

626
	if (pos >= azx_dev->core.bufsize)
627
		pos = 0;
628

629
	if (WARN_ONCE(!azx_dev->core.period_bytes,
630
		      "hda-intel: zero azx_dev->period_bytes"))
631
		return -1; /* this shouldn't happen! */
632 633
	if (wallclk < (azx_dev->core.period_wallclk * 5) / 4 &&
	    pos % azx_dev->core.period_bytes > azx_dev->core.period_bytes / 2)
634
		/* NG - it's below the first next period boundary */
635
		return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
636
	azx_dev->core.start_wallclk += wallclk;
637 638 639 640 641 642 643 644
	return 1; /* OK, it's fine */
}

/*
 * The work for pending PCM period updates.
 */
static void azx_irq_pending_work(struct work_struct *work)
{
645 646
	struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
	struct azx *chip = &hda->chip;
647 648 649
	struct hdac_bus *bus = azx_bus(chip);
	struct hdac_stream *s;
	int pending, ok;
650

651
	if (!hda->irq_pending_warned) {
652 653 654
		dev_info(chip->card->dev,
			 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
			 chip->card->number);
655
		hda->irq_pending_warned = 1;
656 657
	}

658 659
	for (;;) {
		pending = 0;
660
		spin_lock_irq(&bus->reg_lock);
661 662
		list_for_each_entry(s, &bus->stream_list, list) {
			struct azx_dev *azx_dev = stream_to_azx_dev(s);
663
			if (!azx_dev->irq_pending ||
664 665
			    !s->substream ||
			    !s->running)
666
				continue;
667 668
			ok = azx_position_ok(chip, azx_dev);
			if (ok > 0) {
669
				azx_dev->irq_pending = 0;
670
				spin_unlock(&bus->reg_lock);
671
				snd_pcm_period_elapsed(s->substream);
672
				spin_lock(&bus->reg_lock);
673 674
			} else if (ok < 0) {
				pending = 0;	/* too early */
675 676 677
			} else
				pending++;
		}
678
		spin_unlock_irq(&bus->reg_lock);
679 680
		if (!pending)
			return;
681
		msleep(1);
682 683 684 685 686 687
	}
}

/* clear irq_pending flags and assure no on-going workq */
static void azx_clear_irq_pending(struct azx *chip)
{
688 689
	struct hdac_bus *bus = azx_bus(chip);
	struct hdac_stream *s;
690

691
	spin_lock_irq(&bus->reg_lock);
692 693 694 695
	list_for_each_entry(s, &bus->stream_list, list) {
		struct azx_dev *azx_dev = stream_to_azx_dev(s);
		azx_dev->irq_pending = 0;
	}
696
	spin_unlock_irq(&bus->reg_lock);
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}

699 700
static int azx_acquire_irq(struct azx *chip, int do_disconnect)
{
701 702
	struct hdac_bus *bus = azx_bus(chip);

703 704
	if (request_irq(chip->pci->irq, azx_interrupt,
			chip->msi ? 0 : IRQF_SHARED,
705
			KBUILD_MODNAME, chip)) {
706 707 708
		dev_err(chip->card->dev,
			"unable to grab IRQ %d, disabling device\n",
			chip->pci->irq);
709 710 711 712
		if (do_disconnect)
			snd_card_disconnect(chip->card);
		return -1;
	}
713
	bus->irq = chip->pci->irq;
714
	pci_intx(chip->pci, !chip->msi);
715 716 717
	return 0;
}

718 719 720 721 722 723 724 725
/* get the current DMA position with correction on VIA chips */
static unsigned int azx_via_get_position(struct azx *chip,
					 struct azx_dev *azx_dev)
{
	unsigned int link_pos, mini_pos, bound_pos;
	unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
	unsigned int fifo_size;

726
	link_pos = snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev));
727
	if (azx_dev->core.substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
728 729 730 731 732 733 734 735
		/* Playback, no problem using link position */
		return link_pos;
	}

	/* Capture */
	/* For new chipset,
	 * use mod to get the DMA position just like old chipset
	 */
736 737
	mod_dma_pos = le32_to_cpu(*azx_dev->core.posbuf);
	mod_dma_pos %= azx_dev->core.period_bytes;
738 739 740 741

	/* azx_dev->fifo_size can't get FIFO size of in stream.
	 * Get from base address + offset.
	 */
742 743
	fifo_size = readw(azx_bus(chip)->remap_addr +
			  VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
744 745 746 747 748 749 750 751 752 753

	if (azx_dev->insufficient) {
		/* Link position never gather than FIFO size */
		if (link_pos <= fifo_size)
			return 0;

		azx_dev->insufficient = 0;
	}

	if (link_pos <= fifo_size)
754
		mini_pos = azx_dev->core.bufsize + link_pos - fifo_size;
755 756 757 758
	else
		mini_pos = link_pos - fifo_size;

	/* Find nearest previous boudary */
759 760
	mod_mini_pos = mini_pos % azx_dev->core.period_bytes;
	mod_link_pos = link_pos % azx_dev->core.period_bytes;
761 762 763 764 765
	if (mod_link_pos >= fifo_size)
		bound_pos = link_pos - mod_link_pos;
	else if (mod_dma_pos >= mod_mini_pos)
		bound_pos = mini_pos - mod_mini_pos;
	else {
766 767
		bound_pos = mini_pos - mod_mini_pos + azx_dev->core.period_bytes;
		if (bound_pos >= azx_dev->core.bufsize)
768 769 770 771 772 773 774
			bound_pos = 0;
	}

	/* Calculate real DMA position we want */
	return bound_pos + mod_dma_pos;
}

775
#ifdef CONFIG_PM
776 777 778 779 780
static DEFINE_MUTEX(card_list_lock);
static LIST_HEAD(card_list);

static void azx_add_card_list(struct azx *chip)
{
781
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
782
	mutex_lock(&card_list_lock);
783
	list_add(&hda->list, &card_list);
784 785 786 787 788
	mutex_unlock(&card_list_lock);
}

static void azx_del_card_list(struct azx *chip)
{
789
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
790
	mutex_lock(&card_list_lock);
791
	list_del_init(&hda->list);
792 793 794 795 796 797
	mutex_unlock(&card_list_lock);
}

/* trigger power-save check at writing parameter */
static int param_set_xint(const char *val, const struct kernel_param *kp)
{
798
	struct hda_intel *hda;
799 800 801 802 803 804 805 806
	struct azx *chip;
	int prev = power_save;
	int ret = param_set_int(val, kp);

	if (ret || prev == power_save)
		return ret;

	mutex_lock(&card_list_lock);
807 808
	list_for_each_entry(hda, &card_list, list) {
		chip = &hda->chip;
809
		if (!hda->probe_continued || chip->disabled)
810
			continue;
811
		snd_hda_set_power_save(&chip->bus, power_save * 1000);
812 813 814 815 816 817 818
	}
	mutex_unlock(&card_list_lock);
	return 0;
}
#else
#define azx_add_card_list(chip) /* NOP */
#define azx_del_card_list(chip) /* NOP */
819
#endif /* CONFIG_PM */
820

821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864
/* Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
 * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value)
 * are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
 * BCLK = CDCLK * M / N
 * The values will be lost when the display power well is disabled and need to
 * be restored to avoid abnormal playback speed.
 */
static void haswell_set_bclk(struct hda_intel *hda)
{
	struct azx *chip = &hda->chip;
	int cdclk_freq;
	unsigned int bclk_m, bclk_n;

	if (!hda->need_i915_power)
		return;

	cdclk_freq = snd_hdac_get_display_clk(azx_bus(chip));
	switch (cdclk_freq) {
	case 337500:
		bclk_m = 16;
		bclk_n = 225;
		break;

	case 450000:
	default: /* default CDCLK 450MHz */
		bclk_m = 4;
		bclk_n = 75;
		break;

	case 540000:
		bclk_m = 4;
		bclk_n = 90;
		break;

	case 675000:
		bclk_m = 8;
		bclk_n = 225;
		break;
	}

	azx_writew(chip, HSW_EM4, bclk_m);
	azx_writew(chip, HSW_EM5, bclk_n);
}

865
#if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
866 867 868
/*
 * power management
 */
869
static int azx_suspend(struct device *dev)
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870
{
871
	struct snd_card *card = dev_get_drvdata(dev);
872 873
	struct azx *chip;
	struct hda_intel *hda;
874
	struct hdac_bus *bus;
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Linus Torvalds 已提交
875

876 877 878 879 880
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
881
	if (chip->disabled || hda->init_failed || !chip->running)
882 883
		return 0;

884
	bus = azx_bus(chip);
T
Takashi Iwai 已提交
885
	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
886
	azx_clear_irq_pending(chip);
887
	azx_stop_chip(chip);
888
	azx_enter_link_reset(chip);
889 890 891
	if (bus->irq >= 0) {
		free_irq(bus->irq, chip);
		bus->irq = -1;
892
	}
893

894
	if (chip->msi)
895
		pci_disable_msi(chip->pci);
896 897
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
		&& hda->need_i915_power)
898
		snd_hdac_display_power(bus, false);
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899 900

	trace_azx_suspend(chip);
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901 902 903
	return 0;
}

904
static int azx_resume(struct device *dev)
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905
{
906 907
	struct pci_dev *pci = to_pci_dev(dev);
	struct snd_card *card = dev_get_drvdata(dev);
908 909 910 911 912
	struct azx *chip;
	struct hda_intel *hda;

	if (!card)
		return 0;
L
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913

914 915
	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
916
	if (chip->disabled || hda->init_failed || !chip->running)
917 918
		return 0;

919 920
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
		&& hda->need_i915_power) {
921
		snd_hdac_display_power(azx_bus(chip), true);
922
		haswell_set_bclk(hda);
923
	}
924 925 926 927
	if (chip->msi)
		if (pci_enable_msi(pci) < 0)
			chip->msi = 0;
	if (azx_acquire_irq(chip, 1) < 0)
928
		return -EIO;
929
	azx_init_pci(chip);
930

931
	hda_intel_init_chip(chip, true);
932

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Takashi Iwai 已提交
933
	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
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934 935

	trace_azx_resume(chip);
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936 937
	return 0;
}
938 939
#endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */

940
#ifdef CONFIG_PM
941 942 943
static int azx_runtime_suspend(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
944 945
	struct azx *chip;
	struct hda_intel *hda;
946

947 948 949 950 951
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
952
	if (chip->disabled || hda->init_failed)
953 954
		return 0;

955
	if (!azx_has_pm_runtime(chip))
956 957
		return 0;

958 959 960 961
	/* enable controller wake up event */
	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
		  STATESTS_INT_MASK);

962
	azx_stop_chip(chip);
963
	azx_enter_link_reset(chip);
964
	azx_clear_irq_pending(chip);
965 966
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
		&& hda->need_i915_power)
967
		snd_hdac_display_power(azx_bus(chip), false);
968

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969
	trace_azx_runtime_suspend(chip);
970 971 972 973 974 975
	return 0;
}

static int azx_runtime_resume(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
976 977
	struct azx *chip;
	struct hda_intel *hda;
978
	struct hdac_bus *bus;
979 980
	struct hda_codec *codec;
	int status;
981

982 983 984 985 986
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
987
	if (chip->disabled || hda->init_failed)
988 989
		return 0;

990
	if (!azx_has_pm_runtime(chip))
991 992
		return 0;

993 994 995 996 997 998 999 1000 1001 1002
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
		bus = azx_bus(chip);
		if (hda->need_i915_power) {
			snd_hdac_display_power(bus, true);
			haswell_set_bclk(hda);
		} else {
			/* toggle codec wakeup bit for STATESTS read */
			snd_hdac_set_codec_wakeup(bus, true);
			snd_hdac_set_codec_wakeup(bus, false);
		}
1003
	}
1004 1005 1006 1007

	/* Read STATESTS before controller reset */
	status = azx_readw(chip, STATESTS);

1008
	azx_init_pci(chip);
1009
	hda_intel_init_chip(chip, true);
1010

1011 1012
	if (status) {
		list_for_each_codec(codec, &chip->bus)
1013
			if (status & (1 << codec->addr))
1014 1015
				schedule_delayed_work(&codec->jackpoll_work,
						      codec->jackpoll_interval);
1016 1017 1018 1019 1020 1021
	}

	/* disable controller Wake Up event*/
	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
			~STATESTS_INT_MASK);

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1022
	trace_azx_runtime_resume(chip);
1023 1024
	return 0;
}
1025 1026 1027 1028

static int azx_runtime_idle(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
1029 1030 1031 1032 1033
	struct azx *chip;
	struct hda_intel *hda;

	if (!card)
		return 0;
1034

1035 1036
	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1037
	if (chip->disabled || hda->init_failed)
1038 1039
		return 0;

1040
	if (!power_save_controller || !azx_has_pm_runtime(chip) ||
1041
	    azx_bus(chip)->codec_powered || !chip->running)
1042 1043 1044 1045 1046
		return -EBUSY;

	return 0;
}

1047 1048
static const struct dev_pm_ops azx_pm = {
	SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
1049
	SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
1050 1051
};

1052 1053 1054
#define AZX_PM_OPS	&azx_pm
#else
#define AZX_PM_OPS	NULL
1055
#endif /* CONFIG_PM */
L
Linus Torvalds 已提交
1056 1057


1058
static int azx_probe_continue(struct azx *chip);
1059

1060
#ifdef SUPPORT_VGA_SWITCHEROO
1061
static struct pci_dev *get_bound_vga(struct pci_dev *pci);
1062 1063 1064 1065 1066 1067

static void azx_vs_set_state(struct pci_dev *pci,
			     enum vga_switcheroo_state state)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;
1068
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1069 1070
	bool disabled;

1071 1072
	wait_for_completion(&hda->probe_wait);
	if (hda->init_failed)
1073 1074 1075 1076 1077 1078
		return;

	disabled = (state == VGA_SWITCHEROO_OFF);
	if (chip->disabled == disabled)
		return;

1079
	if (!hda->probe_continued) {
1080 1081
		chip->disabled = disabled;
		if (!disabled) {
1082 1083
			dev_info(chip->card->dev,
				 "Start delayed initialization\n");
1084
			if (azx_probe_continue(chip) < 0) {
1085
				dev_err(chip->card->dev, "initialization error\n");
1086
				hda->init_failed = true;
1087 1088 1089
			}
		}
	} else {
1090
		dev_info(chip->card->dev, "%s via vga_switcheroo\n",
1091
			 disabled ? "Disabling" : "Enabling");
1092
		if (disabled) {
1093 1094
			pm_runtime_put_sync_suspend(card->dev);
			azx_suspend(card->dev);
1095
			/* when we get suspended by vga_switcheroo we end up in D3cold,
1096 1097 1098
			 * however we have no ACPI handle, so pci/acpi can't put us there,
			 * put ourselves there */
			pci->current_state = PCI_D3cold;
1099
			chip->disabled = true;
1100
			if (snd_hda_lock_devices(&chip->bus))
1101 1102
				dev_warn(chip->card->dev,
					 "Cannot lock devices!\n");
1103
		} else {
1104
			snd_hda_unlock_devices(&chip->bus);
1105
			pm_runtime_get_noresume(card->dev);
1106
			chip->disabled = false;
1107
			azx_resume(card->dev);
1108 1109 1110 1111 1112 1113 1114 1115
		}
	}
}

static bool azx_vs_can_switch(struct pci_dev *pci)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;
1116
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1117

1118 1119
	wait_for_completion(&hda->probe_wait);
	if (hda->init_failed)
1120
		return false;
1121
	if (chip->disabled || !hda->probe_continued)
1122
		return true;
1123
	if (snd_hda_lock_devices(&chip->bus))
1124
		return false;
1125
	snd_hda_unlock_devices(&chip->bus);
1126 1127 1128
	return true;
}

1129
static void init_vga_switcheroo(struct azx *chip)
1130
{
1131
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1132 1133
	struct pci_dev *p = get_bound_vga(chip->pci);
	if (p) {
1134
		dev_info(chip->card->dev,
1135
			 "Handle vga_switcheroo audio client\n");
1136
		hda->use_vga_switcheroo = 1;
1137 1138 1139 1140 1141 1142 1143 1144 1145
		pci_dev_put(p);
	}
}

static const struct vga_switcheroo_client_ops azx_vs_ops = {
	.set_gpu_state = azx_vs_set_state,
	.can_switch = azx_vs_can_switch,
};

1146
static int register_vga_switcheroo(struct azx *chip)
1147
{
1148
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1149 1150
	int err;

1151
	if (!hda->use_vga_switcheroo)
1152 1153 1154 1155
		return 0;
	/* FIXME: currently only handling DIS controller
	 * is there any machine with two switchable HDMI audio controllers?
	 */
1156
	err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1157
						   VGA_SWITCHEROO_DIS);
1158 1159
	if (err < 0)
		return err;
1160
	hda->vga_switcheroo_registered = 1;
1161 1162

	/* register as an optimus hdmi audio power domain */
1163
	vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1164
							 &hda->hdmi_pm_domain);
1165
	return 0;
1166 1167 1168 1169
}
#else
#define init_vga_switcheroo(chip)		/* NOP */
#define register_vga_switcheroo(chip)		0
1170
#define check_hdmi_disabled(pci)	false
1171 1172
#endif /* SUPPORT_VGA_SWITCHER */

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1173 1174 1175
/*
 * destructor
 */
1176
static int azx_free(struct azx *chip)
L
Linus Torvalds 已提交
1177
{
W
Wang Xingchao 已提交
1178
	struct pci_dev *pci = chip->pci;
1179
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1180
	struct hdac_bus *bus = azx_bus(chip);
T
Takashi Iwai 已提交
1181

1182
	if (azx_has_pm_runtime(chip) && chip->running)
W
Wang Xingchao 已提交
1183 1184
		pm_runtime_get_noresume(&pci->dev);

1185 1186
	azx_del_card_list(chip);

1187 1188
	hda->init_failed = 1; /* to be sure */
	complete_all(&hda->probe_wait);
1189

1190
	if (use_vga_switcheroo(hda)) {
1191 1192
		if (chip->disabled && hda->probe_continued)
			snd_hda_unlock_devices(&chip->bus);
1193
		if (hda->vga_switcheroo_registered)
1194
			vga_switcheroo_unregister_client(chip->pci);
1195 1196
	}

1197
	if (bus->chip_init) {
1198
		azx_clear_irq_pending(chip);
1199
		azx_stop_all_streams(chip);
1200
		azx_stop_chip(chip);
L
Linus Torvalds 已提交
1201 1202
	}

1203 1204
	if (bus->irq >= 0)
		free_irq(bus->irq, (void*)chip);
1205
	if (chip->msi)
1206
		pci_disable_msi(chip->pci);
1207
	iounmap(bus->remap_addr);
L
Linus Torvalds 已提交
1208

1209
	azx_free_stream_pages(chip);
1210 1211 1212
	azx_free_streams(chip);
	snd_hdac_bus_exit(bus);

1213 1214
	if (chip->region_requested)
		pci_release_regions(chip->pci);
1215

L
Linus Torvalds 已提交
1216
	pci_disable_device(chip->pci);
1217
#ifdef CONFIG_SND_HDA_PATCH_LOADER
1218
	release_firmware(chip->fw);
1219
#endif
1220

1221
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1222
		if (hda->need_i915_power)
1223 1224
			snd_hdac_display_power(bus, false);
		snd_hdac_i915_exit(bus);
1225
	}
1226
	kfree(hda);
L
Linus Torvalds 已提交
1227 1228 1229 1230

	return 0;
}

1231 1232 1233 1234 1235 1236 1237 1238
static int azx_dev_disconnect(struct snd_device *device)
{
	struct azx *chip = device->device_data;

	chip->bus.shutdown = 1;
	return 0;
}

1239
static int azx_dev_free(struct snd_device *device)
L
Linus Torvalds 已提交
1240 1241 1242 1243
{
	return azx_free(device->device_data);
}

1244
#ifdef SUPPORT_VGA_SWITCHEROO
1245
/*
1246
 * Check of disabled HDMI controller by vga_switcheroo
1247
 */
1248
static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270
{
	struct pci_dev *p;

	/* check only discrete GPU */
	switch (pci->vendor) {
	case PCI_VENDOR_ID_ATI:
	case PCI_VENDOR_ID_AMD:
	case PCI_VENDOR_ID_NVIDIA:
		if (pci->devfn == 1) {
			p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
							pci->bus->number, 0);
			if (p) {
				if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
					return p;
				pci_dev_put(p);
			}
		}
		break;
	}
	return NULL;
}

1271
static bool check_hdmi_disabled(struct pci_dev *pci)
1272 1273 1274 1275 1276
{
	bool vga_inactive = false;
	struct pci_dev *p = get_bound_vga(pci);

	if (p) {
1277
		if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1278 1279 1280 1281 1282
			vga_inactive = true;
		pci_dev_put(p);
	}
	return vga_inactive;
}
1283
#endif /* SUPPORT_VGA_SWITCHEROO */
1284

1285 1286 1287
/*
 * white/black-listing for position_fix
 */
1288
static struct snd_pci_quirk position_fix_list[] = {
T
Takashi Iwai 已提交
1289 1290
	SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
	SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1291
	SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
T
Takashi Iwai 已提交
1292
	SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1293
	SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
D
Daniel T Chen 已提交
1294
	SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1295
	SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1296
	SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1297
	SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1298
	SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1299
	SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1300
	SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1301
	SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1302
	SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1303 1304 1305
	{}
};

1306
static int check_position_fix(struct azx *chip, int fix)
1307 1308 1309
{
	const struct snd_pci_quirk *q;

1310
	switch (fix) {
1311
	case POS_FIX_AUTO:
1312 1313
	case POS_FIX_LPIB:
	case POS_FIX_POSBUF:
1314
	case POS_FIX_VIACOMBO:
1315
	case POS_FIX_COMBO:
1316 1317 1318 1319 1320
		return fix;
	}

	q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
	if (q) {
1321 1322 1323
		dev_info(chip->card->dev,
			 "position_fix set to %d for device %04x:%04x\n",
			 q->value, q->subvendor, q->subdevice);
1324
		return q->value;
1325
	}
1326 1327

	/* Check VIA/ATI HD Audio Controller exist */
1328
	if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1329
		dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1330
		return POS_FIX_VIACOMBO;
1331 1332
	}
	if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1333
		dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1334
		return POS_FIX_LPIB;
1335
	}
1336
	return POS_FIX_AUTO;
1337 1338
}

1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362
static void assign_position_fix(struct azx *chip, int fix)
{
	static azx_get_pos_callback_t callbacks[] = {
		[POS_FIX_AUTO] = NULL,
		[POS_FIX_LPIB] = azx_get_pos_lpib,
		[POS_FIX_POSBUF] = azx_get_pos_posbuf,
		[POS_FIX_VIACOMBO] = azx_via_get_position,
		[POS_FIX_COMBO] = azx_get_pos_lpib,
	};

	chip->get_position[0] = chip->get_position[1] = callbacks[fix];

	/* combo mode uses LPIB only for playback */
	if (fix == POS_FIX_COMBO)
		chip->get_position[1] = NULL;

	if (fix == POS_FIX_POSBUF &&
	    (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
		chip->get_delay[0] = chip->get_delay[1] =
			azx_get_delay_from_lpib;
	}

}

1363 1364 1365
/*
 * black-lists for probe_mask
 */
1366
static struct snd_pci_quirk probe_mask_list[] = {
1367 1368 1369 1370 1371 1372
	/* Thinkpad often breaks the controller communication when accessing
	 * to the non-working (or non-existing) modem codec slot.
	 */
	SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
	SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
	SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1373 1374
	/* broken BIOS */
	SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1375 1376
	/* including bogus ALC268 in slot#2 that conflicts with ALC888 */
	SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1377
	/* forced codec slots */
1378
	SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1379
	SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1380 1381
	/* WinFast VP200 H (Teradici) user reported broken communication */
	SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1382 1383 1384
	{}
};

1385 1386
#define AZX_FORCE_CODEC_MASK	0x100

1387
static void check_probe_mask(struct azx *chip, int dev)
1388 1389 1390
{
	const struct snd_pci_quirk *q;

1391 1392
	chip->codec_probe_mask = probe_mask[dev];
	if (chip->codec_probe_mask == -1) {
1393 1394
		q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
		if (q) {
1395 1396 1397
			dev_info(chip->card->dev,
				 "probe_mask set to 0x%x for device %04x:%04x\n",
				 q->value, q->subvendor, q->subdevice);
1398
			chip->codec_probe_mask = q->value;
1399 1400
		}
	}
1401 1402 1403 1404

	/* check forced option */
	if (chip->codec_probe_mask != -1 &&
	    (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1405
		azx_bus(chip)->codec_mask = chip->codec_probe_mask & 0xff;
1406
		dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1407
			 (int)azx_bus(chip)->codec_mask);
1408
	}
1409 1410
}

1411
/*
T
Takashi Iwai 已提交
1412
 * white/black-list for enable_msi
1413
 */
1414
static struct snd_pci_quirk msi_black_list[] = {
1415 1416 1417 1418
	SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
T
Takashi Iwai 已提交
1419
	SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1420
	SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1421
	SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1422
	SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1423
	SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1424
	SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1425 1426 1427
	{}
};

1428
static void check_msi(struct azx *chip)
1429 1430 1431
{
	const struct snd_pci_quirk *q;

T
Takashi Iwai 已提交
1432 1433
	if (enable_msi >= 0) {
		chip->msi = !!enable_msi;
1434
		return;
T
Takashi Iwai 已提交
1435 1436 1437
	}
	chip->msi = 1;	/* enable MSI as default */
	q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1438
	if (q) {
1439 1440 1441
		dev_info(chip->card->dev,
			 "msi for device %04x:%04x set to %d\n",
			 q->subvendor, q->subdevice, q->value);
1442
		chip->msi = q->value;
1443 1444 1445 1446
		return;
	}

	/* NVidia chipsets seem to cause troubles with MSI */
1447
	if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1448
		dev_info(chip->card->dev, "Disabling MSI\n");
1449
		chip->msi = 0;
1450 1451 1452
	}
}

1453
/* check the snoop mode availability */
1454
static void azx_check_snoop_available(struct azx *chip)
1455
{
1456
	int snoop = hda_snoop;
1457

1458 1459 1460 1461 1462 1463 1464 1465
	if (snoop >= 0) {
		dev_info(chip->card->dev, "Force to %s mode by module option\n",
			 snoop ? "snoop" : "non-snoop");
		chip->snoop = snoop;
		return;
	}

	snoop = true;
1466 1467
	if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
	    chip->driver_type == AZX_DRIVER_VIA) {
1468 1469 1470
		/* force to non-snoop mode for a new VIA controller
		 * when BIOS is set
		 */
1471 1472 1473 1474
		u8 val;
		pci_read_config_byte(chip->pci, 0x42, &val);
		if (!(val & 0x80) && chip->pci->revision == 0x30)
			snoop = false;
1475 1476
	}

1477 1478 1479
	if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
		snoop = false;

1480 1481 1482
	chip->snoop = snoop;
	if (!snoop)
		dev_info(chip->card->dev, "Force to non-snoop mode\n");
1483
}
1484

1485 1486
static void azx_probe_work(struct work_struct *work)
{
1487 1488
	struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
	azx_probe_continue(&hda->chip);
1489 1490
}

L
Linus Torvalds 已提交
1491 1492 1493
/*
 * constructor
 */
1494 1495 1496
static const struct hdac_io_ops pci_hda_io_ops;
static const struct hda_controller_ops pci_hda_ops;

1497 1498 1499
static int azx_create(struct snd_card *card, struct pci_dev *pci,
		      int dev, unsigned int driver_caps,
		      struct azx **rchip)
L
Linus Torvalds 已提交
1500
{
1501
	static struct snd_device_ops ops = {
1502
		.dev_disconnect = azx_dev_disconnect,
L
Linus Torvalds 已提交
1503 1504
		.dev_free = azx_dev_free,
	};
1505
	struct hda_intel *hda;
1506 1507
	struct azx *chip;
	int err;
L
Linus Torvalds 已提交
1508 1509

	*rchip = NULL;
1510

1511 1512
	err = pci_enable_device(pci);
	if (err < 0)
L
Linus Torvalds 已提交
1513 1514
		return err;

1515 1516
	hda = kzalloc(sizeof(*hda), GFP_KERNEL);
	if (!hda) {
L
Linus Torvalds 已提交
1517 1518 1519 1520
		pci_disable_device(pci);
		return -ENOMEM;
	}

1521
	chip = &hda->chip;
1522
	mutex_init(&chip->open_mutex);
L
Linus Torvalds 已提交
1523 1524
	chip->card = card;
	chip->pci = pci;
1525
	chip->ops = &pci_hda_ops;
1526 1527
	chip->driver_caps = driver_caps;
	chip->driver_type = driver_caps & 0xff;
1528
	check_msi(chip);
1529
	chip->dev_index = dev;
1530
	chip->jackpoll_ms = jackpoll_ms;
1531
	INIT_LIST_HEAD(&chip->pcm_list);
1532 1533
	INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
	INIT_LIST_HEAD(&hda->list);
1534
	init_vga_switcheroo(chip);
1535
	init_completion(&hda->probe_wait);
L
Linus Torvalds 已提交
1536

1537
	assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1538

1539
	check_probe_mask(chip, dev);
1540

1541
	chip->single_cmd = single_cmd;
1542
	azx_check_snoop_available(chip);
1543

1544 1545
	if (bdl_pos_adj[dev] < 0) {
		switch (chip->driver_type) {
1546
		case AZX_DRIVER_ICH:
1547
		case AZX_DRIVER_PCH:
1548
			bdl_pos_adj[dev] = 1;
1549 1550
			break;
		default:
1551
			bdl_pos_adj[dev] = 32;
1552 1553 1554
			break;
		}
	}
1555
	chip->bdl_pos_adj = bdl_pos_adj;
1556

1557 1558 1559 1560 1561 1562 1563
	err = azx_bus_init(chip, model[dev], &pci_hda_io_ops);
	if (err < 0) {
		kfree(hda);
		pci_disable_device(pci);
		return err;
	}

1564 1565
	err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
	if (err < 0) {
1566
		dev_err(card->dev, "Error creating device [card]!\n");
1567 1568 1569 1570
		azx_free(chip);
		return err;
	}

1571
	/* continue probing in work context as may trigger request module */
1572
	INIT_WORK(&hda->probe_work, azx_probe_work);
1573

1574
	*rchip = chip;
1575

1576 1577 1578
	return 0;
}

1579
static int azx_first_init(struct azx *chip)
1580 1581 1582 1583
{
	int dev = chip->dev_index;
	struct pci_dev *pci = chip->pci;
	struct snd_card *card = chip->card;
1584
	struct hdac_bus *bus = azx_bus(chip);
1585
	int err;
1586
	unsigned short gcap;
1587
	unsigned int dma_bits = 64;
1588

1589 1590 1591 1592 1593 1594 1595 1596 1597 1598
#if BITS_PER_LONG != 64
	/* Fix up base address on ULI M5461 */
	if (chip->driver_type == AZX_DRIVER_ULI) {
		u16 tmp3;
		pci_read_config_word(pci, 0x40, &tmp3);
		pci_write_config_word(pci, 0x40, tmp3 | 0x10);
		pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
	}
#endif

1599
	err = pci_request_regions(pci, "ICH HD audio");
1600
	if (err < 0)
L
Linus Torvalds 已提交
1601
		return err;
1602
	chip->region_requested = 1;
L
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1603

1604 1605 1606
	bus->addr = pci_resource_start(pci, 0);
	bus->remap_addr = pci_ioremap_bar(pci, 0);
	if (bus->remap_addr == NULL) {
1607
		dev_err(card->dev, "ioremap error\n");
1608
		return -ENXIO;
L
Linus Torvalds 已提交
1609 1610
	}

1611 1612 1613 1614 1615
	if (chip->msi) {
		if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
			dev_dbg(card->dev, "Disabling 64bit MSI\n");
			pci->no_64bit_msi = true;
		}
1616 1617
		if (pci_enable_msi(pci) < 0)
			chip->msi = 0;
1618
	}
1619

1620 1621
	if (azx_acquire_irq(chip, 0) < 0)
		return -EBUSY;
L
Linus Torvalds 已提交
1622 1623

	pci_set_master(pci);
1624
	synchronize_irq(bus->irq);
L
Linus Torvalds 已提交
1625

1626
	gcap = azx_readw(chip, GCAP);
1627
	dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1628

1629 1630 1631 1632
	/* AMD devices support 40 or 48bit DMA, take the safe one */
	if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
		dma_bits = 40;

1633
	/* disable SB600 64bit support for safety */
1634
	if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1635
		struct pci_dev *p_smbus;
1636
		dma_bits = 40;
1637 1638 1639 1640 1641
		p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
					 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
					 NULL);
		if (p_smbus) {
			if (p_smbus->revision < 0x30)
T
Takashi Iwai 已提交
1642
				gcap &= ~AZX_GCAP_64OK;
1643 1644 1645
			pci_dev_put(p_smbus);
		}
	}
1646

1647 1648
	/* disable 64bit DMA address on some devices */
	if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1649
		dev_dbg(card->dev, "Disabling 64bit DMA\n");
T
Takashi Iwai 已提交
1650
		gcap &= ~AZX_GCAP_64OK;
1651
	}
1652

1653
	/* disable buffer size rounding to 128-byte multiples if supported */
1654 1655 1656
	if (align_buffer_size >= 0)
		chip->align_buffer_size = !!align_buffer_size;
	else {
1657
		if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1658 1659 1660 1661
			chip->align_buffer_size = 0;
		else
			chip->align_buffer_size = 1;
	}
1662

1663
	/* allow 64bit DMA address if supported by H/W */
1664 1665
	if (!(gcap & AZX_GCAP_64OK))
		dma_bits = 32;
1666 1667
	if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(dma_bits))) {
		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(dma_bits));
1668
	} else {
1669 1670
		dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
1671
	}
1672

1673 1674 1675 1676 1677 1678
	/* read number of streams from GCAP register instead of using
	 * hardcoded value
	 */
	chip->capture_streams = (gcap >> 8) & 0x0f;
	chip->playback_streams = (gcap >> 12) & 0x0f;
	if (!chip->playback_streams && !chip->capture_streams) {
1679 1680 1681 1682 1683 1684 1685 1686
		/* gcap didn't give any info, switching to old method */

		switch (chip->driver_type) {
		case AZX_DRIVER_ULI:
			chip->playback_streams = ULI_NUM_PLAYBACK;
			chip->capture_streams = ULI_NUM_CAPTURE;
			break;
		case AZX_DRIVER_ATIHDMI:
1687
		case AZX_DRIVER_ATIHDMI_NS:
1688 1689 1690
			chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
			chip->capture_streams = ATIHDMI_NUM_CAPTURE;
			break;
1691
		case AZX_DRIVER_GENERIC:
1692 1693 1694 1695 1696
		default:
			chip->playback_streams = ICH6_NUM_PLAYBACK;
			chip->capture_streams = ICH6_NUM_CAPTURE;
			break;
		}
1697
	}
1698 1699
	chip->capture_index_offset = 0;
	chip->playback_index_offset = chip->capture_streams;
1700 1701
	chip->num_streams = chip->playback_streams + chip->capture_streams;

1702 1703
	/* initialize streams */
	err = azx_init_streams(chip);
1704
	if (err < 0)
1705
		return err;
L
Linus Torvalds 已提交
1706

1707 1708 1709
	err = azx_alloc_stream_pages(chip);
	if (err < 0)
		return err;
L
Linus Torvalds 已提交
1710 1711

	/* initialize chip */
1712
	azx_init_pci(chip);
1713

1714 1715 1716 1717 1718 1719
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
		struct hda_intel *hda;

		hda = container_of(chip, struct hda_intel, chip);
		haswell_set_bclk(hda);
	}
1720

1721
	hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
L
Linus Torvalds 已提交
1722 1723

	/* codec detection */
1724
	if (!azx_bus(chip)->codec_mask) {
1725
		dev_err(card->dev, "no codecs found!\n");
1726
		return -ENODEV;
L
Linus Torvalds 已提交
1727 1728
	}

1729
	strcpy(card->driver, "HDA-Intel");
T
Takashi Iwai 已提交
1730 1731 1732 1733
	strlcpy(card->shortname, driver_short_names[chip->driver_type],
		sizeof(card->shortname));
	snprintf(card->longname, sizeof(card->longname),
		 "%s at 0x%lx irq %i",
1734
		 card->shortname, bus->addr, bus->irq);
1735

L
Linus Torvalds 已提交
1736 1737 1738
	return 0;
}

1739
#ifdef CONFIG_SND_HDA_PATCH_LOADER
1740 1741 1742 1743 1744 1745 1746 1747
/* callback from request_firmware_nowait() */
static void azx_firmware_cb(const struct firmware *fw, void *context)
{
	struct snd_card *card = context;
	struct azx *chip = card->private_data;
	struct pci_dev *pci = chip->pci;

	if (!fw) {
1748
		dev_err(card->dev, "Cannot load firmware, aborting\n");
1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763
		goto error;
	}

	chip->fw = fw;
	if (!chip->disabled) {
		/* continue probing */
		if (azx_probe_continue(chip))
			goto error;
	}
	return; /* OK */

 error:
	snd_card_free(card);
	pci_set_drvdata(pci, NULL);
}
1764
#endif
1765

1766 1767 1768 1769 1770
/*
 * HDA controller ops.
 */

/* PCI register access. */
1771
static void pci_azx_writel(u32 value, u32 __iomem *addr)
1772 1773 1774 1775
{
	writel(value, addr);
}

1776
static u32 pci_azx_readl(u32 __iomem *addr)
1777 1778 1779 1780
{
	return readl(addr);
}

1781
static void pci_azx_writew(u16 value, u16 __iomem *addr)
1782 1783 1784 1785
{
	writew(value, addr);
}

1786
static u16 pci_azx_readw(u16 __iomem *addr)
1787 1788 1789 1790
{
	return readw(addr);
}

1791
static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1792 1793 1794 1795
{
	writeb(value, addr);
}

1796
static u8 pci_azx_readb(u8 __iomem *addr)
1797 1798 1799 1800
{
	return readb(addr);
}

1801 1802
static int disable_msi_reset_irq(struct azx *chip)
{
1803
	struct hdac_bus *bus = azx_bus(chip);
1804 1805
	int err;

1806 1807
	free_irq(bus->irq, chip);
	bus->irq = -1;
1808 1809 1810 1811 1812 1813 1814 1815 1816
	pci_disable_msi(chip->pci);
	chip->msi = 0;
	err = azx_acquire_irq(chip, 1);
	if (err < 0)
		return err;

	return 0;
}

1817
/* DMA page allocation helpers.  */
1818
static int dma_alloc_pages(struct hdac_bus *bus,
1819 1820 1821 1822
			   int type,
			   size_t size,
			   struct snd_dma_buffer *buf)
{
1823
	struct azx *chip = bus_to_azx(bus);
1824 1825 1826
	int err;

	err = snd_dma_alloc_pages(type,
1827
				  bus->dev,
1828 1829 1830 1831 1832 1833 1834
				  size, buf);
	if (err < 0)
		return err;
	mark_pages_wc(chip, buf, true);
	return 0;
}

1835
static void dma_free_pages(struct hdac_bus *bus, struct snd_dma_buffer *buf)
1836
{
1837
	struct azx *chip = bus_to_azx(bus);
1838

1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865
	mark_pages_wc(chip, buf, false);
	snd_dma_free_pages(buf);
}

static int substream_alloc_pages(struct azx *chip,
				 struct snd_pcm_substream *substream,
				 size_t size)
{
	struct azx_dev *azx_dev = get_azx_dev(substream);
	int ret;

	mark_runtime_wc(chip, azx_dev, substream, false);
	ret = snd_pcm_lib_malloc_pages(substream, size);
	if (ret < 0)
		return ret;
	mark_runtime_wc(chip, azx_dev, substream, true);
	return 0;
}

static int substream_free_pages(struct azx *chip,
				struct snd_pcm_substream *substream)
{
	struct azx_dev *azx_dev = get_azx_dev(substream);
	mark_runtime_wc(chip, azx_dev, substream, false);
	return snd_pcm_lib_free_pages(substream);
}

1866 1867 1868 1869 1870 1871
static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
			     struct vm_area_struct *area)
{
#ifdef CONFIG_X86
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
	struct azx *chip = apcm->chip;
1872
	if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1873 1874 1875 1876
		area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
#endif
}

1877
static const struct hdac_io_ops pci_hda_io_ops = {
1878 1879 1880 1881 1882 1883
	.reg_writel = pci_azx_writel,
	.reg_readl = pci_azx_readl,
	.reg_writew = pci_azx_writew,
	.reg_readw = pci_azx_readw,
	.reg_writeb = pci_azx_writeb,
	.reg_readb = pci_azx_readb,
1884 1885
	.dma_alloc_pages = dma_alloc_pages,
	.dma_free_pages = dma_free_pages,
1886 1887 1888 1889
};

static const struct hda_controller_ops pci_hda_ops = {
	.disable_msi_reset_irq = disable_msi_reset_irq,
1890 1891
	.substream_alloc_pages = substream_alloc_pages,
	.substream_free_pages = substream_free_pages,
1892
	.pcm_mmap_prepare = pcm_mmap_prepare,
D
Dylan Reid 已提交
1893
	.position_check = azx_position_check,
1894
	.link_power = azx_intel_link_power,
1895 1896
};

1897 1898
static int azx_probe(struct pci_dev *pci,
		     const struct pci_device_id *pci_id)
L
Linus Torvalds 已提交
1899
{
1900
	static int dev;
1901
	struct snd_card *card;
1902
	struct hda_intel *hda;
1903
	struct azx *chip;
1904
	bool schedule_probe;
1905
	int err;
L
Linus Torvalds 已提交
1906

1907 1908 1909 1910 1911 1912 1913
	if (dev >= SNDRV_CARDS)
		return -ENODEV;
	if (!enable[dev]) {
		dev++;
		return -ENOENT;
	}

1914 1915
	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
			   0, &card);
1916
	if (err < 0) {
1917
		dev_err(&pci->dev, "Error creating card!\n");
1918
		return err;
L
Linus Torvalds 已提交
1919 1920
	}

1921
	err = azx_create(card, pci, dev, pci_id->driver_data, &chip);
W
Wu Fengguang 已提交
1922 1923
	if (err < 0)
		goto out_free;
T
Takashi Iwai 已提交
1924
	card->private_data = chip;
1925
	hda = container_of(chip, struct hda_intel, chip);
1926 1927 1928 1929 1930

	pci_set_drvdata(pci, card);

	err = register_vga_switcheroo(chip);
	if (err < 0) {
1931
		dev_err(card->dev, "Error registering vga_switcheroo client\n");
1932 1933 1934 1935
		goto out_free;
	}

	if (check_hdmi_disabled(pci)) {
1936 1937
		dev_info(card->dev, "VGA controller is disabled\n");
		dev_info(card->dev, "Delaying initialization\n");
1938 1939 1940
		chip->disabled = true;
	}

1941
	schedule_probe = !chip->disabled;
L
Linus Torvalds 已提交
1942

1943 1944
#ifdef CONFIG_SND_HDA_PATCH_LOADER
	if (patch[dev] && *patch[dev]) {
1945 1946
		dev_info(card->dev, "Applying patch firmware '%s'\n",
			 patch[dev]);
1947 1948 1949
		err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
					      &pci->dev, GFP_KERNEL, card,
					      azx_firmware_cb);
1950 1951
		if (err < 0)
			goto out_free;
1952
		schedule_probe = false; /* continued in azx_firmware_cb() */
1953 1954 1955
	}
#endif /* CONFIG_SND_HDA_PATCH_LOADER */

1956
#ifndef CONFIG_SND_HDA_I915
1957 1958
	if (CONTROLLER_IN_GPU(pci))
		dev_err(card->dev, "Haswell/Broadwell HDMI/DP must build in CONFIG_SND_HDA_I915\n");
1959 1960
#endif

1961
	if (schedule_probe)
1962
		schedule_work(&hda->probe_work);
1963 1964

	dev++;
1965
	if (chip->disabled)
1966
		complete_all(&hda->probe_wait);
1967 1968 1969 1970 1971 1972 1973
	return 0;

out_free:
	snd_card_free(card);
	return err;
}

1974 1975 1976 1977 1978 1979
/* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
	[AZX_DRIVER_NVIDIA] = 8,
	[AZX_DRIVER_TERA] = 1,
};

1980
static int azx_probe_continue(struct azx *chip)
1981
{
1982
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1983
	struct hdac_bus *bus = azx_bus(chip);
W
Wang Xingchao 已提交
1984
	struct pci_dev *pci = chip->pci;
1985 1986 1987
	int dev = chip->dev_index;
	int err;

1988
	hda->probe_continued = 1;
1989 1990 1991 1992 1993 1994

	/* Request display power well for the HDA controller or codec. For
	 * Haswell/Broadwell, both the display HDA controller and codec need
	 * this power. For other platforms, like Baytrail/Braswell, only the
	 * display codec needs the power and it can be released after probe.
	 */
1995
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1996 1997
		/* HSW/BDW controllers need this power */
		if (CONTROLLER_IN_GPU(pci))
1998 1999
			hda->need_i915_power = 1;

2000
		err = snd_hdac_i915_init(bus);
2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011
		if (err < 0) {
			/* if the controller is bound only with HDMI/DP
			 * (for HSW and BDW), we need to abort the probe;
			 * for other chips, still continue probing as other
			 * codecs can be on the same link.
			 */
			if (CONTROLLER_IN_GPU(pci))
				goto out_free;
			else
				goto skip_i915;
		}
2012

2013
		err = snd_hdac_display_power(bus, true);
2014 2015 2016
		if (err < 0) {
			dev_err(chip->card->dev,
				"Cannot turn on display power on i915\n");
2017
			goto i915_power_fail;
2018
		}
2019 2020
	}

2021
 skip_i915:
2022 2023 2024 2025
	err = azx_first_init(chip);
	if (err < 0)
		goto out_free;

2026 2027 2028 2029
#ifdef CONFIG_SND_HDA_INPUT_BEEP
	chip->beep_mode = beep_mode[dev];
#endif

L
Linus Torvalds 已提交
2030
	/* create codec instances */
2031
	err = azx_probe_codecs(chip, azx_max_codecs[chip->driver_type]);
W
Wu Fengguang 已提交
2032 2033
	if (err < 0)
		goto out_free;
2034

2035
#ifdef CONFIG_SND_HDA_PATCH_LOADER
2036
	if (chip->fw) {
2037
		err = snd_hda_load_patch(&chip->bus, chip->fw->size,
2038
					 chip->fw->data);
2039 2040
		if (err < 0)
			goto out_free;
2041
#ifndef CONFIG_PM
2042 2043
		release_firmware(chip->fw); /* no longer needed */
		chip->fw = NULL;
2044
#endif
2045 2046
	}
#endif
2047
	if ((probe_only[dev] & 1) == 0) {
2048 2049 2050 2051
		err = azx_codec_configure(chip);
		if (err < 0)
			goto out_free;
	}
L
Linus Torvalds 已提交
2052

2053
	err = snd_card_register(chip->card);
W
Wu Fengguang 已提交
2054 2055
	if (err < 0)
		goto out_free;
L
Linus Torvalds 已提交
2056

2057
	chip->running = 1;
2058
	azx_add_card_list(chip);
2059
	snd_hda_set_power_save(&chip->bus, power_save * 1000);
2060
	if (azx_has_pm_runtime(chip) || hda->use_vga_switcheroo)
W
Wang Xingchao 已提交
2061
		pm_runtime_put_noidle(&pci->dev);
L
Linus Torvalds 已提交
2062

W
Wu Fengguang 已提交
2063
out_free:
2064 2065
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
		&& !hda->need_i915_power)
2066
		snd_hdac_display_power(bus, false);
2067 2068

i915_power_fail:
2069
	if (err < 0)
2070 2071
		hda->init_failed = 1;
	complete_all(&hda->probe_wait);
W
Wu Fengguang 已提交
2072
	return err;
L
Linus Torvalds 已提交
2073 2074
}

2075
static void azx_remove(struct pci_dev *pci)
L
Linus Torvalds 已提交
2076
{
2077
	struct snd_card *card = pci_get_drvdata(pci);
2078

2079 2080
	if (card)
		snd_card_free(card);
L
Linus Torvalds 已提交
2081 2082
}

2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094
static void azx_shutdown(struct pci_dev *pci)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip;

	if (!card)
		return;
	chip = card->private_data;
	if (chip && chip->running)
		azx_stop_chip(chip);
}

L
Linus Torvalds 已提交
2095
/* PCI IDs */
2096
static const struct pci_device_id azx_ids[] = {
2097
	/* CPT */
2098
	{ PCI_DEVICE(0x8086, 0x1c20),
2099
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2100
	/* PBG */
2101
	{ PCI_DEVICE(0x8086, 0x1d20),
2102
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2103
	/* Panther Point */
2104
	{ PCI_DEVICE(0x8086, 0x1e20),
2105
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2106 2107
	/* Lynx Point */
	{ PCI_DEVICE(0x8086, 0x8c20),
2108
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2109 2110 2111
	/* 9 Series */
	{ PCI_DEVICE(0x8086, 0x8ca0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2112 2113 2114 2115 2116
	/* Wellsburg */
	{ PCI_DEVICE(0x8086, 0x8d20),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
	{ PCI_DEVICE(0x8086, 0x8d21),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2117 2118 2119 2120 2121
	/* Lewisburg */
	{ PCI_DEVICE(0x8086, 0xa1f0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
	{ PCI_DEVICE(0x8086, 0xa270),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2122 2123
	/* Lynx Point-LP */
	{ PCI_DEVICE(0x8086, 0x9c20),
2124
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2125 2126
	/* Lynx Point-LP */
	{ PCI_DEVICE(0x8086, 0x9c21),
2127
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2128 2129 2130
	/* Wildcat Point-LP */
	{ PCI_DEVICE(0x8086, 0x9ca0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2131 2132
	/* Sunrise Point */
	{ PCI_DEVICE(0x8086, 0xa170),
2133
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2134 2135
	/* Sunrise Point-LP */
	{ PCI_DEVICE(0x8086, 0x9d70),
2136
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2137 2138 2139
	/* Broxton-P(Apollolake) */
	{ PCI_DEVICE(0x8086, 0x5a98),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BROXTON },
2140
	/* Haswell */
2141
	{ PCI_DEVICE(0x8086, 0x0a0c),
2142
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2143
	{ PCI_DEVICE(0x8086, 0x0c0c),
2144
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2145
	{ PCI_DEVICE(0x8086, 0x0d0c),
2146
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2147 2148
	/* Broadwell */
	{ PCI_DEVICE(0x8086, 0x160c),
2149
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2150 2151
	/* 5 Series/3400 */
	{ PCI_DEVICE(0x8086, 0x3b56),
2152
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2153
	/* Poulsbo */
2154
	{ PCI_DEVICE(0x8086, 0x811b),
2155
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2156
	/* Oaktrail */
2157
	{ PCI_DEVICE(0x8086, 0x080a),
2158
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2159 2160
	/* BayTrail */
	{ PCI_DEVICE(0x8086, 0x0f04),
2161
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BAYTRAIL },
2162 2163
	/* Braswell */
	{ PCI_DEVICE(0x8086, 0x2284),
2164
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BRASWELL },
2165
	/* ICH6 */
2166
	{ PCI_DEVICE(0x8086, 0x2668),
2167 2168
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH7 */
2169
	{ PCI_DEVICE(0x8086, 0x27d8),
2170 2171
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ESB2 */
2172
	{ PCI_DEVICE(0x8086, 0x269a),
2173 2174
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH8 */
2175
	{ PCI_DEVICE(0x8086, 0x284b),
2176 2177
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH9 */
2178
	{ PCI_DEVICE(0x8086, 0x293e),
2179 2180
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH9 */
2181
	{ PCI_DEVICE(0x8086, 0x293f),
2182 2183
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH10 */
2184
	{ PCI_DEVICE(0x8086, 0x3a3e),
2185 2186
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH10 */
2187
	{ PCI_DEVICE(0x8086, 0x3a6e),
2188
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2189 2190 2191 2192
	/* Generic Intel */
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2193
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2194 2195 2196 2197 2198 2199 2200 2201
	/* ATI SB 450/600/700/800/900 */
	{ PCI_DEVICE(0x1002, 0x437b),
	  .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
	{ PCI_DEVICE(0x1002, 0x4383),
	  .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
	/* AMD Hudson */
	{ PCI_DEVICE(0x1022, 0x780d),
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2202
	/* ATI HDMI */
2203 2204
	{ PCI_DEVICE(0x1002, 0x1308),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2205 2206
	{ PCI_DEVICE(0x1002, 0x157a),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2207 2208 2209 2210 2211 2212 2213 2214
	{ PCI_DEVICE(0x1002, 0x793b),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x7919),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x960f),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x970f),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2215 2216
	{ PCI_DEVICE(0x1002, 0x9840),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236
	{ PCI_DEVICE(0x1002, 0xaa00),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa08),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa10),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa18),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa20),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa28),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa30),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa38),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa40),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa48),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252
	{ PCI_DEVICE(0x1002, 0xaa50),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa58),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa60),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa68),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa80),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa88),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa90),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa98),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2253
	{ PCI_DEVICE(0x1002, 0x9902),
2254
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2255
	{ PCI_DEVICE(0x1002, 0xaaa0),
2256
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2257
	{ PCI_DEVICE(0x1002, 0xaaa8),
2258
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2259
	{ PCI_DEVICE(0x1002, 0xaab0),
2260
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2261 2262
	{ PCI_DEVICE(0x1002, 0xaac0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2263 2264
	{ PCI_DEVICE(0x1002, 0xaac8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2265 2266 2267 2268
	{ PCI_DEVICE(0x1002, 0xaad8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
	{ PCI_DEVICE(0x1002, 0xaae8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2269
	/* VIA VT8251/VT8237A */
2270 2271
	{ PCI_DEVICE(0x1106, 0x3288),
	  .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
2272 2273 2274 2275
	/* VIA GFX VT7122/VX900 */
	{ PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
	/* VIA GFX VT6122/VX11 */
	{ PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2276 2277 2278 2279 2280
	/* SIS966 */
	{ PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
	/* ULI M5461 */
	{ PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
	/* NVIDIA MCP */
2281 2282 2283
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2284
	  .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2285
	/* Teradici */
2286 2287
	{ PCI_DEVICE(0x6549, 0x1200),
	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2288 2289
	{ PCI_DEVICE(0x6549, 0x2200),
	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2290
	/* Creative X-Fi (CA0110-IBG) */
2291 2292 2293 2294 2295
	/* CTHDA chips */
	{ PCI_DEVICE(0x1102, 0x0010),
	  .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
	{ PCI_DEVICE(0x1102, 0x0012),
	  .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
T
Takashi Iwai 已提交
2296
#if !IS_ENABLED(CONFIG_SND_CTXFI)
2297 2298 2299 2300
	/* the following entry conflicts with snd-ctxfi driver,
	 * as ctxfi driver mutates from HD-audio to native mode with
	 * a special command sequence.
	 */
2301 2302 2303
	{ PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2304
	  .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2305
	  AZX_DCAPS_NO_64BIT |
2306
	  AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2307 2308
#else
	/* this entry seems still valid -- i.e. without emu20kx chip */
2309 2310
	{ PCI_DEVICE(0x1102, 0x0009),
	  .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2311
	  AZX_DCAPS_NO_64BIT |
2312
	  AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2313
#endif
2314 2315 2316
	/* CM8888 */
	{ PCI_DEVICE(0x13f6, 0x5011),
	  .driver_data = AZX_DRIVER_CMEDIA |
2317
	  AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2318 2319
	/* Vortex86MX */
	{ PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2320 2321
	/* VMware HDAudio */
	{ PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2322
	/* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2323 2324 2325
	{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2326
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2327 2328 2329
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2330
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
L
Linus Torvalds 已提交
2331 2332 2333 2334 2335
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, azx_ids);

/* pci_driver definition */
2336
static struct pci_driver azx_driver = {
2337
	.name = KBUILD_MODNAME,
L
Linus Torvalds 已提交
2338 2339
	.id_table = azx_ids,
	.probe = azx_probe,
2340
	.remove = azx_remove,
2341
	.shutdown = azx_shutdown,
2342 2343 2344
	.driver = {
		.pm = AZX_PM_OPS,
	},
L
Linus Torvalds 已提交
2345 2346
};

2347
module_pci_driver(azx_driver);