amdgpu_cs.c 37.2 KB
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/*
 * Copyright 2008 Jerome Glisse.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *    Jerome Glisse <glisse@freedesktop.org>
 */
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#include <linux/pagemap.h>
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#include <drm/drmP.h>
#include <drm/amdgpu_drm.h>
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#include <drm/drm_syncobj.h>
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#include "amdgpu.h"
#include "amdgpu_trace.h"

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static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
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				      struct drm_amdgpu_cs_chunk_fence *data,
				      uint32_t *offset)
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{
	struct drm_gem_object *gobj;
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	unsigned long size;
40

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	gobj = drm_gem_object_lookup(p->filp, data->handle);
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	if (gobj == NULL)
		return -EINVAL;

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	p->uf_entry.robj = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
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	p->uf_entry.priority = 0;
	p->uf_entry.tv.bo = &p->uf_entry.robj->tbo;
	p->uf_entry.tv.shared = true;
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	p->uf_entry.user_pages = NULL;
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	size = amdgpu_bo_size(p->uf_entry.robj);
	if (size != PAGE_SIZE || (data->offset + 8) > size)
		return -EINVAL;

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	*offset = data->offset;
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	drm_gem_object_put_unlocked(gobj);
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	if (amdgpu_ttm_tt_get_usermm(p->uf_entry.robj->tbo.ttm)) {
		amdgpu_bo_unref(&p->uf_entry.robj);
		return -EINVAL;
	}

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	return 0;
}

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static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
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{
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	struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
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	struct amdgpu_vm *vm = &fpriv->vm;
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	union drm_amdgpu_cs *cs = data;
	uint64_t *chunk_array_user;
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	uint64_t *chunk_array;
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	unsigned size, num_ibs = 0;
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	uint32_t uf_offset = 0;
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	int i;
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	int ret;
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	if (cs->in.num_chunks == 0)
		return 0;

	chunk_array = kmalloc_array(cs->in.num_chunks, sizeof(uint64_t), GFP_KERNEL);
	if (!chunk_array)
		return -ENOMEM;
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	p->ctx = amdgpu_ctx_get(fpriv, cs->in.ctx_id);
	if (!p->ctx) {
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		ret = -EINVAL;
		goto free_chunk;
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	}
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	/* get chunks */
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	chunk_array_user = u64_to_user_ptr(cs->in.chunks);
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	if (copy_from_user(chunk_array, chunk_array_user,
			   sizeof(uint64_t)*cs->in.num_chunks)) {
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		ret = -EFAULT;
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		goto put_ctx;
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	}

	p->nchunks = cs->in.num_chunks;
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	p->chunks = kmalloc_array(p->nchunks, sizeof(struct amdgpu_cs_chunk),
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			    GFP_KERNEL);
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	if (!p->chunks) {
		ret = -ENOMEM;
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		goto put_ctx;
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	}

	for (i = 0; i < p->nchunks; i++) {
		struct drm_amdgpu_cs_chunk __user **chunk_ptr = NULL;
		struct drm_amdgpu_cs_chunk user_chunk;
		uint32_t __user *cdata;

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		chunk_ptr = u64_to_user_ptr(chunk_array[i]);
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		if (copy_from_user(&user_chunk, chunk_ptr,
				       sizeof(struct drm_amdgpu_cs_chunk))) {
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			ret = -EFAULT;
			i--;
			goto free_partial_kdata;
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		}
		p->chunks[i].chunk_id = user_chunk.chunk_id;
		p->chunks[i].length_dw = user_chunk.length_dw;

		size = p->chunks[i].length_dw;
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		cdata = u64_to_user_ptr(user_chunk.chunk_data);
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		p->chunks[i].kdata = kvmalloc_array(size, sizeof(uint32_t), GFP_KERNEL);
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		if (p->chunks[i].kdata == NULL) {
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			ret = -ENOMEM;
			i--;
			goto free_partial_kdata;
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		}
		size *= sizeof(uint32_t);
		if (copy_from_user(p->chunks[i].kdata, cdata, size)) {
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			ret = -EFAULT;
			goto free_partial_kdata;
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		}

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		switch (p->chunks[i].chunk_id) {
		case AMDGPU_CHUNK_ID_IB:
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			++num_ibs;
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			break;

		case AMDGPU_CHUNK_ID_FENCE:
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			size = sizeof(struct drm_amdgpu_cs_chunk_fence);
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			if (p->chunks[i].length_dw * sizeof(uint32_t) < size) {
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				ret = -EINVAL;
				goto free_partial_kdata;
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			}
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			ret = amdgpu_cs_user_fence_chunk(p, p->chunks[i].kdata,
							 &uf_offset);
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			if (ret)
				goto free_partial_kdata;

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			break;

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		case AMDGPU_CHUNK_ID_DEPENDENCIES:
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		case AMDGPU_CHUNK_ID_SYNCOBJ_IN:
		case AMDGPU_CHUNK_ID_SYNCOBJ_OUT:
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			break;

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		default:
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			ret = -EINVAL;
			goto free_partial_kdata;
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		}
	}

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	ret = amdgpu_job_alloc(p->adev, num_ibs, &p->job, vm);
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	if (ret)
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		goto free_all_kdata;
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	if (p->uf_entry.robj)
		p->job->uf_addr = uf_offset;
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	kfree(chunk_array);
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	return 0;

free_all_kdata:
	i = p->nchunks - 1;
free_partial_kdata:
	for (; i >= 0; i--)
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		kvfree(p->chunks[i].kdata);
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	kfree(p->chunks);
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	p->chunks = NULL;
	p->nchunks = 0;
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put_ctx:
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	amdgpu_ctx_put(p->ctx);
free_chunk:
	kfree(chunk_array);

	return ret;
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}

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/* Convert microseconds to bytes. */
static u64 us_to_bytes(struct amdgpu_device *adev, s64 us)
{
	if (us <= 0 || !adev->mm_stats.log2_max_MBps)
		return 0;

	/* Since accum_us is incremented by a million per second, just
	 * multiply it by the number of MB/s to get the number of bytes.
	 */
	return us << adev->mm_stats.log2_max_MBps;
}

static s64 bytes_to_us(struct amdgpu_device *adev, u64 bytes)
{
	if (!adev->mm_stats.log2_max_MBps)
		return 0;

	return bytes >> adev->mm_stats.log2_max_MBps;
}

/* Returns how many bytes TTM can move right now. If no bytes can be moved,
 * it returns 0. If it returns non-zero, it's OK to move at least one buffer,
 * which means it can go over the threshold once. If that happens, the driver
 * will be in debt and no other buffer migrations can be done until that debt
 * is repaid.
 *
 * This approach allows moving a buffer of any size (it's important to allow
 * that).
 *
 * The currency is simply time in microseconds and it increases as the clock
 * ticks. The accumulated microseconds (us) are converted to bytes and
 * returned.
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 */
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static void amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev,
					      u64 *max_bytes,
					      u64 *max_vis_bytes)
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{
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	s64 time_us, increment_us;
	u64 free_vram, total_vram, used_vram;
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	/* Allow a maximum of 200 accumulated ms. This is basically per-IB
	 * throttling.
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	 *
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	 * It means that in order to get full max MBps, at least 5 IBs per
	 * second must be submitted and not more than 200ms apart from each
	 * other.
	 */
	const s64 us_upper_bound = 200000;
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	if (!adev->mm_stats.log2_max_MBps) {
		*max_bytes = 0;
		*max_vis_bytes = 0;
		return;
	}
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	total_vram = adev->mc.real_vram_size - adev->vram_pin_size;
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	used_vram = amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
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	free_vram = used_vram >= total_vram ? 0 : total_vram - used_vram;

	spin_lock(&adev->mm_stats.lock);

	/* Increase the amount of accumulated us. */
	time_us = ktime_to_us(ktime_get());
	increment_us = time_us - adev->mm_stats.last_update_us;
	adev->mm_stats.last_update_us = time_us;
	adev->mm_stats.accum_us = min(adev->mm_stats.accum_us + increment_us,
                                      us_upper_bound);

	/* This prevents the short period of low performance when the VRAM
	 * usage is low and the driver is in debt or doesn't have enough
	 * accumulated us to fill VRAM quickly.
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	 *
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	 * The situation can occur in these cases:
	 * - a lot of VRAM is freed by userspace
	 * - the presence of a big buffer causes a lot of evictions
	 *   (solution: split buffers into smaller ones)
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	 *
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	 * If 128 MB or 1/8th of VRAM is free, start filling it now by setting
	 * accum_us to a positive number.
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	 */
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	if (free_vram >= 128 * 1024 * 1024 || free_vram >= total_vram / 8) {
		s64 min_us;

		/* Be more aggresive on dGPUs. Try to fill a portion of free
		 * VRAM now.
		 */
		if (!(adev->flags & AMD_IS_APU))
			min_us = bytes_to_us(adev, free_vram / 4);
		else
			min_us = 0; /* Reset accum_us on APUs. */

		adev->mm_stats.accum_us = max(min_us, adev->mm_stats.accum_us);
	}
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	/* This is set to 0 if the driver is in debt to disallow (optional)
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	 * buffer moves.
	 */
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	*max_bytes = us_to_bytes(adev, adev->mm_stats.accum_us);

	/* Do the same for visible VRAM if half of it is free */
	if (adev->mc.visible_vram_size < adev->mc.real_vram_size) {
		u64 total_vis_vram = adev->mc.visible_vram_size;
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		u64 used_vis_vram =
			amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
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		if (used_vis_vram < total_vis_vram) {
			u64 free_vis_vram = total_vis_vram - used_vis_vram;
			adev->mm_stats.accum_us_vis = min(adev->mm_stats.accum_us_vis +
							  increment_us, us_upper_bound);

			if (free_vis_vram >= total_vis_vram / 2)
				adev->mm_stats.accum_us_vis =
					max(bytes_to_us(adev, free_vis_vram / 2),
					    adev->mm_stats.accum_us_vis);
		}

		*max_vis_bytes = us_to_bytes(adev, adev->mm_stats.accum_us_vis);
	} else {
		*max_vis_bytes = 0;
	}
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	spin_unlock(&adev->mm_stats.lock);
}

/* Report how many bytes have really been moved for the last command
 * submission. This can result in a debt that can stop buffer migrations
 * temporarily.
 */
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void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
				  u64 num_vis_bytes)
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{
	spin_lock(&adev->mm_stats.lock);
	adev->mm_stats.accum_us -= bytes_to_us(adev, num_bytes);
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	adev->mm_stats.accum_us_vis -= bytes_to_us(adev, num_vis_bytes);
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	spin_unlock(&adev->mm_stats.lock);
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}

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static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
				 struct amdgpu_bo *bo)
{
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	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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	u64 initial_bytes_moved, bytes_moved;
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	uint32_t domain;
	int r;

	if (bo->pin_count)
		return 0;

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	/* Don't move this buffer if we have depleted our allowance
	 * to move it. Don't move anything if the threshold is zero.
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	 */
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	if (p->bytes_moved < p->bytes_moved_threshold) {
		if (adev->mc.visible_vram_size < adev->mc.real_vram_size &&
		    (bo->flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)) {
			/* And don't move a CPU_ACCESS_REQUIRED BO to limited
			 * visible VRAM if we've depleted our allowance to do
			 * that.
			 */
			if (p->bytes_moved_vis < p->bytes_moved_vis_threshold)
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				domain = bo->preferred_domains;
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			else
				domain = bo->allowed_domains;
		} else {
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			domain = bo->preferred_domains;
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		}
	} else {
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		domain = bo->allowed_domains;
360
	}
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retry:
	amdgpu_ttm_placement_from_domain(bo, domain);
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	initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
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	r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
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	bytes_moved = atomic64_read(&adev->num_bytes_moved) -
		      initial_bytes_moved;
	p->bytes_moved += bytes_moved;
	if (adev->mc.visible_vram_size < adev->mc.real_vram_size &&
	    bo->tbo.mem.mem_type == TTM_PL_VRAM &&
	    bo->tbo.mem.start < adev->mc.visible_vram_size >> PAGE_SHIFT)
		p->bytes_moved_vis += bytes_moved;
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	if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) {
		domain = bo->allowed_domains;
		goto retry;
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	}

	return r;
}

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/* Last resort, try to evict something from the current working set */
static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
384
				struct amdgpu_bo *validated)
385
{
386
	uint32_t domain = validated->allowed_domains;
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	int r;

	if (!p->evictable)
		return false;

	for (;&p->evictable->tv.head != &p->validated;
	     p->evictable = list_prev_entry(p->evictable, tv.head)) {

		struct amdgpu_bo_list_entry *candidate = p->evictable;
		struct amdgpu_bo *bo = candidate->robj;
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		struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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		u64 initial_bytes_moved, bytes_moved;
		bool update_bytes_moved_vis;
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		uint32_t other;

		/* If we reached our current BO we can forget it */
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		if (candidate->robj == validated)
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			break;

		other = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);

		/* Check if this BO is in one of the domains we need space for */
		if (!(other & domain))
			continue;

		/* Check if we can move this BO somewhere else */
		other = bo->allowed_domains & ~domain;
		if (!other)
			continue;

		/* Good we can try to move this BO somewhere else */
		amdgpu_ttm_placement_from_domain(bo, other);
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		update_bytes_moved_vis =
			adev->mc.visible_vram_size < adev->mc.real_vram_size &&
			bo->tbo.mem.mem_type == TTM_PL_VRAM &&
			bo->tbo.mem.start < adev->mc.visible_vram_size >> PAGE_SHIFT;
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		initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
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		r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
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		bytes_moved = atomic64_read(&adev->num_bytes_moved) -
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			initial_bytes_moved;
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		p->bytes_moved += bytes_moved;
		if (update_bytes_moved_vis)
			p->bytes_moved_vis += bytes_moved;
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		if (unlikely(r))
			break;

		p->evictable = list_prev_entry(p->evictable, tv.head);
		list_move(&candidate->tv.head, &p->validated);

		return true;
	}

	return false;
}

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static int amdgpu_cs_validate(void *param, struct amdgpu_bo *bo)
{
	struct amdgpu_cs_parser *p = param;
	int r;

	do {
		r = amdgpu_cs_bo_validate(p, bo);
	} while (r == -ENOMEM && amdgpu_cs_try_evict(p, bo));
	if (r)
		return r;

	if (bo->shadow)
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		r = amdgpu_cs_bo_validate(p, bo->shadow);
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	return r;
}

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static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
461
			    struct list_head *validated)
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{
	struct amdgpu_bo_list_entry *lobj;
	int r;

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	list_for_each_entry(lobj, validated, tv.head) {
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		struct amdgpu_bo *bo = lobj->robj;
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		bool binding_userptr = false;
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		struct mm_struct *usermm;
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		usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm);
		if (usermm && usermm != current->mm)
			return -EPERM;

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		/* Check if we have user pages and nobody bound the BO already */
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		if (amdgpu_ttm_tt_userptr_needs_pages(bo->tbo.ttm) &&
		    lobj->user_pages) {
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			amdgpu_ttm_placement_from_domain(bo,
							 AMDGPU_GEM_DOMAIN_CPU);
			r = ttm_bo_validate(&bo->tbo, &bo->placement, true,
					    false);
			if (r)
				return r;
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			amdgpu_ttm_tt_set_user_pages(bo->tbo.ttm,
						     lobj->user_pages);
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			binding_userptr = true;
		}

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		if (p->evictable == lobj)
			p->evictable = NULL;

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		r = amdgpu_cs_validate(p, bo);
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		if (r)
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			return r;
495

496
		if (binding_userptr) {
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			kvfree(lobj->user_pages);
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			lobj->user_pages = NULL;
		}
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	}
	return 0;
}

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static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
				union drm_amdgpu_cs *cs)
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{
	struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
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	struct amdgpu_bo_list_entry *e;
509
	struct list_head duplicates;
510
	unsigned i, tries = 10;
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	int r;
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	INIT_LIST_HEAD(&p->validated);

	p->bo_list = amdgpu_bo_list_get(fpriv, cs->in.bo_list_handle);
516
	if (p->bo_list) {
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		amdgpu_bo_list_get_list(p->bo_list, &p->validated);
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		if (p->bo_list->first_userptr != p->bo_list->num_entries)
			p->mn = amdgpu_mn_get(p->adev);
	}
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522
	INIT_LIST_HEAD(&duplicates);
523
	amdgpu_vm_get_pd_bo(&fpriv->vm, &p->validated, &p->vm_pd);
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525
	if (p->uf_entry.robj)
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		list_add(&p->uf_entry.tv.head, &p->validated);

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	while (1) {
		struct list_head need_pages;
		unsigned i;

		r = ttm_eu_reserve_buffers(&p->ticket, &p->validated, true,
					   &duplicates);
534
		if (unlikely(r != 0)) {
535 536
			if (r != -ERESTARTSYS)
				DRM_ERROR("ttm_eu_reserve_buffers failed.\n");
537
			goto error_free_pages;
538
		}
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		/* Without a BO list we don't have userptr BOs */
		if (!p->bo_list)
			break;

		INIT_LIST_HEAD(&need_pages);
		for (i = p->bo_list->first_userptr;
		     i < p->bo_list->num_entries; ++i) {
547
			struct amdgpu_bo *bo;
548 549

			e = &p->bo_list->array[i];
550
			bo = e->robj;
551

552
			if (amdgpu_ttm_tt_userptr_invalidated(bo->tbo.ttm,
553 554 555
				 &e->user_invalidated) && e->user_pages) {

				/* We acquired a page array, but somebody
556
				 * invalidated it. Free it and try again
557 558
				 */
				release_pages(e->user_pages,
559
					      bo->tbo.ttm->num_pages,
560
					      false);
M
Michal Hocko 已提交
561
				kvfree(e->user_pages);
562 563 564
				e->user_pages = NULL;
			}

565
			if (amdgpu_ttm_tt_userptr_needs_pages(bo->tbo.ttm) &&
566 567 568 569 570 571 572 573 574 575 576 577 578 579
			    !e->user_pages) {
				list_del(&e->tv.head);
				list_add(&e->tv.head, &need_pages);

				amdgpu_bo_unreserve(e->robj);
			}
		}

		if (list_empty(&need_pages))
			break;

		/* Unreserve everything again. */
		ttm_eu_backoff_reservation(&p->ticket, &p->validated);

580
		/* We tried too many times, just abort */
581 582
		if (!--tries) {
			r = -EDEADLK;
583
			DRM_ERROR("deadlock in %s\n", __func__);
584 585 586
			goto error_free_pages;
		}

A
Alex Xie 已提交
587
		/* Fill the page arrays for all userptrs. */
588 589 590
		list_for_each_entry(e, &need_pages, tv.head) {
			struct ttm_tt *ttm = e->robj->tbo.ttm;

M
Michal Hocko 已提交
591 592 593
			e->user_pages = kvmalloc_array(ttm->num_pages,
							 sizeof(struct page*),
							 GFP_KERNEL | __GFP_ZERO);
594 595
			if (!e->user_pages) {
				r = -ENOMEM;
596
				DRM_ERROR("calloc failure in %s\n", __func__);
597 598 599 600 601
				goto error_free_pages;
			}

			r = amdgpu_ttm_tt_get_user_pages(ttm, e->user_pages);
			if (r) {
602
				DRM_ERROR("amdgpu_ttm_tt_get_user_pages failed.\n");
M
Michal Hocko 已提交
603
				kvfree(e->user_pages);
604 605 606 607 608 609 610 611
				e->user_pages = NULL;
				goto error_free_pages;
			}
		}

		/* And try again. */
		list_splice(&need_pages, &p->validated);
	}
612

613 614
	amdgpu_cs_get_threshold_for_moves(p->adev, &p->bytes_moved_threshold,
					  &p->bytes_moved_vis_threshold);
615
	p->bytes_moved = 0;
616
	p->bytes_moved_vis = 0;
617 618 619
	p->evictable = list_last_entry(&p->validated,
				       struct amdgpu_bo_list_entry,
				       tv.head);
620

621 622 623 624 625 626 627
	r = amdgpu_vm_validate_pt_bos(p->adev, &fpriv->vm,
				      amdgpu_cs_validate, p);
	if (r) {
		DRM_ERROR("amdgpu_vm_validate_pt_bos() failed.\n");
		goto error_validate;
	}

628
	r = amdgpu_cs_list_validate(p, &duplicates);
629 630
	if (r) {
		DRM_ERROR("amdgpu_cs_list_validate(duplicates) failed.\n");
631
		goto error_validate;
632
	}
633

634
	r = amdgpu_cs_list_validate(p, &p->validated);
635 636
	if (r) {
		DRM_ERROR("amdgpu_cs_list_validate(validated) failed.\n");
637
		goto error_validate;
638
	}
639

640 641
	amdgpu_cs_report_moved_bytes(p->adev, p->bytes_moved,
				     p->bytes_moved_vis);
642
	if (p->bo_list) {
643 644 645
		struct amdgpu_bo *gds = p->bo_list->gds_obj;
		struct amdgpu_bo *gws = p->bo_list->gws_obj;
		struct amdgpu_bo *oa = p->bo_list->oa_obj;
646 647 648 649 650 651 652 653
		struct amdgpu_vm *vm = &fpriv->vm;
		unsigned i;

		for (i = 0; i < p->bo_list->num_entries; i++) {
			struct amdgpu_bo *bo = p->bo_list->array[i].robj;

			p->bo_list->array[i].bo_va = amdgpu_vm_bo_find(vm, bo);
		}
654 655 656 657 658 659 660 661 662 663 664 665 666

		if (gds) {
			p->job->gds_base = amdgpu_bo_gpu_offset(gds);
			p->job->gds_size = amdgpu_bo_size(gds);
		}
		if (gws) {
			p->job->gws_base = amdgpu_bo_gpu_offset(gws);
			p->job->gws_size = amdgpu_bo_size(gws);
		}
		if (oa) {
			p->job->oa_base = amdgpu_bo_gpu_offset(oa);
			p->job->oa_size = amdgpu_bo_size(oa);
		}
667
	}
668

669 670 671
	if (!r && p->uf_entry.robj) {
		struct amdgpu_bo *uf = p->uf_entry.robj;

672
		r = amdgpu_ttm_bind(&uf->tbo, &uf->tbo.mem);
673 674
		p->job->uf_addr += amdgpu_bo_gpu_offset(uf);
	}
675

676
error_validate:
677
	if (r)
678
		ttm_eu_backoff_reservation(&p->ticket, &p->validated);
A
Alex Deucher 已提交
679

680 681 682 683 684 685 686 687 688 689 690 691 692
error_free_pages:

	if (p->bo_list) {
		for (i = p->bo_list->first_userptr;
		     i < p->bo_list->num_entries; ++i) {
			e = &p->bo_list->array[i];

			if (!e->user_pages)
				continue;

			release_pages(e->user_pages,
				      e->robj->tbo.ttm->num_pages,
				      false);
M
Michal Hocko 已提交
693
			kvfree(e->user_pages);
694 695 696
		}
	}

A
Alex Deucher 已提交
697 698 699 700 701 702 703 704 705 706
	return r;
}

static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p)
{
	struct amdgpu_bo_list_entry *e;
	int r;

	list_for_each_entry(e, &p->validated, tv.head) {
		struct reservation_object *resv = e->robj->tbo.resv;
707
		r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, p->filp);
A
Alex Deucher 已提交
708 709 710 711 712 713 714

		if (r)
			return r;
	}
	return 0;
}

715 716 717 718 719 720 721 722
/**
 * cs_parser_fini() - clean parser states
 * @parser:	parser structure holding parsing context.
 * @error:	error number
 *
 * If error is set than unvalidate buffer, otherwise just free memory
 * used by parsing context.
 **/
723 724
static void amdgpu_cs_parser_fini(struct amdgpu_cs_parser *parser, int error,
				  bool backoff)
C
Chunming Zhou 已提交
725
{
726 727
	unsigned i;

728
	if (error && backoff)
A
Alex Deucher 已提交
729 730
		ttm_eu_backoff_reservation(&parser->ticket,
					   &parser->validated);
731 732 733 734 735

	for (i = 0; i < parser->num_post_dep_syncobjs; i++)
		drm_syncobj_put(parser->post_dep_syncobjs[i]);
	kfree(parser->post_dep_syncobjs);

736
	dma_fence_put(parser->fence);
737

738 739
	if (parser->ctx)
		amdgpu_ctx_put(parser->ctx);
740 741 742
	if (parser->bo_list)
		amdgpu_bo_list_put(parser->bo_list);

A
Alex Deucher 已提交
743
	for (i = 0; i < parser->nchunks; i++)
M
Michal Hocko 已提交
744
		kvfree(parser->chunks[i].kdata);
A
Alex Deucher 已提交
745
	kfree(parser->chunks);
746 747
	if (parser->job)
		amdgpu_job_free(parser->job);
748
	amdgpu_bo_unref(&parser->uf_entry.robj);
A
Alex Deucher 已提交
749 750
}

751
static int amdgpu_bo_vm_update_pte(struct amdgpu_cs_parser *p)
A
Alex Deucher 已提交
752 753
{
	struct amdgpu_device *adev = p->adev;
754 755
	struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
	struct amdgpu_vm *vm = &fpriv->vm;
A
Alex Deucher 已提交
756 757 758 759
	struct amdgpu_bo_va *bo_va;
	struct amdgpu_bo *bo;
	int i, r;

760
	r = amdgpu_vm_update_directories(adev, vm);
A
Alex Deucher 已提交
761 762 763
	if (r)
		return r;

764
	r = amdgpu_sync_fence(adev, &p->job->sync, vm->last_dir_update);
765 766 767
	if (r)
		return r;

768
	r = amdgpu_vm_clear_freed(adev, vm, NULL);
A
Alex Deucher 已提交
769 770 771
	if (r)
		return r;

772 773 774 775 776 777 778 779 780
	r = amdgpu_vm_bo_update(adev, fpriv->prt_va, false);
	if (r)
		return r;

	r = amdgpu_sync_fence(adev, &p->job->sync,
			      fpriv->prt_va->last_pt_update);
	if (r)
		return r;

M
Monk Liu 已提交
781 782
	if (amdgpu_sriov_vf(adev)) {
		struct dma_fence *f;
783 784

		bo_va = fpriv->csa_va;
M
Monk Liu 已提交
785 786 787 788 789 790 791 792 793 794 795
		BUG_ON(!bo_va);
		r = amdgpu_vm_bo_update(adev, bo_va, false);
		if (r)
			return r;

		f = bo_va->last_pt_update;
		r = amdgpu_sync_fence(adev, &p->job->sync, f);
		if (r)
			return r;
	}

A
Alex Deucher 已提交
796 797
	if (p->bo_list) {
		for (i = 0; i < p->bo_list->num_entries; i++) {
798
			struct dma_fence *f;
799

A
Alex Deucher 已提交
800 801 802 803 804 805 806 807 808
			/* ignore duplicates */
			bo = p->bo_list->array[i].robj;
			if (!bo)
				continue;

			bo_va = p->bo_list->array[i].bo_va;
			if (bo_va == NULL)
				continue;

809
			r = amdgpu_vm_bo_update(adev, bo_va, false);
A
Alex Deucher 已提交
810 811 812
			if (r)
				return r;

813
			f = bo_va->last_pt_update;
814
			r = amdgpu_sync_fence(adev, &p->job->sync, f);
815 816
			if (r)
				return r;
A
Alex Deucher 已提交
817
		}
818 819 820

	}

821
	r = amdgpu_vm_handle_moved(adev, vm, &p->job->sync);
822 823 824 825 826 827 828 829 830

	if (amdgpu_vm_debug && p->bo_list) {
		/* Invalidate all BOs to test for userspace bugs */
		for (i = 0; i < p->bo_list->num_entries; i++) {
			/* ignore duplicates */
			bo = p->bo_list->array[i].robj;
			if (!bo)
				continue;

831
			amdgpu_vm_bo_invalidate(adev, bo, false);
832
		}
A
Alex Deucher 已提交
833 834
	}

835
	return r;
A
Alex Deucher 已提交
836 837 838
}

static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
839
				 struct amdgpu_cs_parser *p)
A
Alex Deucher 已提交
840
{
841
	struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
A
Alex Deucher 已提交
842
	struct amdgpu_vm *vm = &fpriv->vm;
843
	struct amdgpu_ring *ring = p->job->ring;
A
Alex Deucher 已提交
844 845 846
	int i, r;

	/* Only for UVD/VCE VM emulation */
847 848 849
	if (ring->funcs->parse_cs) {
		for (i = 0; i < p->job->num_ibs; i++) {
			r = amdgpu_ring_parse_cs(ring, p, i);
A
Alex Deucher 已提交
850 851 852
			if (r)
				return r;
		}
853 854 855
	}

	if (p->job->vm) {
856
		p->job->vm_pd_addr = amdgpu_bo_gpu_offset(vm->root.base.bo);
857

858
		r = amdgpu_bo_vm_update_pte(p);
859 860 861
		if (r)
			return r;
	}
A
Alex Deucher 已提交
862

863
	return amdgpu_cs_sync_rings(p);
A
Alex Deucher 已提交
864 865 866 867 868 869 870 871
}

static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
			     struct amdgpu_cs_parser *parser)
{
	struct amdgpu_fpriv *fpriv = parser->filp->driver_priv;
	struct amdgpu_vm *vm = &fpriv->vm;
	int i, j;
M
Monk Liu 已提交
872
	int r, ce_preempt = 0, de_preempt = 0;
A
Alex Deucher 已提交
873

874
	for (i = 0, j = 0; i < parser->nchunks && j < parser->job->num_ibs; i++) {
A
Alex Deucher 已提交
875 876 877 878 879 880
		struct amdgpu_cs_chunk *chunk;
		struct amdgpu_ib *ib;
		struct drm_amdgpu_cs_chunk_ib *chunk_ib;
		struct amdgpu_ring *ring;

		chunk = &parser->chunks[i];
881
		ib = &parser->job->ibs[j];
A
Alex Deucher 已提交
882 883 884 885 886
		chunk_ib = (struct drm_amdgpu_cs_chunk_ib *)chunk->kdata;

		if (chunk->chunk_id != AMDGPU_CHUNK_ID_IB)
			continue;

887
		if (chunk_ib->ip_type == AMDGPU_HW_IP_GFX && amdgpu_sriov_vf(adev)) {
888
			if (chunk_ib->flags & AMDGPU_IB_FLAG_PREEMPT) {
889 890 891 892
				if (chunk_ib->flags & AMDGPU_IB_FLAG_CE)
					ce_preempt++;
				else
					de_preempt++;
893
			}
894 895 896

			/* each GFX command submit allows 0 or 1 IB preemptible for CE & DE */
			if (ce_preempt > 1 || de_preempt > 1)
897
				return -EINVAL;
M
Monk Liu 已提交
898 899
		}

900 901
		r = amdgpu_queue_mgr_map(adev, &parser->ctx->queue_mgr, chunk_ib->ip_type,
					 chunk_ib->ip_instance, chunk_ib->ring, &ring);
902
		if (r)
A
Alex Deucher 已提交
903 904
			return r;

M
Monk Liu 已提交
905
		if (chunk_ib->flags & AMDGPU_IB_FLAG_PREAMBLE) {
906 907 908 909 910 911 912
			parser->job->preamble_status |= AMDGPU_PREAMBLE_IB_PRESENT;
			if (!parser->ctx->preamble_presented) {
				parser->job->preamble_status |= AMDGPU_PREAMBLE_IB_PRESENT_FIRST;
				parser->ctx->preamble_presented = true;
			}
		}

913 914 915 916 917
		if (parser->job->ring && parser->job->ring != ring)
			return -EINVAL;

		parser->job->ring = ring;

A
Alex Deucher 已提交
918
		if (ring->funcs->parse_cs) {
919
			struct amdgpu_bo_va_mapping *m;
920
			struct amdgpu_bo *aobj = NULL;
921 922
			uint64_t offset;
			uint8_t *kptr;
923

924 925 926
			r = amdgpu_cs_find_mapping(parser, chunk_ib->va_start,
						   &aobj, &m);
			if (r) {
927
				DRM_ERROR("IB va_start is invalid\n");
928
				return r;
A
Alex Deucher 已提交
929 930
			}

931
			if ((chunk_ib->va_start + chunk_ib->ib_bytes) >
932
			    (m->last + 1) * AMDGPU_GPU_PAGE_SIZE) {
933 934 935 936
				DRM_ERROR("IB va_start+ib_bytes is invalid\n");
				return -EINVAL;
			}

937
			/* the IB should be reserved at this point */
938
			r = amdgpu_bo_kmap(aobj, (void **)&kptr);
A
Alex Deucher 已提交
939 940 941 942
			if (r) {
				return r;
			}

943
			offset = m->start * AMDGPU_GPU_PAGE_SIZE;
944 945
			kptr += chunk_ib->va_start - offset;

946
			r =  amdgpu_ib_get(adev, vm, chunk_ib->ib_bytes, ib);
A
Alex Deucher 已提交
947 948 949 950 951 952 953 954
			if (r) {
				DRM_ERROR("Failed to get ib !\n");
				return r;
			}

			memcpy(ib->ptr, kptr, chunk_ib->ib_bytes);
			amdgpu_bo_kunmap(aobj);
		} else {
955
			r =  amdgpu_ib_get(adev, vm, 0, ib);
A
Alex Deucher 已提交
956 957 958 959 960 961 962
			if (r) {
				DRM_ERROR("Failed to get ib !\n");
				return r;
			}

		}

963
		ib->gpu_addr = chunk_ib->va_start;
964
		ib->length_dw = chunk_ib->ib_bytes / 4;
965
		ib->flags = chunk_ib->flags;
A
Alex Deucher 已提交
966 967 968
		j++;
	}

969
	/* UVD & VCE fw doesn't support user fences */
970
	if (parser->job->uf_addr && (
971 972
	    parser->job->ring->funcs->type == AMDGPU_RING_TYPE_UVD ||
	    parser->job->ring->funcs->type == AMDGPU_RING_TYPE_VCE))
973
		return -EINVAL;
A
Alex Deucher 已提交
974 975 976 977

	return 0;
}

978 979
static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,
				       struct amdgpu_cs_chunk *chunk)
980
{
981
	struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
982 983 984
	unsigned num_deps;
	int i, r;
	struct drm_amdgpu_cs_chunk_dep *deps;
985

986 987 988
	deps = (struct drm_amdgpu_cs_chunk_dep *)chunk->kdata;
	num_deps = chunk->length_dw * 4 /
		sizeof(struct drm_amdgpu_cs_chunk_dep);
989

990 991 992 993
	for (i = 0; i < num_deps; ++i) {
		struct amdgpu_ring *ring;
		struct amdgpu_ctx *ctx;
		struct dma_fence *fence;
994

995 996 997
		ctx = amdgpu_ctx_get(fpriv, deps[i].ctx_id);
		if (ctx == NULL)
			return -EINVAL;
998

999 1000 1001 1002 1003 1004 1005 1006
		r = amdgpu_queue_mgr_map(p->adev, &ctx->queue_mgr,
					 deps[i].ip_type,
					 deps[i].ip_instance,
					 deps[i].ring, &ring);
		if (r) {
			amdgpu_ctx_put(ctx);
			return r;
		}
1007

1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024
		fence = amdgpu_ctx_get_fence(ctx, ring,
					     deps[i].handle);
		if (IS_ERR(fence)) {
			r = PTR_ERR(fence);
			amdgpu_ctx_put(ctx);
			return r;
		} else if (fence) {
			r = amdgpu_sync_fence(p->adev, &p->job->sync,
					      fence);
			dma_fence_put(fence);
			amdgpu_ctx_put(ctx);
			if (r)
				return r;
		}
	}
	return 0;
}
1025

1026 1027 1028 1029 1030
static int amdgpu_syncobj_lookup_and_add_to_sync(struct amdgpu_cs_parser *p,
						 uint32_t handle)
{
	int r;
	struct dma_fence *fence;
1031
	r = drm_syncobj_find_fence(p->filp, handle, &fence);
1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074
	if (r)
		return r;

	r = amdgpu_sync_fence(p->adev, &p->job->sync, fence);
	dma_fence_put(fence);

	return r;
}

static int amdgpu_cs_process_syncobj_in_dep(struct amdgpu_cs_parser *p,
					    struct amdgpu_cs_chunk *chunk)
{
	unsigned num_deps;
	int i, r;
	struct drm_amdgpu_cs_chunk_sem *deps;

	deps = (struct drm_amdgpu_cs_chunk_sem *)chunk->kdata;
	num_deps = chunk->length_dw * 4 /
		sizeof(struct drm_amdgpu_cs_chunk_sem);

	for (i = 0; i < num_deps; ++i) {
		r = amdgpu_syncobj_lookup_and_add_to_sync(p, deps[i].handle);
		if (r)
			return r;
	}
	return 0;
}

static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p,
					     struct amdgpu_cs_chunk *chunk)
{
	unsigned num_deps;
	int i;
	struct drm_amdgpu_cs_chunk_sem *deps;
	deps = (struct drm_amdgpu_cs_chunk_sem *)chunk->kdata;
	num_deps = chunk->length_dw * 4 /
		sizeof(struct drm_amdgpu_cs_chunk_sem);

	p->post_dep_syncobjs = kmalloc_array(num_deps,
					     sizeof(struct drm_syncobj *),
					     GFP_KERNEL);
	p->num_post_dep_syncobjs = 0;

1075 1076 1077
	if (!p->post_dep_syncobjs)
		return -ENOMEM;

1078 1079 1080 1081 1082 1083 1084 1085 1086
	for (i = 0; i < num_deps; ++i) {
		p->post_dep_syncobjs[i] = drm_syncobj_find(p->filp, deps[i].handle);
		if (!p->post_dep_syncobjs[i])
			return -EINVAL;
		p->num_post_dep_syncobjs++;
	}
	return 0;
}

1087 1088 1089 1090
static int amdgpu_cs_dependencies(struct amdgpu_device *adev,
				  struct amdgpu_cs_parser *p)
{
	int i, r;
1091

1092 1093
	for (i = 0; i < p->nchunks; ++i) {
		struct amdgpu_cs_chunk *chunk;
1094

1095
		chunk = &p->chunks[i];
1096

1097 1098 1099 1100
		if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES) {
			r = amdgpu_cs_process_fence_dep(p, chunk);
			if (r)
				return r;
1101 1102 1103 1104 1105 1106 1107 1108
		} else if (chunk->chunk_id == AMDGPU_CHUNK_ID_SYNCOBJ_IN) {
			r = amdgpu_cs_process_syncobj_in_dep(p, chunk);
			if (r)
				return r;
		} else if (chunk->chunk_id == AMDGPU_CHUNK_ID_SYNCOBJ_OUT) {
			r = amdgpu_cs_process_syncobj_out_dep(p, chunk);
			if (r)
				return r;
1109 1110 1111 1112 1113 1114
		}
	}

	return 0;
}

1115 1116 1117 1118
static void amdgpu_cs_post_dependencies(struct amdgpu_cs_parser *p)
{
	int i;

1119 1120
	for (i = 0; i < p->num_post_dep_syncobjs; ++i)
		drm_syncobj_replace_fence(p->post_dep_syncobjs[i], p->fence);
1121 1122
}

1123 1124 1125
static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
			    union drm_amdgpu_cs *cs)
{
1126
	struct amdgpu_ring *ring = p->job->ring;
1127
	struct amd_sched_entity *entity = &p->ctx->rings[ring->idx].entity;
1128
	struct amdgpu_job *job;
1129
	unsigned i;
1130
	int r;
1131

1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144
	amdgpu_mn_lock(p->mn);
	if (p->bo_list) {
		for (i = p->bo_list->first_userptr;
		     i < p->bo_list->num_entries; ++i) {
			struct amdgpu_bo *bo = p->bo_list->array[i].robj;

			if (amdgpu_ttm_tt_userptr_needs_pages(bo->tbo.ttm)) {
				amdgpu_mn_unlock(p->mn);
				return -ERESTARTSYS;
			}
		}
	}

1145 1146
	job = p->job;
	p->job = NULL;
1147

1148
	r = amd_sched_job_init(&job->base, &ring->sched, entity, p->filp);
1149
	if (r) {
1150
		amdgpu_job_free(job);
1151
		amdgpu_mn_unlock(p->mn);
1152
		return r;
1153 1154
	}

1155
	job->owner = p->filp;
1156
	job->fence_ctx = entity->fence_context;
1157
	p->fence = dma_fence_get(&job->base.s_fence->finished);
1158 1159 1160

	amdgpu_cs_post_dependencies(p);

1161
	cs->out.handle = amdgpu_ctx_add_fence(p->ctx, ring, p->fence);
1162
	job->uf_sequence = cs->out.handle;
1163
	amdgpu_job_free_resources(job);
1164 1165 1166

	trace_amdgpu_cs_ioctl(job);
	amd_sched_entity_push_job(&job->base);
1167 1168 1169 1170

	ttm_eu_fence_buffer_objects(&p->ticket, &p->validated, p->fence);
	amdgpu_mn_unlock(p->mn);

1171 1172 1173
	return 0;
}

C
Chunming Zhou 已提交
1174 1175 1176
int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
{
	struct amdgpu_device *adev = dev->dev_private;
1177
	struct amdgpu_fpriv *fpriv = filp->driver_priv;
C
Chunming Zhou 已提交
1178
	union drm_amdgpu_cs *cs = data;
1179
	struct amdgpu_cs_parser parser = {};
1180 1181
	bool reserved_buffers = false;
	int i, r;
C
Chunming Zhou 已提交
1182

1183
	if (!adev->accel_working)
C
Chunming Zhou 已提交
1184
		return -EBUSY;
1185 1186
	if (amdgpu_kms_vram_lost(adev, fpriv))
		return -ENODEV;
1187

1188 1189 1190 1191
	parser.adev = adev;
	parser.filp = filp;

	r = amdgpu_cs_parser_init(&parser, data);
A
Alex Deucher 已提交
1192
	if (r) {
C
Chunming Zhou 已提交
1193
		DRM_ERROR("Failed to initialize parser !\n");
1194
		goto out;
1195 1196
	}

1197 1198 1199 1200 1201 1202 1203
	r = amdgpu_cs_parser_bos(&parser, data);
	if (r) {
		if (r == -ENOMEM)
			DRM_ERROR("Not enough memory for command submission!\n");
		else if (r != -ERESTARTSYS)
			DRM_ERROR("Failed to process the buffer list %d!\n", r);
		goto out;
1204 1205
	}

1206 1207
	reserved_buffers = true;
	r = amdgpu_cs_ib_fill(adev, &parser);
1208 1209 1210
	if (r)
		goto out;

1211 1212 1213 1214 1215 1216
	r = amdgpu_cs_dependencies(adev, &parser);
	if (r) {
		DRM_ERROR("Failed in the dependencies handling %d!\n", r);
		goto out;
	}

1217
	for (i = 0; i < parser.job->num_ibs; i++)
1218
		trace_amdgpu_cs(&parser, i);
1219

1220
	r = amdgpu_cs_ib_vm_chunk(adev, &parser);
1221 1222 1223
	if (r)
		goto out;

C
Christian König 已提交
1224
	r = amdgpu_cs_submit(&parser, cs);
A
Alex Deucher 已提交
1225 1226

out:
1227
	amdgpu_cs_parser_fini(&parser, r, reserved_buffers);
A
Alex Deucher 已提交
1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244
	return r;
}

/**
 * amdgpu_cs_wait_ioctl - wait for a command submission to finish
 *
 * @dev: drm device
 * @data: data from userspace
 * @filp: file private
 *
 * Wait for the command submission identified by handle to finish.
 */
int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
			 struct drm_file *filp)
{
	union drm_amdgpu_wait_cs *wait = data;
	struct amdgpu_device *adev = dev->dev_private;
1245
	struct amdgpu_fpriv *fpriv = filp->driver_priv;
A
Alex Deucher 已提交
1246
	unsigned long timeout = amdgpu_gem_timeout(wait->in.timeout);
1247
	struct amdgpu_ring *ring = NULL;
1248
	struct amdgpu_ctx *ctx;
1249
	struct dma_fence *fence;
A
Alex Deucher 已提交
1250 1251
	long r;

1252 1253
	if (amdgpu_kms_vram_lost(adev, fpriv))
		return -ENODEV;
1254

1255 1256 1257
	ctx = amdgpu_ctx_get(filp->driver_priv, wait->in.ctx_id);
	if (ctx == NULL)
		return -EINVAL;
A
Alex Deucher 已提交
1258

1259 1260 1261 1262 1263 1264 1265 1266
	r = amdgpu_queue_mgr_map(adev, &ctx->queue_mgr,
				 wait->in.ip_type, wait->in.ip_instance,
				 wait->in.ring, &ring);
	if (r) {
		amdgpu_ctx_put(ctx);
		return r;
	}

1267 1268 1269 1270
	fence = amdgpu_ctx_get_fence(ctx, ring, wait->in.handle);
	if (IS_ERR(fence))
		r = PTR_ERR(fence);
	else if (fence) {
1271 1272
		r = dma_fence_wait_timeout(fence, true, timeout);
		dma_fence_put(fence);
1273 1274
	} else
		r = 1;
C
Chunming Zhou 已提交
1275

1276
	amdgpu_ctx_put(ctx);
A
Alex Deucher 已提交
1277 1278 1279 1280 1281 1282 1283 1284 1285
	if (r < 0)
		return r;

	memset(wait, 0, sizeof(*wait));
	wait->out.status = (r == 0);

	return 0;
}

1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305
/**
 * amdgpu_cs_get_fence - helper to get fence from drm_amdgpu_fence
 *
 * @adev: amdgpu device
 * @filp: file private
 * @user: drm_amdgpu_fence copied from user space
 */
static struct dma_fence *amdgpu_cs_get_fence(struct amdgpu_device *adev,
					     struct drm_file *filp,
					     struct drm_amdgpu_fence *user)
{
	struct amdgpu_ring *ring;
	struct amdgpu_ctx *ctx;
	struct dma_fence *fence;
	int r;

	ctx = amdgpu_ctx_get(filp->driver_priv, user->ctx_id);
	if (ctx == NULL)
		return ERR_PTR(-EINVAL);

1306 1307 1308 1309 1310 1311 1312
	r = amdgpu_queue_mgr_map(adev, &ctx->queue_mgr, user->ip_type,
				 user->ip_instance, user->ring, &ring);
	if (r) {
		amdgpu_ctx_put(ctx);
		return ERR_PTR(r);
	}

1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346
	fence = amdgpu_ctx_get_fence(ctx, ring, user->seq_no);
	amdgpu_ctx_put(ctx);

	return fence;
}

/**
 * amdgpu_cs_wait_all_fence - wait on all fences to signal
 *
 * @adev: amdgpu device
 * @filp: file private
 * @wait: wait parameters
 * @fences: array of drm_amdgpu_fence
 */
static int amdgpu_cs_wait_all_fences(struct amdgpu_device *adev,
				     struct drm_file *filp,
				     union drm_amdgpu_wait_fences *wait,
				     struct drm_amdgpu_fence *fences)
{
	uint32_t fence_count = wait->in.fence_count;
	unsigned int i;
	long r = 1;

	for (i = 0; i < fence_count; i++) {
		struct dma_fence *fence;
		unsigned long timeout = amdgpu_gem_timeout(wait->in.timeout_ns);

		fence = amdgpu_cs_get_fence(adev, filp, &fences[i]);
		if (IS_ERR(fence))
			return PTR_ERR(fence);
		else if (!fence)
			continue;

		r = dma_fence_wait_timeout(fence, true, timeout);
1347
		dma_fence_put(fence);
1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397
		if (r < 0)
			return r;

		if (r == 0)
			break;
	}

	memset(wait, 0, sizeof(*wait));
	wait->out.status = (r > 0);

	return 0;
}

/**
 * amdgpu_cs_wait_any_fence - wait on any fence to signal
 *
 * @adev: amdgpu device
 * @filp: file private
 * @wait: wait parameters
 * @fences: array of drm_amdgpu_fence
 */
static int amdgpu_cs_wait_any_fence(struct amdgpu_device *adev,
				    struct drm_file *filp,
				    union drm_amdgpu_wait_fences *wait,
				    struct drm_amdgpu_fence *fences)
{
	unsigned long timeout = amdgpu_gem_timeout(wait->in.timeout_ns);
	uint32_t fence_count = wait->in.fence_count;
	uint32_t first = ~0;
	struct dma_fence **array;
	unsigned int i;
	long r;

	/* Prepare the fence array */
	array = kcalloc(fence_count, sizeof(struct dma_fence *), GFP_KERNEL);

	if (array == NULL)
		return -ENOMEM;

	for (i = 0; i < fence_count; i++) {
		struct dma_fence *fence;

		fence = amdgpu_cs_get_fence(adev, filp, &fences[i]);
		if (IS_ERR(fence)) {
			r = PTR_ERR(fence);
			goto err_free_fence_array;
		} else if (fence) {
			array[i] = fence;
		} else { /* NULL, the fence has been already signaled */
			r = 1;
M
Monk Liu 已提交
1398
			first = i;
1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433
			goto out;
		}
	}

	r = dma_fence_wait_any_timeout(array, fence_count, true, timeout,
				       &first);
	if (r < 0)
		goto err_free_fence_array;

out:
	memset(wait, 0, sizeof(*wait));
	wait->out.status = (r > 0);
	wait->out.first_signaled = first;
	/* set return value 0 to indicate success */
	r = 0;

err_free_fence_array:
	for (i = 0; i < fence_count; i++)
		dma_fence_put(array[i]);
	kfree(array);

	return r;
}

/**
 * amdgpu_cs_wait_fences_ioctl - wait for multiple command submissions to finish
 *
 * @dev: drm device
 * @data: data from userspace
 * @filp: file private
 */
int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,
				struct drm_file *filp)
{
	struct amdgpu_device *adev = dev->dev_private;
1434
	struct amdgpu_fpriv *fpriv = filp->driver_priv;
1435 1436 1437 1438 1439 1440
	union drm_amdgpu_wait_fences *wait = data;
	uint32_t fence_count = wait->in.fence_count;
	struct drm_amdgpu_fence *fences_user;
	struct drm_amdgpu_fence *fences;
	int r;

1441 1442
	if (amdgpu_kms_vram_lost(adev, fpriv))
		return -ENODEV;
1443 1444 1445 1446 1447 1448
	/* Get the fences from userspace */
	fences = kmalloc_array(fence_count, sizeof(struct drm_amdgpu_fence),
			GFP_KERNEL);
	if (fences == NULL)
		return -ENOMEM;

1449
	fences_user = u64_to_user_ptr(wait->in.fences);
1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466
	if (copy_from_user(fences, fences_user,
		sizeof(struct drm_amdgpu_fence) * fence_count)) {
		r = -EFAULT;
		goto err_free_fences;
	}

	if (wait->in.wait_all)
		r = amdgpu_cs_wait_all_fences(adev, filp, wait, fences);
	else
		r = amdgpu_cs_wait_any_fence(adev, filp, wait, fences);

err_free_fences:
	kfree(fences);

	return r;
}

A
Alex Deucher 已提交
1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477
/**
 * amdgpu_cs_find_bo_va - find bo_va for VM address
 *
 * @parser: command submission parser context
 * @addr: VM address
 * @bo: resulting BO of the mapping found
 *
 * Search the buffer objects in the command submission context for a certain
 * virtual memory address. Returns allocation structure when found, NULL
 * otherwise.
 */
1478 1479 1480
int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
			   uint64_t addr, struct amdgpu_bo **bo,
			   struct amdgpu_bo_va_mapping **map)
A
Alex Deucher 已提交
1481
{
1482 1483
	struct amdgpu_fpriv *fpriv = parser->filp->driver_priv;
	struct amdgpu_vm *vm = &fpriv->vm;
A
Alex Deucher 已提交
1484
	struct amdgpu_bo_va_mapping *mapping;
1485
	int r;
1486

A
Alex Deucher 已提交
1487 1488
	addr /= AMDGPU_GPU_PAGE_SIZE;

1489 1490 1491
	mapping = amdgpu_vm_bo_lookup_mapping(vm, addr);
	if (!mapping || !mapping->bo_va || !mapping->bo_va->base.bo)
		return -EINVAL;
A
Alex Deucher 已提交
1492

1493 1494
	*bo = mapping->bo_va->base.bo;
	*map = mapping;
A
Alex Deucher 已提交
1495

1496 1497 1498
	/* Double check that the BO is reserved by this CS */
	if (READ_ONCE((*bo)->tbo.resv->lock.ctx) != &parser->ticket)
		return -EINVAL;
1499

1500 1501 1502
	r = amdgpu_ttm_bind(&(*bo)->tbo, &(*bo)->tbo.mem);
	if (unlikely(r))
		return r;
1503

1504
	if ((*bo)->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)
1505 1506
		return 0;

1507 1508 1509
	(*bo)->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
	amdgpu_ttm_placement_from_domain(*bo, (*bo)->allowed_domains);
	return ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, false, false);
1510
}