irqinit.c 6.9 KB
Newer Older
1
#include <linux/linkage.h>
L
Linus Torvalds 已提交
2 3 4 5 6
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
7
#include <linux/timex.h>
L
Linus Torvalds 已提交
8
#include <linux/random.h>
9
#include <linux/kprobes.h>
L
Linus Torvalds 已提交
10 11 12 13
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sysdev.h>
#include <linux/bitops.h>
14
#include <linux/acpi.h>
15 16
#include <linux/io.h>
#include <linux/delay.h>
L
Linus Torvalds 已提交
17 18 19 20

#include <asm/atomic.h>
#include <asm/system.h>
#include <asm/timer.h>
21
#include <asm/hw_irq.h>
L
Linus Torvalds 已提交
22 23 24
#include <asm/pgtable.h>
#include <asm/desc.h>
#include <asm/apic.h>
I
Ingo Molnar 已提交
25
#include <asm/setup.h>
L
Linus Torvalds 已提交
26
#include <asm/i8259.h>
27
#include <asm/traps.h>
L
Linus Torvalds 已提交
28

29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
/*
 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
 * (these are usually mapped to vectors 0x30-0x3f)
 */

/*
 * The IO-APIC gives us many more interrupt sources. Most of these
 * are unused but an SMP system is supposed to have enough memory ...
 * sometimes (mostly wrt. hw bugs) we get corrupted vectors all
 * across the spectrum, so we really want to be prepared to get all
 * of these. Plus, more powerful systems might have more than 64
 * IO-APIC registers.
 *
 * (these are usually mapped into the 0x30-0xff vector range)
 */
L
Linus Torvalds 已提交
44

45
#ifdef CONFIG_X86_32
L
Linus Torvalds 已提交
46 47 48 49 50 51 52 53 54 55 56 57
/*
 * Note that on a 486, we don't want to do a SIGFPE on an irq13
 * as the irq is unreliable, and exception 16 works correctly
 * (ie as explained in the intel literature). On a 386, you
 * can't use exception 16 due to bad IBM design, so we have to
 * rely on the less exact irq13.
 *
 * Careful.. Not only is IRQ13 unreliable, but it is also
 * leads to races. IBM designers who came up with it should
 * be shot.
 */

58
static irqreturn_t math_error_irq(int cpl, void *dev_id)
L
Linus Torvalds 已提交
59
{
60
	outb(0, 0xF0);
L
Linus Torvalds 已提交
61 62
	if (ignore_fpu_irq || !boot_cpu_data.hard_math)
		return IRQ_NONE;
63
	math_error(get_irq_regs(), 0, 16);
L
Linus Torvalds 已提交
64 65 66 67 68 69 70
	return IRQ_HANDLED;
}

/*
 * New motherboards sometimes make IRQ 13 be a PCI interrupt,
 * so allow interrupt sharing.
 */
71 72 73 74
static struct irqaction fpu_irq = {
	.handler = math_error_irq,
	.name = "fpu",
};
L
Linus Torvalds 已提交
75 76
#endif

77 78 79 80 81 82 83 84
/*
 * IRQ2 is cascade interrupt to second interrupt controller
 */
static struct irqaction irq2 = {
	.handler = no_action,
	.name = "cascade",
};

85
DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
86
	[0 ... NR_VECTORS - 1] = -1,
87 88
};

89 90 91 92 93 94 95 96 97 98 99 100
int vector_used_by_percpu_irq(unsigned int vector)
{
	int cpu;

	for_each_online_cpu(cpu) {
		if (per_cpu(vector_irq, cpu)[vector] != -1)
			return 1;
	}

	return 0;
}

101
void __init init_ISA_irqs(void)
L
Linus Torvalds 已提交
102
{
103 104
	struct irq_chip *chip = legacy_pic->chip;
	const char *name = chip->name;
L
Linus Torvalds 已提交
105 106
	int i;

107
#if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
108 109
	init_bsp_APIC();
#endif
110
	legacy_pic->init(0);
L
Linus Torvalds 已提交
111

112 113
	for (i = 0; i < legacy_pic->nr_legacy_irqs; i++)
		set_irq_chip_and_handler_name(i, chip, handle_level_irq, name);
114
}
L
Linus Torvalds 已提交
115

116
void __init init_IRQ(void)
117
{
118 119 120 121 122 123 124 125 126 127
	int i;

	/*
	 * On cpu 0, Assign IRQ0_VECTOR..IRQ15_VECTOR's to IRQ 0..15.
	 * If these IRQ's are handled by legacy interrupt-controllers like PIC,
	 * then this configuration will likely be static after the boot. If
	 * these IRQ's are handled by more mordern controllers like IO-APIC,
	 * then this vector space can be freed and re-used dynamically as the
	 * irq's migrate etc.
	 */
128
	for (i = 0; i < legacy_pic->nr_legacy_irqs; i++)
129 130
		per_cpu(vector_irq, 0)[IRQ0_VECTOR + i] = i;

131 132
	x86_init.irqs.intr_init();
}
133

134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155
/*
 * Setup the vector to irq mappings.
 */
void setup_vector_irq(int cpu)
{
#ifndef CONFIG_X86_IO_APIC
	int irq;

	/*
	 * On most of the platforms, legacy PIC delivers the interrupts on the
	 * boot cpu. But there are certain platforms where PIC interrupts are
	 * delivered to multiple cpu's. If the legacy IRQ is handled by the
	 * legacy PIC, for the new cpu that is coming online, setup the static
	 * legacy vector to irq mapping:
	 */
	for (irq = 0; irq < legacy_pic->nr_legacy_irqs; irq++)
		per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq;
#endif

	__setup_vector_irq(cpu);
}

156 157
static void __init smp_intr_init(void)
{
158 159
#ifdef CONFIG_SMP
#if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
160 161 162 163 164 165
	/*
	 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
	 * IPI, driven by wakeup.
	 */
	alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);

T
Tejun Heo 已提交
166 167 168 169 170 171 172 173 174
	/* IPIs for invalidation */
	alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0);
	alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1);
	alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2);
	alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3);
	alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4);
	alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5);
	alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6);
	alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7);
175 176 177 178

	/* IPI for generic function call */
	alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);

179
	/* IPI for generic single function call */
180
	alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR,
181
			call_function_single_interrupt);
182 183 184

	/* Low priority IPI to cleanup after moving an irq */
	set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
185
	set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors);
186 187 188

	/* IPI used for rebooting/stopping */
	alloc_intr_gate(REBOOT_VECTOR, reboot_interrupt);
189
#endif
190
#endif /* CONFIG_SMP */
191 192
}

193
static void __init apic_intr_init(void)
L
Linus Torvalds 已提交
194
{
195
	smp_intr_init();
196

197
#ifdef CONFIG_X86_THERMAL_VECTOR
198
	alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
199
#endif
200
#ifdef CONFIG_X86_MCE_THRESHOLD
201 202
	alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
#endif
203
#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_LOCAL_APIC)
204 205
	alloc_intr_gate(MCE_SELF_VECTOR, mce_self_interrupt);
#endif
206 207

#if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
208 209 210
	/* self generated IPI for local APIC timer */
	alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);

211 212
	/* IPI for X86 platform specific use */
	alloc_intr_gate(X86_PLATFORM_IPI_VECTOR, x86_platform_ipi);
213

214 215 216 217
	/* IPI vectors for APIC spurious and error interrupts */
	alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
	alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);

218 219 220
	/* IRQ work interrupts: */
# ifdef CONFIG_IRQ_WORK
	alloc_intr_gate(IRQ_WORK_VECTOR, irq_work_interrupt);
221 222
# endif

223
#endif
224
}
225

226 227 228 229 230
void __init native_init_IRQ(void)
{
	int i;

	/* Execute any quirks before the call gates are initialised: */
231
	x86_init.irqs.pre_vector_init();
232

Y
Yinghai Lu 已提交
233 234
	apic_intr_init();

235 236 237 238 239
	/*
	 * Cover the whole vector space, no vector can escape
	 * us. (some of these will be overridden and become
	 * 'special' SMP interrupts)
	 */
240
	for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
Y
Yinghai Lu 已提交
241 242
		/* IA32_SYSCALL_VECTOR could be used in trap_init already. */
		if (!test_bit(i, used_vectors))
243
			set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
244
	}
245

246 247 248
	if (!acpi_ioapic)
		setup_irq(2, &irq2);

249
#ifdef CONFIG_X86_32
L
Linus Torvalds 已提交
250 251 252 253 254 255 256 257
	/*
	 * External FPU? Set up irq13 if so, for
	 * original braindamaged IBM FERR coupling.
	 */
	if (boot_cpu_data.hard_math && !cpu_has_fpu)
		setup_irq(FPU_IRQ, &fpu_irq);

	irq_ctx_init(smp_processor_id());
258
#endif
L
Linus Torvalds 已提交
259
}