nouveau_bo.c 40.6 KB
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/*
 * Copyright 2007 Dave Airlied
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */
/*
 * Authors: Dave Airlied <airlied@linux.ie>
 *	    Ben Skeggs   <darktama@iinet.net.au>
 *	    Jeremy Kolb  <jkolb@brandeis.edu>
 */

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#include <linux/dma-mapping.h>
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#include <linux/swiotlb.h>
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#include "nouveau_drv.h"
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#include "nouveau_dma.h"
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#include "nouveau_fence.h"
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#include "nouveau_bo.h"
#include "nouveau_ttm.h"
#include "nouveau_gem.h"
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#include "nouveau_mem.h"
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#include "nouveau_vmm.h"
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/*
 * NV10-NV40 tiling helpers
 */

static void
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nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
			   u32 addr, u32 size, u32 pitch, u32 flags)
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{
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	struct nouveau_drm *drm = nouveau_drm(dev);
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	int i = reg - drm->tile.reg;
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	struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
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	struct nvkm_fb_tile *tile = &fb->tile.region[i];
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	nouveau_fence_unref(&reg->fence);
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	if (tile->pitch)
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		nvkm_fb_tile_fini(fb, i, tile);
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	if (pitch)
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		nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile);
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	nvkm_fb_tile_prog(fb, i, tile);
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}

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static struct nouveau_drm_tile *
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nv10_bo_get_tile_region(struct drm_device *dev, int i)
{
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	struct nouveau_drm *drm = nouveau_drm(dev);
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	struct nouveau_drm_tile *tile = &drm->tile.reg[i];
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	spin_lock(&drm->tile.lock);
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	if (!tile->used &&
	    (!tile->fence || nouveau_fence_done(tile->fence)))
		tile->used = true;
	else
		tile = NULL;

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	spin_unlock(&drm->tile.lock);
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	return tile;
}

static void
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nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
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			struct dma_fence *fence)
88
{
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	struct nouveau_drm *drm = nouveau_drm(dev);
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	if (tile) {
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		spin_lock(&drm->tile.lock);
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		tile->fence = (struct nouveau_fence *)dma_fence_get(fence);
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		tile->used = false;
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		spin_unlock(&drm->tile.lock);
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	}
}

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static struct nouveau_drm_tile *
nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
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		   u32 size, u32 pitch, u32 zeta)
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{
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	struct nouveau_drm *drm = nouveau_drm(dev);
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	struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
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	struct nouveau_drm_tile *tile, *found = NULL;
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	int i;

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	for (i = 0; i < fb->tile.regions; i++) {
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		tile = nv10_bo_get_tile_region(dev, i);

		if (pitch && !found) {
			found = tile;
			continue;

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		} else if (tile && fb->tile.region[i].pitch) {
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			/* Kill an unused tile region. */
			nv10_bo_update_tile_region(dev, tile, 0, 0, 0, 0);
		}

		nv10_bo_put_tile_region(dev, tile, NULL);
	}

	if (found)
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		nv10_bo_update_tile_region(dev, found, addr, size, pitch, zeta);
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	return found;
}

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static void
nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
{
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	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
	struct drm_device *dev = drm->dev;
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	struct nouveau_bo *nvbo = nouveau_bo(bo);

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	if (unlikely(nvbo->gem.filp))
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		DRM_ERROR("bo %p still attached to GEM object\n", bo);
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	WARN_ON(nvbo->pin_refcnt > 0);
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	nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
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	kfree(nvbo);
}

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static inline u64
roundup_64(u64 x, u32 y)
{
	x += y - 1;
	do_div(x, y);
	return x * y;
}

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static void
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nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
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		       int *align, u64 *size)
153
{
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	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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	struct nvif_device *device = &drm->client.device;
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	if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
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		if (nvbo->mode) {
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			if (device->info.chipset >= 0x40) {
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				*align = 65536;
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				*size = roundup_64(*size, 64 * nvbo->mode);
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			} else if (device->info.chipset >= 0x30) {
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				*align = 32768;
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				*size = roundup_64(*size, 64 * nvbo->mode);
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			} else if (device->info.chipset >= 0x20) {
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				*align = 16384;
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				*size = roundup_64(*size, 64 * nvbo->mode);
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			} else if (device->info.chipset >= 0x10) {
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				*align = 16384;
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				*size = roundup_64(*size, 32 * nvbo->mode);
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			}
		}
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	} else {
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		*size = roundup_64(*size, (1 << nvbo->page));
		*align = max((1 <<  nvbo->page), *align);
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	}

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	*size = roundup_64(*size, PAGE_SIZE);
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}

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int
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nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
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	       uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,
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	       struct sg_table *sg, struct reservation_object *robj,
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	       struct nouveau_bo **pnvbo)
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{
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	struct nouveau_drm *drm = cli->drm;
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	struct nouveau_bo *nvbo;
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	struct nvif_mmu *mmu = &cli->mmu;
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	size_t acc_size;
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	int ret;
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	int type = ttm_bo_type_device;
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	if (!size) {
		NV_WARN(drm, "skipped size %016llx\n", size);
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		return -EINVAL;
	}
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	if (sg)
		type = ttm_bo_type_sg;
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	nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
	if (!nvbo)
		return -ENOMEM;
	INIT_LIST_HEAD(&nvbo->head);
	INIT_LIST_HEAD(&nvbo->entry);
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	INIT_LIST_HEAD(&nvbo->vma_list);
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	nvbo->bo.bdev = &drm->ttm.bdev;
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	nvbo->cli = cli;
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	/* This is confusing, and doesn't actually mean we want an uncached
	 * mapping, but is what NOUVEAU_GEM_DOMAIN_COHERENT gets translated
	 * into in nouveau_gem_new().
	 */
	if (flags & TTM_PL_FLAG_UNCACHED) {
		/* Determine if we can get a cache-coherent map, forcing
		 * uncached mapping if we can't.
		 */
		if (mmu->type[drm->ttm.type_host].type & NVIF_MEM_UNCACHED)
			nvbo->force_coherent = true;
	}
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	if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI) {
		nvbo->kind = (tile_flags & 0x0000ff00) >> 8;
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		if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
			kfree(nvbo);
			return -EINVAL;
		}

		nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind;
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	} else
	if (cli->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
		nvbo->kind = (tile_flags & 0x00007f00) >> 8;
		nvbo->comp = (tile_flags & 0x00030000) >> 16;
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		if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
			kfree(nvbo);
			return -EINVAL;
		}
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	} else {
		nvbo->zeta = (tile_flags & 0x00000007);
	}
	nvbo->mode = tile_mode;
	nvbo->contig = !(tile_flags & NOUVEAU_GEM_TILE_NONCONTIG);

	nvbo->page = 12;
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	if (drm->client.vm) {
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		if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
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			nvbo->page = drm->client.vm->mmu->lpg_shift;
		else {
			if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI)
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				nvbo->kind = mmu->kind[nvbo->kind];
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			nvbo->comp = 0;
		}
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	}

	nouveau_bo_fixup_align(nvbo, flags, &align, &size);
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	nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
	nouveau_bo_placement_set(nvbo, flags, 0);
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	acc_size = ttm_bo_dma_acc_size(&drm->ttm.bdev, size,
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				       sizeof(struct nouveau_bo));

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	ret = ttm_bo_init(&drm->ttm.bdev, &nvbo->bo, size,
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			  type, &nvbo->placement,
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			  align >> PAGE_SHIFT, false, NULL, acc_size, sg,
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			  robj, nouveau_bo_del_ttm);
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	if (ret) {
		/* ttm will call nouveau_bo_del_ttm if it fails.. */
		return ret;
	}

	*pnvbo = nvbo;
	return 0;
}

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static void
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set_placement_list(struct ttm_place *pl, unsigned *n, uint32_t type, uint32_t flags)
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{
	*n = 0;

	if (type & TTM_PL_FLAG_VRAM)
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		pl[(*n)++].flags = TTM_PL_FLAG_VRAM | flags;
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	if (type & TTM_PL_FLAG_TT)
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		pl[(*n)++].flags = TTM_PL_FLAG_TT | flags;
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	if (type & TTM_PL_FLAG_SYSTEM)
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		pl[(*n)++].flags = TTM_PL_FLAG_SYSTEM | flags;
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}

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static void
set_placement_range(struct nouveau_bo *nvbo, uint32_t type)
{
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	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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	u32 vram_pages = drm->client.device.info.ram_size >> PAGE_SHIFT;
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	unsigned i, fpfn, lpfn;
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	if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CELSIUS &&
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	    nvbo->mode && (type & TTM_PL_FLAG_VRAM) &&
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	    nvbo->bo.mem.num_pages < vram_pages / 4) {
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		/*
		 * Make sure that the color and depth buffers are handled
		 * by independent memory controller units. Up to a 9x
		 * speed up when alpha-blending and depth-test are enabled
		 * at the same time.
		 */
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		if (nvbo->zeta) {
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			fpfn = vram_pages / 2;
			lpfn = ~0;
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		} else {
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			fpfn = 0;
			lpfn = vram_pages / 2;
		}
		for (i = 0; i < nvbo->placement.num_placement; ++i) {
			nvbo->placements[i].fpfn = fpfn;
			nvbo->placements[i].lpfn = lpfn;
		}
		for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
			nvbo->busy_placements[i].fpfn = fpfn;
			nvbo->busy_placements[i].lpfn = lpfn;
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		}
	}
}

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void
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nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy)
328
{
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	struct ttm_placement *pl = &nvbo->placement;
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	uint32_t flags = (nvbo->force_coherent ? TTM_PL_FLAG_UNCACHED :
						 TTM_PL_MASK_CACHING) |
			 (nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0);
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	pl->placement = nvbo->placements;
	set_placement_list(nvbo->placements, &pl->num_placement,
			   type, flags);

	pl->busy_placement = nvbo->busy_placements;
	set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
			   type | busy, flags);
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	set_placement_range(nvbo, type);
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}

int
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nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype, bool contig)
347
{
348
	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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	struct ttm_buffer_object *bo = &nvbo->bo;
350
	bool force = false, evict = false;
351
	int ret;
352

353
	ret = ttm_bo_reserve(bo, false, false, NULL);
354
	if (ret)
355
		return ret;
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357
	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
358
	    memtype == TTM_PL_FLAG_VRAM && contig) {
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		if (!nvbo->contig) {
			nvbo->contig = true;
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			force = true;
362
			evict = true;
363
		}
364 365
	}

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	if (nvbo->pin_refcnt) {
		if (!(memtype & (1 << bo->mem.mem_type)) || evict) {
			NV_ERROR(drm, "bo %p pinned elsewhere: "
				      "0x%08x vs 0x%08x\n", bo,
				 1 << bo->mem.mem_type, memtype);
			ret = -EBUSY;
		}
		nvbo->pin_refcnt++;
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		goto out;
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	}

	if (evict) {
		nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT, 0);
		ret = nouveau_bo_validate(nvbo, false, false);
		if (ret)
			goto out;
	}
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384
	nvbo->pin_refcnt++;
385
	nouveau_bo_placement_set(nvbo, memtype, 0);
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	/* drop pin_refcnt temporarily, so we don't trip the assertion
	 * in nouveau_bo_move() that makes sure we're not trying to
	 * move a pinned buffer
	 */
	nvbo->pin_refcnt--;
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	ret = nouveau_bo_validate(nvbo, false, false);
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	if (ret)
		goto out;
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	nvbo->pin_refcnt++;
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	switch (bo->mem.mem_type) {
	case TTM_PL_VRAM:
		drm->gem.vram_available -= bo->mem.size;
		break;
	case TTM_PL_TT:
		drm->gem.gart_available -= bo->mem.size;
		break;
	default:
		break;
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	}
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408
out:
409
	if (force && ret)
410
		nvbo->contig = false;
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	ttm_bo_unreserve(bo);
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	return ret;
}

int
nouveau_bo_unpin(struct nouveau_bo *nvbo)
{
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	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
419
	struct ttm_buffer_object *bo = &nvbo->bo;
420
	int ret, ref;
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422
	ret = ttm_bo_reserve(bo, false, false, NULL);
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	if (ret)
		return ret;

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	ref = --nvbo->pin_refcnt;
	WARN_ON_ONCE(ref < 0);
	if (ref)
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		goto out;

431
	nouveau_bo_placement_set(nvbo, bo->mem.placement, 0);
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433
	ret = nouveau_bo_validate(nvbo, false, false);
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	if (ret == 0) {
		switch (bo->mem.mem_type) {
		case TTM_PL_VRAM:
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			drm->gem.vram_available += bo->mem.size;
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			break;
		case TTM_PL_TT:
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			drm->gem.gart_available += bo->mem.size;
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			break;
		default:
			break;
		}
	}

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out:
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	ttm_bo_unreserve(bo);
	return ret;
}

int
nouveau_bo_map(struct nouveau_bo *nvbo)
{
	int ret;

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	ret = ttm_bo_reserve(&nvbo->bo, false, false, NULL);
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	if (ret)
		return ret;

461
	ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
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	ttm_bo_unreserve(&nvbo->bo);
	return ret;
}

void
nouveau_bo_unmap(struct nouveau_bo *nvbo)
{
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	if (!nvbo)
		return;

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	ttm_bo_kunmap(&nvbo->kmap);
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}

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void
nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
{
	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
	struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
	int i;

	if (!ttm_dma)
		return;

	/* Don't waste time looping if the object is coherent */
	if (nvbo->force_coherent)
		return;

	for (i = 0; i < ttm_dma->ttm.num_pages; i++)
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		dma_sync_single_for_device(drm->dev->dev,
					   ttm_dma->dma_address[i],
493
					   PAGE_SIZE, DMA_TO_DEVICE);
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}

void
nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo)
{
	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
	struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
	int i;

	if (!ttm_dma)
		return;

	/* Don't waste time looping if the object is coherent */
	if (nvbo->force_coherent)
		return;

	for (i = 0; i < ttm_dma->ttm.num_pages; i++)
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		dma_sync_single_for_cpu(drm->dev->dev, ttm_dma->dma_address[i],
512
					PAGE_SIZE, DMA_FROM_DEVICE);
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}

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int
nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
517
		    bool no_wait_gpu)
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{
	int ret;

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	ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement,
			      interruptible, no_wait_gpu);
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	if (ret)
		return ret;

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	nouveau_bo_sync_for_device(nvbo);

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	return 0;
}

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void
nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
{
	bool is_iomem;
	u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
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537
	mem += index;
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	if (is_iomem)
		iowrite16_native(val, (void __force __iomem *)mem);
	else
		*mem = val;
}

u32
nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
{
	bool is_iomem;
	u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
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551
	mem += index;
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	if (is_iomem)
		return ioread32_native((void __force __iomem *)mem);
	else
		return *mem;
}

void
nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
{
	bool is_iomem;
	u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
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565
	mem += index;
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	if (is_iomem)
		iowrite32_native(val, (void __force __iomem *)mem);
	else
		*mem = val;
}

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static struct ttm_tt *
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nouveau_ttm_tt_create(struct ttm_bo_device *bdev, unsigned long size,
		      uint32_t page_flags, struct page *dummy_read)
576
{
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#if IS_ENABLED(CONFIG_AGP)
578
	struct nouveau_drm *drm = nouveau_bdev(bdev);
579

580 581
	if (drm->agp.bridge) {
		return ttm_agp_tt_create(bdev, drm->agp.bridge, size,
582
					 page_flags, dummy_read);
583
	}
584
#endif
585

586
	return nouveau_sgdma_create_ttm(bdev, size, page_flags, dummy_read);
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}

static int
nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
{
	/* We'll do this from user space. */
	return 0;
}

static int
nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
			 struct ttm_mem_type_manager *man)
{
600
	struct nouveau_drm *drm = nouveau_bdev(bdev);
601
	struct nvif_mmu *mmu = &drm->client.mmu;
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	switch (type) {
	case TTM_PL_SYSTEM:
		man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
		man->available_caching = TTM_PL_MASK_CACHING;
		man->default_caching = TTM_PL_FLAG_CACHED;
		break;
	case TTM_PL_VRAM:
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		man->flags = TTM_MEMTYPE_FLAG_FIXED |
			     TTM_MEMTYPE_FLAG_MAPPABLE;
		man->available_caching = TTM_PL_FLAG_UNCACHED |
					 TTM_PL_FLAG_WC;
		man->default_caching = TTM_PL_FLAG_WC;

616
		if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
617
			/* Some BARs do not support being ioremapped WC */
618 619
			const u8 type = mmu->type[drm->ttm.type_vram].type;
			if (type & NVIF_MEM_UNCACHED) {
620 621 622 623
				man->available_caching = TTM_PL_FLAG_UNCACHED;
				man->default_caching = TTM_PL_FLAG_UNCACHED;
			}

B
Ben Skeggs 已提交
624
			man->func = &nouveau_vram_manager;
625 626 627
			man->io_reserve_fastpath = false;
			man->use_io_reserve_lru = true;
		} else {
B
Ben Skeggs 已提交
628
			man->func = &ttm_bo_manager_func;
629
		}
630 631
		break;
	case TTM_PL_TT:
632
		if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)
633
			man->func = &nouveau_gart_manager;
634
		else
635
		if (!drm->agp.bridge)
636
			man->func = &nv04_gart_manager;
637 638
		else
			man->func = &ttm_bo_manager_func;
639

640
		if (drm->agp.bridge) {
641
			man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
642 643 644
			man->available_caching = TTM_PL_FLAG_UNCACHED |
				TTM_PL_FLAG_WC;
			man->default_caching = TTM_PL_FLAG_WC;
645
		} else {
646 647 648 649 650
			man->flags = TTM_MEMTYPE_FLAG_MAPPABLE |
				     TTM_MEMTYPE_FLAG_CMA;
			man->available_caching = TTM_PL_MASK_CACHING;
			man->default_caching = TTM_PL_FLAG_CACHED;
		}
651

652 653 654 655 656 657 658 659 660 661 662 663 664
		break;
	default:
		return -EINVAL;
	}
	return 0;
}

static void
nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
{
	struct nouveau_bo *nvbo = nouveau_bo(bo);

	switch (bo->mem.mem_type) {
665
	case TTM_PL_VRAM:
666 667
		nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT,
					 TTM_PL_FLAG_SYSTEM);
668
		break;
669
	default:
670
		nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM, 0);
671 672
		break;
	}
673 674

	*pl = nvbo->placement;
675 676 677
}


678 679 680 681 682 683
static int
nve0_bo_move_init(struct nouveau_channel *chan, u32 handle)
{
	int ret = RING_SPACE(chan, 2);
	if (ret == 0) {
		BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1);
684
		OUT_RING  (chan, handle & 0x0000ffff);
685 686 687 688 689
		FIRE_RING (chan);
	}
	return ret;
}

690 691
static int
nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
692
		  struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
693
{
694
	struct nouveau_mem *mem = nouveau_mem(old_reg);
695 696
	int ret = RING_SPACE(chan, 10);
	if (ret == 0) {
697
		BEGIN_NVC0(chan, NvSubCopy, 0x0400, 8);
698 699 700 701
		OUT_RING  (chan, upper_32_bits(mem->vma[0].addr));
		OUT_RING  (chan, lower_32_bits(mem->vma[0].addr));
		OUT_RING  (chan, upper_32_bits(mem->vma[1].addr));
		OUT_RING  (chan, lower_32_bits(mem->vma[1].addr));
702 703 704
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
705
		OUT_RING  (chan, new_reg->num_pages);
706
		BEGIN_IMC0(chan, NvSubCopy, 0x0300, 0x0386);
707 708 709 710
	}
	return ret;
}

711 712 713 714 715 716 717 718 719 720 721
static int
nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle)
{
	int ret = RING_SPACE(chan, 2);
	if (ret == 0) {
		BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1);
		OUT_RING  (chan, handle);
	}
	return ret;
}

722 723
static int
nvc0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
724
		  struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
725
{
726 727 728
	struct nouveau_mem *mem = nouveau_mem(old_reg);
	u64 src_offset = mem->vma[0].addr;
	u64 dst_offset = mem->vma[1].addr;
729
	u32 page_count = new_reg->num_pages;
730 731
	int ret;

732
	page_count = new_reg->num_pages;
733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759
	while (page_count) {
		int line_count = (page_count > 8191) ? 8191 : page_count;

		ret = RING_SPACE(chan, 11);
		if (ret)
			return ret;

		BEGIN_NVC0(chan, NvSubCopy, 0x030c, 8);
		OUT_RING  (chan, upper_32_bits(src_offset));
		OUT_RING  (chan, lower_32_bits(src_offset));
		OUT_RING  (chan, upper_32_bits(dst_offset));
		OUT_RING  (chan, lower_32_bits(dst_offset));
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, line_count);
		BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1);
		OUT_RING  (chan, 0x00000110);

		page_count -= line_count;
		src_offset += (PAGE_SIZE * line_count);
		dst_offset += (PAGE_SIZE * line_count);
	}

	return 0;
}

B
Ben Skeggs 已提交
760 761
static int
nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
762
		  struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
B
Ben Skeggs 已提交
763
{
764 765 766
	struct nouveau_mem *mem = nouveau_mem(old_reg);
	u64 src_offset = mem->vma[0].addr;
	u64 dst_offset = mem->vma[1].addr;
767
	u32 page_count = new_reg->num_pages;
B
Ben Skeggs 已提交
768 769
	int ret;

770
	page_count = new_reg->num_pages;
B
Ben Skeggs 已提交
771 772 773 774 775 776 777
	while (page_count) {
		int line_count = (page_count > 2047) ? 2047 : page_count;

		ret = RING_SPACE(chan, 12);
		if (ret)
			return ret;

778
		BEGIN_NVC0(chan, NvSubCopy, 0x0238, 2);
B
Ben Skeggs 已提交
779 780
		OUT_RING  (chan, upper_32_bits(dst_offset));
		OUT_RING  (chan, lower_32_bits(dst_offset));
781
		BEGIN_NVC0(chan, NvSubCopy, 0x030c, 6);
B
Ben Skeggs 已提交
782 783 784 785 786 787
		OUT_RING  (chan, upper_32_bits(src_offset));
		OUT_RING  (chan, lower_32_bits(src_offset));
		OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* line_length */
		OUT_RING  (chan, line_count);
788
		BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1);
B
Ben Skeggs 已提交
789 790 791 792 793 794 795 796 797 798
		OUT_RING  (chan, 0x00100110);

		page_count -= line_count;
		src_offset += (PAGE_SIZE * line_count);
		dst_offset += (PAGE_SIZE * line_count);
	}

	return 0;
}

799 800
static int
nva3_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
801
		  struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
802
{
803 804 805
	struct nouveau_mem *mem = nouveau_mem(old_reg);
	u64 src_offset = mem->vma[0].addr;
	u64 dst_offset = mem->vma[1].addr;
806
	u32 page_count = new_reg->num_pages;
807 808
	int ret;

809
	page_count = new_reg->num_pages;
810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836
	while (page_count) {
		int line_count = (page_count > 8191) ? 8191 : page_count;

		ret = RING_SPACE(chan, 11);
		if (ret)
			return ret;

		BEGIN_NV04(chan, NvSubCopy, 0x030c, 8);
		OUT_RING  (chan, upper_32_bits(src_offset));
		OUT_RING  (chan, lower_32_bits(src_offset));
		OUT_RING  (chan, upper_32_bits(dst_offset));
		OUT_RING  (chan, lower_32_bits(dst_offset));
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, line_count);
		BEGIN_NV04(chan, NvSubCopy, 0x0300, 1);
		OUT_RING  (chan, 0x00000110);

		page_count -= line_count;
		src_offset += (PAGE_SIZE * line_count);
		dst_offset += (PAGE_SIZE * line_count);
	}

	return 0;
}

837 838
static int
nv98_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
839
		  struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
840
{
841
	struct nouveau_mem *mem = nouveau_mem(old_reg);
842 843 844
	int ret = RING_SPACE(chan, 7);
	if (ret == 0) {
		BEGIN_NV04(chan, NvSubCopy, 0x0320, 6);
845 846 847 848
		OUT_RING  (chan, upper_32_bits(mem->vma[0].addr));
		OUT_RING  (chan, lower_32_bits(mem->vma[0].addr));
		OUT_RING  (chan, upper_32_bits(mem->vma[1].addr));
		OUT_RING  (chan, lower_32_bits(mem->vma[1].addr));
849
		OUT_RING  (chan, 0x00000000 /* COPY */);
850
		OUT_RING  (chan, new_reg->num_pages << PAGE_SHIFT);
851 852 853 854
	}
	return ret;
}

855 856
static int
nv84_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
857
		  struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
858
{
859
	struct nouveau_mem *mem = nouveau_mem(old_reg);
860 861 862
	int ret = RING_SPACE(chan, 7);
	if (ret == 0) {
		BEGIN_NV04(chan, NvSubCopy, 0x0304, 6);
863
		OUT_RING  (chan, new_reg->num_pages << PAGE_SHIFT);
864 865 866 867
		OUT_RING  (chan, upper_32_bits(mem->vma[0].addr));
		OUT_RING  (chan, lower_32_bits(mem->vma[0].addr));
		OUT_RING  (chan, upper_32_bits(mem->vma[1].addr));
		OUT_RING  (chan, lower_32_bits(mem->vma[1].addr));
868 869 870 871 872
		OUT_RING  (chan, 0x00000000 /* MODE_COPY, QUERY_NONE */);
	}
	return ret;
}

873 874 875
static int
nv50_bo_move_init(struct nouveau_channel *chan, u32 handle)
{
876
	int ret = RING_SPACE(chan, 6);
877
	if (ret == 0) {
878 879 880
		BEGIN_NV04(chan, NvSubCopy, 0x0000, 1);
		OUT_RING  (chan, handle);
		BEGIN_NV04(chan, NvSubCopy, 0x0180, 3);
881 882 883
		OUT_RING  (chan, chan->drm->ntfy.handle);
		OUT_RING  (chan, chan->vram.handle);
		OUT_RING  (chan, chan->vram.handle);
884 885 886 887 888
	}

	return ret;
}

889
static int
890
nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
891
		  struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
892
{
893
	struct nouveau_mem *mem = nouveau_mem(old_reg);
894
	u64 length = (new_reg->num_pages << PAGE_SHIFT);
895 896 897 898
	u64 src_offset = mem->vma[0].addr;
	u64 dst_offset = mem->vma[1].addr;
	int src_tiled = !!mem->kind;
	int dst_tiled = !!nouveau_mem(new_reg)->kind;
899 900
	int ret;

901 902 903
	while (length) {
		u32 amount, stride, height;

904 905 906 907
		ret = RING_SPACE(chan, 18 + 6 * (src_tiled + dst_tiled));
		if (ret)
			return ret;

908 909
		amount  = min(length, (u64)(4 * 1024 * 1024));
		stride  = 16 * 4;
910 911
		height  = amount / stride;

912
		if (src_tiled) {
913
			BEGIN_NV04(chan, NvSubCopy, 0x0200, 7);
914
			OUT_RING  (chan, 0);
915
			OUT_RING  (chan, 0);
916 917 918 919 920 921
			OUT_RING  (chan, stride);
			OUT_RING  (chan, height);
			OUT_RING  (chan, 1);
			OUT_RING  (chan, 0);
			OUT_RING  (chan, 0);
		} else {
922
			BEGIN_NV04(chan, NvSubCopy, 0x0200, 1);
923 924
			OUT_RING  (chan, 1);
		}
925
		if (dst_tiled) {
926
			BEGIN_NV04(chan, NvSubCopy, 0x021c, 7);
927
			OUT_RING  (chan, 0);
928
			OUT_RING  (chan, 0);
929 930 931 932 933 934
			OUT_RING  (chan, stride);
			OUT_RING  (chan, height);
			OUT_RING  (chan, 1);
			OUT_RING  (chan, 0);
			OUT_RING  (chan, 0);
		} else {
935
			BEGIN_NV04(chan, NvSubCopy, 0x021c, 1);
936 937 938
			OUT_RING  (chan, 1);
		}

939
		BEGIN_NV04(chan, NvSubCopy, 0x0238, 2);
940 941
		OUT_RING  (chan, upper_32_bits(src_offset));
		OUT_RING  (chan, upper_32_bits(dst_offset));
942
		BEGIN_NV04(chan, NvSubCopy, 0x030c, 8);
943 944 945 946 947 948 949 950
		OUT_RING  (chan, lower_32_bits(src_offset));
		OUT_RING  (chan, lower_32_bits(dst_offset));
		OUT_RING  (chan, stride);
		OUT_RING  (chan, stride);
		OUT_RING  (chan, stride);
		OUT_RING  (chan, height);
		OUT_RING  (chan, 0x00000101);
		OUT_RING  (chan, 0x00000000);
951
		BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
952 953 954 955 956
		OUT_RING  (chan, 0);

		length -= amount;
		src_offset += amount;
		dst_offset += amount;
957 958
	}

959 960 961
	return 0;
}

962 963 964
static int
nv04_bo_move_init(struct nouveau_channel *chan, u32 handle)
{
965
	int ret = RING_SPACE(chan, 4);
966
	if (ret == 0) {
967 968 969
		BEGIN_NV04(chan, NvSubCopy, 0x0000, 1);
		OUT_RING  (chan, handle);
		BEGIN_NV04(chan, NvSubCopy, 0x0180, 1);
970
		OUT_RING  (chan, chan->drm->ntfy.handle);
971 972 973 974 975
	}

	return ret;
}

976 977
static inline uint32_t
nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,
978
		      struct nouveau_channel *chan, struct ttm_mem_reg *reg)
979
{
980
	if (reg->mem_type == TTM_PL_TT)
981
		return NvDmaTT;
982
	return chan->vram.handle;
983 984
}

985 986
static int
nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
987
		  struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
988
{
989 990 991
	u32 src_offset = old_reg->start << PAGE_SHIFT;
	u32 dst_offset = new_reg->start << PAGE_SHIFT;
	u32 page_count = new_reg->num_pages;
992 993 994 995 996 997
	int ret;

	ret = RING_SPACE(chan, 3);
	if (ret)
		return ret;

998
	BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);
999 1000
	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, old_reg));
	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, new_reg));
1001

1002
	page_count = new_reg->num_pages;
1003 1004 1005 1006 1007 1008
	while (page_count) {
		int line_count = (page_count > 2047) ? 2047 : page_count;

		ret = RING_SPACE(chan, 11);
		if (ret)
			return ret;
1009

1010
		BEGIN_NV04(chan, NvSubCopy,
1011
				 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
1012 1013 1014 1015 1016 1017 1018 1019
		OUT_RING  (chan, src_offset);
		OUT_RING  (chan, dst_offset);
		OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* line_length */
		OUT_RING  (chan, line_count);
		OUT_RING  (chan, 0x00000101);
		OUT_RING  (chan, 0x00000000);
1020
		BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
1021
		OUT_RING  (chan, 0);
1022 1023 1024 1025 1026 1027

		page_count -= line_count;
		src_offset += (PAGE_SIZE * line_count);
		dst_offset += (PAGE_SIZE * line_count);
	}

1028 1029 1030
	return 0;
}

1031
static int
1032
nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo,
1033
		     struct ttm_mem_reg *reg)
1034
{
1035 1036 1037
	struct nouveau_mem *old_mem = nouveau_mem(&bo->mem);
	struct nouveau_mem *new_mem = nouveau_mem(reg);
	struct nvkm_vm *vmm = drm->client.vm;
1038
	u64 size = (u64)reg->num_pages << PAGE_SHIFT;
1039 1040
	int ret;

1041 1042
	ret = nvkm_vm_get(vmm, size, old_mem->mem.page, NV_MEM_ACCESS_RW,
			  &old_mem->vma[0]);
1043 1044 1045
	if (ret)
		return ret;

1046 1047
	ret = nvkm_vm_get(vmm, size, new_mem->mem.page, NV_MEM_ACCESS_RW,
			  &old_mem->vma[1]);
1048
	if (ret) {
1049
		nvkm_vm_put(&old_mem->vma[0]);
1050 1051 1052
		return ret;
	}

1053 1054 1055 1056 1057 1058 1059 1060 1061 1062
	ret = nouveau_mem_map(old_mem, vmm, &old_mem->vma[0]);
	if (ret)
		goto done;

	ret = nouveau_mem_map(new_mem, vmm, &old_mem->vma[1]);
done:
	if (ret) {
		nvkm_vm_put(&old_mem->vma[1]);
		nvkm_vm_put(&old_mem->vma[0]);
	}
1063 1064 1065
	return 0;
}

1066 1067
static int
nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
1068
		     bool no_wait_gpu, struct ttm_mem_reg *new_reg)
1069
{
1070
	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1071
	struct nouveau_channel *chan = drm->ttm.chan;
1072
	struct nouveau_cli *cli = (void *)chan->user.client;
1073
	struct nouveau_fence *fence;
1074 1075
	int ret;

1076
	/* create temporary vmas for the transfer and attach them to the
1077
	 * old nvkm_mem node, these will get cleaned up after ttm has
1078
	 * destroyed the ttm_mem_reg
1079
	 */
1080
	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
1081
		ret = nouveau_bo_move_prep(drm, bo, new_reg);
1082
		if (ret)
1083
			return ret;
1084 1085
	}

1086
	mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING);
1087
	ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, intr);
1088
	if (ret == 0) {
1089
		ret = drm->ttm.move(chan, bo, &bo->mem, new_reg);
1090 1091 1092
		if (ret == 0) {
			ret = nouveau_fence_new(chan, false, &fence);
			if (ret == 0) {
1093 1094
				ret = ttm_bo_move_accel_cleanup(bo,
								&fence->base,
1095
								evict,
1096
								new_reg);
1097 1098 1099
				nouveau_fence_unref(&fence);
			}
		}
1100
	}
1101
	mutex_unlock(&cli->mutex);
1102
	return ret;
1103 1104
}

1105
void
1106
nouveau_bo_move_init(struct nouveau_drm *drm)
1107 1108 1109
{
	static const struct {
		const char *name;
1110
		int engine;
1111
		s32 oclass;
1112 1113 1114 1115 1116
		int (*exec)(struct nouveau_channel *,
			    struct ttm_buffer_object *,
			    struct ttm_mem_reg *, struct ttm_mem_reg *);
		int (*init)(struct nouveau_channel *, u32 handle);
	} _methods[] = {
1117 1118
		{  "COPY", 4, 0xc1b5, nve0_bo_move_copy, nve0_bo_move_init },
		{  "GRCE", 0, 0xc1b5, nve0_bo_move_copy, nvc0_bo_move_init },
1119 1120
		{  "COPY", 4, 0xc0b5, nve0_bo_move_copy, nve0_bo_move_init },
		{  "GRCE", 0, 0xc0b5, nve0_bo_move_copy, nvc0_bo_move_init },
1121 1122
		{  "COPY", 4, 0xb0b5, nve0_bo_move_copy, nve0_bo_move_init },
		{  "GRCE", 0, 0xb0b5, nve0_bo_move_copy, nvc0_bo_move_init },
1123
		{  "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
1124
		{  "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
1125 1126 1127 1128 1129 1130 1131
		{ "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
		{ "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
		{  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },
		{ "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },
		{  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },
		{  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },
		{  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },
1132
		{},
1133
		{ "CRYPT", 0, 0x88b4, nv98_bo_move_exec, nv50_bo_move_init },
1134 1135 1136 1137 1138
	}, *mthd = _methods;
	const char *name = "CPU";
	int ret;

	do {
1139
		struct nouveau_channel *chan;
1140

1141
		if (mthd->engine)
1142 1143 1144 1145 1146 1147
			chan = drm->cechan;
		else
			chan = drm->channel;
		if (chan == NULL)
			continue;

1148
		ret = nvif_object_init(&chan->user,
1149 1150 1151
				       mthd->oclass | (mthd->engine << 16),
				       mthd->oclass, NULL, 0,
				       &drm->ttm.copy);
1152
		if (ret == 0) {
1153
			ret = mthd->init(chan, drm->ttm.copy.handle);
1154
			if (ret) {
1155
				nvif_object_fini(&drm->ttm.copy);
1156
				continue;
1157
			}
1158 1159

			drm->ttm.move = mthd->exec;
1160
			drm->ttm.chan = chan;
1161 1162
			name = mthd->name;
			break;
1163 1164 1165
		}
	} while ((++mthd)->exec);

1166
	NV_INFO(drm, "MM: using %s for buffer copies\n", name);
1167 1168
}

1169 1170
static int
nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
1171
		      bool no_wait_gpu, struct ttm_mem_reg *new_reg)
1172
{
1173 1174 1175 1176 1177
	struct ttm_place placement_memtype = {
		.fpfn = 0,
		.lpfn = 0,
		.flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING
	};
1178
	struct ttm_placement placement;
1179
	struct ttm_mem_reg tmp_reg;
1180 1181 1182
	int ret;

	placement.num_placement = placement.num_busy_placement = 1;
1183
	placement.placement = placement.busy_placement = &placement_memtype;
1184

1185 1186 1187
	tmp_reg = *new_reg;
	tmp_reg.mm_node = NULL;
	ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, intr, no_wait_gpu);
1188 1189 1190
	if (ret)
		return ret;

1191
	ret = ttm_tt_bind(bo->ttm, &tmp_reg);
1192 1193 1194
	if (ret)
		goto out;

1195
	ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, &tmp_reg);
1196 1197 1198
	if (ret)
		goto out;

1199
	ret = ttm_bo_move_ttm(bo, intr, no_wait_gpu, new_reg);
1200
out:
1201
	ttm_bo_mem_put(bo, &tmp_reg);
1202 1203 1204 1205 1206
	return ret;
}

static int
nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
1207
		      bool no_wait_gpu, struct ttm_mem_reg *new_reg)
1208
{
1209 1210 1211 1212 1213
	struct ttm_place placement_memtype = {
		.fpfn = 0,
		.lpfn = 0,
		.flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING
	};
1214
	struct ttm_placement placement;
1215
	struct ttm_mem_reg tmp_reg;
1216 1217 1218
	int ret;

	placement.num_placement = placement.num_busy_placement = 1;
1219
	placement.placement = placement.busy_placement = &placement_memtype;
1220

1221 1222 1223
	tmp_reg = *new_reg;
	tmp_reg.mm_node = NULL;
	ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, intr, no_wait_gpu);
1224 1225 1226
	if (ret)
		return ret;

1227
	ret = ttm_bo_move_ttm(bo, intr, no_wait_gpu, &tmp_reg);
1228 1229 1230
	if (ret)
		goto out;

1231
	ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, new_reg);
1232 1233 1234 1235
	if (ret)
		goto out;

out:
1236
	ttm_bo_mem_put(bo, &tmp_reg);
1237 1238 1239
	return ret;
}

1240
static void
1241
nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, bool evict,
1242
		     struct ttm_mem_reg *new_reg)
1243
{
1244
	struct nouveau_mem *mem = new_reg ? nouveau_mem(new_reg) : NULL;
1245
	struct nouveau_bo *nvbo = nouveau_bo(bo);
1246
	struct nouveau_vma *vma;
1247

1248 1249 1250 1251
	/* ttm can now (stupidly) pass the driver bos it didn't create... */
	if (bo->destroy != nouveau_bo_del_ttm)
		return;

1252
	if (mem && new_reg->mem_type != TTM_PL_SYSTEM &&
1253
	    mem->mem.page == nvbo->page) {
1254
		list_for_each_entry(vma, &nvbo->vma_list, head) {
1255
			nouveau_vma_map(vma, mem);
1256 1257 1258
		}
	} else {
		list_for_each_entry(vma, &nvbo->vma_list, head) {
1259
			WARN_ON(ttm_bo_wait(bo, false, false));
1260
			nouveau_vma_unmap(vma);
1261
		}
1262 1263 1264
	}
}

1265
static int
1266
nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_reg,
1267
		   struct nouveau_drm_tile **new_tile)
1268
{
1269 1270
	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
	struct drm_device *dev = drm->dev;
1271
	struct nouveau_bo *nvbo = nouveau_bo(bo);
1272
	u64 offset = new_reg->start << PAGE_SHIFT;
1273

1274
	*new_tile = NULL;
1275
	if (new_reg->mem_type != TTM_PL_VRAM)
1276 1277
		return 0;

1278
	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {
1279
		*new_tile = nv10_bo_set_tiling(dev, offset, new_reg->size,
1280
					       nvbo->mode, nvbo->zeta);
1281 1282
	}

1283 1284 1285 1286 1287
	return 0;
}

static void
nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
1288 1289
		      struct nouveau_drm_tile *new_tile,
		      struct nouveau_drm_tile **old_tile)
1290
{
1291 1292
	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
	struct drm_device *dev = drm->dev;
1293
	struct dma_fence *fence = reservation_object_get_excl(bo->resv);
1294

1295
	nv10_bo_put_tile_region(dev, *old_tile, fence);
1296
	*old_tile = new_tile;
1297 1298 1299 1300
}

static int
nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
1301
		bool no_wait_gpu, struct ttm_mem_reg *new_reg)
1302
{
1303
	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1304
	struct nouveau_bo *nvbo = nouveau_bo(bo);
1305
	struct ttm_mem_reg *old_reg = &bo->mem;
1306
	struct nouveau_drm_tile *new_tile = NULL;
1307 1308
	int ret = 0;

1309 1310 1311 1312
	ret = ttm_bo_wait(bo, intr, no_wait_gpu);
	if (ret)
		return ret;

1313 1314 1315
	if (nvbo->pin_refcnt)
		NV_WARN(drm, "Moving pinned object %p!\n", nvbo);

1316
	if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1317
		ret = nouveau_bo_vm_bind(bo, new_reg, &new_tile);
1318 1319 1320
		if (ret)
			return ret;
	}
1321 1322

	/* Fake bo copy. */
1323
	if (old_reg->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
1324
		BUG_ON(bo->mem.mm_node != NULL);
1325 1326
		bo->mem = *new_reg;
		new_reg->mm_node = NULL;
1327
		goto out;
1328 1329
	}

1330
	/* Hardware assisted copy. */
1331
	if (drm->ttm.move) {
1332
		if (new_reg->mem_type == TTM_PL_SYSTEM)
1333
			ret = nouveau_bo_move_flipd(bo, evict, intr,
1334 1335
						    no_wait_gpu, new_reg);
		else if (old_reg->mem_type == TTM_PL_SYSTEM)
1336
			ret = nouveau_bo_move_flips(bo, evict, intr,
1337
						    no_wait_gpu, new_reg);
1338 1339
		else
			ret = nouveau_bo_move_m2mf(bo, evict, intr,
1340
						   no_wait_gpu, new_reg);
1341 1342 1343
		if (!ret)
			goto out;
	}
1344 1345

	/* Fallback to software copy. */
1346
	ret = ttm_bo_wait(bo, intr, no_wait_gpu);
1347
	if (ret == 0)
1348
		ret = ttm_bo_move_memcpy(bo, intr, no_wait_gpu, new_reg);
1349 1350

out:
1351
	if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1352 1353 1354 1355 1356
		if (ret)
			nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
		else
			nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
	}
1357 1358

	return ret;
1359 1360 1361 1362 1363
}

static int
nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
{
1364 1365
	struct nouveau_bo *nvbo = nouveau_bo(bo);

D
David Herrmann 已提交
1366 1367
	return drm_vma_node_verify_access(&nvbo->gem.vma_node,
					  filp->private_data);
1368 1369
}

1370
static int
1371
nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg)
1372
{
1373
	struct ttm_mem_type_manager *man = &bdev->man[reg->mem_type];
1374
	struct nouveau_drm *drm = nouveau_bdev(bdev);
1375
	struct nvkm_device *device = nvxx_device(&drm->client.device);
1376
	struct nouveau_mem *mem = nouveau_mem(reg);
1377
	int ret;
1378

1379 1380 1381 1382 1383
	reg->bus.addr = NULL;
	reg->bus.offset = 0;
	reg->bus.size = reg->num_pages << PAGE_SHIFT;
	reg->bus.base = 0;
	reg->bus.is_iomem = false;
1384 1385
	if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
		return -EINVAL;
1386
	switch (reg->mem_type) {
1387 1388 1389 1390
	case TTM_PL_SYSTEM:
		/* System memory */
		return 0;
	case TTM_PL_TT:
D
Daniel Vetter 已提交
1391
#if IS_ENABLED(CONFIG_AGP)
1392
		if (drm->agp.bridge) {
1393 1394 1395
			reg->bus.offset = reg->start << PAGE_SHIFT;
			reg->bus.base = drm->agp.base;
			reg->bus.is_iomem = !drm->agp.cma;
1396 1397
		}
#endif
1398
		if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA || !mem->kind)
1399 1400 1401
			/* untiled */
			break;
		/* fallthrough, tiled memory */
1402
	case TTM_PL_VRAM:
1403 1404 1405
		reg->bus.offset = reg->start << PAGE_SHIFT;
		reg->bus.base = device->func->resource_addr(device, 1);
		reg->bus.is_iomem = true;
1406
		if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
1407
			struct nvkm_vmm *bar = nvkm_bar_bar1_vmm(device);
1408
			int page_shift = 12;
1409
			if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_FERMI)
1410
				page_shift = mem->mem.page;
1411

1412 1413 1414
			ret = nvkm_vm_get(bar, mem->_mem->size << 12,
					  page_shift, NV_MEM_ACCESS_RW,
					  &mem->bar_vma);
1415 1416
			if (ret)
				return ret;
1417

1418
			nvkm_vm_map(&mem->bar_vma, mem->_mem);
1419
			reg->bus.offset = mem->bar_vma.offset;
1420
		}
1421 1422 1423 1424 1425 1426 1427 1428
		break;
	default:
		return -EINVAL;
	}
	return 0;
}

static void
1429
nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg)
1430
{
1431
	struct nouveau_mem *mem = nouveau_mem(reg);
1432

1433
	if (!mem->bar_vma.node)
1434 1435
		return;

1436
	nvkm_vm_put(&mem->bar_vma);
1437 1438 1439 1440 1441
}

static int
nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
{
1442
	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1443
	struct nouveau_bo *nvbo = nouveau_bo(bo);
1444
	struct nvkm_device *device = nvxx_device(&drm->client.device);
1445
	u32 mappable = device->func->resource_size(device, 1) >> PAGE_SHIFT;
1446
	int i, ret;
1447 1448 1449 1450 1451

	/* as long as the bo isn't in vram, and isn't tiled, we've got
	 * nothing to do here.
	 */
	if (bo->mem.mem_type != TTM_PL_VRAM) {
1452
		if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA ||
1453
		    !nvbo->kind)
1454
			return 0;
1455 1456 1457 1458 1459 1460 1461 1462 1463

		if (bo->mem.mem_type == TTM_PL_SYSTEM) {
			nouveau_bo_placement_set(nvbo, TTM_PL_TT, 0);

			ret = nouveau_bo_validate(nvbo, false, false);
			if (ret)
				return ret;
		}
		return 0;
1464 1465 1466
	}

	/* make sure bo is in mappable vram */
1467
	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA ||
1468
	    bo->mem.start + bo->mem.num_pages < mappable)
1469 1470
		return 0;

1471 1472 1473 1474 1475 1476 1477 1478 1479
	for (i = 0; i < nvbo->placement.num_placement; ++i) {
		nvbo->placements[i].fpfn = 0;
		nvbo->placements[i].lpfn = mappable;
	}

	for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
		nvbo->busy_placements[i].fpfn = 0;
		nvbo->busy_placements[i].lpfn = mappable;
	}
1480

1481
	nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_VRAM, 0);
1482
	return nouveau_bo_validate(nvbo, false, false);
1483 1484
}

1485 1486 1487
static int
nouveau_ttm_tt_populate(struct ttm_tt *ttm)
{
1488
	struct ttm_dma_tt *ttm_dma = (void *)ttm;
1489
	struct nouveau_drm *drm;
1490
	struct device *dev;
1491 1492
	unsigned i;
	int r;
D
Dave Airlie 已提交
1493
	bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1494 1495 1496 1497

	if (ttm->state != tt_unpopulated)
		return 0;

D
Dave Airlie 已提交
1498 1499 1500 1501 1502 1503 1504 1505
	if (slave && ttm->sg) {
		/* make userspace faulting work */
		drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
						 ttm_dma->dma_address, ttm->num_pages);
		ttm->state = tt_unbound;
		return 0;
	}

1506
	drm = nouveau_bdev(ttm->bdev);
1507
	dev = drm->dev->dev;
1508

D
Daniel Vetter 已提交
1509
#if IS_ENABLED(CONFIG_AGP)
1510
	if (drm->agp.bridge) {
J
Jerome Glisse 已提交
1511 1512 1513 1514
		return ttm_agp_tt_populate(ttm);
	}
#endif

1515
#if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1516
	if (swiotlb_nr_tbl()) {
1517
		return ttm_dma_populate((void *)ttm, dev);
1518 1519 1520 1521 1522 1523 1524 1525 1526
	}
#endif

	r = ttm_pool_populate(ttm);
	if (r) {
		return r;
	}

	for (i = 0; i < ttm->num_pages; i++) {
1527 1528
		dma_addr_t addr;

1529
		addr = dma_map_page(dev, ttm->pages[i], 0, PAGE_SIZE,
1530 1531
				    DMA_BIDIRECTIONAL);

1532
		if (dma_mapping_error(dev, addr)) {
1533
			while (i--) {
1534
				dma_unmap_page(dev, ttm_dma->dma_address[i],
1535
					       PAGE_SIZE, DMA_BIDIRECTIONAL);
1536
				ttm_dma->dma_address[i] = 0;
1537 1538 1539 1540
			}
			ttm_pool_unpopulate(ttm);
			return -EFAULT;
		}
1541 1542

		ttm_dma->dma_address[i] = addr;
1543 1544 1545 1546 1547 1548 1549
	}
	return 0;
}

static void
nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm)
{
1550
	struct ttm_dma_tt *ttm_dma = (void *)ttm;
1551
	struct nouveau_drm *drm;
1552
	struct device *dev;
1553
	unsigned i;
D
Dave Airlie 已提交
1554 1555 1556 1557
	bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);

	if (slave)
		return;
1558

1559
	drm = nouveau_bdev(ttm->bdev);
1560
	dev = drm->dev->dev;
1561

D
Daniel Vetter 已提交
1562
#if IS_ENABLED(CONFIG_AGP)
1563
	if (drm->agp.bridge) {
J
Jerome Glisse 已提交
1564 1565 1566 1567 1568
		ttm_agp_tt_unpopulate(ttm);
		return;
	}
#endif

1569
#if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1570
	if (swiotlb_nr_tbl()) {
1571
		ttm_dma_unpopulate((void *)ttm, dev);
1572 1573 1574 1575 1576
		return;
	}
#endif

	for (i = 0; i < ttm->num_pages; i++) {
1577
		if (ttm_dma->dma_address[i]) {
1578
			dma_unmap_page(dev, ttm_dma->dma_address[i], PAGE_SIZE,
1579
				       DMA_BIDIRECTIONAL);
1580 1581 1582 1583 1584 1585
		}
	}

	ttm_pool_unpopulate(ttm);
}

1586
void
1587
nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence, bool exclusive)
1588
{
1589
	struct reservation_object *resv = nvbo->bo.resv;
1590

1591 1592 1593 1594
	if (exclusive)
		reservation_object_add_excl_fence(resv, &fence->base);
	else if (fence)
		reservation_object_add_shared_fence(resv, &fence->base);
1595 1596
}

1597
struct ttm_bo_driver nouveau_bo_driver = {
1598
	.ttm_tt_create = &nouveau_ttm_tt_create,
1599 1600
	.ttm_tt_populate = &nouveau_ttm_tt_populate,
	.ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
1601 1602
	.invalidate_caches = nouveau_bo_invalidate_caches,
	.init_mem_type = nouveau_bo_init_mem_type,
1603
	.eviction_valuable = ttm_bo_eviction_valuable,
1604
	.evict_flags = nouveau_bo_evict_flags,
1605
	.move_notify = nouveau_bo_move_ntfy,
1606 1607
	.move = nouveau_bo_move,
	.verify_access = nouveau_bo_verify_access,
1608 1609 1610
	.fault_reserve_notify = &nouveau_ttm_fault_reserve_notify,
	.io_mem_reserve = &nouveau_ttm_io_mem_reserve,
	.io_mem_free = &nouveau_ttm_io_mem_free,
1611
	.io_mem_pfn = ttm_bo_default_io_mem_pfn,
1612
};