be_main.c 163.5 KB
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/**
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 * Copyright (C) 2005 - 2015 Emulex
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 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License version 2
 * as published by the Free Software Foundation.  The full GNU General
 * Public License is included in this distribution in the file called COPYING.
 *
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 * Written by: Jayamohan Kallickal (jayamohan.kallickal@avagotech.com)
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 *
 * Contact Information:
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 * linux-drivers@avagotech.com
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 *
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 * Emulex
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 * 3333 Susan Street
 * Costa Mesa, CA 92626
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 */
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#include <linux/reboot.h>
#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
#include <linux/blkdev.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/semaphore.h>
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#include <linux/iscsi_boot_sysfs.h>
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#include <linux/module.h>
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#include <linux/bsg-lib.h>
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#include <linux/irq_poll.h>
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#include <scsi/libiscsi.h>
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#include <scsi/scsi_bsg_iscsi.h>
#include <scsi/scsi_netlink.h>
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#include <scsi/scsi_transport_iscsi.h>
#include <scsi/scsi_transport.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi.h>
#include "be_main.h"
#include "be_iscsi.h"
#include "be_mgmt.h"
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#include "be_cmds.h"
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static unsigned int be_iopoll_budget = 10;
static unsigned int be_max_phys_size = 64;
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static unsigned int enable_msix = 1;
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MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
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MODULE_VERSION(BUILD_STR);
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MODULE_AUTHOR("Emulex Corporation");
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MODULE_LICENSE("GPL");
module_param(be_iopoll_budget, int, 0);
module_param(enable_msix, int, 0);
module_param(be_max_phys_size, uint, S_IRUGO);
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MODULE_PARM_DESC(be_max_phys_size,
		"Maximum Size (In Kilobytes) of physically contiguous "
		"memory that can be allocated. Range is 16 - 128");

#define beiscsi_disp_param(_name)\
ssize_t	\
beiscsi_##_name##_disp(struct device *dev,\
			struct device_attribute *attrib, char *buf)	\
{	\
	struct Scsi_Host *shost = class_to_shost(dev);\
	struct beiscsi_hba *phba = iscsi_host_priv(shost); \
	uint32_t param_val = 0;	\
	param_val = phba->attr_##_name;\
	return snprintf(buf, PAGE_SIZE, "%d\n",\
			phba->attr_##_name);\
}

#define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
int \
beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
{\
	if (val >= _minval && val <= _maxval) {\
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
			    "BA_%d : beiscsi_"#_name" updated "\
			    "from 0x%x ==> 0x%x\n",\
			    phba->attr_##_name, val); \
		phba->attr_##_name = val;\
		return 0;\
	} \
	beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
		    "BA_%d beiscsi_"#_name" attribute "\
		    "cannot be updated to 0x%x, "\
		    "range allowed is ["#_minval" - "#_maxval"]\n", val);\
		return -EINVAL;\
}

#define beiscsi_store_param(_name)  \
ssize_t \
beiscsi_##_name##_store(struct device *dev,\
			 struct device_attribute *attr, const char *buf,\
			 size_t count) \
{ \
	struct Scsi_Host  *shost = class_to_shost(dev);\
	struct beiscsi_hba *phba = iscsi_host_priv(shost);\
	uint32_t param_val = 0;\
	if (!isdigit(buf[0]))\
		return -EINVAL;\
	if (sscanf(buf, "%i", &param_val) != 1)\
		return -EINVAL;\
	if (beiscsi_##_name##_change(phba, param_val) == 0) \
		return strlen(buf);\
	else \
		return -EINVAL;\
}

#define beiscsi_init_param(_name, _minval, _maxval, _defval) \
int \
beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
{ \
	if (val >= _minval && val <= _maxval) {\
		phba->attr_##_name = val;\
		return 0;\
	} \
	beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
		    "BA_%d beiscsi_"#_name" attribute " \
		    "cannot be updated to 0x%x, "\
		    "range allowed is ["#_minval" - "#_maxval"]\n", val);\
	phba->attr_##_name = _defval;\
	return -EINVAL;\
}

#define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
static uint beiscsi_##_name = _defval;\
module_param(beiscsi_##_name, uint, S_IRUGO);\
MODULE_PARM_DESC(beiscsi_##_name, _descp);\
beiscsi_disp_param(_name)\
beiscsi_change_param(_name, _minval, _maxval, _defval)\
beiscsi_store_param(_name)\
beiscsi_init_param(_name, _minval, _maxval, _defval)\
DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
	      beiscsi_##_name##_disp, beiscsi_##_name##_store)

/*
 * When new log level added update the
 * the MAX allowed value for log_enable
 */
BEISCSI_RW_ATTR(log_enable, 0x00,
		0xFF, 0x00, "Enable logging Bit Mask\n"
		"\t\t\t\tInitialization Events	: 0x01\n"
		"\t\t\t\tMailbox Events		: 0x02\n"
		"\t\t\t\tMiscellaneous Events	: 0x04\n"
		"\t\t\t\tError Handling		: 0x08\n"
		"\t\t\t\tIO Path Events		: 0x10\n"
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		"\t\t\t\tConfiguration Path	: 0x20\n"
		"\t\t\t\tiSCSI Protocol		: 0x40\n");
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DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
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DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
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DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
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DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
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DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
	     beiscsi_active_session_disp, NULL);
DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
	     beiscsi_free_session_disp, NULL);
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struct device_attribute *beiscsi_attrs[] = {
	&dev_attr_beiscsi_log_enable,
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	&dev_attr_beiscsi_drvr_ver,
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	&dev_attr_beiscsi_adapter_family,
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	&dev_attr_beiscsi_fw_ver,
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	&dev_attr_beiscsi_active_session_count,
	&dev_attr_beiscsi_free_session_count,
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	&dev_attr_beiscsi_phys_port,
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	NULL,
};
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static char const *cqe_desc[] = {
	"RESERVED_DESC",
	"SOL_CMD_COMPLETE",
	"SOL_CMD_KILLED_DATA_DIGEST_ERR",
	"CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
	"CXN_KILLED_BURST_LEN_MISMATCH",
	"CXN_KILLED_AHS_RCVD",
	"CXN_KILLED_HDR_DIGEST_ERR",
	"CXN_KILLED_UNKNOWN_HDR",
	"CXN_KILLED_STALE_ITT_TTT_RCVD",
	"CXN_KILLED_INVALID_ITT_TTT_RCVD",
	"CXN_KILLED_RST_RCVD",
	"CXN_KILLED_TIMED_OUT",
	"CXN_KILLED_RST_SENT",
	"CXN_KILLED_FIN_RCVD",
	"CXN_KILLED_BAD_UNSOL_PDU_RCVD",
	"CXN_KILLED_BAD_WRB_INDEX_ERROR",
	"CXN_KILLED_OVER_RUN_RESIDUAL",
	"CXN_KILLED_UNDER_RUN_RESIDUAL",
	"CMD_KILLED_INVALID_STATSN_RCVD",
	"CMD_KILLED_INVALID_R2T_RCVD",
	"CMD_CXN_KILLED_LUN_INVALID",
	"CMD_CXN_KILLED_ICD_INVALID",
	"CMD_CXN_KILLED_ITT_INVALID",
	"CMD_CXN_KILLED_SEQ_OUTOFORDER",
	"CMD_CXN_KILLED_INVALID_DATASN_RCVD",
	"CXN_INVALIDATE_NOTIFY",
	"CXN_INVALIDATE_INDEX_NOTIFY",
	"CMD_INVALIDATED_NOTIFY",
	"UNSOL_HDR_NOTIFY",
	"UNSOL_DATA_NOTIFY",
	"UNSOL_DATA_DIGEST_ERROR_NOTIFY",
	"DRIVERMSG_NOTIFY",
	"CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
	"SOL_CMD_KILLED_DIF_ERR",
	"CXN_KILLED_SYN_RCVD",
	"CXN_KILLED_IMM_DATA_RCVD"
};

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static int beiscsi_slave_configure(struct scsi_device *sdev)
{
	blk_queue_max_segment_size(sdev->request_queue, 65536);
	return 0;
}

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static int beiscsi_eh_abort(struct scsi_cmnd *sc)
{
	struct iscsi_cls_session *cls_session;
	struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
	struct beiscsi_io_task *aborted_io_task;
	struct iscsi_conn *conn;
	struct beiscsi_conn *beiscsi_conn;
	struct beiscsi_hba *phba;
	struct iscsi_session *session;
	struct invalidate_command_table *inv_tbl;
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	struct be_dma_mem nonemb_cmd;
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	unsigned int cid, tag, num_invalidate;
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	int rc;
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	cls_session = starget_to_session(scsi_target(sc->device));
	session = cls_session->dd_data;

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	spin_lock_bh(&session->frwd_lock);
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	if (!aborted_task || !aborted_task->sc) {
		/* we raced */
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		spin_unlock_bh(&session->frwd_lock);
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		return SUCCESS;
	}

	aborted_io_task = aborted_task->dd_data;
	if (!aborted_io_task->scsi_cmnd) {
		/* raced or invalid command */
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		spin_unlock_bh(&session->frwd_lock);
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		return SUCCESS;
	}
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	spin_unlock_bh(&session->frwd_lock);
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	/* Invalidate WRB Posted for this Task */
	AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
		      aborted_io_task->pwrb_handle->pwrb,
		      1);

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	conn = aborted_task->conn;
	beiscsi_conn = conn->dd_data;
	phba = beiscsi_conn->phba;

	/* invalidate iocb */
	cid = beiscsi_conn->beiscsi_conn_cid;
	inv_tbl = phba->inv_tbl;
	memset(inv_tbl, 0x0, sizeof(*inv_tbl));
	inv_tbl->cid = cid;
	inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
	num_invalidate = 1;
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	nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
				sizeof(struct invalidate_commands_params_in),
				&nonemb_cmd.dma);
	if (nonemb_cmd.va == NULL) {
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		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
			    "BM_%d : Failed to allocate memory for"
			    "mgmt_invalidate_icds\n");
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		return FAILED;
	}
	nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);

	tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
				   cid, &nonemb_cmd);
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	if (!tag) {
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		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
			    "BM_%d : mgmt_invalidate_icds could not be"
			    "submitted\n");
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		pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
				    nonemb_cmd.va, nonemb_cmd.dma);

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		return FAILED;
	}
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	rc = beiscsi_mccq_compl_wait(phba, tag, NULL, &nonemb_cmd);
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	if (rc != -EBUSY)
		pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
				    nonemb_cmd.va, nonemb_cmd.dma);

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	return iscsi_eh_abort(sc);
}

static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
{
	struct iscsi_task *abrt_task;
	struct beiscsi_io_task *abrt_io_task;
	struct iscsi_conn *conn;
	struct beiscsi_conn *beiscsi_conn;
	struct beiscsi_hba *phba;
	struct iscsi_session *session;
	struct iscsi_cls_session *cls_session;
	struct invalidate_command_table *inv_tbl;
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	struct be_dma_mem nonemb_cmd;
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	unsigned int cid, tag, i, num_invalidate;
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	int rc;
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	/* invalidate iocbs */
	cls_session = starget_to_session(scsi_target(sc->device));
	session = cls_session->dd_data;
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	spin_lock_bh(&session->frwd_lock);
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	if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
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		spin_unlock_bh(&session->frwd_lock);
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		return FAILED;
	}
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	conn = session->leadconn;
	beiscsi_conn = conn->dd_data;
	phba = beiscsi_conn->phba;
	cid = beiscsi_conn->beiscsi_conn_cid;
	inv_tbl = phba->inv_tbl;
	memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
	num_invalidate = 0;
	for (i = 0; i < conn->session->cmds_max; i++) {
		abrt_task = conn->session->cmds[i];
		abrt_io_task = abrt_task->dd_data;
		if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
			continue;

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		if (sc->device->lun != abrt_task->sc->device->lun)
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			continue;

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		/* Invalidate WRB Posted for this Task */
		AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
			      abrt_io_task->pwrb_handle->pwrb,
			      1);

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		inv_tbl->cid = cid;
		inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
		num_invalidate++;
		inv_tbl++;
	}
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	spin_unlock_bh(&session->frwd_lock);
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	inv_tbl = phba->inv_tbl;

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	nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
				sizeof(struct invalidate_commands_params_in),
				&nonemb_cmd.dma);
	if (nonemb_cmd.va == NULL) {
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		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
			    "BM_%d : Failed to allocate memory for"
			    "mgmt_invalidate_icds\n");
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		return FAILED;
	}
	nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
	memset(nonemb_cmd.va, 0, nonemb_cmd.size);
	tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
				   cid, &nonemb_cmd);
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	if (!tag) {
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		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
			    "BM_%d : mgmt_invalidate_icds could not be"
			    " submitted\n");
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		pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
				    nonemb_cmd.va, nonemb_cmd.dma);
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		return FAILED;
	}
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	rc = beiscsi_mccq_compl_wait(phba, tag, NULL, &nonemb_cmd);
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	if (rc != -EBUSY)
		pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
				    nonemb_cmd.va, nonemb_cmd.dma);
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	return iscsi_eh_device_reset(sc);
}

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static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
{
	struct beiscsi_hba *phba = data;
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	struct mgmt_session_info *boot_sess = &phba->boot_sess;
	struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
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	char *str = buf;
	int rc;

	switch (type) {
	case ISCSI_BOOT_TGT_NAME:
		rc = sprintf(buf, "%.*s\n",
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			    (int)strlen(boot_sess->target_name),
			    (char *)&boot_sess->target_name);
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		break;
	case ISCSI_BOOT_TGT_IP_ADDR:
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		if (boot_conn->dest_ipaddr.ip_type == 0x1)
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			rc = sprintf(buf, "%pI4\n",
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				(char *)&boot_conn->dest_ipaddr.addr);
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		else
			rc = sprintf(str, "%pI6\n",
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				(char *)&boot_conn->dest_ipaddr.addr);
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		break;
	case ISCSI_BOOT_TGT_PORT:
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		rc = sprintf(str, "%d\n", boot_conn->dest_port);
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		break;

	case ISCSI_BOOT_TGT_CHAP_NAME:
		rc = sprintf(str,  "%.*s\n",
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			     boot_conn->negotiated_login_options.auth_data.chap.
			     target_chap_name_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.target_chap_name);
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		break;
	case ISCSI_BOOT_TGT_CHAP_SECRET:
		rc = sprintf(str,  "%.*s\n",
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			     boot_conn->negotiated_login_options.auth_data.chap.
			     target_secret_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.target_secret);
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		break;
	case ISCSI_BOOT_TGT_REV_CHAP_NAME:
		rc = sprintf(str,  "%.*s\n",
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			     boot_conn->negotiated_login_options.auth_data.chap.
			     intr_chap_name_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.intr_chap_name);
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		break;
	case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
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		rc = sprintf(str,  "%.*s\n",
			     boot_conn->negotiated_login_options.auth_data.chap.
			     intr_secret_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.intr_secret);
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		break;
	case ISCSI_BOOT_TGT_FLAGS:
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		rc = sprintf(str, "2\n");
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		break;
	case ISCSI_BOOT_TGT_NIC_ASSOC:
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		rc = sprintf(str, "0\n");
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		break;
	default:
		rc = -ENOSYS;
		break;
	}
	return rc;
}

static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
{
	struct beiscsi_hba *phba = data;
	char *str = buf;
	int rc;

	switch (type) {
	case ISCSI_BOOT_INI_INITIATOR_NAME:
		rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
		break;
	default:
		rc = -ENOSYS;
		break;
	}
	return rc;
}

static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
{
	struct beiscsi_hba *phba = data;
	char *str = buf;
	int rc;

	switch (type) {
	case ISCSI_BOOT_ETH_FLAGS:
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		rc = sprintf(str, "2\n");
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		break;
	case ISCSI_BOOT_ETH_INDEX:
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		rc = sprintf(str, "0\n");
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		break;
	case ISCSI_BOOT_ETH_MAC:
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		rc  = beiscsi_get_macaddr(str, phba);
		break;
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	default:
		rc = -ENOSYS;
		break;
	}
	return rc;
}


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static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
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{
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	umode_t rc;
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	switch (type) {
	case ISCSI_BOOT_TGT_NAME:
	case ISCSI_BOOT_TGT_IP_ADDR:
	case ISCSI_BOOT_TGT_PORT:
	case ISCSI_BOOT_TGT_CHAP_NAME:
	case ISCSI_BOOT_TGT_CHAP_SECRET:
	case ISCSI_BOOT_TGT_REV_CHAP_NAME:
	case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
	case ISCSI_BOOT_TGT_NIC_ASSOC:
	case ISCSI_BOOT_TGT_FLAGS:
		rc = S_IRUGO;
		break;
	default:
		rc = 0;
		break;
	}
	return rc;
}

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static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
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{
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	umode_t rc;
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	switch (type) {
	case ISCSI_BOOT_INI_INITIATOR_NAME:
		rc = S_IRUGO;
		break;
	default:
		rc = 0;
		break;
	}
	return rc;
}


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static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
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{
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	umode_t rc;
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	switch (type) {
	case ISCSI_BOOT_ETH_FLAGS:
	case ISCSI_BOOT_ETH_MAC:
	case ISCSI_BOOT_ETH_INDEX:
		rc = S_IRUGO;
		break;
	default:
		rc = 0;
		break;
	}
	return rc;
}

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/*------------------- PCI Driver operations and data ----------------- */
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static const struct pci_device_id beiscsi_pci_id_table[] = {
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	{ PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
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	{ PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
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	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
548
	{ PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
549 550 551 552
	{ 0 }
};
MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);

553

554 555
static struct scsi_host_template beiscsi_sht = {
	.module = THIS_MODULE,
556
	.name = "Emulex 10Gbe open-iscsi Initiator Driver",
557 558
	.proc_name = DRV_NAME,
	.queuecommand = iscsi_queuecommand,
559
	.change_queue_depth = scsi_change_queue_depth,
560 561
	.slave_configure = beiscsi_slave_configure,
	.target_alloc = iscsi_target_alloc,
562 563
	.eh_abort_handler = beiscsi_eh_abort,
	.eh_device_reset_handler = beiscsi_eh_device_reset,
564
	.eh_target_reset_handler = iscsi_eh_session_reset,
565
	.shost_attrs = beiscsi_attrs,
566 567 568 569 570 571
	.sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
	.can_queue = BE2_IO_DEPTH,
	.this_id = -1,
	.max_sectors = BEISCSI_MAX_SECTORS,
	.cmd_per_lun = BEISCSI_CMD_PER_LUN,
	.use_clustering = ENABLE_CLUSTERING,
572
	.vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
573
	.track_queue_depth = 1,
574 575
};

576
static struct scsi_transport_template *beiscsi_scsi_transport;
577 578 579 580 581 582 583 584

static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
{
	struct beiscsi_hba *phba;
	struct Scsi_Host *shost;

	shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
	if (!shost) {
585 586
		dev_err(&pcidev->dev,
			"beiscsi_hba_alloc - iscsi_host_alloc failed\n");
587 588 589 590 591 592 593 594 595 596 597
		return NULL;
	}
	shost->max_id = BE2_MAX_SESSIONS;
	shost->max_channel = 0;
	shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
	shost->max_lun = BEISCSI_NUM_MAX_LUN;
	shost->transportt = beiscsi_scsi_transport;
	phba = iscsi_host_priv(shost);
	memset(phba, 0, sizeof(*phba));
	phba->shost = shost;
	phba->pcidev = pci_dev_get(pcidev);
598
	pci_set_drvdata(pcidev, phba);
599
	phba->interface_handle = 0xFFFFFFFF;
600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623

	return phba;
}

static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
{
	if (phba->csr_va) {
		iounmap(phba->csr_va);
		phba->csr_va = NULL;
	}
	if (phba->db_va) {
		iounmap(phba->db_va);
		phba->db_va = NULL;
	}
	if (phba->pci_va) {
		iounmap(phba->pci_va);
		phba->pci_va = NULL;
	}
}

static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
				struct pci_dev *pcidev)
{
	u8 __iomem *addr;
624
	int pcicfg_reg;
625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640

	addr = ioremap_nocache(pci_resource_start(pcidev, 2),
			       pci_resource_len(pcidev, 2));
	if (addr == NULL)
		return -ENOMEM;
	phba->ctrl.csr = addr;
	phba->csr_va = addr;
	phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);

	addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
	if (addr == NULL)
		goto pci_map_err;
	phba->ctrl.db = addr;
	phba->db_va = addr;
	phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);

641 642 643 644 645 646 647 648
	if (phba->generation == BE_GEN2)
		pcicfg_reg = 1;
	else
		pcicfg_reg = 0;

	addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
			       pci_resource_len(pcidev, pcicfg_reg));

649 650 651 652
	if (addr == NULL)
		goto pci_map_err;
	phba->ctrl.pcicfg = addr;
	phba->pci_va = addr;
653
	phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
654 655 656 657 658 659 660 661 662 663 664 665 666
	return 0;

pci_map_err:
	beiscsi_unmap_pci_function(phba);
	return -ENOMEM;
}

static int beiscsi_enable_pci(struct pci_dev *pcidev)
{
	int ret;

	ret = pci_enable_device(pcidev);
	if (ret) {
667 668
		dev_err(&pcidev->dev,
			"beiscsi_enable_pci - enable device failed\n");
669 670 671
		return ret;
	}

672 673 674 675 676 677 678
	ret = pci_request_regions(pcidev, DRV_NAME);
	if (ret) {
		dev_err(&pcidev->dev,
				"beiscsi_enable_pci - request region failed\n");
		goto pci_dev_disable;
	}

679
	pci_set_master(pcidev);
680 681 682 683 684
	ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
	if (ret) {
		ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
		if (ret) {
			dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
685
			goto pci_region_release;
686 687 688 689 690 691
		} else {
			ret = pci_set_consistent_dma_mask(pcidev,
							  DMA_BIT_MASK(32));
		}
	} else {
		ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
692 693
		if (ret) {
			dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
694
			goto pci_region_release;
695 696 697
		}
	}
	return 0;
698 699 700 701 702 703 704

pci_region_release:
	pci_release_regions(pcidev);
pci_dev_disable:
	pci_disable_device(pcidev);

	return ret;
705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723
}

static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
{
	struct be_ctrl_info *ctrl = &phba->ctrl;
	struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
	struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
	int status = 0;

	ctrl->pdev = pdev;
	status = beiscsi_map_pci_bars(phba, pdev);
	if (status)
		return status;
	mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
	mbox_mem_alloc->va = pci_alloc_consistent(pdev,
						  mbox_mem_alloc->size,
						  &mbox_mem_alloc->dma);
	if (!mbox_mem_alloc->va) {
		beiscsi_unmap_pci_function(phba);
724
		return -ENOMEM;
725 726 727 728 729 730
	}

	mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
	mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
	mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
	memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
731
	mutex_init(&ctrl->mbox_lock);
732 733
	spin_lock_init(&phba->ctrl.mcc_lock);

734 735 736
	return status;
}

737 738 739 740
/**
 * beiscsi_get_params()- Set the config paramters
 * @phba: ptr  device priv structure
 **/
741 742
static void beiscsi_get_params(struct beiscsi_hba *phba)
{
743 744 745 746 747 748 749
	uint32_t total_cid_count = 0;
	uint32_t total_icd_count = 0;
	uint8_t ulp_num = 0;

	total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
			  BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);

750 751 752 753 754 755 756
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		uint32_t align_mask = 0;
		uint32_t icd_post_per_page = 0;
		uint32_t icd_count_unavailable = 0;
		uint32_t icd_start = 0, icd_count = 0;
		uint32_t icd_start_align = 0, icd_count_align = 0;

757
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798
			icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
			icd_count = phba->fw_config.iscsi_icd_count[ulp_num];

			/* Get ICD count that can be posted on each page */
			icd_post_per_page = (PAGE_SIZE / (BE2_SGE *
					     sizeof(struct iscsi_sge)));
			align_mask = (icd_post_per_page - 1);

			/* Check if icd_start is aligned ICD per page posting */
			if (icd_start % icd_post_per_page) {
				icd_start_align = ((icd_start +
						    icd_post_per_page) &
						    ~(align_mask));
				phba->fw_config.
					iscsi_icd_start[ulp_num] =
					icd_start_align;
			}

			icd_count_align = (icd_count & ~align_mask);

			/* ICD discarded in the process of alignment */
			if (icd_start_align)
				icd_count_unavailable = ((icd_start_align -
							  icd_start) +
							 (icd_count -
							  icd_count_align));

			/* Updated ICD count available */
			phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
					icd_count_unavailable);

			beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					"BM_%d : Aligned ICD values\n"
					"\t ICD Start : %d\n"
					"\t ICD Count : %d\n"
					"\t ICD Discarded : %d\n",
					phba->fw_config.
					iscsi_icd_start[ulp_num],
					phba->fw_config.
					iscsi_icd_count[ulp_num],
					icd_count_unavailable);
799 800
			break;
		}
801
	}
802

803
	total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
804 805 806 807 808 809
	phba->params.ios_per_ctrl = (total_icd_count -
				    (total_cid_count +
				     BE2_TMFS + BE2_NOPOUT_REQ));
	phba->params.cxns_per_ctrl = total_cid_count;
	phba->params.asyncpdus_per_ctrl = total_cid_count;
	phba->params.icds_per_ctrl = total_icd_count;
810 811 812 813
	phba->params.num_sge_per_io = BE2_SGE;
	phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
	phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
	phba->params.eq_timer = 64;
814 815
	phba->params.num_eq_entries = 1024;
	phba->params.num_cq_entries = 1024;
816 817 818 819 820 821 822 823 824
	phba->params.wrbs_per_cxn = 256;
}

static void hwi_ring_eq_db(struct beiscsi_hba *phba,
			   unsigned int id, unsigned int clr_interrupt,
			   unsigned int num_processed,
			   unsigned char rearm, unsigned char event)
{
	u32 val = 0;
825

826 827 828 829 830 831
	if (rearm)
		val |= 1 << DB_EQ_REARM_SHIFT;
	if (clr_interrupt)
		val |= 1 << DB_EQ_CLR_SHIFT;
	if (event)
		val |= 1 << DB_EQ_EVNT_SHIFT;
832

833
	val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
834 835 836 837 838 839 840 841
	/* Setting lower order EQ_ID Bits */
	val |= (id & DB_EQ_RING_ID_LOW_MASK);

	/* Setting Higher order EQ_ID Bits */
	val |= (((id >> DB_EQ_HIGH_FEILD_SHIFT) &
		  DB_EQ_RING_ID_HIGH_MASK)
		  << DB_EQ_HIGH_SET_SHIFT);

842 843 844
	iowrite32(val, phba->db_va + DB_EQ_OFFSET);
}

845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873
/**
 * be_isr_mcc - The isr routine of the driver.
 * @irq: Not used
 * @dev_id: Pointer to host adapter structure
 */
static irqreturn_t be_isr_mcc(int irq, void *dev_id)
{
	struct beiscsi_hba *phba;
	struct be_eq_entry *eqe = NULL;
	struct be_queue_info *eq;
	struct be_queue_info *mcc;
	unsigned int num_eq_processed;
	struct be_eq_obj *pbe_eq;
	unsigned long flags;

	pbe_eq = dev_id;
	eq = &pbe_eq->q;
	phba =  pbe_eq->phba;
	mcc = &phba->ctrl.mcc_obj.cq;
	eqe = queue_tail_node(eq);

	num_eq_processed = 0;

	while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
				& EQE_VALID_MASK) {
		if (((eqe->dw[offsetof(struct amap_eq_entry,
		     resource_id) / 32] &
		     EQE_RESID_MASK) >> 16) == mcc->id) {
			spin_lock_irqsave(&phba->isr_lock, flags);
874
			pbe_eq->todo_mcc_cq = true;
875 876 877 878 879 880 881
			spin_unlock_irqrestore(&phba->isr_lock, flags);
		}
		AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
		queue_tail_inc(eq);
		eqe = queue_tail_node(eq);
		num_eq_processed++;
	}
882 883
	if (pbe_eq->todo_mcc_cq)
		queue_work(phba->wq, &pbe_eq->work_cqs);
884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905
	if (num_eq_processed)
		hwi_ring_eq_db(phba, eq->id, 1,	num_eq_processed, 1, 1);

	return IRQ_HANDLED;
}

/**
 * be_isr_msix - The isr routine of the driver.
 * @irq: Not used
 * @dev_id: Pointer to host adapter structure
 */
static irqreturn_t be_isr_msix(int irq, void *dev_id)
{
	struct beiscsi_hba *phba;
	struct be_queue_info *eq;
	struct be_eq_obj *pbe_eq;

	pbe_eq = dev_id;
	eq = &pbe_eq->q;

	phba = pbe_eq->phba;

906 907 908
	/* disable interrupt till iopoll completes */
	hwi_ring_eq_db(phba, eq->id, 1,	0, 0, 1);
	irq_poll_sched(&pbe_eq->iopoll);
909 910

	return IRQ_HANDLED;
911 912
}

913 914 915 916 917 918 919 920 921 922 923 924
/**
 * be_isr - The isr routine of the driver.
 * @irq: Not used
 * @dev_id: Pointer to host adapter structure
 */
static irqreturn_t be_isr(int irq, void *dev_id)
{
	struct beiscsi_hba *phba;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_eq_entry *eqe = NULL;
	struct be_queue_info *eq;
925
	struct be_queue_info *mcc;
926
	unsigned long flags, index;
927
	unsigned int num_mcceq_processed, num_ioeq_processed;
928
	struct be_ctrl_info *ctrl;
929
	struct be_eq_obj *pbe_eq;
930 931 932
	int isr;

	phba = dev_id;
933
	ctrl = &phba->ctrl;
934 935 936 937
	isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
		       (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
	if (!isr)
		return IRQ_NONE;
938 939 940

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
941 942 943 944
	pbe_eq = &phwi_context->be_eq[0];

	eq = &phwi_context->be_eq[0].q;
	mcc = &phba->ctrl.mcc_obj.cq;
945 946 947
	index = 0;
	eqe = queue_tail_node(eq);

948 949
	num_ioeq_processed = 0;
	num_mcceq_processed = 0;
950 951 952 953 954 955 956 957 958 959
	while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
				& EQE_VALID_MASK) {
		if (((eqe->dw[offsetof(struct amap_eq_entry,
		     resource_id) / 32] &
		     EQE_RESID_MASK) >> 16) == mcc->id) {
			spin_lock_irqsave(&phba->isr_lock, flags);
			pbe_eq->todo_mcc_cq = true;
			spin_unlock_irqrestore(&phba->isr_lock, flags);
			num_mcceq_processed++;
		} else {
960
			irq_poll_sched(&pbe_eq->iopoll);
961
			num_ioeq_processed++;
962
		}
963 964 965 966 967 968
		AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
		queue_tail_inc(eq);
		eqe = queue_tail_node(eq);
	}
	if (num_ioeq_processed || num_mcceq_processed) {
		if (pbe_eq->todo_mcc_cq)
969
			queue_work(phba->wq, &pbe_eq->work_cqs);
970

971
		if ((num_mcceq_processed) && (!num_ioeq_processed))
972
			hwi_ring_eq_db(phba, eq->id, 0,
973 974 975 976 977 978 979 980 981 982
				      (num_ioeq_processed +
				       num_mcceq_processed) , 1, 1);
		else
			hwi_ring_eq_db(phba, eq->id, 0,
				       (num_ioeq_processed +
					num_mcceq_processed), 0, 1);

		return IRQ_HANDLED;
	} else
		return IRQ_NONE;
983 984
}

985

986 987 988
static int beiscsi_init_irqs(struct beiscsi_hba *phba)
{
	struct pci_dev *pcidev = phba->pcidev;
989 990
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
991
	int ret, msix_vec, i, j;
992

993 994 995 996 997
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;

	if (phba->msix_enabled) {
		for (i = 0; i < phba->num_cpus; i++) {
998 999 1000 1001 1002 1003 1004 1005 1006
			phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
						    GFP_KERNEL);
			if (!phba->msi_name[i]) {
				ret = -ENOMEM;
				goto free_msix_irqs;
			}

			sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
				phba->shost->host_no, i);
1007
			msix_vec = phba->msix_entries[i].vector;
1008 1009
			ret = request_irq(msix_vec, be_isr_msix, 0,
					  phba->msi_name[i],
1010
					  &phwi_context->be_eq[i]);
1011
			if (ret) {
1012 1013 1014 1015
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : beiscsi_init_irqs-Failed to"
					    "register msix for i = %d\n",
					    i);
1016
				kfree(phba->msi_name[i]);
1017 1018
				goto free_msix_irqs;
			}
1019
		}
1020 1021 1022 1023 1024 1025 1026
		phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
		if (!phba->msi_name[i]) {
			ret = -ENOMEM;
			goto free_msix_irqs;
		}
		sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
			phba->shost->host_no);
1027
		msix_vec = phba->msix_entries[i].vector;
1028
		ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
1029
				  &phwi_context->be_eq[i]);
1030
		if (ret) {
1031 1032 1033
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
				    "BM_%d : beiscsi_init_irqs-"
				    "Failed to register beiscsi_msix_mcc\n");
1034
			kfree(phba->msi_name[i]);
1035 1036 1037
			goto free_msix_irqs;
		}

1038 1039 1040 1041
	} else {
		ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
				  "beiscsi", phba);
		if (ret) {
1042 1043 1044
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : beiscsi_init_irqs-"
				    "Failed to register irq\\n");
1045 1046
			return ret;
		}
1047 1048
	}
	return 0;
1049
free_msix_irqs:
1050 1051 1052
	for (j = i - 1; j >= 0; j--) {
		kfree(phba->msi_name[j]);
		msix_vec = phba->msix_entries[j].vector;
1053
		free_irq(msix_vec, &phwi_context->be_eq[j]);
1054
	}
1055
	return ret;
1056 1057
}

1058
void hwi_ring_cq_db(struct beiscsi_hba *phba,
1059
			   unsigned int id, unsigned int num_processed,
1060
			   unsigned char rearm)
1061 1062
{
	u32 val = 0;
1063

1064 1065
	if (rearm)
		val |= 1 << DB_CQ_REARM_SHIFT;
1066

1067
	val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1068 1069 1070 1071 1072 1073 1074 1075 1076

	/* Setting lower order CQ_ID Bits */
	val |= (id & DB_CQ_RING_ID_LOW_MASK);

	/* Setting Higher order CQ_ID Bits */
	val |= (((id >> DB_CQ_HIGH_FEILD_SHIFT) &
		  DB_CQ_RING_ID_HIGH_MASK)
		  << DB_CQ_HIGH_SET_SHIFT);

1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088
	iowrite32(val, phba->db_va + DB_CQ_OFFSET);
}

static unsigned int
beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
			  struct beiscsi_hba *phba,
			  struct pdu_base *ppdu,
			  unsigned long pdu_len,
			  void *pbuffer, unsigned long buf_len)
{
	struct iscsi_conn *conn = beiscsi_conn->conn;
	struct iscsi_session *session = conn->session;
1089 1090 1091
	struct iscsi_task *task;
	struct beiscsi_io_task *io_task;
	struct iscsi_hdr *login_hdr;
1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103

	switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
						PDUBASE_OPCODE_MASK) {
	case ISCSI_OP_NOOP_IN:
		pbuffer = NULL;
		buf_len = 0;
		break;
	case ISCSI_OP_ASYNC_EVENT:
		break;
	case ISCSI_OP_REJECT:
		WARN_ON(!pbuffer);
		WARN_ON(!(buf_len == 48));
1104 1105 1106
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
			    "BM_%d : In ISCSI_OP_REJECT\n");
1107 1108
		break;
	case ISCSI_OP_LOGIN_RSP:
1109
	case ISCSI_OP_TEXT_RSP:
1110 1111 1112 1113
		task = conn->login_task;
		io_task = task->dd_data;
		login_hdr = (struct iscsi_hdr *)ppdu;
		login_hdr->itt = io_task->libiscsi_itt;
1114 1115
		break;
	default:
1116 1117 1118 1119
		beiscsi_log(phba, KERN_WARNING,
			    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
			    "BM_%d : Unrecognized opcode 0x%x in async msg\n",
			    (ppdu->
1120
			     dw[offsetof(struct amap_pdu_base, opcode) / 32]
1121
			     & PDUBASE_OPCODE_MASK));
1122 1123 1124
		return 1;
	}

1125
	spin_lock_bh(&session->back_lock);
1126
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1127
	spin_unlock_bh(&session->back_lock);
1128 1129 1130 1131 1132 1133 1134 1135
	return 0;
}

static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
{
	struct sgl_handle *psgl_handle;

	if (phba->io_sgl_hndl_avbl) {
1136 1137 1138 1139 1140
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
			    "BM_%d : In alloc_io_sgl_handle,"
			    " io_sgl_alloc_index=%d\n",
			    phba->io_sgl_alloc_index);

1141 1142 1143 1144
		psgl_handle = phba->io_sgl_hndl_base[phba->
						io_sgl_alloc_index];
		phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
		phba->io_sgl_hndl_avbl--;
1145 1146
		if (phba->io_sgl_alloc_index == (phba->params.
						 ios_per_ctrl - 1))
1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157
			phba->io_sgl_alloc_index = 0;
		else
			phba->io_sgl_alloc_index++;
	} else
		psgl_handle = NULL;
	return psgl_handle;
}

static void
free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
{
1158 1159 1160 1161
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
		    "BM_%d : In free_,io_sgl_free_index=%d\n",
		    phba->io_sgl_free_index);

1162 1163 1164 1165 1166
	if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
		/*
		 * this can happen if clean_task is called on a task that
		 * failed in xmit_task or alloc_pdu.
		 */
1167 1168 1169 1170 1171
		 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
			     "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
			     "value there=%p\n", phba->io_sgl_free_index,
			     phba->io_sgl_hndl_base
			     [phba->io_sgl_free_index]);
1172 1173 1174 1175 1176 1177 1178 1179 1180 1181
		return;
	}
	phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
	phba->io_sgl_hndl_avbl++;
	if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
		phba->io_sgl_free_index = 0;
	else
		phba->io_sgl_free_index++;
}

1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197
static inline struct wrb_handle *
beiscsi_get_wrb_handle(struct hwi_wrb_context *pwrb_context,
		       unsigned int wrbs_per_cxn)
{
	struct wrb_handle *pwrb_handle;

	pwrb_handle = pwrb_context->pwrb_handle_base[pwrb_context->alloc_index];
	pwrb_context->wrb_handles_available--;
	if (pwrb_context->alloc_index == (wrbs_per_cxn - 1))
		pwrb_context->alloc_index = 0;
	else
		pwrb_context->alloc_index++;

	return pwrb_handle;
}

1198 1199 1200 1201
/**
 * alloc_wrb_handle - To allocate a wrb handle
 * @phba: The hba pointer
 * @cid: The cid to use for allocation
1202
 * @pwrb_context: ptr to ptr to wrb context
1203 1204 1205
 *
 * This happens under session_lock until submission to chip
 */
1206
struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid,
1207
				    struct hwi_wrb_context **pcontext)
1208 1209 1210
{
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;
1211
	uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
1212 1213

	phwi_ctrlr = phba->phwi_ctrlr;
1214
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1215 1216 1217 1218
	/* return the context address */
	*pcontext = pwrb_context;
	return beiscsi_get_wrb_handle(pwrb_context, phba->params.wrbs_per_cxn);
}
1219

1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230
static inline void
beiscsi_put_wrb_handle(struct hwi_wrb_context *pwrb_context,
		       struct wrb_handle *pwrb_handle,
		       unsigned int wrbs_per_cxn)
{
	pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
	pwrb_context->wrb_handles_available++;
	if (pwrb_context->free_index == (wrbs_per_cxn - 1))
		pwrb_context->free_index = 0;
	else
		pwrb_context->free_index++;
1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244
}

/**
 * free_wrb_handle - To free the wrb handle back to pool
 * @phba: The hba pointer
 * @pwrb_context: The context to free from
 * @pwrb_handle: The wrb_handle to free
 *
 * This happens under session_lock until submission to chip
 */
static void
free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
		struct wrb_handle *pwrb_handle)
{
1245 1246 1247
	beiscsi_put_wrb_handle(pwrb_context,
			       pwrb_handle,
			       phba->params.wrbs_per_cxn);
1248 1249 1250 1251 1252 1253
	beiscsi_log(phba, KERN_INFO,
		    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
		    "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
		    "wrb_handles_available=%d\n",
		    pwrb_handle, pwrb_context->free_index,
		    pwrb_context->wrb_handles_available);
1254 1255 1256 1257 1258 1259 1260 1261 1262
}

static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
{
	struct sgl_handle *psgl_handle;

	if (phba->eh_sgl_hndl_avbl) {
		psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
		phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1263 1264 1265 1266 1267
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
			    "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
			    phba->eh_sgl_alloc_index,
			    phba->eh_sgl_alloc_index);

1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283
		phba->eh_sgl_hndl_avbl--;
		if (phba->eh_sgl_alloc_index ==
		    (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
		     1))
			phba->eh_sgl_alloc_index = 0;
		else
			phba->eh_sgl_alloc_index++;
	} else
		psgl_handle = NULL;
	return psgl_handle;
}

void
free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
{

1284 1285 1286 1287 1288
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
		    "BM_%d : In  free_mgmt_sgl_handle,"
		    "eh_sgl_free_index=%d\n",
		    phba->eh_sgl_free_index);

1289 1290 1291 1292 1293
	if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
		/*
		 * this can happen if clean_task is called on a task that
		 * failed in xmit_task or alloc_pdu.
		 */
1294 1295 1296 1297
		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
			    "BM_%d : Double Free in eh SGL ,"
			    "eh_sgl_free_index=%d\n",
			    phba->eh_sgl_free_index);
1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310
		return;
	}
	phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
	phba->eh_sgl_hndl_avbl++;
	if (phba->eh_sgl_free_index ==
	    (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
		phba->eh_sgl_free_index = 0;
	else
		phba->eh_sgl_free_index++;
}

static void
be_complete_io(struct beiscsi_conn *beiscsi_conn,
1311 1312
		struct iscsi_task *task,
		struct common_sol_cqe *csol_cqe)
1313 1314 1315 1316 1317 1318 1319 1320 1321
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct be_status_bhs *sts_bhs =
				(struct be_status_bhs *)io_task->cmd_bhs;
	struct iscsi_conn *conn = beiscsi_conn->conn;
	unsigned char *sense;
	u32 resid = 0, exp_cmdsn, max_cmdsn;
	u8 rsp, status, flags;

1322 1323 1324 1325 1326 1327 1328 1329
	exp_cmdsn = csol_cqe->exp_cmdsn;
	max_cmdsn = (csol_cqe->exp_cmdsn +
		     csol_cqe->cmd_wnd - 1);
	rsp = csol_cqe->i_resp;
	status = csol_cqe->i_sts;
	flags = csol_cqe->i_flags;
	resid = csol_cqe->res_cnt;

1330
	if (!task->sc) {
1331
		if (io_task->scsi_cmnd) {
1332
			scsi_dma_unmap(io_task->scsi_cmnd);
1333 1334
			io_task->scsi_cmnd = NULL;
		}
1335

1336 1337
		return;
	}
1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357
	task->sc->result = (DID_OK << 16) | status;
	if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
		task->sc->result = DID_ERROR << 16;
		goto unmap;
	}

	/* bidi not initially supported */
	if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
		if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
			task->sc->result = DID_ERROR << 16;

		if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
			scsi_set_resid(task->sc, resid);
			if (!status && (scsi_bufflen(task->sc) - resid <
			    task->sc->underflow))
				task->sc->result = DID_ERROR << 16;
		}
	}

	if (status == SAM_STAT_CHECK_CONDITION) {
1358
		u16 sense_len;
1359
		unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1360

1361
		sense = sts_bhs->sense_info + sizeof(unsigned short);
1362
		sense_len = be16_to_cpu(*slen);
1363 1364 1365
		memcpy(task->sc->sense_buffer, sense,
		       min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
	}
1366

1367 1368
	if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
		conn->rxdata_octets += resid;
1369
unmap:
1370 1371 1372 1373
	if (io_task->scsi_cmnd) {
		scsi_dma_unmap(io_task->scsi_cmnd);
		io_task->scsi_cmnd = NULL;
	}
1374 1375 1376 1377 1378
	iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
}

static void
be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1379 1380
		    struct iscsi_task *task,
		    struct common_sol_cqe *csol_cqe)
1381 1382
{
	struct iscsi_logout_rsp *hdr;
1383
	struct beiscsi_io_task *io_task = task->dd_data;
1384 1385 1386
	struct iscsi_conn *conn = beiscsi_conn->conn;

	hdr = (struct iscsi_logout_rsp *)task->hdr;
1387
	hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1388 1389
	hdr->t2wait = 5;
	hdr->t2retain = 0;
1390 1391
	hdr->flags = csol_cqe->i_flags;
	hdr->response = csol_cqe->i_resp;
1392 1393 1394
	hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
	hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
				     csol_cqe->cmd_wnd - 1);
1395

1396 1397 1398
	hdr->dlength[0] = 0;
	hdr->dlength[1] = 0;
	hdr->dlength[2] = 0;
1399
	hdr->hlength = 0;
1400
	hdr->itt = io_task->libiscsi_itt;
1401 1402 1403 1404 1405
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
}

static void
be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1406 1407
		 struct iscsi_task *task,
		 struct common_sol_cqe *csol_cqe)
1408 1409 1410
{
	struct iscsi_tm_rsp *hdr;
	struct iscsi_conn *conn = beiscsi_conn->conn;
1411
	struct beiscsi_io_task *io_task = task->dd_data;
1412 1413

	hdr = (struct iscsi_tm_rsp *)task->hdr;
1414
	hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1415 1416
	hdr->flags = csol_cqe->i_flags;
	hdr->response = csol_cqe->i_resp;
1417 1418 1419
	hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
	hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
				     csol_cqe->cmd_wnd - 1);
1420

1421
	hdr->itt = io_task->libiscsi_itt;
1422 1423 1424 1425 1426 1427 1428 1429
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
}

static void
hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
		       struct beiscsi_hba *phba, struct sol_cqe *psol)
{
	struct hwi_wrb_context *pwrb_context;
1430
	struct wrb_handle *pwrb_handle = NULL;
1431
	struct hwi_controller *phwi_ctrlr;
1432 1433
	struct iscsi_task *task;
	struct beiscsi_io_task *io_task;
1434
	uint16_t wrb_index, cid, cri_index;
1435 1436

	phwi_ctrlr = phba->phwi_ctrlr;
1437 1438
	if (is_chip_be2_be3r(phba)) {
		wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1439
					  wrb_idx, psol);
1440
		cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1441 1442
				    cid, psol);
	} else {
1443
		wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1444
					  wrb_idx, psol);
1445
		cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1446 1447 1448
				    cid, psol);
	}

1449 1450
	cri_index = BE_GET_CRI_FROM_CID(cid);
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1451
	pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1452
	task = pwrb_handle->pio_handle;
1453

1454
	io_task = task->dd_data;
1455 1456
	memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
	iscsi_put_task(task);
1457 1458 1459 1460
}

static void
be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1461 1462
			struct iscsi_task *task,
			struct common_sol_cqe *csol_cqe)
1463 1464 1465
{
	struct iscsi_nopin *hdr;
	struct iscsi_conn *conn = beiscsi_conn->conn;
1466
	struct beiscsi_io_task *io_task = task->dd_data;
1467 1468

	hdr = (struct iscsi_nopin *)task->hdr;
1469 1470
	hdr->flags = csol_cqe->i_flags;
	hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1471 1472
	hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
				     csol_cqe->cmd_wnd - 1);
1473

1474
	hdr->opcode = ISCSI_OP_NOOP_IN;
1475
	hdr->itt = io_task->libiscsi_itt;
1476 1477 1478
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
}

1479 1480 1481 1482
static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
		struct sol_cqe *psol,
		struct common_sol_cqe *csol_cqe)
{
1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502
	if (is_chip_be2_be3r(phba)) {
		csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
						    i_exp_cmd_sn, psol);
		csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
						  i_res_cnt, psol);
		csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
						  i_cmd_wnd, psol);
		csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
						    wrb_index, psol);
		csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
					      cid, psol);
		csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
						 hw_sts, psol);
		csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
						 i_resp, psol);
		csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
						i_sts, psol);
		csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
						  i_flags, psol);
	} else {
1503 1504 1505 1506 1507 1508 1509 1510 1511 1512
		csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
						    i_exp_cmd_sn, psol);
		csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
						  i_res_cnt, psol);
		csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
						    wrb_index, psol);
		csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
					      cid, psol);
		csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
						 hw_sts, psol);
1513
		csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532
						  i_cmd_wnd, psol);
		if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
				  cmd_cmpl, psol))
			csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
							i_sts, psol);
		else
			csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
							 i_sts, psol);
		if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
				  u, psol))
			csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;

		if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
				  o, psol))
			csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
	}
}


1533 1534 1535 1536 1537 1538 1539 1540
static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
			     struct beiscsi_hba *phba, struct sol_cqe *psol)
{
	struct hwi_wrb_context *pwrb_context;
	struct wrb_handle *pwrb_handle;
	struct iscsi_wrb *pwrb = NULL;
	struct hwi_controller *phwi_ctrlr;
	struct iscsi_task *task;
1541
	unsigned int type;
1542 1543
	struct iscsi_conn *conn = beiscsi_conn->conn;
	struct iscsi_session *session = conn->session;
1544
	struct common_sol_cqe csol_cqe = {0};
1545
	uint16_t cri_index = 0;
1546 1547

	phwi_ctrlr = phba->phwi_ctrlr;
1548 1549 1550 1551

	/* Copy the elements to a common structure */
	adapter_get_sol_cqe(phba, psol, &csol_cqe);

1552 1553
	cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1554 1555 1556 1557

	pwrb_handle = pwrb_context->pwrb_handle_basestd[
		      csol_cqe.wrb_index];

1558 1559
	task = pwrb_handle->pio_handle;
	pwrb = pwrb_handle->pwrb;
1560
	type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1561

1562
	spin_lock_bh(&session->back_lock);
1563
	switch (type) {
1564 1565 1566
	case HWH_TYPE_IO:
	case HWH_TYPE_IO_RD:
		if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1567
		     ISCSI_OP_NOOP_OUT)
1568
			be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1569
		else
1570
			be_complete_io(beiscsi_conn, task, &csol_cqe);
1571 1572 1573
		break;

	case HWH_TYPE_LOGOUT:
1574
		if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1575
			be_complete_logout(beiscsi_conn, task, &csol_cqe);
1576
		else
1577
			be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1578 1579 1580
		break;

	case HWH_TYPE_LOGIN:
1581 1582 1583 1584
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
			    "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
			    " hwi_complete_cmd- Solicited path\n");
1585 1586 1587
		break;

	case HWH_TYPE_NOP:
1588
		be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1589 1590 1591
		break;

	default:
1592 1593 1594 1595
		beiscsi_log(phba, KERN_WARNING,
			    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
			    "BM_%d : In hwi_complete_cmd, unknown type = %d"
			    "wrb_index 0x%x CID 0x%x\n", type,
1596 1597
			    csol_cqe.wrb_index,
			    csol_cqe.cid);
1598 1599
		break;
	}
1600

1601
	spin_unlock_bh(&session->back_lock);
1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624
}

static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
					  *pasync_ctx, unsigned int is_header,
					  unsigned int host_write_ptr)
{
	if (is_header)
		return &pasync_ctx->async_entry[host_write_ptr].
		    header_busy_list;
	else
		return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
}

static struct async_pdu_handle *
hwi_get_async_handle(struct beiscsi_hba *phba,
		     struct beiscsi_conn *beiscsi_conn,
		     struct hwi_async_pdu_context *pasync_ctx,
		     struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
{
	struct be_bus_address phys_addr;
	struct list_head *pbusy_list;
	struct async_pdu_handle *pasync_handle = NULL;
	unsigned char is_header = 0;
1625 1626
	unsigned int index, dpl;

1627 1628
	if (is_chip_be2_be3r(phba)) {
		dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1629
				    dpl, pdpdu_cqe);
1630
		index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1631 1632
				      index, pdpdu_cqe);
	} else {
1633
		dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1634
				    dpl, pdpdu_cqe);
1635
		index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1636 1637
				      index, pdpdu_cqe);
	}
1638 1639

	phys_addr.u.a32.address_lo =
1640 1641
		(pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
					db_addr_lo) / 32] - dpl);
1642
	phys_addr.u.a32.address_hi =
1643 1644
		pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
				       db_addr_hi) / 32];
1645 1646 1647 1648 1649 1650 1651 1652 1653

	phys_addr.u.a64.address =
			*((unsigned long long *)(&phys_addr.u.a64.address));

	switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
			& PDUCQE_CODE_MASK) {
	case UNSOL_HDR_NOTIFY:
		is_header = 1;

1654 1655
		 pbusy_list = hwi_get_async_busy_list(pasync_ctx,
						      is_header, index);
1656 1657
		break;
	case UNSOL_DATA_NOTIFY:
1658 1659
		 pbusy_list = hwi_get_async_busy_list(pasync_ctx,
						      is_header, index);
1660 1661 1662
		break;
	default:
		pbusy_list = NULL;
1663 1664 1665 1666 1667
		beiscsi_log(phba, KERN_WARNING,
			    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
			    "BM_%d : Unexpected code=%d\n",
			    pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
			    code) / 32] & PDUCQE_CODE_MASK);
1668 1669 1670 1671 1672
		return NULL;
	}

	WARN_ON(list_empty(pbusy_list));
	list_for_each_entry(pasync_handle, pbusy_list, link) {
1673
		if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1674 1675 1676 1677 1678
			break;
	}

	WARN_ON(!pasync_handle);

1679 1680
	pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(
			     beiscsi_conn->beiscsi_conn_cid);
1681
	pasync_handle->is_header = is_header;
1682 1683
	pasync_handle->buffer_len = dpl;
	*pcq_index = index;
1684 1685 1686 1687 1688

	return pasync_handle;
}

static unsigned int
1689 1690 1691
hwi_update_async_writables(struct beiscsi_hba *phba,
			    struct hwi_async_pdu_context *pasync_ctx,
			    unsigned int is_header, unsigned int cq_index)
1692 1693 1694 1695 1696 1697
{
	struct list_head *pbusy_list;
	struct async_pdu_handle *pasync_handle;
	unsigned int num_entries, writables = 0;
	unsigned int *pep_read_ptr, *pwritables;

1698
	num_entries = pasync_ctx->num_entries;
1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727
	if (is_header) {
		pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
		pwritables = &pasync_ctx->async_header.writables;
	} else {
		pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
		pwritables = &pasync_ctx->async_data.writables;
	}

	while ((*pep_read_ptr) != cq_index) {
		(*pep_read_ptr)++;
		*pep_read_ptr = (*pep_read_ptr) % num_entries;

		pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
						     *pep_read_ptr);
		if (writables == 0)
			WARN_ON(list_empty(pbusy_list));

		if (!list_empty(pbusy_list)) {
			pasync_handle = list_entry(pbusy_list->next,
						   struct async_pdu_handle,
						   link);
			WARN_ON(!pasync_handle);
			pasync_handle->consumed = 1;
		}

		writables++;
	}

	if (!writables) {
1728 1729 1730 1731
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
			    "BM_%d : Duplicate notification received - index 0x%x!!\n",
			    cq_index);
1732 1733 1734 1735 1736 1737 1738
		WARN_ON(1);
	}

	*pwritables = *pwritables + writables;
	return 0;
}

1739
static void hwi_free_async_msg(struct beiscsi_hba *phba,
1740 1741
			       struct hwi_async_pdu_context *pasync_ctx,
			       unsigned int cri)
1742 1743 1744 1745 1746 1747 1748 1749
{
	struct async_pdu_handle *pasync_handle, *tmp_handle;
	struct list_head *plist;

	plist  = &pasync_ctx->async_entry[cri].wait_queue.list;
	list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
		list_del(&pasync_handle->link);

1750
		if (pasync_handle->is_header) {
1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780
			list_add_tail(&pasync_handle->link,
				      &pasync_ctx->async_header.free_list);
			pasync_ctx->async_header.free_entries++;
		} else {
			list_add_tail(&pasync_handle->link,
				      &pasync_ctx->async_data.free_list);
			pasync_ctx->async_data.free_entries++;
		}
	}

	INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
	pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
	pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
}

static struct phys_addr *
hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
		     unsigned int is_header, unsigned int host_write_ptr)
{
	struct phys_addr *pasync_sge = NULL;

	if (is_header)
		pasync_sge = pasync_ctx->async_header.ring_base;
	else
		pasync_sge = pasync_ctx->async_data.ring_base;

	return pasync_sge + host_write_ptr;
}

static void hwi_post_async_buffers(struct beiscsi_hba *phba,
1781
				    unsigned int is_header, uint8_t ulp_num)
1782 1783 1784 1785 1786 1787 1788
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_handle;
	struct list_head *pfree_link, *pbusy_list;
	struct phys_addr *pasync_sge;
	unsigned int ring_id, num_entries;
1789
	unsigned int host_write_num, doorbell_offset;
1790 1791 1792 1793 1794
	unsigned int writables;
	unsigned int i = 0;
	u32 doorbell = 0;

	phwi_ctrlr = phba->phwi_ctrlr;
1795
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1796
	num_entries = pasync_ctx->num_entries;
1797 1798 1799 1800 1801 1802

	if (is_header) {
		writables = min(pasync_ctx->async_header.writables,
				pasync_ctx->async_header.free_entries);
		pfree_link = pasync_ctx->async_header.free_list.next;
		host_write_num = pasync_ctx->async_header.host_write_ptr;
1803 1804 1805
		ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
		doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
				  doorbell_offset;
1806 1807 1808 1809 1810
	} else {
		writables = min(pasync_ctx->async_data.writables,
				pasync_ctx->async_data.free_entries);
		pfree_link = pasync_ctx->async_data.free_list.next;
		host_write_num = pasync_ctx->async_data.host_write_ptr;
1811 1812 1813
		ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
		doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
				  doorbell_offset;
1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860
	}

	writables = (writables / 8) * 8;
	if (writables) {
		for (i = 0; i < writables; i++) {
			pbusy_list =
			    hwi_get_async_busy_list(pasync_ctx, is_header,
						    host_write_num);
			pasync_handle =
			    list_entry(pfree_link, struct async_pdu_handle,
								link);
			WARN_ON(!pasync_handle);
			pasync_handle->consumed = 0;

			pfree_link = pfree_link->next;

			pasync_sge = hwi_get_ring_address(pasync_ctx,
						is_header, host_write_num);

			pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
			pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;

			list_move(&pasync_handle->link, pbusy_list);

			host_write_num++;
			host_write_num = host_write_num % num_entries;
		}

		if (is_header) {
			pasync_ctx->async_header.host_write_ptr =
							host_write_num;
			pasync_ctx->async_header.free_entries -= writables;
			pasync_ctx->async_header.writables -= writables;
			pasync_ctx->async_header.busy_entries += writables;
		} else {
			pasync_ctx->async_data.host_write_ptr = host_write_num;
			pasync_ctx->async_data.free_entries -= writables;
			pasync_ctx->async_data.writables -= writables;
			pasync_ctx->async_data.busy_entries += writables;
		}

		doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
		doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
		doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
		doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
					<< DB_DEF_PDU_CQPROC_SHIFT;

1861
		iowrite32(doorbell, phba->db_va + doorbell_offset);
1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872
	}
}

static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
					 struct beiscsi_conn *beiscsi_conn,
					 struct i_t_dpdu_cqe *pdpdu_cqe)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_handle = NULL;
	unsigned int cq_index = -1;
1873 1874
	uint16_t cri_index = BE_GET_CRI_FROM_CID(
			     beiscsi_conn->beiscsi_conn_cid);
1875 1876

	phwi_ctrlr = phba->phwi_ctrlr;
1877 1878 1879
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
		     BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
		     cri_index));
1880 1881 1882 1883 1884

	pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
					     pdpdu_cqe, &cq_index);
	BUG_ON(pasync_handle->is_header != 0);
	if (pasync_handle->consumed == 0)
1885 1886
		hwi_update_async_writables(phba, pasync_ctx,
					   pasync_handle->is_header, cq_index);
1887

1888 1889 1890 1891
	hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri);
	hwi_post_async_buffers(phba, pasync_handle->is_header,
			       BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
			       cri_index));
1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920
}

static unsigned int
hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
		  struct beiscsi_hba *phba,
		  struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
{
	struct list_head *plist;
	struct async_pdu_handle *pasync_handle;
	void *phdr = NULL;
	unsigned int hdr_len = 0, buf_len = 0;
	unsigned int status, index = 0, offset = 0;
	void *pfirst_buffer = NULL;
	unsigned int num_buf = 0;

	plist = &pasync_ctx->async_entry[cri].wait_queue.list;

	list_for_each_entry(pasync_handle, plist, link) {
		if (index == 0) {
			phdr = pasync_handle->pbuffer;
			hdr_len = pasync_handle->buffer_len;
		} else {
			buf_len = pasync_handle->buffer_len;
			if (!num_buf) {
				pfirst_buffer = pasync_handle->pbuffer;
				num_buf++;
			}
			memcpy(pfirst_buffer + offset,
			       pasync_handle->pbuffer, buf_len);
1921
			offset += buf_len;
1922 1923 1924 1925 1926
		}
		index++;
	}

	status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1927
					    phdr, hdr_len, pfirst_buffer,
1928
					    offset);
1929

1930
	hwi_free_async_msg(phba, pasync_ctx, cri);
1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945
	return 0;
}

static unsigned int
hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
		     struct beiscsi_hba *phba,
		     struct async_pdu_handle *pasync_handle)
{
	struct hwi_async_pdu_context *pasync_ctx;
	struct hwi_controller *phwi_ctrlr;
	unsigned int bytes_needed = 0, status = 0;
	unsigned short cri = pasync_handle->cri;
	struct pdu_base *ppdu;

	phwi_ctrlr = phba->phwi_ctrlr;
1946 1947 1948 1949
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
		     BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
		     BE_GET_CRI_FROM_CID(beiscsi_conn->
				 beiscsi_conn_cid)));
1950 1951 1952 1953 1954

	list_del(&pasync_handle->link);
	if (pasync_handle->is_header) {
		pasync_ctx->async_header.busy_entries--;
		if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1955
			hwi_free_async_msg(phba, pasync_ctx, cri);
1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009
			BUG();
		}

		pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
		pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
		pasync_ctx->async_entry[cri].wait_queue.hdr_len =
				(unsigned short)pasync_handle->buffer_len;
		list_add_tail(&pasync_handle->link,
			      &pasync_ctx->async_entry[cri].wait_queue.list);

		ppdu = pasync_handle->pbuffer;
		bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
			data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
			0xFFFF0000) | ((be16_to_cpu((ppdu->
			dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
			& PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));

		if (status == 0) {
			pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
			    bytes_needed;

			if (bytes_needed == 0)
				status = hwi_fwd_async_msg(beiscsi_conn, phba,
							   pasync_ctx, cri);
		}
	} else {
		pasync_ctx->async_data.busy_entries--;
		if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
			list_add_tail(&pasync_handle->link,
				      &pasync_ctx->async_entry[cri].wait_queue.
				      list);
			pasync_ctx->async_entry[cri].wait_queue.
				bytes_received +=
				(unsigned short)pasync_handle->buffer_len;

			if (pasync_ctx->async_entry[cri].wait_queue.
			    bytes_received >=
			    pasync_ctx->async_entry[cri].wait_queue.
			    bytes_needed)
				status = hwi_fwd_async_msg(beiscsi_conn, phba,
							   pasync_ctx, cri);
		}
	}
	return status;
}

static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
					 struct beiscsi_hba *phba,
					 struct i_t_dpdu_cqe *pdpdu_cqe)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_handle = NULL;
	unsigned int cq_index = -1;
2010 2011
	uint16_t cri_index = BE_GET_CRI_FROM_CID(
			     beiscsi_conn->beiscsi_conn_cid);
2012 2013

	phwi_ctrlr = phba->phwi_ctrlr;
2014 2015 2016 2017
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
		     BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
		     cri_index));

2018 2019 2020 2021
	pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
					     pdpdu_cqe, &cq_index);

	if (pasync_handle->consumed == 0)
2022 2023 2024
		hwi_update_async_writables(phba, pasync_ctx,
					   pasync_handle->is_header, cq_index);

2025
	hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
2026 2027 2028
	hwi_post_async_buffers(phba, pasync_handle->is_header,
			       BEISCSI_GET_ULP_FROM_CRI(
			       phwi_ctrlr, cri_index));
2029 2030
}

2031
void beiscsi_process_mcc_cq(struct beiscsi_hba *phba)
2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042
{
	struct be_queue_info *mcc_cq;
	struct  be_mcc_compl *mcc_compl;
	unsigned int num_processed = 0;

	mcc_cq = &phba->ctrl.mcc_obj.cq;
	mcc_compl = queue_tail_node(mcc_cq);
	mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
	while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
		if (num_processed >= 32) {
			hwi_ring_cq_db(phba, mcc_cq->id,
2043
					num_processed, 0);
2044 2045 2046
			num_processed = 0;
		}
		if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
2047
			beiscsi_process_async_event(phba, mcc_compl);
2048
		} else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
2049
			beiscsi_process_mcc_compl(&phba->ctrl, mcc_compl);
2050 2051 2052 2053 2054 2055 2056 2057 2058 2059
		}

		mcc_compl->flags = 0;
		queue_tail_inc(mcc_cq);
		mcc_compl = queue_tail_node(mcc_cq);
		mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
		num_processed++;
	}

	if (num_processed > 0)
2060
		hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1);
2061
}
2062

2063 2064 2065
/**
 * beiscsi_process_cq()- Process the Completion Queue
 * @pbe_eq: Event Q on which the Completion has come
2066
 * @budget: Max number of events to processed
2067 2068 2069 2070
 *
 * return
 *     Number of Completion Entries processed.
 **/
2071
unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq, int budget)
2072 2073 2074 2075
{
	struct be_queue_info *cq;
	struct sol_cqe *sol;
	struct dmsg_cqe *dmsg;
2076
	unsigned int total = 0;
2077
	unsigned int num_processed = 0;
2078
	unsigned short code = 0, cid = 0;
2079
	uint16_t cri_index = 0;
2080
	struct beiscsi_conn *beiscsi_conn;
2081 2082
	struct beiscsi_endpoint *beiscsi_ep;
	struct iscsi_endpoint *ep;
2083
	struct beiscsi_hba *phba;
2084

2085
	cq = pbe_eq->cq;
2086
	sol = queue_tail_node(cq);
2087
	phba = pbe_eq->phba;
2088 2089 2090 2091 2092

	while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
	       CQE_VALID_MASK) {
		be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));

2093 2094 2095 2096
		 code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
			 32] & CQE_CODE_MASK);

		 /* Get the CID */
2097 2098 2099
		if (is_chip_be2_be3r(phba)) {
			cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
		} else {
2100 2101 2102 2103 2104 2105 2106 2107 2108
			if ((code == DRIVERMSG_NOTIFY) ||
			    (code == UNSOL_HDR_NOTIFY) ||
			    (code == UNSOL_DATA_NOTIFY))
				cid = AMAP_GET_BITS(
						    struct amap_i_t_dpdu_cqe_v2,
						    cid, sol);
			 else
				 cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
						     cid, sol);
2109
		}
2110

2111 2112
		cri_index = BE_GET_CRI_FROM_CID(cid);
		ep = phba->ep_array[cri_index];
2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124

		if (ep == NULL) {
			/* connection has already been freed
			 * just move on to next one
			 */
			beiscsi_log(phba, KERN_WARNING,
				    BEISCSI_LOG_INIT,
				    "BM_%d : proc cqe of disconn ep: cid %d\n",
				    cid);
			goto proc_next_cqe;
		}

2125 2126
		beiscsi_ep = ep->dd_data;
		beiscsi_conn = beiscsi_ep->conn;
2127

2128 2129 2130
		/* replenish cq */
		if (num_processed == 32) {
			hwi_ring_cq_db(phba, cq->id, 32, 0);
2131 2132
			num_processed = 0;
		}
2133
		total++;
2134

2135
		switch (code) {
2136 2137 2138 2139
		case SOL_CMD_COMPLETE:
			hwi_complete_cmd(beiscsi_conn, phba, sol);
			break;
		case DRIVERMSG_NOTIFY:
2140 2141
			beiscsi_log(phba, KERN_INFO,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2142 2143
				    "BM_%d : Received %s[%d] on CID : %d\n",
				    cqe_desc[code], code, cid);
2144

2145 2146 2147 2148
			dmsg = (struct dmsg_cqe *)sol;
			hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
			break;
		case UNSOL_HDR_NOTIFY:
2149 2150
			beiscsi_log(phba, KERN_INFO,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2151 2152
				    "BM_%d : Received %s[%d] on CID : %d\n",
				    cqe_desc[code], code, cid);
2153

2154
			spin_lock_bh(&phba->async_pdu_lock);
2155 2156
			hwi_process_default_pdu_ring(beiscsi_conn, phba,
					     (struct i_t_dpdu_cqe *)sol);
2157
			spin_unlock_bh(&phba->async_pdu_lock);
2158
			break;
2159
		case UNSOL_DATA_NOTIFY:
2160 2161
			beiscsi_log(phba, KERN_INFO,
				    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2162 2163
				    "BM_%d : Received %s[%d] on CID : %d\n",
				    cqe_desc[code], code, cid);
2164

2165
			spin_lock_bh(&phba->async_pdu_lock);
2166 2167
			hwi_process_default_pdu_ring(beiscsi_conn, phba,
					     (struct i_t_dpdu_cqe *)sol);
2168
			spin_unlock_bh(&phba->async_pdu_lock);
2169 2170 2171 2172
			break;
		case CXN_INVALIDATE_INDEX_NOTIFY:
		case CMD_INVALIDATED_NOTIFY:
		case CXN_INVALIDATE_NOTIFY:
2173 2174
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2175 2176
				    "BM_%d : Ignoring %s[%d] on CID : %d\n",
				    cqe_desc[code], code, cid);
2177
			break;
2178
		case CXN_KILLED_HDR_DIGEST_ERR:
2179
		case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2180 2181 2182 2183 2184
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
				    "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
				    cqe_desc[code], code,  cid);
			break;
2185 2186 2187 2188 2189 2190 2191
		case CMD_KILLED_INVALID_STATSN_RCVD:
		case CMD_KILLED_INVALID_R2T_RCVD:
		case CMD_CXN_KILLED_LUN_INVALID:
		case CMD_CXN_KILLED_ICD_INVALID:
		case CMD_CXN_KILLED_ITT_INVALID:
		case CMD_CXN_KILLED_SEQ_OUTOFORDER:
		case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
2192 2193
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2194 2195
				    "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
				    cqe_desc[code], code,  cid);
2196 2197
			break;
		case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
2198 2199
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2200 2201
				    "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
				    cqe_desc[code], code, cid);
2202
			spin_lock_bh(&phba->async_pdu_lock);
2203 2204
			hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
					     (struct i_t_dpdu_cqe *) sol);
2205
			spin_unlock_bh(&phba->async_pdu_lock);
2206 2207 2208 2209 2210 2211 2212 2213 2214
			break;
		case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
		case CXN_KILLED_BURST_LEN_MISMATCH:
		case CXN_KILLED_AHS_RCVD:
		case CXN_KILLED_UNKNOWN_HDR:
		case CXN_KILLED_STALE_ITT_TTT_RCVD:
		case CXN_KILLED_INVALID_ITT_TTT_RCVD:
		case CXN_KILLED_TIMED_OUT:
		case CXN_KILLED_FIN_RCVD:
2215 2216
		case CXN_KILLED_RST_SENT:
		case CXN_KILLED_RST_RCVD:
2217 2218 2219 2220 2221
		case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
		case CXN_KILLED_BAD_WRB_INDEX_ERROR:
		case CXN_KILLED_OVER_RUN_RESIDUAL:
		case CXN_KILLED_UNDER_RUN_RESIDUAL:
		case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2222 2223
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2224 2225
				    "BM_%d : Event %s[%d] received on CID : %d\n",
				    cqe_desc[code], code, cid);
2226 2227 2228
			if (beiscsi_conn)
				iscsi_conn_failure(beiscsi_conn->conn,
						   ISCSI_ERR_CONN_FAILED);
2229 2230
			break;
		default:
2231 2232
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2233 2234
				    "BM_%d : Invalid CQE Event Received Code : %d"
				    "CID 0x%x...\n",
2235
				    code, cid);
2236 2237 2238
			break;
		}

2239
proc_next_cqe:
2240 2241 2242 2243
		AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
		queue_tail_inc(cq);
		sol = queue_tail_node(cq);
		num_processed++;
2244 2245
		if (total == budget)
			break;
2246 2247
	}

2248 2249
	hwi_ring_cq_db(phba, cq->id, num_processed, 1);
	return total;
2250 2251
}

2252
void beiscsi_process_all_cqs(struct work_struct *work)
2253 2254
{
	unsigned long flags;
2255 2256
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
2257 2258 2259
	struct beiscsi_hba *phba;
	struct be_eq_obj *pbe_eq =
	    container_of(work, struct be_eq_obj, work_cqs);
2260

2261
	phba = pbe_eq->phba;
2262 2263 2264
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;

2265
	if (pbe_eq->todo_mcc_cq) {
2266
		spin_lock_irqsave(&phba->isr_lock, flags);
2267
		pbe_eq->todo_mcc_cq = false;
2268
		spin_unlock_irqrestore(&phba->isr_lock, flags);
2269
		beiscsi_process_mcc_cq(phba);
2270 2271
	}

2272
	if (pbe_eq->todo_cq) {
2273
		spin_lock_irqsave(&phba->isr_lock, flags);
2274
		pbe_eq->todo_cq = false;
2275
		spin_unlock_irqrestore(&phba->isr_lock, flags);
2276
		beiscsi_process_cq(pbe_eq, BE2_MAX_NUM_CQ_PROC);
2277
	}
2278 2279 2280

	/* rearm EQ for further interrupts */
	hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2281 2282
}

2283
static int be_iopoll(struct irq_poll *iop, int budget)
2284
{
2285
	unsigned int ret, num_eq_processed;
2286
	struct beiscsi_hba *phba;
2287
	struct be_eq_obj *pbe_eq;
2288 2289
	struct be_eq_entry *eqe = NULL;
	struct be_queue_info *eq;
2290

2291
	num_eq_processed = 0;
2292
	pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307
	phba = pbe_eq->phba;
	eq = &pbe_eq->q;
	eqe = queue_tail_node(eq);

	while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] &
			EQE_VALID_MASK) {
		AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
		queue_tail_inc(eq);
		eqe = queue_tail_node(eq);
		num_eq_processed++;
	}

	hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);

	ret = beiscsi_process_cq(pbe_eq, budget);
2308
	pbe_eq->cq_count += ret;
2309
	if (ret < budget) {
2310
		irq_poll_complete(iop);
2311 2312
		beiscsi_log(phba, KERN_INFO,
			    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2313 2314
			    "BM_%d : rearm pbe_eq->q.id =%d ret %d\n",
			    pbe_eq->q.id, ret);
2315
		hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2316 2317 2318 2319
	}
	return ret;
}

2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414
static void
hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
		  unsigned int num_sg, struct beiscsi_io_task *io_task)
{
	struct iscsi_sge *psgl;
	unsigned int sg_len, index;
	unsigned int sge_len = 0;
	unsigned long long addr;
	struct scatterlist *l_sg;
	unsigned int offset;

	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
		      io_task->bhs_pa.u.a32.address_lo);
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
		      io_task->bhs_pa.u.a32.address_hi);

	l_sg = sg;
	for (index = 0; (index < num_sg) && (index < 2); index++,
			sg = sg_next(sg)) {
		if (index == 0) {
			sg_len = sg_dma_len(sg);
			addr = (u64) sg_dma_address(sg);
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge0_addr_lo, pwrb,
				      lower_32_bits(addr));
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge0_addr_hi, pwrb,
				      upper_32_bits(addr));
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge0_len, pwrb,
				      sg_len);
			sge_len = sg_len;
		} else {
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
				      pwrb, sge_len);
			sg_len = sg_dma_len(sg);
			addr = (u64) sg_dma_address(sg);
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge1_addr_lo, pwrb,
				      lower_32_bits(addr));
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge1_addr_hi, pwrb,
				      upper_32_bits(addr));
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge1_len, pwrb,
				      sg_len);
		}
	}
	psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
	memset(psgl, 0, sizeof(*psgl) * BE2_SGE);

	AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);

	AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
		      io_task->bhs_pa.u.a32.address_hi);
	AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
		      io_task->bhs_pa.u.a32.address_lo);

	if (num_sg == 1) {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
			      1);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
			      0);
	} else if (num_sg == 2) {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
			      0);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
			      1);
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
			      0);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
			      0);
	}

	sg = l_sg;
	psgl++;
	psgl++;
	offset = 0;
	for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
		sg_len = sg_dma_len(sg);
		addr = (u64) sg_dma_address(sg);
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
			      lower_32_bits(addr));
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
			      upper_32_bits(addr));
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
		AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
		AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
		offset += sg_len;
	}
	psgl--;
	AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
}

2415 2416 2417 2418 2419
static void
hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
	      unsigned int num_sg, struct beiscsi_io_task *io_task)
{
	struct iscsi_sge *psgl;
2420
	unsigned int sg_len, index;
2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 2431
	unsigned int sge_len = 0;
	unsigned long long addr;
	struct scatterlist *l_sg;
	unsigned int offset;

	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
				      io_task->bhs_pa.u.a32.address_lo);
	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
				      io_task->bhs_pa.u.a32.address_hi);

	l_sg = sg;
2432 2433
	for (index = 0; (index < num_sg) && (index < 2); index++,
							 sg = sg_next(sg)) {
2434 2435 2436 2437
		if (index == 0) {
			sg_len = sg_dma_len(sg);
			addr = (u64) sg_dma_address(sg);
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2438
						((u32)(addr & 0xFFFFFFFF)));
2439
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2440
							((u32)(addr >> 32)));
2441 2442 2443 2444 2445 2446 2447 2448 2449
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
							sg_len);
			sge_len = sg_len;
		} else {
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
							pwrb, sge_len);
			sg_len = sg_dma_len(sg);
			addr = (u64) sg_dma_address(sg);
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2450
						((u32)(addr & 0xFFFFFFFF)));
2451
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2452
							((u32)(addr >> 32)));
2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
							sg_len);
		}
	}
	psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
	memset(psgl, 0, sizeof(*psgl) * BE2_SGE);

	AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);

	AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
			io_task->bhs_pa.u.a32.address_hi);
	AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
			io_task->bhs_pa.u.a32.address_lo);

2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482
	if (num_sg == 1) {
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
								1);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
								0);
	} else if (num_sg == 2) {
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
								0);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
								1);
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
								0);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
								0);
	}
2483 2484 2485 2486
	sg = l_sg;
	psgl++;
	psgl++;
	offset = 0;
2487
	for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502
		sg_len = sg_dma_len(sg);
		addr = (u64) sg_dma_address(sg);
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
						(addr & 0xFFFFFFFF));
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
						(addr >> 32));
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
		AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
		AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
		offset += sg_len;
	}
	psgl--;
	AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
}

2503 2504 2505 2506 2507
/**
 * hwi_write_buffer()- Populate the WRB with task info
 * @pwrb: ptr to the WRB entry
 * @task: iscsi task which is to be executed
 **/
2508
static int hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2509 2510 2511 2512 2513
{
	struct iscsi_sge *psgl;
	struct beiscsi_io_task *io_task = task->dd_data;
	struct beiscsi_conn *beiscsi_conn = io_task->conn;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
2514
	uint8_t dsp_value = 0;
2515 2516 2517 2518 2519 2520 2521 2522

	io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
				io_task->bhs_pa.u.a32.address_lo);
	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
				io_task->bhs_pa.u.a32.address_hi);

	if (task->data) {
2523 2524 2525 2526

		/* Check for the data_count */
		dsp_value = (task->data_count) ? 1 : 0;

2527 2528
		if (is_chip_be2_be3r(phba))
			AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2529 2530
				      pwrb, dsp_value);
		else
2531
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2532 2533 2534 2535
				      pwrb, dsp_value);

		/* Map addr only if there is data_count */
		if (dsp_value) {
2536 2537 2538 2539
			io_task->mtask_addr = pci_map_single(phba->pcidev,
							     task->data,
							     task->data_count,
							     PCI_DMA_TODEVICE);
2540 2541 2542
			if (pci_dma_mapping_error(phba->pcidev,
						  io_task->mtask_addr))
				return -ENOMEM;
2543
			io_task->mtask_data_count = task->data_count;
2544
		} else
2545
			io_task->mtask_addr = 0;
2546

2547
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2548
			      lower_32_bits(io_task->mtask_addr));
2549
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2550
			      upper_32_bits(io_task->mtask_addr));
2551 2552 2553 2554 2555 2556
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
						task->data_count);

		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2557
		io_task->mtask_addr = 0;
2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579
	}

	psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;

	AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);

	AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
		      io_task->bhs_pa.u.a32.address_hi);
	AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
		      io_task->bhs_pa.u.a32.address_lo);
	if (task->data) {
		psgl++;
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);

		psgl++;
		if (task->data) {
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2580
				      lower_32_bits(io_task->mtask_addr));
2581
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2582
				      upper_32_bits(io_task->mtask_addr));
2583 2584 2585 2586
		}
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
	}
	AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2587
	return 0;
2588 2589
}

2590 2591 2592 2593
/**
 * beiscsi_find_mem_req()- Find mem needed
 * @phba: ptr to HBA struct
 **/
2594 2595
static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
{
2596
	uint8_t mem_descr_index, ulp_num;
2597
	unsigned int num_cq_pages, num_async_pdu_buf_pages;
2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623
	unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
	unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;

	num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
				      sizeof(struct sol_cqe));

	phba->params.hwi_ws_sz = sizeof(struct hwi_controller);

	phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
						 BE_ISCSI_PDU_HEADER_SIZE;
	phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
					    sizeof(struct hwi_context_memory);


	phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
	    * (phba->params.wrbs_per_cxn)
	    * phba->params.cxns_per_ctrl;
	wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
				 (phba->params.wrbs_per_cxn);
	phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
				phba->params.cxns_per_ctrl);

	phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
		phba->params.icds_per_ctrl;
	phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
		phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2624 2625
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2626

2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646
			num_async_pdu_buf_sgl_pages =
				PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
					       phba, ulp_num) *
					       sizeof(struct phys_addr));

			num_async_pdu_buf_pages =
				PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
					       phba, ulp_num) *
					       phba->params.defpdu_hdr_sz);

			num_async_pdu_data_pages =
				PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
					       phba, ulp_num) *
					       phba->params.defpdu_data_sz);

			num_async_pdu_data_sgl_pages =
				PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
					       phba, ulp_num) *
					       sizeof(struct phys_addr));

2647 2648 2649 2650 2651 2652
			mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					BEISCSI_GET_CID_COUNT(phba, ulp_num) *
					BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;

2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696
			mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  num_async_pdu_buf_pages *
					  PAGE_SIZE;

			mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  num_async_pdu_data_pages *
					  PAGE_SIZE;

			mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  num_async_pdu_buf_sgl_pages *
					  PAGE_SIZE;

			mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  num_async_pdu_data_sgl_pages *
					  PAGE_SIZE;

			mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  BEISCSI_GET_CID_COUNT(phba, ulp_num) *
					  sizeof(struct async_pdu_handle);

			mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  BEISCSI_GET_CID_COUNT(phba, ulp_num) *
					  sizeof(struct async_pdu_handle);

			mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  sizeof(struct hwi_async_pdu_context) +
					 (BEISCSI_GET_CID_COUNT(phba, ulp_num) *
					  sizeof(struct hwi_async_entry));
		}
	}
2697 2698 2699 2700 2701
}

static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
{
	dma_addr_t bus_add;
2702 2703
	struct hwi_controller *phwi_ctrlr;
	struct be_mem_descriptor *mem_descr;
2704 2705 2706
	struct mem_array *mem_arr, *mem_arr_orig;
	unsigned int i, j, alloc_size, curr_alloc_size;

2707
	phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2708 2709 2710
	if (!phba->phwi_ctrlr)
		return -ENOMEM;

2711 2712 2713 2714 2715 2716 2717 2718
	/* Allocate memory for wrb_context */
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
					  phba->params.cxns_per_ctrl,
					  GFP_KERNEL);
	if (!phwi_ctrlr->wrb_context)
		return -ENOMEM;

2719 2720 2721
	phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
				 GFP_KERNEL);
	if (!phba->init_mem) {
2722
		kfree(phwi_ctrlr->wrb_context);
2723 2724 2725 2726 2727 2728 2729 2730
		kfree(phba->phwi_ctrlr);
		return -ENOMEM;
	}

	mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
			       GFP_KERNEL);
	if (!mem_arr_orig) {
		kfree(phba->init_mem);
2731
		kfree(phwi_ctrlr->wrb_context);
2732 2733 2734 2735 2736 2737
		kfree(phba->phwi_ctrlr);
		return -ENOMEM;
	}

	mem_descr = phba->init_mem;
	for (i = 0; i < SE_MEM_MAX; i++) {
2738 2739 2740 2741 2742 2743
		if (!phba->mem_req[i]) {
			mem_descr->mem_array = NULL;
			mem_descr++;
			continue;
		}

2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773 2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795
		j = 0;
		mem_arr = mem_arr_orig;
		alloc_size = phba->mem_req[i];
		memset(mem_arr, 0, sizeof(struct mem_array) *
		       BEISCSI_MAX_FRAGS_INIT);
		curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
		do {
			mem_arr->virtual_address = pci_alloc_consistent(
							phba->pcidev,
							curr_alloc_size,
							&bus_add);
			if (!mem_arr->virtual_address) {
				if (curr_alloc_size <= BE_MIN_MEM_SIZE)
					goto free_mem;
				if (curr_alloc_size -
					rounddown_pow_of_two(curr_alloc_size))
					curr_alloc_size = rounddown_pow_of_two
							     (curr_alloc_size);
				else
					curr_alloc_size = curr_alloc_size / 2;
			} else {
				mem_arr->bus_address.u.
				    a64.address = (__u64) bus_add;
				mem_arr->size = curr_alloc_size;
				alloc_size -= curr_alloc_size;
				curr_alloc_size = min(be_max_phys_size *
						      1024, alloc_size);
				j++;
				mem_arr++;
			}
		} while (alloc_size);
		mem_descr->num_elements = j;
		mem_descr->size_in_bytes = phba->mem_req[i];
		mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
					       GFP_KERNEL);
		if (!mem_descr->mem_array)
			goto free_mem;

		memcpy(mem_descr->mem_array, mem_arr_orig,
		       sizeof(struct mem_array) * j);
		mem_descr++;
	}
	kfree(mem_arr_orig);
	return 0;
free_mem:
	mem_descr->num_elements = j;
	while ((i) || (j)) {
		for (j = mem_descr->num_elements; j > 0; j--) {
			pci_free_consistent(phba->pcidev,
					    mem_descr->mem_array[j - 1].size,
					    mem_descr->mem_array[j - 1].
					    virtual_address,
2796 2797
					    (unsigned long)mem_descr->
					    mem_array[j - 1].
2798 2799 2800 2801 2802 2803 2804 2805 2806 2807
					    bus_address.u.a64.address);
		}
		if (i) {
			i--;
			kfree(mem_descr->mem_array);
			mem_descr--;
		}
	}
	kfree(mem_arr_orig);
	kfree(phba->init_mem);
2808
	kfree(phba->phwi_ctrlr->wrb_context);
2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840 2841 2842 2843
	kfree(phba->phwi_ctrlr);
	return -ENOMEM;
}

static int beiscsi_get_memory(struct beiscsi_hba *phba)
{
	beiscsi_find_mem_req(phba);
	return beiscsi_alloc_mem(phba);
}

static void iscsi_init_global_templates(struct beiscsi_hba *phba)
{
	struct pdu_data_out *pdata_out;
	struct pdu_nop_out *pnop_out;
	struct be_mem_descriptor *mem_descr;

	mem_descr = phba->init_mem;
	mem_descr += ISCSI_MEM_GLOBAL_HEADER;
	pdata_out =
	    (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
	memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);

	AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
		      IIOC_SCSI_DATA);

	pnop_out =
	    (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
				   virtual_address + BE_ISCSI_PDU_HEADER_SIZE);

	memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
	AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
	AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
	AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
}

2844
static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2845 2846
{
	struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2847
	struct hwi_context_memory *phwi_ctxt;
2848
	struct wrb_handle *pwrb_handle = NULL;
2849 2850
	struct hwi_controller *phwi_ctrlr;
	struct hwi_wrb_context *pwrb_context;
2851 2852 2853
	struct iscsi_wrb *pwrb = NULL;
	unsigned int num_cxn_wrbh = 0;
	unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2854 2855 2856 2857 2858 2859 2860 2861

	mem_descr_wrbh = phba->init_mem;
	mem_descr_wrbh += HWI_MEM_WRBH;

	mem_descr_wrb = phba->init_mem;
	mem_descr_wrb += HWI_MEM_WRB;
	phwi_ctrlr = phba->phwi_ctrlr;

2862 2863 2864
	/* Allocate memory for WRBQ */
	phwi_ctxt = phwi_ctrlr->phwi_ctxt;
	phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
2865
				     phba->params.cxns_per_ctrl,
2866 2867 2868 2869 2870 2871 2872 2873
				     GFP_KERNEL);
	if (!phwi_ctxt->be_wrbq) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : WRBQ Mem Alloc Failed\n");
		return -ENOMEM;
	}

	for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2874 2875 2876 2877
		pwrb_context = &phwi_ctrlr->wrb_context[index];
		pwrb_context->pwrb_handle_base =
				kzalloc(sizeof(struct wrb_handle *) *
					phba->params.wrbs_per_cxn, GFP_KERNEL);
2878
		if (!pwrb_context->pwrb_handle_base) {
2879 2880
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : Mem Alloc Failed. Failing to load\n");
2881 2882
			goto init_wrb_hndl_failed;
		}
2883 2884 2885
		pwrb_context->pwrb_handle_basestd =
				kzalloc(sizeof(struct wrb_handle *) *
					phba->params.wrbs_per_cxn, GFP_KERNEL);
2886
		if (!pwrb_context->pwrb_handle_basestd) {
2887 2888
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : Mem Alloc Failed. Failing to load\n");
2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902
			goto init_wrb_hndl_failed;
		}
		if (!num_cxn_wrbh) {
			pwrb_handle =
				mem_descr_wrbh->mem_array[idx].virtual_address;
			num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
					((sizeof(struct wrb_handle)) *
					 phba->params.wrbs_per_cxn));
			idx++;
		}
		pwrb_context->alloc_index = 0;
		pwrb_context->wrb_handles_available = 0;
		pwrb_context->free_index = 0;

2903 2904 2905 2906 2907 2908
		if (num_cxn_wrbh) {
			for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
				pwrb_context->pwrb_handle_base[j] = pwrb_handle;
				pwrb_context->pwrb_handle_basestd[j] =
								pwrb_handle;
				pwrb_context->wrb_handles_available++;
2909
				pwrb_handle->wrb_index = j;
2910 2911 2912 2913 2914 2915
				pwrb_handle++;
			}
			num_cxn_wrbh--;
		}
	}
	idx = 0;
2916
	for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2917
		pwrb_context = &phwi_ctrlr->wrb_context[index];
2918
		if (!num_cxn_wrb) {
2919
			pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2920
			num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2921 2922 2923 2924 2925 2926
				((sizeof(struct iscsi_wrb) *
				  phba->params.wrbs_per_cxn));
			idx++;
		}

		if (num_cxn_wrb) {
2927 2928 2929 2930 2931 2932 2933 2934
			for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
				pwrb_handle = pwrb_context->pwrb_handle_base[j];
				pwrb_handle->pwrb = pwrb;
				pwrb++;
			}
			num_cxn_wrb--;
		}
	}
2935 2936 2937 2938 2939 2940 2941 2942
	return 0;
init_wrb_hndl_failed:
	for (j = index; j > 0; j--) {
		pwrb_context = &phwi_ctrlr->wrb_context[j];
		kfree(pwrb_context->pwrb_handle_base);
		kfree(pwrb_context->pwrb_handle_basestd);
	}
	return -ENOMEM;
2943 2944
}

2945
static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2946
{
2947
	uint8_t ulp_num;
2948 2949 2950 2951
	struct hwi_controller *phwi_ctrlr;
	struct hba_parameters *p = &phba->params;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2952
	unsigned int index, idx, num_per_mem, num_async_data;
2953 2954
	struct be_mem_descriptor *mem_descr;

2955 2956
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2957

2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995
			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET));

			phwi_ctrlr = phba->phwi_ctrlr;
			phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
				(struct hwi_async_pdu_context *)
				 mem_descr->mem_array[0].virtual_address;

			pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
			memset(pasync_ctx, 0, sizeof(*pasync_ctx));

			pasync_ctx->async_entry =
					(struct hwi_async_entry *)
					((long unsigned int)pasync_ctx +
					sizeof(struct hwi_async_pdu_context));

			pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba,
						  ulp_num);
			pasync_ctx->buffer_size = p->defpdu_hdr_sz;

			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
				(ulp_num * MEM_DESCR_OFFSET);
			if (mem_descr->mem_array[0].virtual_address) {
				beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					    "BM_%d : hwi_init_async_pdu_ctx"
					    " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
					    ulp_num,
					    mem_descr->mem_array[0].
					    virtual_address);
			} else
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);

			pasync_ctx->async_header.va_base =
2996 2997
				mem_descr->mem_array[0].virtual_address;

2998 2999 3000
			pasync_ctx->async_header.pa_base.u.a64.address =
				mem_descr->mem_array[0].
				bus_address.u.a64.address;
3001

3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019
			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET);
			if (mem_descr->mem_array[0].virtual_address) {
				beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					    "BM_%d : hwi_init_async_pdu_ctx"
					    " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
					    ulp_num,
					    mem_descr->mem_array[0].
					    virtual_address);
			} else
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);

			pasync_ctx->async_header.ring_base =
				mem_descr->mem_array[0].virtual_address;
3020

3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059
			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET);
			if (mem_descr->mem_array[0].virtual_address) {
				beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					    "BM_%d : hwi_init_async_pdu_ctx"
					    " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
					    ulp_num,
					    mem_descr->mem_array[0].
					    virtual_address);
			} else
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);

			pasync_ctx->async_header.handle_base =
				mem_descr->mem_array[0].virtual_address;
			pasync_ctx->async_header.writables = 0;
			INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);

			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET);
			if (mem_descr->mem_array[0].virtual_address) {
				beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					    "BM_%d : hwi_init_async_pdu_ctx"
					    " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
					    ulp_num,
					    mem_descr->mem_array[0].
					    virtual_address);
			} else
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);

			pasync_ctx->async_data.ring_base =
				mem_descr->mem_array[0].virtual_address;
3060

3061 3062 3063 3064 3065 3066 3067 3068
			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET);
			if (!mem_descr->mem_array[0].virtual_address)
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);
3069

3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098
			pasync_ctx->async_data.handle_base =
				mem_descr->mem_array[0].virtual_address;
			pasync_ctx->async_data.writables = 0;
			INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);

			pasync_header_h =
				(struct async_pdu_handle *)
				pasync_ctx->async_header.handle_base;
			pasync_data_h =
				(struct async_pdu_handle *)
				pasync_ctx->async_data.handle_base;

			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET);
			if (mem_descr->mem_array[0].virtual_address) {
				beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					    "BM_%d : hwi_init_async_pdu_ctx"
					    " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
					    ulp_num,
					    mem_descr->mem_array[0].
					    virtual_address);
			} else
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);

			idx = 0;
3099 3100 3101 3102 3103 3104 3105 3106
			pasync_ctx->async_data.va_base =
				mem_descr->mem_array[idx].virtual_address;
			pasync_ctx->async_data.pa_base.u.a64.address =
				mem_descr->mem_array[idx].
				bus_address.u.a64.address;

			num_async_data = ((mem_descr->mem_array[idx].size) /
					phba->params.defpdu_data_sz);
3107
			num_per_mem = 0;
3108

3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175
			for (index = 0;	index < BEISCSI_GET_CID_COUNT
					(phba, ulp_num); index++) {
				pasync_header_h->cri = -1;
				pasync_header_h->index = (char)index;
				INIT_LIST_HEAD(&pasync_header_h->link);
				pasync_header_h->pbuffer =
					(void *)((unsigned long)
						 (pasync_ctx->
						  async_header.va_base) +
						 (p->defpdu_hdr_sz * index));

				pasync_header_h->pa.u.a64.address =
					pasync_ctx->async_header.pa_base.u.a64.
					address + (p->defpdu_hdr_sz * index);

				list_add_tail(&pasync_header_h->link,
					      &pasync_ctx->async_header.
					      free_list);
				pasync_header_h++;
				pasync_ctx->async_header.free_entries++;
				pasync_ctx->async_header.writables++;

				INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
					       wait_queue.list);
				INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
					       header_busy_list);
				pasync_data_h->cri = -1;
				pasync_data_h->index = (char)index;
				INIT_LIST_HEAD(&pasync_data_h->link);

				if (!num_async_data) {
					num_per_mem = 0;
					idx++;
					pasync_ctx->async_data.va_base =
						mem_descr->mem_array[idx].
						virtual_address;
					pasync_ctx->async_data.pa_base.u.
						a64.address =
						mem_descr->mem_array[idx].
						bus_address.u.a64.address;
					num_async_data =
						((mem_descr->mem_array[idx].
						  size) /
						 phba->params.defpdu_data_sz);
				}
				pasync_data_h->pbuffer =
					(void *)((unsigned long)
					(pasync_ctx->async_data.va_base) +
					(p->defpdu_data_sz * num_per_mem));

				pasync_data_h->pa.u.a64.address =
					pasync_ctx->async_data.pa_base.u.a64.
					address + (p->defpdu_data_sz *
					num_per_mem);
				num_per_mem++;
				num_async_data--;

				list_add_tail(&pasync_data_h->link,
					      &pasync_ctx->async_data.
					      free_list);
				pasync_data_h++;
				pasync_ctx->async_data.free_entries++;
				pasync_ctx->async_data.writables++;

				INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
					       data_busy_list);
			}
3176

3177 3178 3179 3180 3181
			pasync_ctx->async_header.host_write_ptr = 0;
			pasync_ctx->async_header.ep_read_ptr = -1;
			pasync_ctx->async_data.host_write_ptr = 0;
			pasync_ctx->async_data.ep_read_ptr = -1;
		}
3182 3183
	}

3184
	return 0;
3185 3186 3187 3188 3189 3190 3191 3192 3193
}

static int
be_sgl_create_contiguous(void *virtual_address,
			 u64 physical_address, u32 length,
			 struct be_dma_mem *sgl)
{
	WARN_ON(!virtual_address);
	WARN_ON(!physical_address);
3194
	WARN_ON(!length);
3195 3196 3197
	WARN_ON(!sgl);

	sgl->va = virtual_address;
3198
	sgl->dma = (unsigned long)physical_address;
3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248
	sgl->size = length;

	return 0;
}

static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
{
	memset(sgl, 0, sizeof(*sgl));
}

static void
hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
		     struct mem_array *pmem, struct be_dma_mem *sgl)
{
	if (sgl->va)
		be_sgl_destroy_contiguous(sgl);

	be_sgl_create_contiguous(pmem->virtual_address,
				 pmem->bus_address.u.a64.address,
				 pmem->size, sgl);
}

static void
hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
			   struct mem_array *pmem, struct be_dma_mem *sgl)
{
	if (sgl->va)
		be_sgl_destroy_contiguous(sgl);

	be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
				 pmem->bus_address.u.a64.address,
				 pmem->size, sgl);
}

static int be_fill_queue(struct be_queue_info *q,
		u16 len, u16 entry_size, void *vaddress)
{
	struct be_dma_mem *mem = &q->dma_mem;

	memset(q, 0, sizeof(*q));
	q->len = len;
	q->entry_size = entry_size;
	mem->size = len * entry_size;
	mem->va = vaddress;
	if (!mem->va)
		return -ENOMEM;
	memset(mem->va, 0, mem->size);
	return 0;
}

3249
static int beiscsi_create_eqs(struct beiscsi_hba *phba,
3250 3251
			     struct hwi_context_memory *phwi_context)
{
3252
	unsigned int i, num_eq_pages;
3253
	int ret = 0, eq_for_mcc;
3254 3255 3256
	struct be_queue_info *eq;
	struct be_dma_mem *mem;
	void *eq_vaddress;
3257
	dma_addr_t paddr;
3258

3259 3260
	num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
				      sizeof(struct be_eq_entry));
3261

3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279
	if (phba->msix_enabled)
		eq_for_mcc = 1;
	else
		eq_for_mcc = 0;
	for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
		eq = &phwi_context->be_eq[i].q;
		mem = &eq->dma_mem;
		phwi_context->be_eq[i].phba = phba;
		eq_vaddress = pci_alloc_consistent(phba->pcidev,
						     num_eq_pages * PAGE_SIZE,
						     &paddr);
		if (!eq_vaddress)
			goto create_eq_error;

		mem->va = eq_vaddress;
		ret = be_fill_queue(eq, phba->params.num_eq_entries,
				    sizeof(struct be_eq_entry), eq_vaddress);
		if (ret) {
3280 3281
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : be_fill_queue Failed for EQ\n");
3282 3283
			goto create_eq_error;
		}
3284

3285 3286 3287 3288
		mem->dma = paddr;
		ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
					    phwi_context->cur_eqd);
		if (ret) {
3289 3290 3291
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : beiscsi_cmd_eq_create"
				    "Failed for EQ\n");
3292 3293
			goto create_eq_error;
		}
3294 3295 3296 3297

		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
			    "BM_%d : eqid = %d\n",
			    phwi_context->be_eq[i].q.id);
3298 3299
	}
	return 0;
3300
create_eq_error:
3301
	for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3302 3303 3304 3305 3306 3307 3308 3309
		eq = &phwi_context->be_eq[i].q;
		mem = &eq->dma_mem;
		if (mem->va)
			pci_free_consistent(phba->pcidev, num_eq_pages
					    * PAGE_SIZE,
					    mem->va, mem->dma);
	}
	return ret;
3310 3311
}

3312
static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3313 3314
			     struct hwi_context_memory *phwi_context)
{
3315
	unsigned int i, num_cq_pages;
3316
	int ret = 0;
3317 3318
	struct be_queue_info *cq, *eq;
	struct be_dma_mem *mem;
3319
	struct be_eq_obj *pbe_eq;
3320
	void *cq_vaddress;
3321
	dma_addr_t paddr;
3322

3323 3324
	num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
				      sizeof(struct sol_cqe));
3325

3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337
	for (i = 0; i < phba->num_cpus; i++) {
		cq = &phwi_context->be_cq[i];
		eq = &phwi_context->be_eq[i].q;
		pbe_eq = &phwi_context->be_eq[i];
		pbe_eq->cq = cq;
		pbe_eq->phba = phba;
		mem = &cq->dma_mem;
		cq_vaddress = pci_alloc_consistent(phba->pcidev,
						     num_cq_pages * PAGE_SIZE,
						     &paddr);
		if (!cq_vaddress)
			goto create_cq_error;
3338
		ret = be_fill_queue(cq, phba->params.num_cq_entries,
3339 3340
				    sizeof(struct sol_cqe), cq_vaddress);
		if (ret) {
3341 3342 3343
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : be_fill_queue Failed "
				    "for ISCSI CQ\n");
3344 3345 3346 3347 3348 3349 3350
			goto create_cq_error;
		}

		mem->dma = paddr;
		ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
					    false, 0);
		if (ret) {
3351 3352 3353
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : beiscsi_cmd_eq_create"
				    "Failed for ISCSI CQ\n");
3354 3355
			goto create_cq_error;
		}
3356 3357 3358
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
			    "BM_%d : iscsi cq_id is %d for eq_id %d\n"
			    "iSCSI CQ CREATED\n", cq->id, eq->id);
3359 3360
	}
	return 0;
3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372

create_cq_error:
	for (i = 0; i < phba->num_cpus; i++) {
		cq = &phwi_context->be_cq[i];
		mem = &cq->dma_mem;
		if (mem->va)
			pci_free_consistent(phba->pcidev, num_cq_pages
					    * PAGE_SIZE,
					    mem->va, mem->dma);
	}
	return ret;

3373 3374 3375 3376 3377 3378
}

static int
beiscsi_create_def_hdr(struct beiscsi_hba *phba,
		       struct hwi_context_memory *phwi_context,
		       struct hwi_controller *phwi_ctrlr,
3379
		       unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3380 3381 3382 3383 3384 3385 3386 3387 3388
{
	unsigned int idx;
	int ret;
	struct be_queue_info *dq, *cq;
	struct be_dma_mem *mem;
	struct be_mem_descriptor *mem_descr;
	void *dq_vaddress;

	idx = 0;
3389
	dq = &phwi_context->be_def_hdrq[ulp_num];
3390
	cq = &phwi_context->be_cq[0];
3391 3392
	mem = &dq->dma_mem;
	mem_descr = phba->init_mem;
3393 3394
	mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
		    (ulp_num * MEM_DESCR_OFFSET);
3395 3396 3397 3398 3399
	dq_vaddress = mem_descr->mem_array[idx].virtual_address;
	ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
			    sizeof(struct phys_addr),
			    sizeof(struct phys_addr), dq_vaddress);
	if (ret) {
3400
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3401 3402 3403
			    "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
			    ulp_num);

3404 3405
		return ret;
	}
3406 3407
	mem->dma = (unsigned long)mem_descr->mem_array[idx].
				  bus_address.u.a64.address;
3408 3409
	ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
					      def_pdu_ring_sz,
3410 3411
					      phba->params.defpdu_hdr_sz,
					      BEISCSI_DEFQ_HDR, ulp_num);
3412
	if (ret) {
3413
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3414 3415 3416
			    "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
			    ulp_num);

3417 3418
		return ret;
	}
3419

3420 3421 3422 3423 3424
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
		    ulp_num,
		    phwi_context->be_def_hdrq[ulp_num].id);
	hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR, ulp_num);
3425 3426 3427 3428 3429 3430 3431
	return 0;
}

static int
beiscsi_create_def_data(struct beiscsi_hba *phba,
			struct hwi_context_memory *phwi_context,
			struct hwi_controller *phwi_ctrlr,
3432
			unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3433 3434 3435 3436 3437 3438 3439 3440 3441
{
	unsigned int idx;
	int ret;
	struct be_queue_info *dataq, *cq;
	struct be_dma_mem *mem;
	struct be_mem_descriptor *mem_descr;
	void *dq_vaddress;

	idx = 0;
3442
	dataq = &phwi_context->be_def_dataq[ulp_num];
3443
	cq = &phwi_context->be_cq[0];
3444 3445
	mem = &dataq->dma_mem;
	mem_descr = phba->init_mem;
3446 3447
	mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
		    (ulp_num * MEM_DESCR_OFFSET);
3448 3449 3450 3451 3452
	dq_vaddress = mem_descr->mem_array[idx].virtual_address;
	ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
			    sizeof(struct phys_addr),
			    sizeof(struct phys_addr), dq_vaddress);
	if (ret) {
3453
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3454 3455 3456 3457
			    "BM_%d : be_fill_queue Failed for DEF PDU "
			    "DATA on ULP : %d\n",
			    ulp_num);

3458 3459
		return ret;
	}
3460 3461
	mem->dma = (unsigned long)mem_descr->mem_array[idx].
				  bus_address.u.a64.address;
3462 3463
	ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
					      def_pdu_ring_sz,
3464 3465
					      phba->params.defpdu_data_sz,
					      BEISCSI_DEFQ_DATA, ulp_num);
3466
	if (ret) {
3467 3468
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d be_cmd_create_default_pdu_queue"
3469 3470
			    " Failed for DEF PDU DATA on ULP : %d\n",
			    ulp_num);
3471 3472
		return ret;
	}
3473

3474
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3475 3476 3477
		    "BM_%d : iscsi def data id on ULP : %d is  %d\n",
		    ulp_num,
		    phwi_context->be_def_dataq[ulp_num].id);
3478

3479
	hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA, ulp_num);
3480
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3481 3482
		    "BM_%d : DEFAULT PDU DATA RING CREATED"
		    "on ULP : %d\n", ulp_num);
3483

3484 3485 3486
	return 0;
}

3487 3488 3489 3490 3491 3492 3493

static int
beiscsi_post_template_hdr(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr;
	struct mem_array *pm_arr;
	struct be_dma_mem sgl;
3494
	int status, ulp_num;
3495

3496 3497 3498 3499 3500 3501
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
				    (ulp_num * MEM_DESCR_OFFSET);
			pm_arr = mem_descr->mem_array;
3502

3503 3504 3505
			hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
			status = be_cmd_iscsi_post_template_hdr(
				 &phba->ctrl, &sgl);
3506

3507 3508 3509 3510 3511 3512 3513 3514 3515 3516
			if (status != 0) {
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : Post Template HDR Failed for"
					    "ULP_%d\n", ulp_num);
				return status;
			}

			beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
				    "BM_%d : Template HDR Pages Posted for"
				    "ULP_%d\n", ulp_num);
3517 3518 3519 3520 3521
		}
	}
	return 0;
}

3522 3523 3524 3525 3526 3527 3528
static int
beiscsi_post_pages(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr;
	struct mem_array *pm_arr;
	unsigned int page_offset, i;
	struct be_dma_mem sgl;
3529
	int status, ulp_num = 0;
3530 3531 3532 3533 3534

	mem_descr = phba->init_mem;
	mem_descr += HWI_MEM_SGE;
	pm_arr = mem_descr->mem_array;

3535 3536 3537 3538
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
			break;

3539
	page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3540
			phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3541 3542 3543 3544 3545 3546 3547
	for (i = 0; i < mem_descr->num_elements; i++) {
		hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
		status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
						page_offset,
						(pm_arr->size / PAGE_SIZE));
		page_offset += pm_arr->size / PAGE_SIZE;
		if (status != 0) {
3548 3549
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : post sgl failed.\n");
3550 3551 3552 3553
			return status;
		}
		pm_arr++;
	}
3554 3555
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : POSTED PAGES\n");
3556 3557 3558
	return 0;
}

3559 3560 3561
static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
{
	struct be_dma_mem *mem = &q->dma_mem;
3562
	if (mem->va) {
3563 3564
		pci_free_consistent(phba->pcidev, mem->size,
			mem->va, mem->dma);
3565 3566
		mem->va = NULL;
	}
3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577
}

static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
		u16 len, u16 entry_size)
{
	struct be_dma_mem *mem = &q->dma_mem;

	memset(q, 0, sizeof(*q));
	q->len = len;
	q->entry_size = entry_size;
	mem->size = len * entry_size;
J
Joe Perches 已提交
3578
	mem->va = pci_zalloc_consistent(phba->pcidev, mem->size, &mem->dma);
3579
	if (!mem->va)
3580
		return -ENOMEM;
3581 3582 3583
	return 0;
}

3584 3585 3586 3587 3588 3589 3590
static int
beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
			 struct hwi_context_memory *phwi_context,
			 struct hwi_controller *phwi_ctrlr)
{
	unsigned int wrb_mem_index, offset, size, num_wrb_rings;
	u64 pa_addr_lo;
3591
	unsigned int idx, num, i, ulp_num;
3592 3593 3594 3595
	struct mem_array *pwrb_arr;
	void *wrb_vaddr;
	struct be_dma_mem sgl;
	struct be_mem_descriptor *mem_descr;
3596
	struct hwi_wrb_context *pwrb_context;
3597
	int status;
3598 3599
	uint8_t ulp_count = 0, ulp_base_num = 0;
	uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
3600 3601 3602 3603 3604 3605 3606

	idx = 0;
	mem_descr = phba->init_mem;
	mem_descr += HWI_MEM_WRB;
	pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
			   GFP_KERNEL);
	if (!pwrb_arr) {
3607 3608
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Memory alloc failed in create wrb ring.\n");
3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642
		return -ENOMEM;
	}
	wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
	pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
	num_wrb_rings = mem_descr->mem_array[idx].size /
		(phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));

	for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
		if (num_wrb_rings) {
			pwrb_arr[num].virtual_address = wrb_vaddr;
			pwrb_arr[num].bus_address.u.a64.address	= pa_addr_lo;
			pwrb_arr[num].size = phba->params.wrbs_per_cxn *
					    sizeof(struct iscsi_wrb);
			wrb_vaddr += pwrb_arr[num].size;
			pa_addr_lo += pwrb_arr[num].size;
			num_wrb_rings--;
		} else {
			idx++;
			wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
			pa_addr_lo = mem_descr->mem_array[idx].\
					bus_address.u.a64.address;
			num_wrb_rings = mem_descr->mem_array[idx].size /
					(phba->params.wrbs_per_cxn *
					sizeof(struct iscsi_wrb));
			pwrb_arr[num].virtual_address = wrb_vaddr;
			pwrb_arr[num].bus_address.u.a64.address\
						= pa_addr_lo;
			pwrb_arr[num].size = phba->params.wrbs_per_cxn *
						 sizeof(struct iscsi_wrb);
			wrb_vaddr += pwrb_arr[num].size;
			pa_addr_lo   += pwrb_arr[num].size;
			num_wrb_rings--;
		}
	}
3643 3644 3645 3646 3647 3648 3649 3650 3651 3652

	/* Get the ULP Count */
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
			ulp_count++;
			ulp_base_num = ulp_num;
			cid_count_ulp[ulp_num] =
				BEISCSI_GET_CID_COUNT(phba, ulp_num);
		}

3653 3654 3655 3656 3657
	for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
		wrb_mem_index = 0;
		offset = 0;
		size = 0;

3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668
		if (ulp_count > 1) {
			ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;

			if (!cid_count_ulp[ulp_base_num])
				ulp_base_num = (ulp_base_num + 1) %
						BEISCSI_ULP_COUNT;

			cid_count_ulp[ulp_base_num]--;
		}


3669 3670
		hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
		status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3671 3672 3673
					    &phwi_context->be_wrbq[i],
					    &phwi_ctrlr->wrb_context[i],
					    ulp_base_num);
3674
		if (status != 0) {
3675 3676
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : wrbq create failed.");
3677
			kfree(pwrb_arr);
3678 3679
			return status;
		}
3680 3681
		pwrb_context = &phwi_ctrlr->wrb_context[i];
		BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3682 3683 3684 3685 3686 3687 3688 3689 3690 3691 3692 3693
	}
	kfree(pwrb_arr);
	return 0;
}

static void free_wrb_handles(struct beiscsi_hba *phba)
{
	unsigned int index;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_wrb_context *pwrb_context;

	phwi_ctrlr = phba->phwi_ctrlr;
3694
	for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3695 3696 3697 3698 3699 3700
		pwrb_context = &phwi_ctrlr->wrb_context[index];
		kfree(pwrb_context->pwrb_handle_base);
		kfree(pwrb_context->pwrb_handle_basestd);
	}
}

3701 3702 3703 3704 3705 3706
static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
{
	struct be_queue_info *q;
	struct be_ctrl_info *ctrl = &phba->ctrl;

	q = &phba->ctrl.mcc_obj.q;
3707
	if (q->created) {
3708
		beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3709 3710
		be_queue_free(phba, q);
	}
3711 3712

	q = &phba->ctrl.mcc_obj.cq;
3713
	if (q->created) {
3714
		beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3715 3716
		be_queue_free(phba, q);
	}
3717 3718
}

3719 3720 3721 3722 3723 3724
static void hwi_cleanup(struct beiscsi_hba *phba)
{
	struct be_queue_info *q;
	struct be_ctrl_info *ctrl = &phba->ctrl;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
3725
	struct hwi_async_pdu_context *pasync_ctx;
3726
	int i, eq_for_mcc, ulp_num;
3727 3728 3729

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
3730 3731 3732

	be_cmd_iscsi_remove_template_hdr(ctrl);

3733 3734 3735 3736 3737
	for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
		q = &phwi_context->be_wrbq[i];
		if (q->created)
			beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
	}
3738
	kfree(phwi_context->be_wrbq);
3739 3740
	free_wrb_handles(phba);

3741 3742
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3743

3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754
			q = &phwi_context->be_def_hdrq[ulp_num];
			if (q->created)
				beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);

			q = &phwi_context->be_def_dataq[ulp_num];
			if (q->created)
				beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);

			pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
		}
	}
3755 3756 3757

	beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);

3758 3759
	for (i = 0; i < (phba->num_cpus); i++) {
		q = &phwi_context->be_cq[i];
3760 3761
		if (q->created) {
			be_queue_free(phba, q);
3762
			beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3763
		}
3764
	}
3765 3766

	be_mcc_queues_destroy(phba);
3767
	if (phba->msix_enabled)
3768
		eq_for_mcc = 1;
3769
	else
3770 3771
		eq_for_mcc = 0;
	for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3772
		q = &phwi_context->be_eq[i].q;
3773 3774
		if (q->created) {
			be_queue_free(phba, q);
3775
			beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3776
		}
3777
	}
3778
	be_cmd_fw_uninit(ctrl);
3779
}
3780

3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808
static int be_mcc_queues_create(struct beiscsi_hba *phba,
				struct hwi_context_memory *phwi_context)
{
	struct be_queue_info *q, *cq;
	struct be_ctrl_info *ctrl = &phba->ctrl;

	/* Alloc MCC compl queue */
	cq = &phba->ctrl.mcc_obj.cq;
	if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
			sizeof(struct be_mcc_compl)))
		goto err;
	/* Ask BE to create MCC compl queue; */
	if (phba->msix_enabled) {
		if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
					 [phba->num_cpus].q, false, true, 0))
		goto mcc_cq_free;
	} else {
		if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
					  false, true, 0))
		goto mcc_cq_free;
	}

	/* Alloc MCC queue */
	q = &phba->ctrl.mcc_obj.q;
	if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
		goto mcc_cq_destroy;

	/* Ask BE to create MCC queue */
3809
	if (beiscsi_cmd_mccq_create(phba, q, cq))
3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820
		goto mcc_q_free;

	return 0;

mcc_q_free:
	be_queue_free(phba, q);
mcc_cq_destroy:
	beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
mcc_cq_free:
	be_queue_free(phba, cq);
err:
3821
	return -ENOMEM;
3822 3823
}

3824 3825 3826 3827 3828 3829 3830
/**
 * find_num_cpus()- Get the CPU online count
 * @phba: ptr to priv structure
 *
 * CPU count is used for creating EQ.
 **/
static void find_num_cpus(struct beiscsi_hba *phba)
3831 3832 3833 3834 3835
{
	int  num_cpus = 0;

	num_cpus = num_online_cpus();

3836 3837 3838 3839 3840 3841 3842
	switch (phba->generation) {
	case BE_GEN2:
	case BE_GEN3:
		phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
				  BEISCSI_MAX_NUM_CPUS : num_cpus;
		break;
	case BE_GEN4:
3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855
		/*
		 * If eqid_count == 1 fall back to
		 * INTX mechanism
		 **/
		if (phba->fw_config.eqid_count == 1) {
			enable_msix = 0;
			phba->num_cpus = 1;
			return;
		}

		phba->num_cpus =
			(num_cpus > (phba->fw_config.eqid_count - 1)) ?
			(phba->fw_config.eqid_count - 1) : num_cpus;
3856 3857 3858 3859
		break;
	default:
		phba->num_cpus = 1;
	}
3860 3861 3862 3863 3864 3865 3866 3867
}

static int hwi_init_port(struct beiscsi_hba *phba)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	unsigned int def_pdu_ring_sz;
	struct be_ctrl_info *ctrl = &phba->ctrl;
3868
	int status, ulp_num;
3869 3870 3871

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
3872
	phwi_context->max_eqd = 128;
3873
	phwi_context->min_eqd = 0;
3874
	phwi_context->cur_eqd = 0;
3875
	be_cmd_fw_initialize(&phba->ctrl);
3876 3877
	/* set optic state to unknown */
	phba->optic_state = 0xff;
3878 3879

	status = beiscsi_create_eqs(phba, phwi_context);
3880
	if (status != 0) {
3881 3882
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : EQ not created\n");
3883 3884 3885
		goto error;
	}

3886 3887 3888 3889 3890
	status = be_mcc_queues_create(phba, phwi_context);
	if (status != 0)
		goto error;

	status = mgmt_check_supported_fw(ctrl, phba);
3891
	if (status != 0) {
3892 3893
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Unsupported fw version\n");
3894 3895 3896
		goto error;
	}

3897
	status = beiscsi_create_cqs(phba, phwi_context);
3898
	if (status != 0) {
3899 3900
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : CQ not created\n");
3901 3902 3903
		goto error;
	}

3904 3905
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3906

3907 3908 3909 3910 3911 3912 3913 3914 3915 3916 3917 3918 3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930 3931 3932
			def_pdu_ring_sz =
				BEISCSI_GET_CID_COUNT(phba, ulp_num) *
				sizeof(struct phys_addr);

			status = beiscsi_create_def_hdr(phba, phwi_context,
							phwi_ctrlr,
							def_pdu_ring_sz,
							ulp_num);
			if (status != 0) {
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : Default Header not created for ULP : %d\n",
					    ulp_num);
				goto error;
			}

			status = beiscsi_create_def_data(phba, phwi_context,
							 phwi_ctrlr,
							 def_pdu_ring_sz,
							 ulp_num);
			if (status != 0) {
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : Default Data not created for ULP : %d\n",
					    ulp_num);
				goto error;
			}
		}
3933 3934 3935 3936
	}

	status = beiscsi_post_pages(phba);
	if (status != 0) {
3937 3938
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Post SGL Pages Failed\n");
3939 3940 3941
		goto error;
	}

3942 3943 3944 3945 3946 3947
	status = beiscsi_post_template_hdr(phba);
	if (status != 0) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Template HDR Posting for CXN Failed\n");
	}

3948 3949
	status = beiscsi_create_wrb_rings(phba,	phwi_context, phwi_ctrlr);
	if (status != 0) {
3950 3951
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : WRB Rings not created\n");
3952 3953 3954
		goto error;
	}

3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		uint16_t async_arr_idx = 0;

		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
			uint16_t cri = 0;
			struct hwi_async_pdu_context *pasync_ctx;

			pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
				     phwi_ctrlr, ulp_num);
			for (cri = 0; cri <
			     phba->params.cxns_per_ctrl; cri++) {
				if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
					       (phwi_ctrlr, cri))
					pasync_ctx->cid_to_async_cri_map[
					phwi_ctrlr->wrb_context[cri].cid] =
					async_arr_idx++;
			}
		}
	}

3975 3976
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : hwi_init_port success\n");
3977 3978 3979
	return 0;

error:
3980 3981
	beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
		    "BM_%d : hwi_init_port failed");
3982
	hwi_cleanup(phba);
3983
	return status;
3984 3985 3986 3987 3988 3989 3990 3991 3992 3993
}

static int hwi_init_controller(struct beiscsi_hba *phba)
{
	struct hwi_controller *phwi_ctrlr;

	phwi_ctrlr = phba->phwi_ctrlr;
	if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
		phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
		    init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3994 3995 3996
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
			    "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
			    phwi_ctrlr->phwi_ctxt);
3997
	} else {
3998 3999 4000
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
			    "than one element.Failing to load\n");
4001 4002 4003 4004
		return -ENOMEM;
	}

	iscsi_init_global_templates(phba);
4005 4006 4007
	if (beiscsi_init_wrb_handle(phba))
		return -ENOMEM;

4008 4009 4010 4011 4012 4013
	if (hwi_init_async_pdu_ctx(phba)) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : hwi_init_async_pdu_ctx failed\n");
		return -ENOMEM;
	}

4014
	if (hwi_init_port(phba) != 0) {
4015 4016 4017
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : hwi_init_controller failed\n");

4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033 4034 4035
		return -ENOMEM;
	}
	return 0;
}

static void beiscsi_free_mem(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr;
	int i, j;

	mem_descr = phba->init_mem;
	i = 0;
	j = 0;
	for (i = 0; i < SE_MEM_MAX; i++) {
		for (j = mem_descr->num_elements; j > 0; j--) {
			pci_free_consistent(phba->pcidev,
			  mem_descr->mem_array[j - 1].size,
			  mem_descr->mem_array[j - 1].virtual_address,
4036 4037
			  (unsigned long)mem_descr->mem_array[j - 1].
			  bus_address.u.a64.address);
4038
		}
4039

4040 4041 4042 4043
		kfree(mem_descr->mem_array);
		mem_descr++;
	}
	kfree(phba->init_mem);
4044
	kfree(phba->phwi_ctrlr->wrb_context);
4045 4046 4047 4048 4049 4050 4051 4052 4053
	kfree(phba->phwi_ctrlr);
}

static int beiscsi_init_controller(struct beiscsi_hba *phba)
{
	int ret = -ENOMEM;

	ret = beiscsi_get_memory(phba);
	if (ret < 0) {
4054 4055 4056
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe -"
			    "Failed in beiscsi_alloc_memory\n");
4057 4058 4059 4060 4061 4062
		return ret;
	}

	ret = hwi_init_controller(phba);
	if (ret)
		goto free_init;
4063 4064 4065
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : Return success from beiscsi_init_controller");

4066 4067 4068 4069
	return 0;

free_init:
	beiscsi_free_mem(phba);
4070
	return ret;
4071 4072 4073 4074 4075 4076 4077
}

static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
	struct sgl_handle *psgl_handle;
	struct iscsi_sge *pfrag;
4078 4079
	unsigned int arr_index, i, idx;
	unsigned int ulp_icd_start, ulp_num = 0;
4080 4081 4082

	phba->io_sgl_hndl_avbl = 0;
	phba->eh_sgl_hndl_avbl = 0;
4083

4084 4085 4086 4087 4088 4089 4090
	mem_descr_sglh = phba->init_mem;
	mem_descr_sglh += HWI_MEM_SGLH;
	if (1 == mem_descr_sglh->num_elements) {
		phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
						 phba->params.ios_per_ctrl,
						 GFP_KERNEL);
		if (!phba->io_sgl_hndl_base) {
4091 4092
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : Mem Alloc Failed. Failing to load\n");
4093 4094 4095 4096 4097 4098 4099 4100
			return -ENOMEM;
		}
		phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
						 (phba->params.icds_per_ctrl -
						 phba->params.ios_per_ctrl),
						 GFP_KERNEL);
		if (!phba->eh_sgl_hndl_base) {
			kfree(phba->io_sgl_hndl_base);
4101 4102
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : Mem Alloc Failed. Failing to load\n");
4103 4104 4105
			return -ENOMEM;
		}
	} else {
4106 4107 4108
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : HWI_MEM_SGLH is more than one element."
			    "Failing to load\n");
4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127 4128 4129 4130 4131 4132 4133
		return -ENOMEM;
	}

	arr_index = 0;
	idx = 0;
	while (idx < mem_descr_sglh->num_elements) {
		psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;

		for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
		      sizeof(struct sgl_handle)); i++) {
			if (arr_index < phba->params.ios_per_ctrl) {
				phba->io_sgl_hndl_base[arr_index] = psgl_handle;
				phba->io_sgl_hndl_avbl++;
				arr_index++;
			} else {
				phba->eh_sgl_hndl_base[arr_index -
					phba->params.ios_per_ctrl] =
								psgl_handle;
				arr_index++;
				phba->eh_sgl_hndl_avbl++;
			}
			psgl_handle++;
		}
		idx++;
	}
4134 4135 4136 4137 4138 4139
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : phba->io_sgl_hndl_avbl=%d"
		    "phba->eh_sgl_hndl_avbl=%d\n",
		    phba->io_sgl_hndl_avbl,
		    phba->eh_sgl_hndl_avbl);

4140 4141
	mem_descr_sg = phba->init_mem;
	mem_descr_sg += HWI_MEM_SGE;
4142 4143 4144 4145
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "\n BM_%d : mem_descr_sg->num_elements=%d\n",
		    mem_descr_sg->num_elements);

4146 4147 4148 4149 4150 4151
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
			break;

	ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];

4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169
	arr_index = 0;
	idx = 0;
	while (idx < mem_descr_sg->num_elements) {
		pfrag = mem_descr_sg->mem_array[idx].virtual_address;

		for (i = 0;
		     i < (mem_descr_sg->mem_array[idx].size) /
		     (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
		     i++) {
			if (arr_index < phba->params.ios_per_ctrl)
				psgl_handle = phba->io_sgl_hndl_base[arr_index];
			else
				psgl_handle = phba->eh_sgl_hndl_base[arr_index -
						phba->params.ios_per_ctrl];
			psgl_handle->pfrag = pfrag;
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
			pfrag += phba->params.num_sge_per_io;
4170
			psgl_handle->sgl_index = ulp_icd_start + arr_index++;
4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182
		}
		idx++;
	}
	phba->io_sgl_free_index = 0;
	phba->io_sgl_alloc_index = 0;
	phba->eh_sgl_free_index = 0;
	phba->eh_sgl_alloc_index = 0;
	return 0;
}

static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
{
4183 4184 4185
	int ret;
	uint16_t i, ulp_num;
	struct ulp_cid_info *ptr_cid_info = NULL;
4186

4187 4188 4189 4190 4191 4192 4193 4194 4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208 4209 4210 4211 4212 4213 4214 4215 4216 4217 4218 4219 4220 4221 4222
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
			ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
					       GFP_KERNEL);

			if (!ptr_cid_info) {
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : Failed to allocate memory"
					    "for ULP_CID_INFO for ULP : %d\n",
					    ulp_num);
				ret = -ENOMEM;
				goto free_memory;

			}

			/* Allocate memory for CID array */
			ptr_cid_info->cid_array = kzalloc(sizeof(void *) *
						  BEISCSI_GET_CID_COUNT(phba,
						  ulp_num), GFP_KERNEL);
			if (!ptr_cid_info->cid_array) {
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : Failed to allocate memory"
					    "for CID_ARRAY for ULP : %d\n",
					    ulp_num);
				kfree(ptr_cid_info);
				ptr_cid_info = NULL;
				ret = -ENOMEM;

				goto free_memory;
			}
			ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
						   phba, ulp_num);

			/* Save the cid_info_array ptr */
			phba->cid_array_info[ulp_num] = ptr_cid_info;
		}
4223
	}
4224
	phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
4225
				 phba->params.cxns_per_ctrl, GFP_KERNEL);
4226
	if (!phba->ep_array) {
4227 4228 4229
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Failed to allocate memory in "
			    "hba_setup_cid_tbls\n");
4230 4231 4232
		ret = -ENOMEM;

		goto free_memory;
4233
	}
4234 4235 4236 4237 4238 4239 4240 4241 4242 4243

	phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
				   phba->params.cxns_per_ctrl, GFP_KERNEL);
	if (!phba->conn_table) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Failed to allocate memory in"
			    "hba_setup_cid_tbls\n");

		kfree(phba->ep_array);
		phba->ep_array = NULL;
4244
		ret = -ENOMEM;
4245 4246

		goto free_memory;
4247
	}
4248

4249 4250 4251 4252 4253 4254 4255 4256 4257 4258 4259 4260
	for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
		ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;

		ptr_cid_info = phba->cid_array_info[ulp_num];
		ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
			phba->phwi_ctrlr->wrb_context[i].cid;

	}

	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
			ptr_cid_info = phba->cid_array_info[ulp_num];
4261

4262 4263 4264 4265
			ptr_cid_info->cid_alloc = 0;
			ptr_cid_info->cid_free = 0;
		}
	}
4266
	return 0;
4267 4268 4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281

free_memory:
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
			ptr_cid_info = phba->cid_array_info[ulp_num];

			if (ptr_cid_info) {
				kfree(ptr_cid_info->cid_array);
				kfree(ptr_cid_info);
				phba->cid_array_info[ulp_num] = NULL;
			}
		}
	}

	return ret;
4282 4283
}

4284
static void hwi_enable_intr(struct beiscsi_hba *phba)
4285 4286 4287 4288 4289 4290
{
	struct be_ctrl_info *ctrl = &phba->ctrl;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_queue_info *eq;
	u8 __iomem *addr;
4291
	u32 reg, i;
4292 4293 4294 4295 4296 4297 4298 4299 4300 4301 4302 4303
	u32 enabled;

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;

	addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
			PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
	reg = ioread32(addr);

	enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
	if (!enabled) {
		reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4304 4305
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
			    "BM_%d : reg =x%08x addr=%p\n", reg, addr);
4306
		iowrite32(reg, addr);
4307 4308 4309 4310
	}

	if (!phba->msix_enabled) {
		eq = &phwi_context->be_eq[0].q;
4311 4312 4313
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
			    "BM_%d : eq->id=%d\n", eq->id);

4314 4315 4316 4317
		hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
	} else {
		for (i = 0; i <= phba->num_cpus; i++) {
			eq = &phwi_context->be_eq[i].q;
4318 4319
			beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
				    "BM_%d : eq->id=%d\n", eq->id);
4320 4321
			hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
		}
4322
	}
4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336
}

static void hwi_disable_intr(struct beiscsi_hba *phba)
{
	struct be_ctrl_info *ctrl = &phba->ctrl;

	u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
	u32 reg = ioread32(addr);

	u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
	if (enabled) {
		reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
		iowrite32(reg, addr);
	} else
4337 4338
		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
			    "BM_%d : In hwi_disable_intr, Already Disabled\n");
4339 4340
}

4341 4342 4343 4344 4345 4346 4347 4348 4349 4350
/**
 * beiscsi_get_boot_info()- Get the boot session info
 * @phba: The device priv structure instance
 *
 * Get the boot target info and store in driver priv structure
 *
 * return values
 *	Success: 0
 *	Failure: Non-Zero Value
 **/
4351 4352
static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
{
4353
	struct be_cmd_get_session_resp *session_resp;
4354
	struct be_dma_mem nonemb_cmd;
4355
	unsigned int tag;
4356
	unsigned int s_handle;
4357
	int ret = -ENOMEM;
4358

4359 4360 4361
	/* Get the session handle of the boot target */
	ret = be_mgmt_get_boot_shandle(phba, &s_handle);
	if (ret) {
4362 4363 4364
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
			    "BM_%d : No boot session\n");
4365 4366 4367 4368 4369

		if (ret == -ENXIO)
			phba->get_boot = 0;


4370
		return ret;
4371
	}
4372
	phba->get_boot = 0;
J
Joe Perches 已提交
4373 4374 4375
	nonemb_cmd.va = pci_zalloc_consistent(phba->ctrl.pdev,
					      sizeof(*session_resp),
					      &nonemb_cmd.dma);
4376
	if (nonemb_cmd.va == NULL) {
4377 4378 4379 4380 4381
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
			    "BM_%d : Failed to allocate memory for"
			    "beiscsi_get_session_info\n");

4382 4383 4384
		return -ENOMEM;
	}

4385
	tag = mgmt_get_session_info(phba, s_handle,
4386
				    &nonemb_cmd);
4387
	if (!tag) {
4388 4389 4390 4391 4392
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
			    "BM_%d : beiscsi_get_session_info"
			    " Failed\n");

4393
		goto boot_freemem;
4394
	}
4395

4396
	ret = beiscsi_mccq_compl_wait(phba, tag, NULL, &nonemb_cmd);
4397
	if (ret) {
4398 4399
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4400
			    "BM_%d : beiscsi_get_session_info Failed");
4401 4402 4403 4404 4405

		if (ret != -EBUSY)
			goto boot_freemem;
		else
			return ret;
4406
	}
4407

4408
	session_resp = nonemb_cmd.va ;
4409

4410 4411
	memcpy(&phba->boot_sess, &session_resp->session_info,
	       sizeof(struct mgmt_session_info));
4412 4413 4414

	 beiscsi_logout_fw_sess(phba,
				phba->boot_sess.session_handle);
4415 4416
	ret = 0;

4417 4418 4419
boot_freemem:
	pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
		    nonemb_cmd.va, nonemb_cmd.dma);
4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433
	return ret;
}

static void beiscsi_boot_release(void *data)
{
	struct beiscsi_hba *phba = data;

	scsi_host_put(phba->shost);
}

static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
{
	struct iscsi_boot_kobj *boot_kobj;

4434 4435 4436 4437
	/* it has been created previously */
	if (phba->boot_kset)
		return 0;

4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479
	/* get boot info using mgmt cmd */
	if (beiscsi_get_boot_info(phba))
		/* Try to see if we can carry on without this */
		return 0;

	phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
	if (!phba->boot_kset)
		return -ENOMEM;

	/* get a ref because the show function will ref the phba */
	if (!scsi_host_get(phba->shost))
		goto free_kset;
	boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
					     beiscsi_show_boot_tgt_info,
					     beiscsi_tgt_get_attr_visibility,
					     beiscsi_boot_release);
	if (!boot_kobj)
		goto put_shost;

	if (!scsi_host_get(phba->shost))
		goto free_kset;
	boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
						beiscsi_show_boot_ini_info,
						beiscsi_ini_get_attr_visibility,
						beiscsi_boot_release);
	if (!boot_kobj)
		goto put_shost;

	if (!scsi_host_get(phba->shost))
		goto free_kset;
	boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
					       beiscsi_show_boot_eth_info,
					       beiscsi_eth_get_attr_visibility,
					       beiscsi_boot_release);
	if (!boot_kobj)
		goto put_shost;
	return 0;

put_shost:
	scsi_host_put(phba->shost);
free_kset:
	iscsi_boot_destroy_kset(phba->boot_kset);
4480 4481 4482
	return -ENOMEM;
}

4483 4484 4485 4486 4487 4488
static int beiscsi_init_port(struct beiscsi_hba *phba)
{
	int ret;

	ret = beiscsi_init_controller(phba);
	if (ret < 0) {
4489 4490 4491
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe - Failed in"
			    "beiscsi_init_controller\n");
4492 4493 4494 4495
		return ret;
	}
	ret = beiscsi_init_sgl_handle(phba);
	if (ret < 0) {
4496 4497 4498
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe - Failed in"
			    "beiscsi_init_sgl_handle\n");
4499 4500 4501 4502
		goto do_cleanup_ctrlr;
	}

	if (hba_setup_cid_tbls(phba)) {
4503 4504
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Failed in hba_setup_cid_tbls\n");
4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522
		kfree(phba->io_sgl_hndl_base);
		kfree(phba->eh_sgl_hndl_base);
		goto do_cleanup_ctrlr;
	}

	return ret;

do_cleanup_ctrlr:
	hwi_cleanup(phba);
	return ret;
}

static void hwi_purge_eq(struct beiscsi_hba *phba)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_queue_info *eq;
	struct be_eq_entry *eqe = NULL;
4523
	int i, eq_msix;
4524
	unsigned int num_processed;
4525 4526 4527

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
4528 4529 4530 4531
	if (phba->msix_enabled)
		eq_msix = 1;
	else
		eq_msix = 0;
4532

4533 4534
	for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
		eq = &phwi_context->be_eq[i].q;
4535
		eqe = queue_tail_node(eq);
4536
		num_processed = 0;
4537 4538 4539 4540 4541
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
					& EQE_VALID_MASK) {
			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
4542
			num_processed++;
4543
		}
4544 4545 4546

		if (num_processed)
			hwi_ring_eq_db(phba, eq->id, 1,	num_processed, 1, 1);
4547 4548 4549 4550 4551
	}
}

static void beiscsi_clean_port(struct beiscsi_hba *phba)
{
4552 4553
	int mgmt_status, ulp_num;
	struct ulp_cid_info *ptr_cid_info = NULL;
4554

4555 4556 4557 4558 4559 4560 4561 4562 4563 4564
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
			mgmt_status = mgmt_epfw_cleanup(phba, ulp_num);
			if (mgmt_status)
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : mgmt_epfw_cleanup FAILED"
					    " for ULP_%d\n", ulp_num);
		}
	}
4565

4566
	hwi_purge_eq(phba);
4567
	hwi_cleanup(phba);
4568 4569 4570
	kfree(phba->io_sgl_hndl_base);
	kfree(phba->eh_sgl_hndl_base);
	kfree(phba->ep_array);
4571
	kfree(phba->conn_table);
4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584

	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
			ptr_cid_info = phba->cid_array_info[ulp_num];

			if (ptr_cid_info) {
				kfree(ptr_cid_info->cid_array);
				kfree(ptr_cid_info);
				phba->cid_array_info[ulp_num] = NULL;
			}
		}
	}

4585 4586
}

4587 4588 4589
/**
 * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
 * @beiscsi_conn: ptr to the conn to be cleaned up
4590
 * @task: ptr to iscsi_task resource to be freed.
4591 4592 4593 4594
 *
 * Free driver mgmt resources binded to CXN.
 **/
void
4595 4596
beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
				struct iscsi_task *task)
4597 4598 4599 4600 4601
{
	struct beiscsi_io_task *io_task;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;
4602 4603
	uint16_t cri_index = BE_GET_CRI_FROM_CID(
				beiscsi_conn->beiscsi_conn_cid);
4604 4605

	phwi_ctrlr = phba->phwi_ctrlr;
4606 4607
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];

4608
	io_task = task->dd_data;
4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622

	if (io_task->pwrb_handle) {
		memset(io_task->pwrb_handle->pwrb, 0,
		       sizeof(struct iscsi_wrb));
		free_wrb_handle(phba, pwrb_context,
				io_task->pwrb_handle);
		io_task->pwrb_handle = NULL;
	}

	if (io_task->psgl_handle) {
		spin_lock_bh(&phba->mgmt_sgl_lock);
		free_mgmt_sgl_handle(phba,
				     io_task->psgl_handle);
		io_task->psgl_handle = NULL;
4623
		spin_unlock_bh(&phba->mgmt_sgl_lock);
4624 4625
	}

4626
	if (io_task->mtask_addr) {
4627 4628 4629 4630
		pci_unmap_single(phba->pcidev,
				 io_task->mtask_addr,
				 io_task->mtask_data_count,
				 PCI_DMA_TODEVICE);
4631 4632
		io_task->mtask_addr = 0;
	}
4633 4634
}

4635 4636 4637 4638 4639
/**
 * beiscsi_cleanup_task()- Free driver resources of the task
 * @task: ptr to the iscsi task
 *
 **/
4640 4641 4642 4643 4644 4645 4646 4647 4648
static void beiscsi_cleanup_task(struct iscsi_task *task)
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;
4649 4650
	uint16_t cri_index = BE_GET_CRI_FROM_CID(
			     beiscsi_conn->beiscsi_conn_cid);
4651 4652

	phwi_ctrlr = phba->phwi_ctrlr;
4653
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672 4673

	if (io_task->cmd_bhs) {
		pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
			      io_task->bhs_pa.u.a64.address);
		io_task->cmd_bhs = NULL;
	}

	if (task->sc) {
		if (io_task->pwrb_handle) {
			free_wrb_handle(phba, pwrb_context,
					io_task->pwrb_handle);
			io_task->pwrb_handle = NULL;
		}

		if (io_task->psgl_handle) {
			spin_lock(&phba->io_sgl_lock);
			free_io_sgl_handle(phba, io_task->psgl_handle);
			spin_unlock(&phba->io_sgl_lock);
			io_task->psgl_handle = NULL;
		}
4674 4675 4676 4677 4678

		if (io_task->scsi_cmnd) {
			scsi_dma_unmap(io_task->scsi_cmnd);
			io_task->scsi_cmnd = NULL;
		}
4679
	} else {
4680
		if (!beiscsi_conn->login_in_progress)
4681
			beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4682 4683 4684
	}
}

4685 4686 4687 4688 4689
void
beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
			   struct beiscsi_offload_params *params)
{
	struct wrb_handle *pwrb_handle;
4690
	struct hwi_wrb_context *pwrb_context = NULL;
4691
	struct beiscsi_hba *phba = beiscsi_conn->phba;
4692 4693
	struct iscsi_task *task = beiscsi_conn->task;
	struct iscsi_session *session = task->conn->session;
4694 4695 4696 4697 4698 4699
	u32 doorbell = 0;

	/*
	 * We can always use 0 here because it is reserved by libiscsi for
	 * login/startup related tasks.
	 */
4700
	beiscsi_conn->login_in_progress = 0;
4701
	spin_lock_bh(&session->back_lock);
4702
	beiscsi_cleanup_task(task);
4703
	spin_unlock_bh(&session->back_lock);
4704

4705 4706
	pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid,
				       &pwrb_context);
4707

4708
	/* Check for the adapter family */
4709
	if (is_chip_be2_be3r(phba))
4710
		beiscsi_offload_cxn_v0(params, pwrb_handle,
4711 4712
				       phba->init_mem,
				       pwrb_context);
4713
	else
4714 4715
		beiscsi_offload_cxn_v2(params, pwrb_handle,
				       pwrb_context);
4716

4717 4718
	be_dws_le_to_cpu(pwrb_handle->pwrb,
			 sizeof(struct iscsi_target_context_update_wrb));
4719 4720

	doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4721
	doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4722
			     << DB_DEF_PDU_WRB_INDEX_SHIFT;
4723
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4724 4725
	iowrite32(doorbell, phba->db_va +
		  beiscsi_conn->doorbell_offset);
4726 4727 4728 4729 4730 4731 4732 4733 4734 4735 4736 4737 4738 4739

	/*
	 * There is no completion for CONTEXT_UPDATE. The completion of next
	 * WRB posted guarantees FW's processing and DMA'ing of it.
	 * Use beiscsi_put_wrb_handle to put it back in the pool which makes
	 * sure zero'ing or reuse of the WRB only after wrbs_per_cxn.
	 */
	beiscsi_put_wrb_handle(pwrb_context, pwrb_handle,
			       phba->params.wrbs_per_cxn);
	beiscsi_log(phba, KERN_INFO,
		    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
		    "BM_%d : put CONTEXT_UPDATE pwrb_handle=%p free_index=0x%x wrb_handles_available=%d\n",
		    pwrb_handle, pwrb_context->free_index,
		    pwrb_context->wrb_handles_available);
4740 4741 4742 4743 4744
}

static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
			      int *index, int *age)
{
4745
	*index = (int)itt;
4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4759 4760 4761 4762 4763 4764 4765 4766 4767 4768
	if (age)
		*age = conn->session->age;
}

/**
 * beiscsi_alloc_pdu - allocates pdu and related resources
 * @task: libiscsi task
 * @opcode: opcode of pdu for task
 *
 * This is called with the session lock held. It will allocate
 * the wrb and sgl if needed for the command. And it will prep
 * the pdu's itt. beiscsi_parse_pdu will later translate
 * the pdu itt to the libiscsi task itt.
 */
static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;
	itt_t itt;
4769
	uint16_t cri_index = 0;
4770 4771
	struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
	dma_addr_t paddr;
4772

4773
	io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
4774
					  GFP_ATOMIC, &paddr);
4775 4776 4777
	if (!io_task->cmd_bhs)
		return -ENOMEM;
	io_task->bhs_pa.u.a64.address = paddr;
4778
	io_task->libiscsi_itt = (itt_t)task->itt;
4779 4780 4781 4782
	io_task->conn = beiscsi_conn;

	task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
	task->hdr_max = sizeof(struct be_cmd_bhs);
4783
	io_task->psgl_handle = NULL;
4784
	io_task->pwrb_handle = NULL;
4785 4786 4787 4788 4789

	if (task->sc) {
		spin_lock(&phba->io_sgl_lock);
		io_task->psgl_handle = alloc_io_sgl_handle(phba);
		spin_unlock(&phba->io_sgl_lock);
4790 4791 4792 4793 4794 4795
		if (!io_task->psgl_handle) {
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
				    "BM_%d : Alloc of IO_SGL_ICD Failed"
				    "for the CID : %d\n",
				    beiscsi_conn->beiscsi_conn_cid);
4796
			goto free_hndls;
4797
		}
4798
		io_task->pwrb_handle = alloc_wrb_handle(phba,
4799 4800
					beiscsi_conn->beiscsi_conn_cid,
					&io_task->pwrb_context);
4801 4802 4803 4804 4805 4806
		if (!io_task->pwrb_handle) {
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
				    "BM_%d : Alloc of WRB_HANDLE Failed"
				    "for the CID : %d\n",
				    beiscsi_conn->beiscsi_conn_cid);
4807
			goto free_io_hndls;
4808
		}
4809 4810
	} else {
		io_task->scsi_cmnd = NULL;
4811
		if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4812
			beiscsi_conn->task = task;
4813 4814 4815 4816 4817
			if (!beiscsi_conn->login_in_progress) {
				spin_lock(&phba->mgmt_sgl_lock);
				io_task->psgl_handle = (struct sgl_handle *)
						alloc_mgmt_sgl_handle(phba);
				spin_unlock(&phba->mgmt_sgl_lock);
4818 4819 4820 4821 4822 4823 4824 4825
				if (!io_task->psgl_handle) {
					beiscsi_log(phba, KERN_ERR,
						    BEISCSI_LOG_IO |
						    BEISCSI_LOG_CONFIG,
						    "BM_%d : Alloc of MGMT_SGL_ICD Failed"
						    "for the CID : %d\n",
						    beiscsi_conn->
						    beiscsi_conn_cid);
4826
					goto free_hndls;
4827
				}
4828

4829 4830 4831
				beiscsi_conn->login_in_progress = 1;
				beiscsi_conn->plogin_sgl_handle =
							io_task->psgl_handle;
4832 4833
				io_task->pwrb_handle =
					alloc_wrb_handle(phba,
4834 4835
					beiscsi_conn->beiscsi_conn_cid,
					&io_task->pwrb_context);
4836 4837 4838 4839 4840 4841 4842 4843 4844 4845
				if (!io_task->pwrb_handle) {
					beiscsi_log(phba, KERN_ERR,
						    BEISCSI_LOG_IO |
						    BEISCSI_LOG_CONFIG,
						    "BM_%d : Alloc of WRB_HANDLE Failed"
						    "for the CID : %d\n",
						    beiscsi_conn->
						    beiscsi_conn_cid);
					goto free_mgmt_hndls;
				}
4846 4847 4848
				beiscsi_conn->plogin_wrb_handle =
							io_task->pwrb_handle;

4849 4850 4851
			} else {
				io_task->psgl_handle =
						beiscsi_conn->plogin_sgl_handle;
4852 4853
				io_task->pwrb_handle =
						beiscsi_conn->plogin_wrb_handle;
4854 4855 4856 4857 4858
			}
		} else {
			spin_lock(&phba->mgmt_sgl_lock);
			io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
			spin_unlock(&phba->mgmt_sgl_lock);
4859 4860 4861 4862 4863 4864 4865 4866
			if (!io_task->psgl_handle) {
				beiscsi_log(phba, KERN_ERR,
					    BEISCSI_LOG_IO |
					    BEISCSI_LOG_CONFIG,
					    "BM_%d : Alloc of MGMT_SGL_ICD Failed"
					    "for the CID : %d\n",
					    beiscsi_conn->
					    beiscsi_conn_cid);
4867
				goto free_hndls;
4868
			}
4869 4870
			io_task->pwrb_handle =
					alloc_wrb_handle(phba,
4871 4872
					beiscsi_conn->beiscsi_conn_cid,
					&io_task->pwrb_context);
4873 4874 4875 4876 4877 4878
			if (!io_task->pwrb_handle) {
				beiscsi_log(phba, KERN_ERR,
					    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
					    "BM_%d : Alloc of WRB_HANDLE Failed"
					    "for the CID : %d\n",
					    beiscsi_conn->beiscsi_conn_cid);
4879
				goto free_mgmt_hndls;
4880
			}
4881

4882 4883
		}
	}
4884 4885 4886
	itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
				 wrb_index << 16) | (unsigned int)
				(io_task->psgl_handle->sgl_index));
4887
	io_task->pwrb_handle->pio_handle = task;
4888

4889 4890
	io_task->cmd_bhs->iscsi_hdr.itt = itt;
	return 0;
4891

4892 4893 4894 4895 4896 4897 4898 4899
free_io_hndls:
	spin_lock(&phba->io_sgl_lock);
	free_io_sgl_handle(phba, io_task->psgl_handle);
	spin_unlock(&phba->io_sgl_lock);
	goto free_hndls;
free_mgmt_hndls:
	spin_lock(&phba->mgmt_sgl_lock);
	free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4900
	io_task->psgl_handle = NULL;
4901
	spin_unlock(&phba->mgmt_sgl_lock);
4902 4903
free_hndls:
	phwi_ctrlr = phba->phwi_ctrlr;
4904 4905 4906
	cri_index = BE_GET_CRI_FROM_CID(
	beiscsi_conn->beiscsi_conn_cid);
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4907 4908
	if (io_task->pwrb_handle)
		free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4909 4910 4911
	io_task->pwrb_handle = NULL;
	pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
		      io_task->bhs_pa.u.a64.address);
4912
	io_task->cmd_bhs = NULL;
4913
	return -ENOMEM;
4914
}
4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935 4936 4937 4938 4939 4940 4941 4942 4943 4944 4945 4946 4947 4948 4949 4950 4951 4952 4953 4954 4955 4956 4957
int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
		       unsigned int num_sg, unsigned int xferlen,
		       unsigned int writedir)
{

	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct iscsi_wrb *pwrb = NULL;
	unsigned int doorbell = 0;

	pwrb = io_task->pwrb_handle->pwrb;

	io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
	io_task->bhs_len = sizeof(struct be_cmd_bhs);

	if (writedir) {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
			      INI_WR_CMD);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
			      INI_RD_CMD);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
	}

	io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
					  type, pwrb);

	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
		      cpu_to_be16(*(unsigned short *)
		      &io_task->cmd_bhs->iscsi_hdr.lun));
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
		      io_task->pwrb_handle->wrb_index);
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
		      be32_to_cpu(task->cmdsn));
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
		      io_task->psgl_handle->sgl_index);

	hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4958 4959 4960 4961 4962 4963
		      io_task->pwrb_handle->wrb_index);
	if (io_task->pwrb_context->plast_wrb)
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
			      io_task->pwrb_context->plast_wrb,
			      io_task->pwrb_handle->wrb_index);
	io_task->pwrb_context->plast_wrb = pwrb;
4964 4965 4966 4967 4968 4969 4970 4971

	be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));

	doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
	doorbell |= (io_task->pwrb_handle->wrb_index &
		     DB_DEF_PDU_WRB_INDEX_MASK) <<
		     DB_DEF_PDU_WRB_INDEX_SHIFT;
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4972 4973
	iowrite32(doorbell, phba->db_va +
		  beiscsi_conn->doorbell_offset);
4974 4975
	return 0;
}
4976 4977 4978 4979 4980 4981 4982 4983 4984 4985 4986 4987 4988 4989 4990 4991 4992 4993

static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
			  unsigned int num_sg, unsigned int xferlen,
			  unsigned int writedir)
{

	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct iscsi_wrb *pwrb = NULL;
	unsigned int doorbell = 0;

	pwrb = io_task->pwrb_handle->pwrb;
	io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
	io_task->bhs_len = sizeof(struct be_cmd_bhs);

	if (writedir) {
4994 4995
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
			      INI_WR_CMD);
4996 4997
		AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
	} else {
4998 4999
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
			      INI_RD_CMD);
5000 5001 5002
		AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
	}

5003 5004 5005
	io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
					  type, pwrb);

5006
	AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
5007 5008
		      cpu_to_be16(*(unsigned short *)
				  &io_task->cmd_bhs->iscsi_hdr.lun));
5009 5010 5011 5012 5013 5014 5015 5016 5017 5018 5019
	AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
	AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
		      io_task->pwrb_handle->wrb_index);
	AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
		      be32_to_cpu(task->cmdsn));
	AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
		      io_task->psgl_handle->sgl_index);

	hwi_write_sgl(pwrb, sg, num_sg, io_task);

	AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
5020 5021 5022 5023 5024 5025 5026
		      io_task->pwrb_handle->wrb_index);
	if (io_task->pwrb_context->plast_wrb)
		AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
			      io_task->pwrb_context->plast_wrb,
			      io_task->pwrb_handle->wrb_index);
	io_task->pwrb_context->plast_wrb = pwrb;

5027 5028 5029
	be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));

	doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
5030
	doorbell |= (io_task->pwrb_handle->wrb_index &
5031 5032 5033
		     DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;

5034 5035
	iowrite32(doorbell, phba->db_va +
		  beiscsi_conn->doorbell_offset);
5036 5037 5038 5039 5040
	return 0;
}

static int beiscsi_mtask(struct iscsi_task *task)
{
5041
	struct beiscsi_io_task *io_task = task->dd_data;
5042 5043 5044 5045 5046
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct iscsi_wrb *pwrb = NULL;
	unsigned int doorbell = 0;
5047
	unsigned int cid;
5048
	unsigned int pwrb_typeoffset = 0;
5049
	int ret = 0;
5050

5051
	cid = beiscsi_conn->beiscsi_conn_cid;
5052
	pwrb = io_task->pwrb_handle->pwrb;
5053
	memset(pwrb, 0, sizeof(*pwrb));
5054

5055
	if (is_chip_be2_be3r(phba)) {
5056 5057 5058 5059 5060 5061 5062 5063 5064
		AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
			      be32_to_cpu(task->cmdsn));
		AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
			      io_task->pwrb_handle->wrb_index);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
			      io_task->psgl_handle->sgl_index);
		AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
			      task->data_count);
		AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
5065 5066 5067 5068 5069 5070 5071
			      io_task->pwrb_handle->wrb_index);
		if (io_task->pwrb_context->plast_wrb)
			AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
				      io_task->pwrb_context->plast_wrb,
				      io_task->pwrb_handle->wrb_index);
		io_task->pwrb_context->plast_wrb = pwrb;

5072
		pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
5073 5074 5075 5076 5077 5078 5079 5080 5081 5082
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
			      be32_to_cpu(task->cmdsn));
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
			      io_task->pwrb_handle->wrb_index);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
			      io_task->psgl_handle->sgl_index);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
			      task->data_count);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
5083 5084 5085 5086 5087 5088 5089
			      io_task->pwrb_handle->wrb_index);
		if (io_task->pwrb_context->plast_wrb)
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
				      io_task->pwrb_context->plast_wrb,
				      io_task->pwrb_handle->wrb_index);
		io_task->pwrb_context->plast_wrb = pwrb;

5090
		pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
5091 5092
	}

5093

5094 5095 5096
	switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
	case ISCSI_OP_LOGIN:
		AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
5097
		ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5098
		ret = hwi_write_buffer(pwrb, task);
5099 5100
		break;
	case ISCSI_OP_NOOP_OUT:
5101
		if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
5102
			ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5103 5104
			if (is_chip_be2_be3r(phba))
				AMAP_SET_BITS(struct amap_iscsi_wrb,
5105 5106
					      dmsg, pwrb, 1);
			else
5107
				AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
5108
					      dmsg, pwrb, 1);
5109
		} else {
5110
			ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
5111 5112
			if (is_chip_be2_be3r(phba))
				AMAP_SET_BITS(struct amap_iscsi_wrb,
5113 5114
					      dmsg, pwrb, 0);
			else
5115
				AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
5116
					      dmsg, pwrb, 0);
5117
		}
5118
		ret = hwi_write_buffer(pwrb, task);
5119 5120
		break;
	case ISCSI_OP_TEXT:
5121
		ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5122
		ret = hwi_write_buffer(pwrb, task);
5123 5124
		break;
	case ISCSI_OP_SCSI_TMFUNC:
5125
		ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
5126
		ret = hwi_write_buffer(pwrb, task);
5127 5128
		break;
	case ISCSI_OP_LOGOUT:
5129
		ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
5130
		ret = hwi_write_buffer(pwrb, task);
5131 5132 5133
		break;

	default:
5134 5135 5136 5137
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
			    "BM_%d : opcode =%d Not supported\n",
			    task->hdr->opcode & ISCSI_OPCODE_MASK);

5138 5139 5140
		return -EINVAL;
	}

5141 5142 5143
	if (ret)
		return ret;

5144
	/* Set the task type */
5145 5146 5147
	io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
		AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
		AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
5148

5149
	doorbell |= cid & DB_WRB_POST_CID_MASK;
5150
	doorbell |= (io_task->pwrb_handle->wrb_index &
5151 5152
		     DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
5153 5154
	iowrite32(doorbell, phba->db_va +
		  beiscsi_conn->doorbell_offset);
5155 5156 5157 5158 5159 5160 5161
	return 0;
}

static int beiscsi_task_xmit(struct iscsi_task *task)
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct scsi_cmnd *sc = task->sc;
5162
	struct beiscsi_hba *phba = NULL;
5163 5164 5165 5166
	struct scatterlist *sg;
	int num_sg;
	unsigned int  writedir = 0, xferlen = 0;

5167 5168
	phba = ((struct beiscsi_conn *)task->conn->dd_data)->phba;

5169 5170 5171 5172 5173 5174
	if (!sc)
		return beiscsi_mtask(task);

	io_task->scsi_cmnd = sc;
	num_sg = scsi_dma_map(sc);
	if (num_sg < 0) {
5175 5176 5177 5178
		struct iscsi_conn *conn = task->conn;
		struct beiscsi_hba *phba = NULL;

		phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
5179 5180 5181 5182 5183 5184
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
			    "BM_%d : scsi_dma_map Failed "
			    "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
			    be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
			    io_task->libiscsi_itt, scsi_bufflen(sc));
5185

5186 5187 5188 5189
		return num_sg;
	}
	xferlen = scsi_bufflen(sc);
	sg = scsi_sglist(sc);
5190
	if (sc->sc_data_direction == DMA_TO_DEVICE)
5191
		writedir = 1;
5192
	 else
5193
		writedir = 0;
5194

5195
	 return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
5196 5197
}

5198 5199 5200 5201 5202 5203 5204 5205 5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222
/**
 * beiscsi_bsg_request - handle bsg request from ISCSI transport
 * @job: job to handle
 */
static int beiscsi_bsg_request(struct bsg_job *job)
{
	struct Scsi_Host *shost;
	struct beiscsi_hba *phba;
	struct iscsi_bsg_request *bsg_req = job->request;
	int rc = -EINVAL;
	unsigned int tag;
	struct be_dma_mem nonemb_cmd;
	struct be_cmd_resp_hdr *resp;
	struct iscsi_bsg_reply *bsg_reply = job->reply;
	unsigned short status, extd_status;

	shost = iscsi_job_to_shost(job);
	phba = iscsi_host_priv(shost);

	switch (bsg_req->msgcode) {
	case ISCSI_BSG_HST_VENDOR:
		nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
					job->request_payload.payload_len,
					&nonemb_cmd.dma);
		if (nonemb_cmd.va == NULL) {
5223 5224 5225
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
				    "BM_%d : Failed to allocate memory for "
				    "beiscsi_bsg_request\n");
5226
			return -ENOMEM;
5227 5228 5229 5230
		}
		tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
						  &nonemb_cmd);
		if (!tag) {
5231
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5232
				    "BM_%d : MBX Tag Allocation Failed\n");
5233

5234 5235 5236
			pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
					    nonemb_cmd.va, nonemb_cmd.dma);
			return -EAGAIN;
5237 5238 5239 5240
		}

		rc = wait_event_interruptible_timeout(
					phba->ctrl.mcc_wait[tag],
5241
					phba->ctrl.mcc_tag_status[tag],
5242 5243
					msecs_to_jiffies(
					BEISCSI_HOST_MBX_TIMEOUT));
5244 5245 5246
		extd_status = (phba->ctrl.mcc_tag_status[tag] &
			       CQE_STATUS_ADDL_MASK) >> CQE_STATUS_ADDL_SHIFT;
		status = phba->ctrl.mcc_tag_status[tag] & CQE_STATUS_MASK;
5247
		free_mcc_wrb(&phba->ctrl, tag);
5248 5249 5250 5251 5252 5253 5254 5255 5256 5257 5258 5259
		resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
		sg_copy_from_buffer(job->reply_payload.sg_list,
				    job->reply_payload.sg_cnt,
				    nonemb_cmd.va, (resp->response_length
				    + sizeof(*resp)));
		bsg_reply->reply_payload_rcv_len = resp->response_length;
		bsg_reply->result = status;
		bsg_job_done(job, bsg_reply->result,
			     bsg_reply->reply_payload_rcv_len);
		pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
				    nonemb_cmd.va, nonemb_cmd.dma);
		if (status || extd_status) {
5260
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5261
				    "BM_%d : MBX Cmd Failed"
5262 5263 5264
				    " status = %d extd_status = %d\n",
				    status, extd_status);

5265
			return -EIO;
5266 5267
		} else {
			rc = 0;
5268 5269 5270 5271
		}
		break;

	default:
5272 5273 5274
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
				"BM_%d : Unsupported bsg command: 0x%x\n",
				bsg_req->msgcode);
5275 5276 5277 5278 5279 5280
		break;
	}

	return rc;
}

5281 5282 5283 5284 5285 5286
void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
{
	/* Set the logging parameter */
	beiscsi_log_enable_init(phba, beiscsi_log_enable);
}

5287 5288 5289
/*
 * beiscsi_quiesce()- Cleanup Driver resources
 * @phba: Instance Priv structure
5290
 * @unload_state:i Clean or EEH unload state
5291 5292 5293
 *
 * Free the OS and HW resources held by the driver
 **/
5294 5295
static void beiscsi_quiesce(struct beiscsi_hba *phba,
		uint32_t unload_state)
5296
{
5297 5298 5299 5300
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_eq_obj *pbe_eq;
	unsigned int i, msix_vec;
5301

5302 5303
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
5304
	hwi_disable_intr(phba);
5305 5306 5307
	if (phba->msix_enabled) {
		for (i = 0; i <= phba->num_cpus; i++) {
			msix_vec = phba->msix_entries[i].vector;
5308
			synchronize_irq(msix_vec);
5309
			free_irq(msix_vec, &phwi_context->be_eq[i]);
5310
			kfree(phba->msi_name[i]);
5311 5312
		}
	} else
5313 5314
		if (phba->pcidev->irq) {
			synchronize_irq(phba->pcidev->irq);
5315
			free_irq(phba->pcidev->irq, phba);
5316
		}
5317
	pci_disable_msix(phba->pcidev);
5318
	cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
5319

5320 5321
	for (i = 0; i < phba->num_cpus; i++) {
		pbe_eq = &phwi_context->be_eq[i];
5322
		irq_poll_disable(&pbe_eq->iopoll);
5323
	}
5324

5325 5326 5327 5328
	if (unload_state == BEISCSI_CLEAN_UNLOAD) {
		destroy_workqueue(phba->wq);
		beiscsi_clean_port(phba);
		beiscsi_free_mem(phba);
5329

5330 5331 5332 5333 5334 5335 5336 5337 5338
		beiscsi_unmap_pci_function(phba);
		pci_free_consistent(phba->pcidev,
				    phba->ctrl.mbox_mem_alloced.size,
				    phba->ctrl.mbox_mem_alloced.va,
				    phba->ctrl.mbox_mem_alloced.dma);
	} else {
		hwi_purge_eq(phba);
		hwi_cleanup(phba);
	}
5339

5340 5341 5342 5343 5344 5345 5346 5347 5348 5349 5350 5351
}

static void beiscsi_remove(struct pci_dev *pcidev)
{
	struct beiscsi_hba *phba = NULL;

	phba = pci_get_drvdata(pcidev);
	if (!phba) {
		dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
		return;
	}

5352
	beiscsi_destroy_def_ifaces(phba);
5353
	iscsi_boot_destroy_kset(phba->boot_kset);
5354
	iscsi_host_remove(phba->shost);
5355
	beiscsi_quiesce(phba, BEISCSI_CLEAN_UNLOAD);
5356 5357
	pci_dev_put(phba->pcidev);
	iscsi_host_free(phba->shost);
5358 5359
	pci_disable_pcie_error_reporting(pcidev);
	pci_set_drvdata(pcidev, NULL);
5360
	pci_release_regions(pcidev);
5361
	pci_disable_device(pcidev);
5362 5363
}

5364 5365 5366 5367 5368 5369 5370
static void beiscsi_msix_enable(struct beiscsi_hba *phba)
{
	int i, status;

	for (i = 0; i <= phba->num_cpus; i++)
		phba->msix_entries[i].entry = i;

5371 5372 5373
	status = pci_enable_msix_range(phba->pcidev, phba->msix_entries,
				       phba->num_cpus + 1, phba->num_cpus + 1);
	if (status > 0)
5374 5375 5376 5377 5378
		phba->msix_enabled = true;

	return;
}

5379 5380 5381 5382 5383 5384 5385 5386 5387 5388 5389 5390 5391 5392 5393 5394 5395 5396 5397 5398 5399 5400 5401 5402 5403 5404 5405 5406 5407 5408 5409 5410 5411 5412 5413 5414 5415 5416 5417 5418 5419 5420 5421 5422 5423 5424 5425
static void be_eqd_update(struct beiscsi_hba *phba)
{
	struct be_set_eqd set_eqd[MAX_CPUS];
	struct be_aic_obj *aic;
	struct be_eq_obj *pbe_eq;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	int eqd, i, num = 0;
	ulong now;
	u32 pps, delta;
	unsigned int tag;

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;

	for (i = 0; i <= phba->num_cpus; i++) {
		aic = &phba->aic_obj[i];
		pbe_eq = &phwi_context->be_eq[i];
		now = jiffies;
		if (!aic->jiffs || time_before(now, aic->jiffs) ||
		    pbe_eq->cq_count < aic->eq_prev) {
			aic->jiffs = now;
			aic->eq_prev = pbe_eq->cq_count;
			continue;
		}
		delta = jiffies_to_msecs(now - aic->jiffs);
		pps = (((u32)(pbe_eq->cq_count - aic->eq_prev) * 1000) / delta);
		eqd = (pps / 1500) << 2;

		if (eqd < 8)
			eqd = 0;
		eqd = min_t(u32, eqd, phwi_context->max_eqd);
		eqd = max_t(u32, eqd, phwi_context->min_eqd);

		aic->jiffs = now;
		aic->eq_prev = pbe_eq->cq_count;

		if (eqd != aic->prev_eqd) {
			set_eqd[num].delay_multiplier = (eqd * 65)/100;
			set_eqd[num].eq_id = pbe_eq->q.id;
			aic->prev_eqd = eqd;
			num++;
		}
	}
	if (num) {
		tag = be_cmd_modify_eq_delay(phba, set_eqd, num);
		if (tag)
5426
			beiscsi_mccq_compl_wait(phba, tag, NULL, NULL);
5427 5428 5429
	}
}

5430 5431 5432 5433 5434 5435 5436 5437
static void be_check_boot_session(struct beiscsi_hba *phba)
{
	if (beiscsi_setup_boot_info(phba))
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Could not set up "
			    "iSCSI boot info on async event.\n");
}

5438 5439 5440 5441 5442 5443 5444 5445 5446 5447 5448 5449 5450
/*
 * beiscsi_hw_health_check()- Check adapter health
 * @work: work item to check HW health
 *
 * Check if adapter in an unrecoverable state or not.
 **/
static void
beiscsi_hw_health_check(struct work_struct *work)
{
	struct beiscsi_hba *phba =
		container_of(work, struct beiscsi_hba,
			     beiscsi_hw_check_task.work);

5451 5452
	be_eqd_update(phba);

5453
	if (phba->state & BE_ADAPTER_CHECK_BOOT) {
5454 5455 5456 5457 5458 5459 5460 5461
		if ((phba->get_boot > 0) && (!phba->boot_kset)) {
			phba->get_boot--;
			if (!(phba->get_boot % BE_GET_BOOT_TO))
				be_check_boot_session(phba);
		} else {
			phba->state &= ~BE_ADAPTER_CHECK_BOOT;
			phba->get_boot = 0;
		}
5462 5463
	}

5464 5465 5466 5467 5468 5469
	beiscsi_ue_detect(phba);

	schedule_delayed_work(&phba->beiscsi_hw_check_task,
			      msecs_to_jiffies(1000));
}

5470 5471 5472 5473 5474 5475 5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 5495 5496 5497 5498 5499 5500 5501 5502 5503 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514 5515 5516 5517 5518 5519 5520 5521 5522 5523 5524 5525 5526 5527 5528 5529 5530 5531 5532 5533 5534 5535 5536 5537 5538 5539 5540 5541 5542 5543 5544 5545 5546 5547 5548 5549 5550 5551 5552 5553 5554 5555 5556 5557 5558 5559 5560 5561 5562 5563 5564 5565 5566 5567 5568 5569 5570 5571 5572 5573 5574 5575 5576 5577 5578 5579 5580

static pci_ers_result_t beiscsi_eeh_err_detected(struct pci_dev *pdev,
		pci_channel_state_t state)
{
	struct beiscsi_hba *phba = NULL;

	phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
	phba->state |= BE_ADAPTER_PCI_ERR;

	beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
		    "BM_%d : EEH error detected\n");

	beiscsi_quiesce(phba, BEISCSI_EEH_UNLOAD);

	if (state == pci_channel_io_perm_failure) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : EEH : State PERM Failure");
		return PCI_ERS_RESULT_DISCONNECT;
	}

	pci_disable_device(pdev);

	/* The error could cause the FW to trigger a flash debug dump.
	 * Resetting the card while flash dump is in progress
	 * can cause it not to recover; wait for it to finish.
	 * Wait only for first function as it is needed only once per
	 * adapter.
	 **/
	if (pdev->devfn == 0)
		ssleep(30);

	return PCI_ERS_RESULT_NEED_RESET;
}

static pci_ers_result_t beiscsi_eeh_reset(struct pci_dev *pdev)
{
	struct beiscsi_hba *phba = NULL;
	int status = 0;

	phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);

	beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
		    "BM_%d : EEH Reset\n");

	status = pci_enable_device(pdev);
	if (status)
		return PCI_ERS_RESULT_DISCONNECT;

	pci_set_master(pdev);
	pci_set_power_state(pdev, PCI_D0);
	pci_restore_state(pdev);

	/* Wait for the CHIP Reset to complete */
	status = be_chk_reset_complete(phba);
	if (!status) {
		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
			    "BM_%d : EEH Reset Completed\n");
	} else {
		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
			    "BM_%d : EEH Reset Completion Failure\n");
		return PCI_ERS_RESULT_DISCONNECT;
	}

	pci_cleanup_aer_uncorrect_error_status(pdev);
	return PCI_ERS_RESULT_RECOVERED;
}

static void beiscsi_eeh_resume(struct pci_dev *pdev)
{
	int ret = 0, i;
	struct be_eq_obj *pbe_eq;
	struct beiscsi_hba *phba = NULL;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;

	phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
	pci_save_state(pdev);

	if (enable_msix)
		find_num_cpus(phba);
	else
		phba->num_cpus = 1;

	if (enable_msix) {
		beiscsi_msix_enable(phba);
		if (!phba->msix_enabled)
			phba->num_cpus = 1;
	}

	ret = beiscsi_cmd_reset_function(phba);
	if (ret) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Reset Failed\n");
		goto ret_err;
	}

	ret = be_chk_reset_complete(phba);
	if (ret) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Failed to get out of reset.\n");
		goto ret_err;
	}

	beiscsi_get_params(phba);
	phba->shost->max_id = phba->params.cxns_per_ctrl;
	phba->shost->can_queue = phba->params.ios_per_ctrl;
	ret = hwi_init_controller(phba);

	for (i = 0; i < MAX_MCC_CMD; i++) {
		init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
		phba->ctrl.mcc_tag[i] = i + 1;
5581
		phba->ctrl.mcc_tag_status[i + 1] = 0;
5582 5583 5584 5585 5586 5587
		phba->ctrl.mcc_tag_available++;
	}

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;

5588
	for (i = 0; i < phba->num_cpus; i++) {
5589
		pbe_eq = &phwi_context->be_eq[i];
5590
		irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget,
5591
				be_iopoll);
5592 5593
	}

5594 5595 5596 5597 5598
	i = (phba->msix_enabled) ? i : 0;
	/* Work item for MCC handling */
	pbe_eq = &phwi_context->be_eq[i];
	INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);

5599 5600 5601 5602 5603 5604 5605 5606 5607 5608 5609 5610 5611 5612 5613 5614 5615
	ret = beiscsi_init_irqs(phba);
	if (ret < 0) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_eeh_resume - "
			    "Failed to beiscsi_init_irqs\n");
		goto ret_err;
	}

	hwi_enable_intr(phba);
	phba->state &= ~BE_ADAPTER_PCI_ERR;

	return;
ret_err:
	beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
		    "BM_%d : AER EEH Resume Failed\n");
}

5616 5617
static int beiscsi_dev_probe(struct pci_dev *pcidev,
			     const struct pci_device_id *id)
5618 5619
{
	struct beiscsi_hba *phba = NULL;
5620 5621 5622
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_eq_obj *pbe_eq;
5623
	int ret = 0, i;
5624 5625 5626

	ret = beiscsi_enable_pci(pcidev);
	if (ret < 0) {
5627 5628
		dev_err(&pcidev->dev,
			"beiscsi_dev_probe - Failed to enable pci device\n");
5629 5630 5631 5632 5633
		return ret;
	}

	phba = beiscsi_hba_alloc(pcidev);
	if (!phba) {
5634 5635
		dev_err(&pcidev->dev,
			"beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
5636 5637 5638
		goto disable_pci;
	}

5639 5640 5641 5642 5643 5644 5645 5646 5647
	/* Enable EEH reporting */
	ret = pci_enable_pcie_error_reporting(pcidev);
	if (ret)
		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
			    "BM_%d : PCIe Error Reporting "
			    "Enabling Failed\n");

	pci_save_state(pcidev);

5648 5649 5650
	/* Initialize Driver configuration Paramters */
	beiscsi_hba_attrs_init(phba);

5651
	phba->fw_timeout = false;
5652
	phba->mac_addr_set = false;
5653 5654


5655 5656 5657 5658 5659
	switch (pcidev->device) {
	case BE_DEVICE_ID1:
	case OC_DEVICE_ID1:
	case OC_DEVICE_ID2:
		phba->generation = BE_GEN2;
5660
		phba->iotask_fn = beiscsi_iotask;
5661 5662 5663 5664
		break;
	case BE_DEVICE_ID2:
	case OC_DEVICE_ID3:
		phba->generation = BE_GEN3;
5665
		phba->iotask_fn = beiscsi_iotask;
5666
		break;
5667 5668
	case OC_SKH_ID1:
		phba->generation = BE_GEN4;
5669
		phba->iotask_fn = beiscsi_iotask_v2;
5670
		break;
5671 5672 5673 5674
	default:
		phba->generation = 0;
	}

5675 5676
	ret = be_ctrl_init(phba, pcidev);
	if (ret) {
5677 5678 5679
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe-"
			    "Failed in be_ctrl_init\n");
5680 5681 5682
		goto hba_free;
	}

5683 5684 5685
	/*
	 * FUNCTION_RESET should clean up any stale info in FW for this fn
	 */
5686 5687 5688
	ret = beiscsi_cmd_reset_function(phba);
	if (ret) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5689
			    "BM_%d : Reset Failed\n");
5690 5691 5692 5693 5694
		goto hba_free;
	}
	ret = be_chk_reset_complete(phba);
	if (ret) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5695
			    "BM_%d : Failed to get out of reset.\n");
5696
		goto hba_free;
5697 5698
	}

5699 5700 5701
	spin_lock_init(&phba->io_sgl_lock);
	spin_lock_init(&phba->mgmt_sgl_lock);
	spin_lock_init(&phba->isr_lock);
5702
	spin_lock_init(&phba->async_pdu_lock);
5703 5704
	ret = mgmt_get_fw_config(&phba->ctrl, phba);
	if (ret != 0) {
5705 5706
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Error getting fw config\n");
5707 5708
		goto free_port;
	}
5709
	mgmt_get_port_name(&phba->ctrl, phba);
5710
	beiscsi_get_params(phba);
5711 5712 5713 5714 5715 5716 5717 5718 5719 5720 5721 5722 5723 5724 5725 5726

	if (enable_msix)
		find_num_cpus(phba);
	else
		phba->num_cpus = 1;

	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : num_cpus = %d\n",
		    phba->num_cpus);

	if (enable_msix) {
		beiscsi_msix_enable(phba);
		if (!phba->msix_enabled)
			phba->num_cpus = 1;
	}

5727
	phba->shost->max_id = phba->params.cxns_per_ctrl;
5728
	phba->shost->can_queue = phba->params.ios_per_ctrl;
5729 5730
	ret = beiscsi_init_port(phba);
	if (ret < 0) {
5731 5732 5733
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe-"
			    "Failed in beiscsi_init_port\n");
5734 5735 5736
		goto free_port;
	}

5737
	for (i = 0; i < MAX_MCC_CMD; i++) {
5738 5739
		init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
		phba->ctrl.mcc_tag[i] = i + 1;
5740
		phba->ctrl.mcc_tag_status[i + 1] = 0;
5741
		phba->ctrl.mcc_tag_available++;
5742
		memset(&phba->ctrl.ptag_state[i].tag_mem_state, 0,
5743
		       sizeof(struct be_dma_mem));
5744 5745 5746 5747
	}

	phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;

5748
	snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
5749
		 phba->shost->host_no);
5750
	phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, phba->wq_name);
5751
	if (!phba->wq) {
5752 5753 5754
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe-"
			    "Failed to allocate work queue\n");
5755 5756 5757
		goto free_twq;
	}

5758 5759
	INIT_DELAYED_WORK(&phba->beiscsi_hw_check_task,
			  beiscsi_hw_health_check);
5760

5761 5762
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
5763

5764
	for (i = 0; i < phba->num_cpus; i++) {
5765
		pbe_eq = &phwi_context->be_eq[i];
5766
		irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget,
5767
				be_iopoll);
5768
	}
5769

5770 5771 5772 5773 5774
	i = (phba->msix_enabled) ? i : 0;
	/* Work item for MCC handling */
	pbe_eq = &phwi_context->be_eq[i];
	INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);

5775 5776
	ret = beiscsi_init_irqs(phba);
	if (ret < 0) {
5777 5778 5779
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe-"
			    "Failed to beiscsi_init_irqs\n");
5780 5781
		goto free_blkenbld;
	}
5782
	hwi_enable_intr(phba);
5783

5784 5785 5786
	if (iscsi_host_add(phba->shost, &phba->pcidev->dev))
		goto free_blkenbld;

5787 5788 5789 5790 5791
	if (beiscsi_setup_boot_info(phba))
		/*
		 * log error but continue, because we may not be using
		 * iscsi boot.
		 */
5792 5793 5794
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Could not set up "
			    "iSCSI boot info.\n");
5795

5796
	beiscsi_create_def_ifaces(phba);
5797 5798 5799
	schedule_delayed_work(&phba->beiscsi_hw_check_task,
			      msecs_to_jiffies(1000));

5800 5801
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5802 5803 5804 5805
	return 0;

free_blkenbld:
	destroy_workqueue(phba->wq);
5806 5807
	for (i = 0; i < phba->num_cpus; i++) {
		pbe_eq = &phwi_context->be_eq[i];
5808
		irq_poll_disable(&pbe_eq->iopoll);
5809
	}
5810 5811 5812 5813 5814 5815 5816 5817 5818 5819
free_twq:
	beiscsi_clean_port(phba);
	beiscsi_free_mem(phba);
free_port:
	pci_free_consistent(phba->pcidev,
			    phba->ctrl.mbox_mem_alloced.size,
			    phba->ctrl.mbox_mem_alloced.va,
			   phba->ctrl.mbox_mem_alloced.dma);
	beiscsi_unmap_pci_function(phba);
hba_free:
5820 5821
	if (phba->msix_enabled)
		pci_disable_msix(phba->pcidev);
5822 5823
	pci_dev_put(phba->pcidev);
	iscsi_host_free(phba->shost);
5824
	pci_set_drvdata(pcidev, NULL);
5825
disable_pci:
5826
	pci_release_regions(pcidev);
5827 5828 5829 5830
	pci_disable_device(pcidev);
	return ret;
}

5831 5832 5833 5834 5835 5836
static struct pci_error_handlers beiscsi_eeh_handlers = {
	.error_detected = beiscsi_eeh_err_detected,
	.slot_reset = beiscsi_eeh_reset,
	.resume = beiscsi_eeh_resume,
};

5837 5838 5839
struct iscsi_transport beiscsi_iscsi_transport = {
	.owner = THIS_MODULE,
	.name = DRV_NAME,
5840
	.caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5841 5842 5843 5844 5845 5846
		CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
	.create_session = beiscsi_session_create,
	.destroy_session = beiscsi_session_destroy,
	.create_conn = beiscsi_conn_create,
	.bind_conn = beiscsi_conn_bind,
	.destroy_conn = iscsi_conn_teardown,
5847
	.attr_is_visible = be2iscsi_attr_is_visible,
5848 5849
	.set_iface_param = be2iscsi_iface_set_param,
	.get_iface_param = be2iscsi_iface_get_param,
5850
	.set_param = beiscsi_set_param,
5851
	.get_conn_param = iscsi_conn_get_param,
5852 5853 5854
	.get_session_param = iscsi_session_get_param,
	.get_host_param = beiscsi_get_host_param,
	.start_conn = beiscsi_conn_start,
5855
	.stop_conn = iscsi_conn_stop,
5856 5857 5858 5859 5860 5861
	.send_pdu = iscsi_conn_send_pdu,
	.xmit_task = beiscsi_task_xmit,
	.cleanup_task = beiscsi_cleanup_task,
	.alloc_pdu = beiscsi_alloc_pdu,
	.parse_pdu_itt = beiscsi_parse_pdu,
	.get_stats = beiscsi_conn_get_stats,
5862
	.get_ep_param = beiscsi_ep_get_param,
5863 5864 5865 5866
	.ep_connect = beiscsi_ep_connect,
	.ep_poll = beiscsi_ep_poll,
	.ep_disconnect = beiscsi_ep_disconnect,
	.session_recovery_timedout = iscsi_session_recovery_timedout,
5867
	.bsg_request = beiscsi_bsg_request,
5868 5869 5870 5871 5872 5873
};

static struct pci_driver beiscsi_pci_driver = {
	.name = DRV_NAME,
	.probe = beiscsi_dev_probe,
	.remove = beiscsi_remove,
5874 5875
	.id_table = beiscsi_pci_id_table,
	.err_handler = &beiscsi_eeh_handlers
5876 5877
};

5878

5879 5880 5881 5882 5883 5884 5885
static int __init beiscsi_module_init(void)
{
	int ret;

	beiscsi_scsi_transport =
			iscsi_register_transport(&beiscsi_iscsi_transport);
	if (!beiscsi_scsi_transport) {
5886 5887
		printk(KERN_ERR
		       "beiscsi_module_init - Unable to  register beiscsi transport.\n");
5888
		return -ENOMEM;
5889
	}
5890 5891
	printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
	       &beiscsi_iscsi_transport);
5892 5893 5894

	ret = pci_register_driver(&beiscsi_pci_driver);
	if (ret) {
5895 5896
		printk(KERN_ERR
		       "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 5907 5908 5909 5910 5911 5912 5913
		goto unregister_iscsi_transport;
	}
	return 0;

unregister_iscsi_transport:
	iscsi_unregister_transport(&beiscsi_iscsi_transport);
	return ret;
}

static void __exit beiscsi_module_exit(void)
{
	pci_unregister_driver(&beiscsi_pci_driver);
	iscsi_unregister_transport(&beiscsi_iscsi_transport);
}

module_init(beiscsi_module_init);
module_exit(beiscsi_module_exit);