be_main.c 153.6 KB
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/**
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 * Copyright (C) 2005 - 2013 Emulex
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 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License version 2
 * as published by the Free Software Foundation.  The full GNU General
 * Public License is included in this distribution in the file called COPYING.
 *
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 * Written by: Jayamohan Kallickal (jayamohan.kallickal@emulex.com)
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 *
 * Contact Information:
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 * linux-drivers@emulex.com
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 *
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 * Emulex
 * 3333 Susan Street
 * Costa Mesa, CA 92626
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 */
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#include <linux/reboot.h>
#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
#include <linux/blkdev.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/semaphore.h>
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#include <linux/iscsi_boot_sysfs.h>
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#include <linux/module.h>
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#include <linux/bsg-lib.h>
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#include <scsi/libiscsi.h>
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#include <scsi/scsi_bsg_iscsi.h>
#include <scsi/scsi_netlink.h>
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#include <scsi/scsi_transport_iscsi.h>
#include <scsi/scsi_transport.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi.h>
#include "be_main.h"
#include "be_iscsi.h"
#include "be_mgmt.h"
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#include "be_cmds.h"
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static unsigned int be_iopoll_budget = 10;
static unsigned int be_max_phys_size = 64;
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static unsigned int enable_msix = 1;
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MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
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MODULE_VERSION(BUILD_STR);
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MODULE_AUTHOR("Emulex Corporation");
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MODULE_LICENSE("GPL");
module_param(be_iopoll_budget, int, 0);
module_param(enable_msix, int, 0);
module_param(be_max_phys_size, uint, S_IRUGO);
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MODULE_PARM_DESC(be_max_phys_size,
		"Maximum Size (In Kilobytes) of physically contiguous "
		"memory that can be allocated. Range is 16 - 128");

#define beiscsi_disp_param(_name)\
ssize_t	\
beiscsi_##_name##_disp(struct device *dev,\
			struct device_attribute *attrib, char *buf)	\
{	\
	struct Scsi_Host *shost = class_to_shost(dev);\
	struct beiscsi_hba *phba = iscsi_host_priv(shost); \
	uint32_t param_val = 0;	\
	param_val = phba->attr_##_name;\
	return snprintf(buf, PAGE_SIZE, "%d\n",\
			phba->attr_##_name);\
}

#define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
int \
beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
{\
	if (val >= _minval && val <= _maxval) {\
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
			    "BA_%d : beiscsi_"#_name" updated "\
			    "from 0x%x ==> 0x%x\n",\
			    phba->attr_##_name, val); \
		phba->attr_##_name = val;\
		return 0;\
	} \
	beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
		    "BA_%d beiscsi_"#_name" attribute "\
		    "cannot be updated to 0x%x, "\
		    "range allowed is ["#_minval" - "#_maxval"]\n", val);\
		return -EINVAL;\
}

#define beiscsi_store_param(_name)  \
ssize_t \
beiscsi_##_name##_store(struct device *dev,\
			 struct device_attribute *attr, const char *buf,\
			 size_t count) \
{ \
	struct Scsi_Host  *shost = class_to_shost(dev);\
	struct beiscsi_hba *phba = iscsi_host_priv(shost);\
	uint32_t param_val = 0;\
	if (!isdigit(buf[0]))\
		return -EINVAL;\
	if (sscanf(buf, "%i", &param_val) != 1)\
		return -EINVAL;\
	if (beiscsi_##_name##_change(phba, param_val) == 0) \
		return strlen(buf);\
	else \
		return -EINVAL;\
}

#define beiscsi_init_param(_name, _minval, _maxval, _defval) \
int \
beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
{ \
	if (val >= _minval && val <= _maxval) {\
		phba->attr_##_name = val;\
		return 0;\
	} \
	beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
		    "BA_%d beiscsi_"#_name" attribute " \
		    "cannot be updated to 0x%x, "\
		    "range allowed is ["#_minval" - "#_maxval"]\n", val);\
	phba->attr_##_name = _defval;\
	return -EINVAL;\
}

#define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
static uint beiscsi_##_name = _defval;\
module_param(beiscsi_##_name, uint, S_IRUGO);\
MODULE_PARM_DESC(beiscsi_##_name, _descp);\
beiscsi_disp_param(_name)\
beiscsi_change_param(_name, _minval, _maxval, _defval)\
beiscsi_store_param(_name)\
beiscsi_init_param(_name, _minval, _maxval, _defval)\
DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
	      beiscsi_##_name##_disp, beiscsi_##_name##_store)

/*
 * When new log level added update the
 * the MAX allowed value for log_enable
 */
BEISCSI_RW_ATTR(log_enable, 0x00,
		0xFF, 0x00, "Enable logging Bit Mask\n"
		"\t\t\t\tInitialization Events	: 0x01\n"
		"\t\t\t\tMailbox Events		: 0x02\n"
		"\t\t\t\tMiscellaneous Events	: 0x04\n"
		"\t\t\t\tError Handling		: 0x08\n"
		"\t\t\t\tIO Path Events		: 0x10\n"
		"\t\t\t\tConfiguration Path	: 0x20\n");

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DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
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DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
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DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
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DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
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DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
	     beiscsi_active_session_disp, NULL);
DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
	     beiscsi_free_session_disp, NULL);
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struct device_attribute *beiscsi_attrs[] = {
	&dev_attr_beiscsi_log_enable,
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	&dev_attr_beiscsi_drvr_ver,
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	&dev_attr_beiscsi_adapter_family,
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	&dev_attr_beiscsi_fw_ver,
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	&dev_attr_beiscsi_active_session_count,
	&dev_attr_beiscsi_free_session_count,
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	&dev_attr_beiscsi_phys_port,
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	NULL,
};
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static char const *cqe_desc[] = {
	"RESERVED_DESC",
	"SOL_CMD_COMPLETE",
	"SOL_CMD_KILLED_DATA_DIGEST_ERR",
	"CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
	"CXN_KILLED_BURST_LEN_MISMATCH",
	"CXN_KILLED_AHS_RCVD",
	"CXN_KILLED_HDR_DIGEST_ERR",
	"CXN_KILLED_UNKNOWN_HDR",
	"CXN_KILLED_STALE_ITT_TTT_RCVD",
	"CXN_KILLED_INVALID_ITT_TTT_RCVD",
	"CXN_KILLED_RST_RCVD",
	"CXN_KILLED_TIMED_OUT",
	"CXN_KILLED_RST_SENT",
	"CXN_KILLED_FIN_RCVD",
	"CXN_KILLED_BAD_UNSOL_PDU_RCVD",
	"CXN_KILLED_BAD_WRB_INDEX_ERROR",
	"CXN_KILLED_OVER_RUN_RESIDUAL",
	"CXN_KILLED_UNDER_RUN_RESIDUAL",
	"CMD_KILLED_INVALID_STATSN_RCVD",
	"CMD_KILLED_INVALID_R2T_RCVD",
	"CMD_CXN_KILLED_LUN_INVALID",
	"CMD_CXN_KILLED_ICD_INVALID",
	"CMD_CXN_KILLED_ITT_INVALID",
	"CMD_CXN_KILLED_SEQ_OUTOFORDER",
	"CMD_CXN_KILLED_INVALID_DATASN_RCVD",
	"CXN_INVALIDATE_NOTIFY",
	"CXN_INVALIDATE_INDEX_NOTIFY",
	"CMD_INVALIDATED_NOTIFY",
	"UNSOL_HDR_NOTIFY",
	"UNSOL_DATA_NOTIFY",
	"UNSOL_DATA_DIGEST_ERROR_NOTIFY",
	"DRIVERMSG_NOTIFY",
	"CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
	"SOL_CMD_KILLED_DIF_ERR",
	"CXN_KILLED_SYN_RCVD",
	"CXN_KILLED_IMM_DATA_RCVD"
};

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static int beiscsi_slave_configure(struct scsi_device *sdev)
{
	blk_queue_max_segment_size(sdev->request_queue, 65536);
	return 0;
}

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static int beiscsi_eh_abort(struct scsi_cmnd *sc)
{
	struct iscsi_cls_session *cls_session;
	struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
	struct beiscsi_io_task *aborted_io_task;
	struct iscsi_conn *conn;
	struct beiscsi_conn *beiscsi_conn;
	struct beiscsi_hba *phba;
	struct iscsi_session *session;
	struct invalidate_command_table *inv_tbl;
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	struct be_dma_mem nonemb_cmd;
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	unsigned int cid, tag, num_invalidate;

	cls_session = starget_to_session(scsi_target(sc->device));
	session = cls_session->dd_data;

	spin_lock_bh(&session->lock);
	if (!aborted_task || !aborted_task->sc) {
		/* we raced */
		spin_unlock_bh(&session->lock);
		return SUCCESS;
	}

	aborted_io_task = aborted_task->dd_data;
	if (!aborted_io_task->scsi_cmnd) {
		/* raced or invalid command */
		spin_unlock_bh(&session->lock);
		return SUCCESS;
	}
	spin_unlock_bh(&session->lock);
	conn = aborted_task->conn;
	beiscsi_conn = conn->dd_data;
	phba = beiscsi_conn->phba;

	/* invalidate iocb */
	cid = beiscsi_conn->beiscsi_conn_cid;
	inv_tbl = phba->inv_tbl;
	memset(inv_tbl, 0x0, sizeof(*inv_tbl));
	inv_tbl->cid = cid;
	inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
	num_invalidate = 1;
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	nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
				sizeof(struct invalidate_commands_params_in),
				&nonemb_cmd.dma);
	if (nonemb_cmd.va == NULL) {
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		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
			    "BM_%d : Failed to allocate memory for"
			    "mgmt_invalidate_icds\n");
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		return FAILED;
	}
	nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);

	tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
				   cid, &nonemb_cmd);
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	if (!tag) {
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		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
			    "BM_%d : mgmt_invalidate_icds could not be"
			    "submitted\n");
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		pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
				    nonemb_cmd.va, nonemb_cmd.dma);

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		return FAILED;
	}
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	beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
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	pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
			    nonemb_cmd.va, nonemb_cmd.dma);
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	return iscsi_eh_abort(sc);
}

static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
{
	struct iscsi_task *abrt_task;
	struct beiscsi_io_task *abrt_io_task;
	struct iscsi_conn *conn;
	struct beiscsi_conn *beiscsi_conn;
	struct beiscsi_hba *phba;
	struct iscsi_session *session;
	struct iscsi_cls_session *cls_session;
	struct invalidate_command_table *inv_tbl;
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	struct be_dma_mem nonemb_cmd;
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	unsigned int cid, tag, i, num_invalidate;

	/* invalidate iocbs */
	cls_session = starget_to_session(scsi_target(sc->device));
	session = cls_session->dd_data;
	spin_lock_bh(&session->lock);
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	if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
		spin_unlock_bh(&session->lock);
		return FAILED;
	}
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	conn = session->leadconn;
	beiscsi_conn = conn->dd_data;
	phba = beiscsi_conn->phba;
	cid = beiscsi_conn->beiscsi_conn_cid;
	inv_tbl = phba->inv_tbl;
	memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
	num_invalidate = 0;
	for (i = 0; i < conn->session->cmds_max; i++) {
		abrt_task = conn->session->cmds[i];
		abrt_io_task = abrt_task->dd_data;
		if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
			continue;

		if (abrt_task->sc->device->lun != abrt_task->sc->device->lun)
			continue;

		inv_tbl->cid = cid;
		inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
		num_invalidate++;
		inv_tbl++;
	}
	spin_unlock_bh(&session->lock);
	inv_tbl = phba->inv_tbl;

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	nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
				sizeof(struct invalidate_commands_params_in),
				&nonemb_cmd.dma);
	if (nonemb_cmd.va == NULL) {
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		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
			    "BM_%d : Failed to allocate memory for"
			    "mgmt_invalidate_icds\n");
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		return FAILED;
	}
	nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
	memset(nonemb_cmd.va, 0, nonemb_cmd.size);
	tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
				   cid, &nonemb_cmd);
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	if (!tag) {
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		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
			    "BM_%d : mgmt_invalidate_icds could not be"
			    " submitted\n");
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		pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
				    nonemb_cmd.va, nonemb_cmd.dma);
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		return FAILED;
	}
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	beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
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	pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
			    nonemb_cmd.va, nonemb_cmd.dma);
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	return iscsi_eh_device_reset(sc);
}

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static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
{
	struct beiscsi_hba *phba = data;
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	struct mgmt_session_info *boot_sess = &phba->boot_sess;
	struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
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	char *str = buf;
	int rc;

	switch (type) {
	case ISCSI_BOOT_TGT_NAME:
		rc = sprintf(buf, "%.*s\n",
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			    (int)strlen(boot_sess->target_name),
			    (char *)&boot_sess->target_name);
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		break;
	case ISCSI_BOOT_TGT_IP_ADDR:
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		if (boot_conn->dest_ipaddr.ip_type == 0x1)
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			rc = sprintf(buf, "%pI4\n",
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				(char *)&boot_conn->dest_ipaddr.addr);
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		else
			rc = sprintf(str, "%pI6\n",
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				(char *)&boot_conn->dest_ipaddr.addr);
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		break;
	case ISCSI_BOOT_TGT_PORT:
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		rc = sprintf(str, "%d\n", boot_conn->dest_port);
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		break;

	case ISCSI_BOOT_TGT_CHAP_NAME:
		rc = sprintf(str,  "%.*s\n",
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			     boot_conn->negotiated_login_options.auth_data.chap.
			     target_chap_name_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.target_chap_name);
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		break;
	case ISCSI_BOOT_TGT_CHAP_SECRET:
		rc = sprintf(str,  "%.*s\n",
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			     boot_conn->negotiated_login_options.auth_data.chap.
			     target_secret_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.target_secret);
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		break;
	case ISCSI_BOOT_TGT_REV_CHAP_NAME:
		rc = sprintf(str,  "%.*s\n",
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			     boot_conn->negotiated_login_options.auth_data.chap.
			     intr_chap_name_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.intr_chap_name);
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		break;
	case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
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		rc = sprintf(str,  "%.*s\n",
			     boot_conn->negotiated_login_options.auth_data.chap.
			     intr_secret_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.intr_secret);
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		break;
	case ISCSI_BOOT_TGT_FLAGS:
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		rc = sprintf(str, "2\n");
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		break;
	case ISCSI_BOOT_TGT_NIC_ASSOC:
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		rc = sprintf(str, "0\n");
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		break;
	default:
		rc = -ENOSYS;
		break;
	}
	return rc;
}

static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
{
	struct beiscsi_hba *phba = data;
	char *str = buf;
	int rc;

	switch (type) {
	case ISCSI_BOOT_INI_INITIATOR_NAME:
		rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
		break;
	default:
		rc = -ENOSYS;
		break;
	}
	return rc;
}

static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
{
	struct beiscsi_hba *phba = data;
	char *str = buf;
	int rc;

	switch (type) {
	case ISCSI_BOOT_ETH_FLAGS:
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		rc = sprintf(str, "2\n");
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		break;
	case ISCSI_BOOT_ETH_INDEX:
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		rc = sprintf(str, "0\n");
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		break;
	case ISCSI_BOOT_ETH_MAC:
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		rc  = beiscsi_get_macaddr(str, phba);
		break;
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	default:
		rc = -ENOSYS;
		break;
	}
	return rc;
}


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static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
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{
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	umode_t rc;
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	switch (type) {
	case ISCSI_BOOT_TGT_NAME:
	case ISCSI_BOOT_TGT_IP_ADDR:
	case ISCSI_BOOT_TGT_PORT:
	case ISCSI_BOOT_TGT_CHAP_NAME:
	case ISCSI_BOOT_TGT_CHAP_SECRET:
	case ISCSI_BOOT_TGT_REV_CHAP_NAME:
	case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
	case ISCSI_BOOT_TGT_NIC_ASSOC:
	case ISCSI_BOOT_TGT_FLAGS:
		rc = S_IRUGO;
		break;
	default:
		rc = 0;
		break;
	}
	return rc;
}

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static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
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{
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	umode_t rc;
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	switch (type) {
	case ISCSI_BOOT_INI_INITIATOR_NAME:
		rc = S_IRUGO;
		break;
	default:
		rc = 0;
		break;
	}
	return rc;
}


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static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
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{
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	umode_t rc;
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	switch (type) {
	case ISCSI_BOOT_ETH_FLAGS:
	case ISCSI_BOOT_ETH_MAC:
	case ISCSI_BOOT_ETH_INDEX:
		rc = S_IRUGO;
		break;
	default:
		rc = 0;
		break;
	}
	return rc;
}

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/*------------------- PCI Driver operations and data ----------------- */
static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
	{ PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
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	{ PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
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	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
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	{ PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
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	{ 0 }
};
MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);

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static struct scsi_host_template beiscsi_sht = {
	.module = THIS_MODULE,
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	.name = "Emulex 10Gbe open-iscsi Initiator Driver",
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	.proc_name = DRV_NAME,
	.queuecommand = iscsi_queuecommand,
	.change_queue_depth = iscsi_change_queue_depth,
	.slave_configure = beiscsi_slave_configure,
	.target_alloc = iscsi_target_alloc,
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	.eh_abort_handler = beiscsi_eh_abort,
	.eh_device_reset_handler = beiscsi_eh_device_reset,
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	.eh_target_reset_handler = iscsi_eh_session_reset,
549
	.shost_attrs = beiscsi_attrs,
550 551 552 553 554 555
	.sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
	.can_queue = BE2_IO_DEPTH,
	.this_id = -1,
	.max_sectors = BEISCSI_MAX_SECTORS,
	.cmd_per_lun = BEISCSI_CMD_PER_LUN,
	.use_clustering = ENABLE_CLUSTERING,
556 557
	.vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,

558 559
};

560
static struct scsi_transport_template *beiscsi_scsi_transport;
561 562 563 564 565 566 567 568

static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
{
	struct beiscsi_hba *phba;
	struct Scsi_Host *shost;

	shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
	if (!shost) {
569 570
		dev_err(&pcidev->dev,
			"beiscsi_hba_alloc - iscsi_host_alloc failed\n");
571 572 573 574 575 576 577 578 579 580 581 582
		return NULL;
	}
	shost->dma_boundary = pcidev->dma_mask;
	shost->max_id = BE2_MAX_SESSIONS;
	shost->max_channel = 0;
	shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
	shost->max_lun = BEISCSI_NUM_MAX_LUN;
	shost->transportt = beiscsi_scsi_transport;
	phba = iscsi_host_priv(shost);
	memset(phba, 0, sizeof(*phba));
	phba->shost = shost;
	phba->pcidev = pci_dev_get(pcidev);
583
	pci_set_drvdata(pcidev, phba);
584
	phba->interface_handle = 0xFFFFFFFF;
585 586 587

	if (iscsi_host_add(shost, &phba->pcidev->dev))
		goto free_devices;
588

589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616
	return phba;

free_devices:
	pci_dev_put(phba->pcidev);
	iscsi_host_free(phba->shost);
	return NULL;
}

static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
{
	if (phba->csr_va) {
		iounmap(phba->csr_va);
		phba->csr_va = NULL;
	}
	if (phba->db_va) {
		iounmap(phba->db_va);
		phba->db_va = NULL;
	}
	if (phba->pci_va) {
		iounmap(phba->pci_va);
		phba->pci_va = NULL;
	}
}

static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
				struct pci_dev *pcidev)
{
	u8 __iomem *addr;
617
	int pcicfg_reg;
618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633

	addr = ioremap_nocache(pci_resource_start(pcidev, 2),
			       pci_resource_len(pcidev, 2));
	if (addr == NULL)
		return -ENOMEM;
	phba->ctrl.csr = addr;
	phba->csr_va = addr;
	phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);

	addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
	if (addr == NULL)
		goto pci_map_err;
	phba->ctrl.db = addr;
	phba->db_va = addr;
	phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);

634 635 636 637 638 639 640 641
	if (phba->generation == BE_GEN2)
		pcicfg_reg = 1;
	else
		pcicfg_reg = 0;

	addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
			       pci_resource_len(pcidev, pcicfg_reg));

642 643 644 645
	if (addr == NULL)
		goto pci_map_err;
	phba->ctrl.pcicfg = addr;
	phba->pci_va = addr;
646
	phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
647 648 649 650 651 652 653 654 655 656 657 658 659
	return 0;

pci_map_err:
	beiscsi_unmap_pci_function(phba);
	return -ENOMEM;
}

static int beiscsi_enable_pci(struct pci_dev *pcidev)
{
	int ret;

	ret = pci_enable_device(pcidev);
	if (ret) {
660 661
		dev_err(&pcidev->dev,
			"beiscsi_enable_pci - enable device failed\n");
662 663 664
		return ret;
	}

665
	pci_set_master(pcidev);
666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693
	if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
		ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
		if (ret) {
			dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
			pci_disable_device(pcidev);
			return ret;
		}
	}
	return 0;
}

static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
{
	struct be_ctrl_info *ctrl = &phba->ctrl;
	struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
	struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
	int status = 0;

	ctrl->pdev = pdev;
	status = beiscsi_map_pci_bars(phba, pdev);
	if (status)
		return status;
	mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
	mbox_mem_alloc->va = pci_alloc_consistent(pdev,
						  mbox_mem_alloc->size,
						  &mbox_mem_alloc->dma);
	if (!mbox_mem_alloc->va) {
		beiscsi_unmap_pci_function(phba);
694
		return -ENOMEM;
695 696 697 698 699 700 701
	}

	mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
	mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
	mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
	memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
	spin_lock_init(&ctrl->mbox_lock);
702 703 704
	spin_lock_init(&phba->ctrl.mcc_lock);
	spin_lock_init(&phba->ctrl.mcc_cq_lock);

705 706 707
	return status;
}

708 709 710 711
/**
 * beiscsi_get_params()- Set the config paramters
 * @phba: ptr  device priv structure
 **/
712 713
static void beiscsi_get_params(struct beiscsi_hba *phba)
{
714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733
	uint32_t total_cid_count = 0;
	uint32_t total_icd_count = 0;
	uint8_t ulp_num = 0;

	total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
			  BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);

	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
			total_icd_count = phba->fw_config.
					  iscsi_icd_count[ulp_num];
			break;
		}

	phba->params.ios_per_ctrl = (total_icd_count -
				    (total_cid_count +
				     BE2_TMFS + BE2_NOPOUT_REQ));
	phba->params.cxns_per_ctrl = total_cid_count;
	phba->params.asyncpdus_per_ctrl = total_cid_count;
	phba->params.icds_per_ctrl = total_icd_count;
734 735 736 737
	phba->params.num_sge_per_io = BE2_SGE;
	phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
	phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
	phba->params.eq_timer = 64;
738 739
	phba->params.num_eq_entries = 1024;
	phba->params.num_cq_entries = 1024;
740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759
	phba->params.wrbs_per_cxn = 256;
}

static void hwi_ring_eq_db(struct beiscsi_hba *phba,
			   unsigned int id, unsigned int clr_interrupt,
			   unsigned int num_processed,
			   unsigned char rearm, unsigned char event)
{
	u32 val = 0;
	val |= id & DB_EQ_RING_ID_MASK;
	if (rearm)
		val |= 1 << DB_EQ_REARM_SHIFT;
	if (clr_interrupt)
		val |= 1 << DB_EQ_CLR_SHIFT;
	if (event)
		val |= 1 << DB_EQ_EVNT_SHIFT;
	val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
	iowrite32(val, phba->db_va + DB_EQ_OFFSET);
}

760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788
/**
 * be_isr_mcc - The isr routine of the driver.
 * @irq: Not used
 * @dev_id: Pointer to host adapter structure
 */
static irqreturn_t be_isr_mcc(int irq, void *dev_id)
{
	struct beiscsi_hba *phba;
	struct be_eq_entry *eqe = NULL;
	struct be_queue_info *eq;
	struct be_queue_info *mcc;
	unsigned int num_eq_processed;
	struct be_eq_obj *pbe_eq;
	unsigned long flags;

	pbe_eq = dev_id;
	eq = &pbe_eq->q;
	phba =  pbe_eq->phba;
	mcc = &phba->ctrl.mcc_obj.cq;
	eqe = queue_tail_node(eq);

	num_eq_processed = 0;

	while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
				& EQE_VALID_MASK) {
		if (((eqe->dw[offsetof(struct amap_eq_entry,
		     resource_id) / 32] &
		     EQE_RESID_MASK) >> 16) == mcc->id) {
			spin_lock_irqsave(&phba->isr_lock, flags);
789
			pbe_eq->todo_mcc_cq = true;
790 791 792 793 794 795 796
			spin_unlock_irqrestore(&phba->isr_lock, flags);
		}
		AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
		queue_tail_inc(eq);
		eqe = queue_tail_node(eq);
		num_eq_processed++;
	}
797 798
	if (pbe_eq->todo_mcc_cq)
		queue_work(phba->wq, &pbe_eq->work_cqs);
799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841
	if (num_eq_processed)
		hwi_ring_eq_db(phba, eq->id, 1,	num_eq_processed, 1, 1);

	return IRQ_HANDLED;
}

/**
 * be_isr_msix - The isr routine of the driver.
 * @irq: Not used
 * @dev_id: Pointer to host adapter structure
 */
static irqreturn_t be_isr_msix(int irq, void *dev_id)
{
	struct beiscsi_hba *phba;
	struct be_eq_entry *eqe = NULL;
	struct be_queue_info *eq;
	struct be_queue_info *cq;
	unsigned int num_eq_processed;
	struct be_eq_obj *pbe_eq;
	unsigned long flags;

	pbe_eq = dev_id;
	eq = &pbe_eq->q;
	cq = pbe_eq->cq;
	eqe = queue_tail_node(eq);

	phba = pbe_eq->phba;
	num_eq_processed = 0;
	if (blk_iopoll_enabled) {
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
					& EQE_VALID_MASK) {
			if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
				blk_iopoll_sched(&pbe_eq->iopoll);

			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
			num_eq_processed++;
		}
	} else {
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
						& EQE_VALID_MASK) {
			spin_lock_irqsave(&phba->isr_lock, flags);
842
			pbe_eq->todo_cq = true;
843 844 845 846 847 848 849
			spin_unlock_irqrestore(&phba->isr_lock, flags);
			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
			num_eq_processed++;
		}

850 851
		if (pbe_eq->todo_cq)
			queue_work(phba->wq, &pbe_eq->work_cqs);
852
	}
853 854 855 856 857

	if (num_eq_processed)
		hwi_ring_eq_db(phba, eq->id, 1,	num_eq_processed, 0, 1);

	return IRQ_HANDLED;
858 859
}

860 861 862 863 864 865 866 867 868 869 870 871 872
/**
 * be_isr - The isr routine of the driver.
 * @irq: Not used
 * @dev_id: Pointer to host adapter structure
 */
static irqreturn_t be_isr(int irq, void *dev_id)
{
	struct beiscsi_hba *phba;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_eq_entry *eqe = NULL;
	struct be_queue_info *eq;
	struct be_queue_info *cq;
873
	struct be_queue_info *mcc;
874
	unsigned long flags, index;
875
	unsigned int num_mcceq_processed, num_ioeq_processed;
876
	struct be_ctrl_info *ctrl;
877
	struct be_eq_obj *pbe_eq;
878 879 880
	int isr;

	phba = dev_id;
881
	ctrl = &phba->ctrl;
882 883 884 885
	isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
		       (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
	if (!isr)
		return IRQ_NONE;
886 887 888

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
889 890 891 892
	pbe_eq = &phwi_context->be_eq[0];

	eq = &phwi_context->be_eq[0].q;
	mcc = &phba->ctrl.mcc_obj.cq;
893 894 895
	index = 0;
	eqe = queue_tail_node(eq);

896 897
	num_ioeq_processed = 0;
	num_mcceq_processed = 0;
898 899 900
	if (blk_iopoll_enabled) {
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
					& EQE_VALID_MASK) {
901 902 903 904
			if (((eqe->dw[offsetof(struct amap_eq_entry,
			     resource_id) / 32] &
			     EQE_RESID_MASK) >> 16) == mcc->id) {
				spin_lock_irqsave(&phba->isr_lock, flags);
905
				pbe_eq->todo_mcc_cq = true;
906 907 908 909 910 911 912
				spin_unlock_irqrestore(&phba->isr_lock, flags);
				num_mcceq_processed++;
			} else {
				if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
					blk_iopoll_sched(&pbe_eq->iopoll);
				num_ioeq_processed++;
			}
913 914 915 916
			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
		}
917
		if (num_ioeq_processed || num_mcceq_processed) {
918 919
			if (pbe_eq->todo_mcc_cq)
				queue_work(phba->wq, &pbe_eq->work_cqs);
920

921
			if ((num_mcceq_processed) && (!num_ioeq_processed))
922 923 924 925 926 927 928 929
				hwi_ring_eq_db(phba, eq->id, 0,
					      (num_ioeq_processed +
					       num_mcceq_processed) , 1, 1);
			else
				hwi_ring_eq_db(phba, eq->id, 0,
					       (num_ioeq_processed +
						num_mcceq_processed), 0, 1);

930 931 932 933
			return IRQ_HANDLED;
		} else
			return IRQ_NONE;
	} else {
934
		cq = &phwi_context->be_cq[0];
935 936 937 938 939 940 941
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
						& EQE_VALID_MASK) {

			if (((eqe->dw[offsetof(struct amap_eq_entry,
			     resource_id) / 32] &
			     EQE_RESID_MASK) >> 16) != cq->id) {
				spin_lock_irqsave(&phba->isr_lock, flags);
942
				pbe_eq->todo_mcc_cq = true;
943 944 945
				spin_unlock_irqrestore(&phba->isr_lock, flags);
			} else {
				spin_lock_irqsave(&phba->isr_lock, flags);
946
				pbe_eq->todo_cq = true;
947 948 949 950 951
				spin_unlock_irqrestore(&phba->isr_lock, flags);
			}
			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
952
			num_ioeq_processed++;
953
		}
954 955
		if (pbe_eq->todo_cq || pbe_eq->todo_mcc_cq)
			queue_work(phba->wq, &pbe_eq->work_cqs);
956

957 958 959
		if (num_ioeq_processed) {
			hwi_ring_eq_db(phba, eq->id, 0,
				       num_ioeq_processed, 1, 1);
960 961 962 963 964 965 966 967 968
			return IRQ_HANDLED;
		} else
			return IRQ_NONE;
	}
}

static int beiscsi_init_irqs(struct beiscsi_hba *phba)
{
	struct pci_dev *pcidev = phba->pcidev;
969 970
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
971
	int ret, msix_vec, i, j;
972

973 974 975 976 977
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;

	if (phba->msix_enabled) {
		for (i = 0; i < phba->num_cpus; i++) {
978 979 980 981 982 983 984 985 986
			phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
						    GFP_KERNEL);
			if (!phba->msi_name[i]) {
				ret = -ENOMEM;
				goto free_msix_irqs;
			}

			sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
				phba->shost->host_no, i);
987
			msix_vec = phba->msix_entries[i].vector;
988 989
			ret = request_irq(msix_vec, be_isr_msix, 0,
					  phba->msi_name[i],
990
					  &phwi_context->be_eq[i]);
991
			if (ret) {
992 993 994 995
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : beiscsi_init_irqs-Failed to"
					    "register msix for i = %d\n",
					    i);
996
				kfree(phba->msi_name[i]);
997 998
				goto free_msix_irqs;
			}
999
		}
1000 1001 1002 1003 1004 1005 1006
		phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
		if (!phba->msi_name[i]) {
			ret = -ENOMEM;
			goto free_msix_irqs;
		}
		sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
			phba->shost->host_no);
1007
		msix_vec = phba->msix_entries[i].vector;
1008
		ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
1009
				  &phwi_context->be_eq[i]);
1010
		if (ret) {
1011 1012 1013
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
				    "BM_%d : beiscsi_init_irqs-"
				    "Failed to register beiscsi_msix_mcc\n");
1014
			kfree(phba->msi_name[i]);
1015 1016 1017
			goto free_msix_irqs;
		}

1018 1019 1020 1021
	} else {
		ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
				  "beiscsi", phba);
		if (ret) {
1022 1023 1024
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : beiscsi_init_irqs-"
				    "Failed to register irq\\n");
1025 1026
			return ret;
		}
1027 1028
	}
	return 0;
1029
free_msix_irqs:
1030 1031 1032
	for (j = i - 1; j >= 0; j--) {
		kfree(phba->msi_name[j]);
		msix_vec = phba->msix_entries[j].vector;
1033
		free_irq(msix_vec, &phwi_context->be_eq[j]);
1034
	}
1035
	return ret;
1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058
}

static void hwi_ring_cq_db(struct beiscsi_hba *phba,
			   unsigned int id, unsigned int num_processed,
			   unsigned char rearm, unsigned char event)
{
	u32 val = 0;
	val |= id & DB_CQ_RING_ID_MASK;
	if (rearm)
		val |= 1 << DB_CQ_REARM_SHIFT;
	val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
	iowrite32(val, phba->db_va + DB_CQ_OFFSET);
}

static unsigned int
beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
			  struct beiscsi_hba *phba,
			  struct pdu_base *ppdu,
			  unsigned long pdu_len,
			  void *pbuffer, unsigned long buf_len)
{
	struct iscsi_conn *conn = beiscsi_conn->conn;
	struct iscsi_session *session = conn->session;
1059 1060 1061
	struct iscsi_task *task;
	struct beiscsi_io_task *io_task;
	struct iscsi_hdr *login_hdr;
1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073

	switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
						PDUBASE_OPCODE_MASK) {
	case ISCSI_OP_NOOP_IN:
		pbuffer = NULL;
		buf_len = 0;
		break;
	case ISCSI_OP_ASYNC_EVENT:
		break;
	case ISCSI_OP_REJECT:
		WARN_ON(!pbuffer);
		WARN_ON(!(buf_len == 48));
1074 1075 1076
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
			    "BM_%d : In ISCSI_OP_REJECT\n");
1077 1078
		break;
	case ISCSI_OP_LOGIN_RSP:
1079
	case ISCSI_OP_TEXT_RSP:
1080 1081 1082 1083
		task = conn->login_task;
		io_task = task->dd_data;
		login_hdr = (struct iscsi_hdr *)ppdu;
		login_hdr->itt = io_task->libiscsi_itt;
1084 1085
		break;
	default:
1086 1087 1088 1089
		beiscsi_log(phba, KERN_WARNING,
			    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
			    "BM_%d : Unrecognized opcode 0x%x in async msg\n",
			    (ppdu->
1090
			     dw[offsetof(struct amap_pdu_base, opcode) / 32]
1091
			     & PDUBASE_OPCODE_MASK));
1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105
		return 1;
	}

	spin_lock_bh(&session->lock);
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
	spin_unlock_bh(&session->lock);
	return 0;
}

static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
{
	struct sgl_handle *psgl_handle;

	if (phba->io_sgl_hndl_avbl) {
1106 1107 1108 1109 1110
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
			    "BM_%d : In alloc_io_sgl_handle,"
			    " io_sgl_alloc_index=%d\n",
			    phba->io_sgl_alloc_index);

1111 1112 1113 1114
		psgl_handle = phba->io_sgl_hndl_base[phba->
						io_sgl_alloc_index];
		phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
		phba->io_sgl_hndl_avbl--;
1115 1116
		if (phba->io_sgl_alloc_index == (phba->params.
						 ios_per_ctrl - 1))
1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127
			phba->io_sgl_alloc_index = 0;
		else
			phba->io_sgl_alloc_index++;
	} else
		psgl_handle = NULL;
	return psgl_handle;
}

static void
free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
{
1128 1129 1130 1131
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
		    "BM_%d : In free_,io_sgl_free_index=%d\n",
		    phba->io_sgl_free_index);

1132 1133 1134 1135 1136
	if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
		/*
		 * this can happen if clean_task is called on a task that
		 * failed in xmit_task or alloc_pdu.
		 */
1137 1138 1139 1140 1141
		 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
			     "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
			     "value there=%p\n", phba->io_sgl_free_index,
			     phba->io_sgl_hndl_base
			     [phba->io_sgl_free_index]);
1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158
		return;
	}
	phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
	phba->io_sgl_hndl_avbl++;
	if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
		phba->io_sgl_free_index = 0;
	else
		phba->io_sgl_free_index++;
}

/**
 * alloc_wrb_handle - To allocate a wrb handle
 * @phba: The hba pointer
 * @cid: The cid to use for allocation
 *
 * This happens under session_lock until submission to chip
 */
1159
struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
1160 1161 1162
{
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;
1163
	struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
1164
	uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
1165 1166

	phwi_ctrlr = phba->phwi_ctrlr;
1167
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1168
	if (pwrb_context->wrb_handles_available >= 2) {
1169 1170 1171 1172 1173 1174 1175 1176
		pwrb_handle = pwrb_context->pwrb_handle_base[
					    pwrb_context->alloc_index];
		pwrb_context->wrb_handles_available--;
		if (pwrb_context->alloc_index ==
						(phba->params.wrbs_per_cxn - 1))
			pwrb_context->alloc_index = 0;
		else
			pwrb_context->alloc_index++;
1177 1178 1179
		pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
						pwrb_context->alloc_index];
		pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
1180 1181
	} else
		pwrb_handle = NULL;
1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196
	return pwrb_handle;
}

/**
 * free_wrb_handle - To free the wrb handle back to pool
 * @phba: The hba pointer
 * @pwrb_context: The context to free from
 * @pwrb_handle: The wrb_handle to free
 *
 * This happens under session_lock until submission to chip
 */
static void
free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
		struct wrb_handle *pwrb_handle)
{
1197
	pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1198 1199 1200 1201 1202 1203
	pwrb_context->wrb_handles_available++;
	if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
		pwrb_context->free_index = 0;
	else
		pwrb_context->free_index++;

1204 1205 1206 1207 1208 1209
	beiscsi_log(phba, KERN_INFO,
		    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
		    "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
		    "wrb_handles_available=%d\n",
		    pwrb_handle, pwrb_context->free_index,
		    pwrb_context->wrb_handles_available);
1210 1211 1212 1213 1214 1215 1216 1217 1218
}

static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
{
	struct sgl_handle *psgl_handle;

	if (phba->eh_sgl_hndl_avbl) {
		psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
		phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1219 1220 1221 1222 1223
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
			    "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
			    phba->eh_sgl_alloc_index,
			    phba->eh_sgl_alloc_index);

1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239
		phba->eh_sgl_hndl_avbl--;
		if (phba->eh_sgl_alloc_index ==
		    (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
		     1))
			phba->eh_sgl_alloc_index = 0;
		else
			phba->eh_sgl_alloc_index++;
	} else
		psgl_handle = NULL;
	return psgl_handle;
}

void
free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
{

1240 1241 1242 1243 1244
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
		    "BM_%d : In  free_mgmt_sgl_handle,"
		    "eh_sgl_free_index=%d\n",
		    phba->eh_sgl_free_index);

1245 1246 1247 1248 1249
	if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
		/*
		 * this can happen if clean_task is called on a task that
		 * failed in xmit_task or alloc_pdu.
		 */
1250 1251 1252 1253
		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
			    "BM_%d : Double Free in eh SGL ,"
			    "eh_sgl_free_index=%d\n",
			    phba->eh_sgl_free_index);
1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266
		return;
	}
	phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
	phba->eh_sgl_hndl_avbl++;
	if (phba->eh_sgl_free_index ==
	    (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
		phba->eh_sgl_free_index = 0;
	else
		phba->eh_sgl_free_index++;
}

static void
be_complete_io(struct beiscsi_conn *beiscsi_conn,
1267 1268
		struct iscsi_task *task,
		struct common_sol_cqe *csol_cqe)
1269 1270 1271 1272 1273 1274 1275 1276 1277
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct be_status_bhs *sts_bhs =
				(struct be_status_bhs *)io_task->cmd_bhs;
	struct iscsi_conn *conn = beiscsi_conn->conn;
	unsigned char *sense;
	u32 resid = 0, exp_cmdsn, max_cmdsn;
	u8 rsp, status, flags;

1278 1279 1280 1281 1282 1283 1284 1285
	exp_cmdsn = csol_cqe->exp_cmdsn;
	max_cmdsn = (csol_cqe->exp_cmdsn +
		     csol_cqe->cmd_wnd - 1);
	rsp = csol_cqe->i_resp;
	status = csol_cqe->i_sts;
	flags = csol_cqe->i_flags;
	resid = csol_cqe->res_cnt;

1286 1287 1288
	if (!task->sc) {
		if (io_task->scsi_cmnd)
			scsi_dma_unmap(io_task->scsi_cmnd);
1289

1290 1291
		return;
	}
1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311
	task->sc->result = (DID_OK << 16) | status;
	if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
		task->sc->result = DID_ERROR << 16;
		goto unmap;
	}

	/* bidi not initially supported */
	if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
		if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
			task->sc->result = DID_ERROR << 16;

		if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
			scsi_set_resid(task->sc, resid);
			if (!status && (scsi_bufflen(task->sc) - resid <
			    task->sc->underflow))
				task->sc->result = DID_ERROR << 16;
		}
	}

	if (status == SAM_STAT_CHECK_CONDITION) {
1312
		u16 sense_len;
1313
		unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1314

1315
		sense = sts_bhs->sense_info + sizeof(unsigned short);
1316
		sense_len = be16_to_cpu(*slen);
1317 1318 1319
		memcpy(task->sc->sense_buffer, sense,
		       min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
	}
1320

1321 1322
	if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
		conn->rxdata_octets += resid;
1323 1324 1325 1326 1327 1328 1329
unmap:
	scsi_dma_unmap(io_task->scsi_cmnd);
	iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
}

static void
be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1330 1331
		    struct iscsi_task *task,
		    struct common_sol_cqe *csol_cqe)
1332 1333
{
	struct iscsi_logout_rsp *hdr;
1334
	struct beiscsi_io_task *io_task = task->dd_data;
1335 1336 1337
	struct iscsi_conn *conn = beiscsi_conn->conn;

	hdr = (struct iscsi_logout_rsp *)task->hdr;
1338
	hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1339 1340
	hdr->t2wait = 5;
	hdr->t2retain = 0;
1341 1342
	hdr->flags = csol_cqe->i_flags;
	hdr->response = csol_cqe->i_resp;
1343 1344 1345
	hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
	hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
				     csol_cqe->cmd_wnd - 1);
1346

1347 1348 1349
	hdr->dlength[0] = 0;
	hdr->dlength[1] = 0;
	hdr->dlength[2] = 0;
1350
	hdr->hlength = 0;
1351
	hdr->itt = io_task->libiscsi_itt;
1352 1353 1354 1355 1356
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
}

static void
be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1357 1358
		 struct iscsi_task *task,
		 struct common_sol_cqe *csol_cqe)
1359 1360 1361
{
	struct iscsi_tm_rsp *hdr;
	struct iscsi_conn *conn = beiscsi_conn->conn;
1362
	struct beiscsi_io_task *io_task = task->dd_data;
1363 1364

	hdr = (struct iscsi_tm_rsp *)task->hdr;
1365
	hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1366 1367
	hdr->flags = csol_cqe->i_flags;
	hdr->response = csol_cqe->i_resp;
1368 1369 1370
	hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
	hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
				     csol_cqe->cmd_wnd - 1);
1371

1372
	hdr->itt = io_task->libiscsi_itt;
1373 1374 1375 1376 1377 1378 1379 1380
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
}

static void
hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
		       struct beiscsi_hba *phba, struct sol_cqe *psol)
{
	struct hwi_wrb_context *pwrb_context;
1381
	struct wrb_handle *pwrb_handle = NULL;
1382
	struct hwi_controller *phwi_ctrlr;
1383 1384
	struct iscsi_task *task;
	struct beiscsi_io_task *io_task;
1385
	uint16_t wrb_index, cid, cri_index;
1386 1387

	phwi_ctrlr = phba->phwi_ctrlr;
1388 1389
	if (is_chip_be2_be3r(phba)) {
		wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1390
					  wrb_idx, psol);
1391
		cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1392 1393
				    cid, psol);
	} else {
1394
		wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1395
					  wrb_idx, psol);
1396
		cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1397 1398 1399
				    cid, psol);
	}

1400 1401
	cri_index = BE_GET_CRI_FROM_CID(cid);
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1402
	pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1403
	task = pwrb_handle->pio_handle;
1404

1405
	io_task = task->dd_data;
1406 1407
	memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
	iscsi_put_task(task);
1408 1409 1410 1411
}

static void
be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1412 1413
			struct iscsi_task *task,
			struct common_sol_cqe *csol_cqe)
1414 1415 1416
{
	struct iscsi_nopin *hdr;
	struct iscsi_conn *conn = beiscsi_conn->conn;
1417
	struct beiscsi_io_task *io_task = task->dd_data;
1418 1419

	hdr = (struct iscsi_nopin *)task->hdr;
1420 1421
	hdr->flags = csol_cqe->i_flags;
	hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1422 1423
	hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
				     csol_cqe->cmd_wnd - 1);
1424

1425
	hdr->opcode = ISCSI_OP_NOOP_IN;
1426
	hdr->itt = io_task->libiscsi_itt;
1427 1428 1429
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
}

1430 1431 1432 1433
static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
		struct sol_cqe *psol,
		struct common_sol_cqe *csol_cqe)
{
1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453
	if (is_chip_be2_be3r(phba)) {
		csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
						    i_exp_cmd_sn, psol);
		csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
						  i_res_cnt, psol);
		csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
						  i_cmd_wnd, psol);
		csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
						    wrb_index, psol);
		csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
					      cid, psol);
		csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
						 hw_sts, psol);
		csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
						 i_resp, psol);
		csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
						i_sts, psol);
		csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
						  i_flags, psol);
	} else {
1454 1455 1456 1457 1458 1459 1460 1461 1462 1463
		csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
						    i_exp_cmd_sn, psol);
		csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
						  i_res_cnt, psol);
		csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
						    wrb_index, psol);
		csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
					      cid, psol);
		csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
						 hw_sts, psol);
1464
		csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483
						  i_cmd_wnd, psol);
		if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
				  cmd_cmpl, psol))
			csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
							i_sts, psol);
		else
			csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
							 i_sts, psol);
		if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
				  u, psol))
			csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;

		if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
				  o, psol))
			csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
	}
}


1484 1485 1486 1487 1488 1489 1490 1491
static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
			     struct beiscsi_hba *phba, struct sol_cqe *psol)
{
	struct hwi_wrb_context *pwrb_context;
	struct wrb_handle *pwrb_handle;
	struct iscsi_wrb *pwrb = NULL;
	struct hwi_controller *phwi_ctrlr;
	struct iscsi_task *task;
1492
	unsigned int type;
1493 1494
	struct iscsi_conn *conn = beiscsi_conn->conn;
	struct iscsi_session *session = conn->session;
1495
	struct common_sol_cqe csol_cqe = {0};
1496
	uint16_t cri_index = 0;
1497 1498

	phwi_ctrlr = phba->phwi_ctrlr;
1499 1500 1501 1502

	/* Copy the elements to a common structure */
	adapter_get_sol_cqe(phba, psol, &csol_cqe);

1503 1504
	cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1505 1506 1507 1508

	pwrb_handle = pwrb_context->pwrb_handle_basestd[
		      csol_cqe.wrb_index];

1509 1510
	task = pwrb_handle->pio_handle;
	pwrb = pwrb_handle->pwrb;
1511
	type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1512

1513 1514
	spin_lock_bh(&session->lock);
	switch (type) {
1515 1516 1517
	case HWH_TYPE_IO:
	case HWH_TYPE_IO_RD:
		if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1518
		     ISCSI_OP_NOOP_OUT)
1519
			be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1520
		else
1521
			be_complete_io(beiscsi_conn, task, &csol_cqe);
1522 1523 1524
		break;

	case HWH_TYPE_LOGOUT:
1525
		if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1526
			be_complete_logout(beiscsi_conn, task, &csol_cqe);
1527
		else
1528
			be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1529 1530 1531
		break;

	case HWH_TYPE_LOGIN:
1532 1533 1534 1535
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
			    "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
			    " hwi_complete_cmd- Solicited path\n");
1536 1537 1538
		break;

	case HWH_TYPE_NOP:
1539
		be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1540 1541 1542
		break;

	default:
1543 1544 1545 1546
		beiscsi_log(phba, KERN_WARNING,
			    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
			    "BM_%d : In hwi_complete_cmd, unknown type = %d"
			    "wrb_index 0x%x CID 0x%x\n", type,
1547 1548
			    csol_cqe.wrb_index,
			    csol_cqe.cid);
1549 1550
		break;
	}
1551

1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575
	spin_unlock_bh(&session->lock);
}

static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
					  *pasync_ctx, unsigned int is_header,
					  unsigned int host_write_ptr)
{
	if (is_header)
		return &pasync_ctx->async_entry[host_write_ptr].
		    header_busy_list;
	else
		return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
}

static struct async_pdu_handle *
hwi_get_async_handle(struct beiscsi_hba *phba,
		     struct beiscsi_conn *beiscsi_conn,
		     struct hwi_async_pdu_context *pasync_ctx,
		     struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
{
	struct be_bus_address phys_addr;
	struct list_head *pbusy_list;
	struct async_pdu_handle *pasync_handle = NULL;
	unsigned char is_header = 0;
1576 1577
	unsigned int index, dpl;

1578 1579
	if (is_chip_be2_be3r(phba)) {
		dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1580
				    dpl, pdpdu_cqe);
1581
		index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1582 1583
				      index, pdpdu_cqe);
	} else {
1584
		dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1585
				    dpl, pdpdu_cqe);
1586
		index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1587 1588
				      index, pdpdu_cqe);
	}
1589 1590

	phys_addr.u.a32.address_lo =
1591 1592
		(pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
					db_addr_lo) / 32] - dpl);
1593
	phys_addr.u.a32.address_hi =
1594 1595
		pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
				       db_addr_hi) / 32];
1596 1597 1598 1599 1600 1601 1602 1603 1604

	phys_addr.u.a64.address =
			*((unsigned long long *)(&phys_addr.u.a64.address));

	switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
			& PDUCQE_CODE_MASK) {
	case UNSOL_HDR_NOTIFY:
		is_header = 1;

1605 1606
		 pbusy_list = hwi_get_async_busy_list(pasync_ctx,
						      is_header, index);
1607 1608
		break;
	case UNSOL_DATA_NOTIFY:
1609 1610
		 pbusy_list = hwi_get_async_busy_list(pasync_ctx,
						      is_header, index);
1611 1612 1613
		break;
	default:
		pbusy_list = NULL;
1614 1615 1616 1617 1618
		beiscsi_log(phba, KERN_WARNING,
			    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
			    "BM_%d : Unexpected code=%d\n",
			    pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
			    code) / 32] & PDUCQE_CODE_MASK);
1619 1620 1621 1622 1623
		return NULL;
	}

	WARN_ON(list_empty(pbusy_list));
	list_for_each_entry(pasync_handle, pbusy_list, link) {
1624
		if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1625 1626 1627 1628 1629
			break;
	}

	WARN_ON(!pasync_handle);

1630 1631
	pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(
			     beiscsi_conn->beiscsi_conn_cid);
1632
	pasync_handle->is_header = is_header;
1633 1634
	pasync_handle->buffer_len = dpl;
	*pcq_index = index;
1635 1636 1637 1638 1639

	return pasync_handle;
}

static unsigned int
1640 1641 1642
hwi_update_async_writables(struct beiscsi_hba *phba,
			    struct hwi_async_pdu_context *pasync_ctx,
			    unsigned int is_header, unsigned int cq_index)
1643 1644 1645 1646 1647 1648
{
	struct list_head *pbusy_list;
	struct async_pdu_handle *pasync_handle;
	unsigned int num_entries, writables = 0;
	unsigned int *pep_read_ptr, *pwritables;

1649
	num_entries = pasync_ctx->num_entries;
1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678
	if (is_header) {
		pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
		pwritables = &pasync_ctx->async_header.writables;
	} else {
		pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
		pwritables = &pasync_ctx->async_data.writables;
	}

	while ((*pep_read_ptr) != cq_index) {
		(*pep_read_ptr)++;
		*pep_read_ptr = (*pep_read_ptr) % num_entries;

		pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
						     *pep_read_ptr);
		if (writables == 0)
			WARN_ON(list_empty(pbusy_list));

		if (!list_empty(pbusy_list)) {
			pasync_handle = list_entry(pbusy_list->next,
						   struct async_pdu_handle,
						   link);
			WARN_ON(!pasync_handle);
			pasync_handle->consumed = 1;
		}

		writables++;
	}

	if (!writables) {
1679 1680 1681 1682
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
			    "BM_%d : Duplicate notification received - index 0x%x!!\n",
			    cq_index);
1683 1684 1685 1686 1687 1688 1689
		WARN_ON(1);
	}

	*pwritables = *pwritables + writables;
	return 0;
}

1690
static void hwi_free_async_msg(struct beiscsi_hba *phba,
1691 1692
			       struct hwi_async_pdu_context *pasync_ctx,
			       unsigned int cri)
1693 1694 1695 1696 1697 1698 1699 1700
{
	struct async_pdu_handle *pasync_handle, *tmp_handle;
	struct list_head *plist;

	plist  = &pasync_ctx->async_entry[cri].wait_queue.list;
	list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
		list_del(&pasync_handle->link);

1701
		if (pasync_handle->is_header) {
1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731
			list_add_tail(&pasync_handle->link,
				      &pasync_ctx->async_header.free_list);
			pasync_ctx->async_header.free_entries++;
		} else {
			list_add_tail(&pasync_handle->link,
				      &pasync_ctx->async_data.free_list);
			pasync_ctx->async_data.free_entries++;
		}
	}

	INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
	pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
	pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
}

static struct phys_addr *
hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
		     unsigned int is_header, unsigned int host_write_ptr)
{
	struct phys_addr *pasync_sge = NULL;

	if (is_header)
		pasync_sge = pasync_ctx->async_header.ring_base;
	else
		pasync_sge = pasync_ctx->async_data.ring_base;

	return pasync_sge + host_write_ptr;
}

static void hwi_post_async_buffers(struct beiscsi_hba *phba,
1732
				    unsigned int is_header, uint8_t ulp_num)
1733 1734 1735 1736 1737 1738 1739
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_handle;
	struct list_head *pfree_link, *pbusy_list;
	struct phys_addr *pasync_sge;
	unsigned int ring_id, num_entries;
1740
	unsigned int host_write_num, doorbell_offset;
1741 1742 1743 1744 1745
	unsigned int writables;
	unsigned int i = 0;
	u32 doorbell = 0;

	phwi_ctrlr = phba->phwi_ctrlr;
1746
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1747
	num_entries = pasync_ctx->num_entries;
1748 1749 1750 1751 1752 1753

	if (is_header) {
		writables = min(pasync_ctx->async_header.writables,
				pasync_ctx->async_header.free_entries);
		pfree_link = pasync_ctx->async_header.free_list.next;
		host_write_num = pasync_ctx->async_header.host_write_ptr;
1754 1755 1756
		ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
		doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
				  doorbell_offset;
1757 1758 1759 1760 1761
	} else {
		writables = min(pasync_ctx->async_data.writables,
				pasync_ctx->async_data.free_entries);
		pfree_link = pasync_ctx->async_data.free_list.next;
		host_write_num = pasync_ctx->async_data.host_write_ptr;
1762 1763 1764
		ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
		doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
				  doorbell_offset;
1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811
	}

	writables = (writables / 8) * 8;
	if (writables) {
		for (i = 0; i < writables; i++) {
			pbusy_list =
			    hwi_get_async_busy_list(pasync_ctx, is_header,
						    host_write_num);
			pasync_handle =
			    list_entry(pfree_link, struct async_pdu_handle,
								link);
			WARN_ON(!pasync_handle);
			pasync_handle->consumed = 0;

			pfree_link = pfree_link->next;

			pasync_sge = hwi_get_ring_address(pasync_ctx,
						is_header, host_write_num);

			pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
			pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;

			list_move(&pasync_handle->link, pbusy_list);

			host_write_num++;
			host_write_num = host_write_num % num_entries;
		}

		if (is_header) {
			pasync_ctx->async_header.host_write_ptr =
							host_write_num;
			pasync_ctx->async_header.free_entries -= writables;
			pasync_ctx->async_header.writables -= writables;
			pasync_ctx->async_header.busy_entries += writables;
		} else {
			pasync_ctx->async_data.host_write_ptr = host_write_num;
			pasync_ctx->async_data.free_entries -= writables;
			pasync_ctx->async_data.writables -= writables;
			pasync_ctx->async_data.busy_entries += writables;
		}

		doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
		doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
		doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
		doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
					<< DB_DEF_PDU_CQPROC_SHIFT;

1812
		iowrite32(doorbell, phba->db_va + doorbell_offset);
1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823
	}
}

static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
					 struct beiscsi_conn *beiscsi_conn,
					 struct i_t_dpdu_cqe *pdpdu_cqe)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_handle = NULL;
	unsigned int cq_index = -1;
1824 1825
	uint16_t cri_index = BE_GET_CRI_FROM_CID(
			     beiscsi_conn->beiscsi_conn_cid);
1826 1827

	phwi_ctrlr = phba->phwi_ctrlr;
1828 1829 1830
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
		     BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
		     cri_index));
1831 1832 1833 1834 1835

	pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
					     pdpdu_cqe, &cq_index);
	BUG_ON(pasync_handle->is_header != 0);
	if (pasync_handle->consumed == 0)
1836 1837
		hwi_update_async_writables(phba, pasync_ctx,
					   pasync_handle->is_header, cq_index);
1838

1839 1840 1841 1842
	hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri);
	hwi_post_async_buffers(phba, pasync_handle->is_header,
			       BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
			       cri_index));
1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871
}

static unsigned int
hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
		  struct beiscsi_hba *phba,
		  struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
{
	struct list_head *plist;
	struct async_pdu_handle *pasync_handle;
	void *phdr = NULL;
	unsigned int hdr_len = 0, buf_len = 0;
	unsigned int status, index = 0, offset = 0;
	void *pfirst_buffer = NULL;
	unsigned int num_buf = 0;

	plist = &pasync_ctx->async_entry[cri].wait_queue.list;

	list_for_each_entry(pasync_handle, plist, link) {
		if (index == 0) {
			phdr = pasync_handle->pbuffer;
			hdr_len = pasync_handle->buffer_len;
		} else {
			buf_len = pasync_handle->buffer_len;
			if (!num_buf) {
				pfirst_buffer = pasync_handle->pbuffer;
				num_buf++;
			}
			memcpy(pfirst_buffer + offset,
			       pasync_handle->pbuffer, buf_len);
1872
			offset += buf_len;
1873 1874 1875 1876 1877
		}
		index++;
	}

	status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1878
					    phdr, hdr_len, pfirst_buffer,
1879
					    offset);
1880

1881
	hwi_free_async_msg(phba, pasync_ctx, cri);
1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896
	return 0;
}

static unsigned int
hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
		     struct beiscsi_hba *phba,
		     struct async_pdu_handle *pasync_handle)
{
	struct hwi_async_pdu_context *pasync_ctx;
	struct hwi_controller *phwi_ctrlr;
	unsigned int bytes_needed = 0, status = 0;
	unsigned short cri = pasync_handle->cri;
	struct pdu_base *ppdu;

	phwi_ctrlr = phba->phwi_ctrlr;
1897 1898 1899 1900
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
		     BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
		     BE_GET_CRI_FROM_CID(beiscsi_conn->
				 beiscsi_conn_cid)));
1901 1902 1903 1904 1905

	list_del(&pasync_handle->link);
	if (pasync_handle->is_header) {
		pasync_ctx->async_header.busy_entries--;
		if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1906
			hwi_free_async_msg(phba, pasync_ctx, cri);
1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960
			BUG();
		}

		pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
		pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
		pasync_ctx->async_entry[cri].wait_queue.hdr_len =
				(unsigned short)pasync_handle->buffer_len;
		list_add_tail(&pasync_handle->link,
			      &pasync_ctx->async_entry[cri].wait_queue.list);

		ppdu = pasync_handle->pbuffer;
		bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
			data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
			0xFFFF0000) | ((be16_to_cpu((ppdu->
			dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
			& PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));

		if (status == 0) {
			pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
			    bytes_needed;

			if (bytes_needed == 0)
				status = hwi_fwd_async_msg(beiscsi_conn, phba,
							   pasync_ctx, cri);
		}
	} else {
		pasync_ctx->async_data.busy_entries--;
		if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
			list_add_tail(&pasync_handle->link,
				      &pasync_ctx->async_entry[cri].wait_queue.
				      list);
			pasync_ctx->async_entry[cri].wait_queue.
				bytes_received +=
				(unsigned short)pasync_handle->buffer_len;

			if (pasync_ctx->async_entry[cri].wait_queue.
			    bytes_received >=
			    pasync_ctx->async_entry[cri].wait_queue.
			    bytes_needed)
				status = hwi_fwd_async_msg(beiscsi_conn, phba,
							   pasync_ctx, cri);
		}
	}
	return status;
}

static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
					 struct beiscsi_hba *phba,
					 struct i_t_dpdu_cqe *pdpdu_cqe)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_handle = NULL;
	unsigned int cq_index = -1;
1961 1962
	uint16_t cri_index = BE_GET_CRI_FROM_CID(
			     beiscsi_conn->beiscsi_conn_cid);
1963 1964

	phwi_ctrlr = phba->phwi_ctrlr;
1965 1966 1967 1968
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
		     BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
		     cri_index));

1969 1970 1971 1972
	pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
					     pdpdu_cqe, &cq_index);

	if (pasync_handle->consumed == 0)
1973 1974 1975
		hwi_update_async_writables(phba, pasync_ctx,
					   pasync_handle->is_header, cq_index);

1976
	hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
1977 1978 1979
	hwi_post_async_buffers(phba, pasync_handle->is_header,
			       BEISCSI_GET_ULP_FROM_CRI(
			       phwi_ctrlr, cri_index));
1980 1981
}

1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004
static void  beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
{
	struct be_queue_info *mcc_cq;
	struct  be_mcc_compl *mcc_compl;
	unsigned int num_processed = 0;

	mcc_cq = &phba->ctrl.mcc_obj.cq;
	mcc_compl = queue_tail_node(mcc_cq);
	mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
	while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {

		if (num_processed >= 32) {
			hwi_ring_cq_db(phba, mcc_cq->id,
					num_processed, 0, 0);
			num_processed = 0;
		}
		if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
			/* Interpret flags as an async trailer */
			if (is_link_state_evt(mcc_compl->flags))
				/* Interpret compl as a async link evt */
				beiscsi_async_link_state_process(phba,
				(struct be_async_event_link_state *) mcc_compl);
			else
2005 2006 2007 2008
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_MBOX,
					    "BM_%d :  Unsupported Async Event, flags"
					    " = 0x%08x\n",
					    mcc_compl->flags);
2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024
		} else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
			be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
			atomic_dec(&phba->ctrl.mcc_obj.q.used);
		}

		mcc_compl->flags = 0;
		queue_tail_inc(mcc_cq);
		mcc_compl = queue_tail_node(mcc_cq);
		mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
		num_processed++;
	}

	if (num_processed > 0)
		hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);

}
2025

2026 2027 2028 2029 2030 2031 2032
/**
 * beiscsi_process_cq()- Process the Completion Queue
 * @pbe_eq: Event Q on which the Completion has come
 *
 * return
 *     Number of Completion Entries processed.
 **/
2033
static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
2034 2035 2036 2037 2038 2039
{
	struct be_queue_info *cq;
	struct sol_cqe *sol;
	struct dmsg_cqe *dmsg;
	unsigned int num_processed = 0;
	unsigned int tot_nump = 0;
2040
	unsigned short code = 0, cid = 0;
2041
	uint16_t cri_index = 0;
2042
	struct beiscsi_conn *beiscsi_conn;
2043 2044
	struct beiscsi_endpoint *beiscsi_ep;
	struct iscsi_endpoint *ep;
2045
	struct beiscsi_hba *phba;
2046

2047
	cq = pbe_eq->cq;
2048
	sol = queue_tail_node(cq);
2049
	phba = pbe_eq->phba;
2050 2051 2052 2053 2054

	while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
	       CQE_VALID_MASK) {
		be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));

2055 2056 2057 2058
		 code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
			 32] & CQE_CODE_MASK);

		 /* Get the CID */
2059 2060 2061
		if (is_chip_be2_be3r(phba)) {
			cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
		} else {
2062 2063 2064 2065 2066 2067 2068 2069 2070
			if ((code == DRIVERMSG_NOTIFY) ||
			    (code == UNSOL_HDR_NOTIFY) ||
			    (code == UNSOL_DATA_NOTIFY))
				cid = AMAP_GET_BITS(
						    struct amap_i_t_dpdu_cqe_v2,
						    cid, sol);
			 else
				 cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
						     cid, sol);
2071
		}
2072

2073 2074
		cri_index = BE_GET_CRI_FROM_CID(cid);
		ep = phba->ep_array[cri_index];
2075 2076
		beiscsi_ep = ep->dd_data;
		beiscsi_conn = beiscsi_ep->conn;
2077

2078
		if (num_processed >= 32) {
2079
			hwi_ring_cq_db(phba, cq->id,
2080 2081 2082 2083 2084
					num_processed, 0, 0);
			tot_nump += num_processed;
			num_processed = 0;
		}

2085
		switch (code) {
2086 2087 2088 2089
		case SOL_CMD_COMPLETE:
			hwi_complete_cmd(beiscsi_conn, phba, sol);
			break;
		case DRIVERMSG_NOTIFY:
2090 2091
			beiscsi_log(phba, KERN_INFO,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2092 2093
				    "BM_%d : Received %s[%d] on CID : %d\n",
				    cqe_desc[code], code, cid);
2094

2095 2096 2097 2098
			dmsg = (struct dmsg_cqe *)sol;
			hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
			break;
		case UNSOL_HDR_NOTIFY:
2099 2100
			beiscsi_log(phba, KERN_INFO,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2101 2102
				    "BM_%d : Received %s[%d] on CID : %d\n",
				    cqe_desc[code], code, cid);
2103

2104
			spin_lock_bh(&phba->async_pdu_lock);
2105 2106
			hwi_process_default_pdu_ring(beiscsi_conn, phba,
					     (struct i_t_dpdu_cqe *)sol);
2107
			spin_unlock_bh(&phba->async_pdu_lock);
2108
			break;
2109
		case UNSOL_DATA_NOTIFY:
2110 2111
			beiscsi_log(phba, KERN_INFO,
				    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2112 2113
				    "BM_%d : Received %s[%d] on CID : %d\n",
				    cqe_desc[code], code, cid);
2114

2115
			spin_lock_bh(&phba->async_pdu_lock);
2116 2117
			hwi_process_default_pdu_ring(beiscsi_conn, phba,
					     (struct i_t_dpdu_cqe *)sol);
2118
			spin_unlock_bh(&phba->async_pdu_lock);
2119 2120 2121 2122
			break;
		case CXN_INVALIDATE_INDEX_NOTIFY:
		case CMD_INVALIDATED_NOTIFY:
		case CXN_INVALIDATE_NOTIFY:
2123 2124
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2125 2126
				    "BM_%d : Ignoring %s[%d] on CID : %d\n",
				    cqe_desc[code], code, cid);
2127 2128 2129 2130 2131 2132 2133 2134 2135
			break;
		case SOL_CMD_KILLED_DATA_DIGEST_ERR:
		case CMD_KILLED_INVALID_STATSN_RCVD:
		case CMD_KILLED_INVALID_R2T_RCVD:
		case CMD_CXN_KILLED_LUN_INVALID:
		case CMD_CXN_KILLED_ICD_INVALID:
		case CMD_CXN_KILLED_ITT_INVALID:
		case CMD_CXN_KILLED_SEQ_OUTOFORDER:
		case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
2136 2137
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2138 2139
				    "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
				    cqe_desc[code], code,  cid);
2140 2141
			break;
		case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
2142 2143
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2144 2145
				    "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
				    cqe_desc[code], code, cid);
2146
			spin_lock_bh(&phba->async_pdu_lock);
2147 2148
			hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
					     (struct i_t_dpdu_cqe *) sol);
2149
			spin_unlock_bh(&phba->async_pdu_lock);
2150 2151 2152 2153 2154 2155 2156 2157 2158 2159
			break;
		case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
		case CXN_KILLED_BURST_LEN_MISMATCH:
		case CXN_KILLED_AHS_RCVD:
		case CXN_KILLED_HDR_DIGEST_ERR:
		case CXN_KILLED_UNKNOWN_HDR:
		case CXN_KILLED_STALE_ITT_TTT_RCVD:
		case CXN_KILLED_INVALID_ITT_TTT_RCVD:
		case CXN_KILLED_TIMED_OUT:
		case CXN_KILLED_FIN_RCVD:
2160 2161
		case CXN_KILLED_RST_SENT:
		case CXN_KILLED_RST_RCVD:
2162 2163 2164 2165 2166
		case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
		case CXN_KILLED_BAD_WRB_INDEX_ERROR:
		case CXN_KILLED_OVER_RUN_RESIDUAL:
		case CXN_KILLED_UNDER_RUN_RESIDUAL:
		case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2167 2168
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2169 2170
				    "BM_%d : Event %s[%d] received on CID : %d\n",
				    cqe_desc[code], code, cid);
2171 2172 2173
			if (beiscsi_conn)
				iscsi_conn_failure(beiscsi_conn->conn,
						   ISCSI_ERR_CONN_FAILED);
2174 2175
			break;
		default:
2176 2177
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2178 2179
				    "BM_%d : Invalid CQE Event Received Code : %d"
				    "CID 0x%x...\n",
2180
				    code, cid);
2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191
			break;
		}

		AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
		queue_tail_inc(cq);
		sol = queue_tail_node(cq);
		num_processed++;
	}

	if (num_processed > 0) {
		tot_nump += num_processed;
2192
		hwi_ring_cq_db(phba, cq->id, num_processed, 1, 0);
2193 2194 2195 2196
	}
	return tot_nump;
}

2197
void beiscsi_process_all_cqs(struct work_struct *work)
2198 2199
{
	unsigned long flags;
2200 2201
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
2202 2203 2204
	struct beiscsi_hba *phba;
	struct be_eq_obj *pbe_eq =
	    container_of(work, struct be_eq_obj, work_cqs);
2205

2206
	phba = pbe_eq->phba;
2207 2208 2209
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;

2210
	if (pbe_eq->todo_mcc_cq) {
2211
		spin_lock_irqsave(&phba->isr_lock, flags);
2212
		pbe_eq->todo_mcc_cq = false;
2213
		spin_unlock_irqrestore(&phba->isr_lock, flags);
2214
		beiscsi_process_mcc_isr(phba);
2215 2216
	}

2217
	if (pbe_eq->todo_cq) {
2218
		spin_lock_irqsave(&phba->isr_lock, flags);
2219
		pbe_eq->todo_cq = false;
2220
		spin_unlock_irqrestore(&phba->isr_lock, flags);
2221
		beiscsi_process_cq(pbe_eq);
2222
	}
2223 2224 2225

	/* rearm EQ for further interrupts */
	hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2226 2227 2228 2229
}

static int be_iopoll(struct blk_iopoll *iop, int budget)
{
2230
	unsigned int ret;
2231
	struct beiscsi_hba *phba;
2232
	struct be_eq_obj *pbe_eq;
2233

2234 2235
	pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
	ret = beiscsi_process_cq(pbe_eq);
2236
	if (ret < budget) {
2237
		phba = pbe_eq->phba;
2238
		blk_iopoll_complete(iop);
2239 2240 2241 2242
		beiscsi_log(phba, KERN_INFO,
			    BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
			    "BM_%d : rearm pbe_eq->q.id =%d\n",
			    pbe_eq->q.id);
2243
		hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2244 2245 2246 2247
	}
	return ret;
}

2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342
static void
hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
		  unsigned int num_sg, struct beiscsi_io_task *io_task)
{
	struct iscsi_sge *psgl;
	unsigned int sg_len, index;
	unsigned int sge_len = 0;
	unsigned long long addr;
	struct scatterlist *l_sg;
	unsigned int offset;

	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
		      io_task->bhs_pa.u.a32.address_lo);
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
		      io_task->bhs_pa.u.a32.address_hi);

	l_sg = sg;
	for (index = 0; (index < num_sg) && (index < 2); index++,
			sg = sg_next(sg)) {
		if (index == 0) {
			sg_len = sg_dma_len(sg);
			addr = (u64) sg_dma_address(sg);
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge0_addr_lo, pwrb,
				      lower_32_bits(addr));
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge0_addr_hi, pwrb,
				      upper_32_bits(addr));
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge0_len, pwrb,
				      sg_len);
			sge_len = sg_len;
		} else {
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
				      pwrb, sge_len);
			sg_len = sg_dma_len(sg);
			addr = (u64) sg_dma_address(sg);
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge1_addr_lo, pwrb,
				      lower_32_bits(addr));
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge1_addr_hi, pwrb,
				      upper_32_bits(addr));
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
				      sge1_len, pwrb,
				      sg_len);
		}
	}
	psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
	memset(psgl, 0, sizeof(*psgl) * BE2_SGE);

	AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);

	AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
		      io_task->bhs_pa.u.a32.address_hi);
	AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
		      io_task->bhs_pa.u.a32.address_lo);

	if (num_sg == 1) {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
			      1);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
			      0);
	} else if (num_sg == 2) {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
			      0);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
			      1);
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
			      0);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
			      0);
	}

	sg = l_sg;
	psgl++;
	psgl++;
	offset = 0;
	for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
		sg_len = sg_dma_len(sg);
		addr = (u64) sg_dma_address(sg);
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
			      lower_32_bits(addr));
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
			      upper_32_bits(addr));
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
		AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
		AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
		offset += sg_len;
	}
	psgl--;
	AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
}

2343 2344 2345 2346 2347
static void
hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
	      unsigned int num_sg, struct beiscsi_io_task *io_task)
{
	struct iscsi_sge *psgl;
2348
	unsigned int sg_len, index;
2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359
	unsigned int sge_len = 0;
	unsigned long long addr;
	struct scatterlist *l_sg;
	unsigned int offset;

	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
				      io_task->bhs_pa.u.a32.address_lo);
	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
				      io_task->bhs_pa.u.a32.address_hi);

	l_sg = sg;
2360 2361
	for (index = 0; (index < num_sg) && (index < 2); index++,
							 sg = sg_next(sg)) {
2362 2363 2364 2365
		if (index == 0) {
			sg_len = sg_dma_len(sg);
			addr = (u64) sg_dma_address(sg);
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2366
						((u32)(addr & 0xFFFFFFFF)));
2367
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2368
							((u32)(addr >> 32)));
2369 2370 2371 2372 2373 2374 2375 2376 2377
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
							sg_len);
			sge_len = sg_len;
		} else {
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
							pwrb, sge_len);
			sg_len = sg_dma_len(sg);
			addr = (u64) sg_dma_address(sg);
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2378
						((u32)(addr & 0xFFFFFFFF)));
2379
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2380
							((u32)(addr >> 32)));
2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
							sg_len);
		}
	}
	psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
	memset(psgl, 0, sizeof(*psgl) * BE2_SGE);

	AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);

	AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
			io_task->bhs_pa.u.a32.address_hi);
	AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
			io_task->bhs_pa.u.a32.address_lo);

2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410
	if (num_sg == 1) {
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
								1);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
								0);
	} else if (num_sg == 2) {
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
								0);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
								1);
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
								0);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
								0);
	}
2411 2412 2413 2414
	sg = l_sg;
	psgl++;
	psgl++;
	offset = 0;
2415
	for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430
		sg_len = sg_dma_len(sg);
		addr = (u64) sg_dma_address(sg);
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
						(addr & 0xFFFFFFFF));
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
						(addr >> 32));
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
		AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
		AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
		offset += sg_len;
	}
	psgl--;
	AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
}

2431 2432 2433 2434 2435
/**
 * hwi_write_buffer()- Populate the WRB with task info
 * @pwrb: ptr to the WRB entry
 * @task: iscsi task which is to be executed
 **/
2436 2437 2438 2439 2440 2441
static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
{
	struct iscsi_sge *psgl;
	struct beiscsi_io_task *io_task = task->dd_data;
	struct beiscsi_conn *beiscsi_conn = io_task->conn;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
2442
	uint8_t dsp_value = 0;
2443 2444 2445 2446 2447 2448 2449 2450

	io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
				io_task->bhs_pa.u.a32.address_lo);
	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
				io_task->bhs_pa.u.a32.address_hi);

	if (task->data) {
2451 2452 2453 2454

		/* Check for the data_count */
		dsp_value = (task->data_count) ? 1 : 0;

2455 2456
		if (is_chip_be2_be3r(phba))
			AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2457 2458
				      pwrb, dsp_value);
		else
2459
			AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2460 2461 2462 2463
				      pwrb, dsp_value);

		/* Map addr only if there is data_count */
		if (dsp_value) {
2464 2465 2466 2467 2468
			io_task->mtask_addr = pci_map_single(phba->pcidev,
							     task->data,
							     task->data_count,
							     PCI_DMA_TODEVICE);
			io_task->mtask_data_count = task->data_count;
2469
		} else
2470
			io_task->mtask_addr = 0;
2471

2472
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2473
			      lower_32_bits(io_task->mtask_addr));
2474
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2475
			      upper_32_bits(io_task->mtask_addr));
2476 2477 2478 2479 2480 2481
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
						task->data_count);

		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2482
		io_task->mtask_addr = 0;
2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504
	}

	psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;

	AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);

	AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
		      io_task->bhs_pa.u.a32.address_hi);
	AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
		      io_task->bhs_pa.u.a32.address_lo);
	if (task->data) {
		psgl++;
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);

		psgl++;
		if (task->data) {
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2505
				      lower_32_bits(io_task->mtask_addr));
2506
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2507
				      upper_32_bits(io_task->mtask_addr));
2508 2509 2510 2511 2512 2513
		}
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
	}
	AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
}

2514 2515 2516 2517
/**
 * beiscsi_find_mem_req()- Find mem needed
 * @phba: ptr to HBA struct
 **/
2518 2519
static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
{
2520
	uint8_t mem_descr_index, ulp_num;
2521
	unsigned int num_cq_pages, num_async_pdu_buf_pages;
2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547
	unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
	unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;

	num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
				      sizeof(struct sol_cqe));

	phba->params.hwi_ws_sz = sizeof(struct hwi_controller);

	phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
						 BE_ISCSI_PDU_HEADER_SIZE;
	phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
					    sizeof(struct hwi_context_memory);


	phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
	    * (phba->params.wrbs_per_cxn)
	    * phba->params.cxns_per_ctrl;
	wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
				 (phba->params.wrbs_per_cxn);
	phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
				phba->params.cxns_per_ctrl);

	phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
		phba->params.icds_per_ctrl;
	phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
		phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2548 2549
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2550

2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570
			num_async_pdu_buf_sgl_pages =
				PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
					       phba, ulp_num) *
					       sizeof(struct phys_addr));

			num_async_pdu_buf_pages =
				PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
					       phba, ulp_num) *
					       phba->params.defpdu_hdr_sz);

			num_async_pdu_data_pages =
				PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
					       phba, ulp_num) *
					       phba->params.defpdu_data_sz);

			num_async_pdu_data_sgl_pages =
				PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
					       phba, ulp_num) *
					       sizeof(struct phys_addr));

2571 2572 2573 2574 2575 2576
			mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					BEISCSI_GET_CID_COUNT(phba, ulp_num) *
					BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;

2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620
			mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  num_async_pdu_buf_pages *
					  PAGE_SIZE;

			mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  num_async_pdu_data_pages *
					  PAGE_SIZE;

			mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  num_async_pdu_buf_sgl_pages *
					  PAGE_SIZE;

			mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  num_async_pdu_data_sgl_pages *
					  PAGE_SIZE;

			mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  BEISCSI_GET_CID_COUNT(phba, ulp_num) *
					  sizeof(struct async_pdu_handle);

			mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  BEISCSI_GET_CID_COUNT(phba, ulp_num) *
					  sizeof(struct async_pdu_handle);

			mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
					  (ulp_num * MEM_DESCR_OFFSET));
			phba->mem_req[mem_descr_index] =
					  sizeof(struct hwi_async_pdu_context) +
					 (BEISCSI_GET_CID_COUNT(phba, ulp_num) *
					  sizeof(struct hwi_async_entry));
		}
	}
2621 2622 2623 2624 2625
}

static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
{
	dma_addr_t bus_add;
2626 2627
	struct hwi_controller *phwi_ctrlr;
	struct be_mem_descriptor *mem_descr;
2628 2629 2630
	struct mem_array *mem_arr, *mem_arr_orig;
	unsigned int i, j, alloc_size, curr_alloc_size;

2631
	phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2632 2633 2634
	if (!phba->phwi_ctrlr)
		return -ENOMEM;

2635 2636 2637 2638 2639 2640 2641 2642
	/* Allocate memory for wrb_context */
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
					  phba->params.cxns_per_ctrl,
					  GFP_KERNEL);
	if (!phwi_ctrlr->wrb_context)
		return -ENOMEM;

2643 2644 2645
	phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
				 GFP_KERNEL);
	if (!phba->init_mem) {
2646
		kfree(phwi_ctrlr->wrb_context);
2647 2648 2649 2650 2651 2652 2653 2654
		kfree(phba->phwi_ctrlr);
		return -ENOMEM;
	}

	mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
			       GFP_KERNEL);
	if (!mem_arr_orig) {
		kfree(phba->init_mem);
2655
		kfree(phwi_ctrlr->wrb_context);
2656 2657 2658 2659 2660 2661
		kfree(phba->phwi_ctrlr);
		return -ENOMEM;
	}

	mem_descr = phba->init_mem;
	for (i = 0; i < SE_MEM_MAX; i++) {
2662 2663 2664 2665 2666 2667
		if (!phba->mem_req[i]) {
			mem_descr->mem_array = NULL;
			mem_descr++;
			continue;
		}

2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719
		j = 0;
		mem_arr = mem_arr_orig;
		alloc_size = phba->mem_req[i];
		memset(mem_arr, 0, sizeof(struct mem_array) *
		       BEISCSI_MAX_FRAGS_INIT);
		curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
		do {
			mem_arr->virtual_address = pci_alloc_consistent(
							phba->pcidev,
							curr_alloc_size,
							&bus_add);
			if (!mem_arr->virtual_address) {
				if (curr_alloc_size <= BE_MIN_MEM_SIZE)
					goto free_mem;
				if (curr_alloc_size -
					rounddown_pow_of_two(curr_alloc_size))
					curr_alloc_size = rounddown_pow_of_two
							     (curr_alloc_size);
				else
					curr_alloc_size = curr_alloc_size / 2;
			} else {
				mem_arr->bus_address.u.
				    a64.address = (__u64) bus_add;
				mem_arr->size = curr_alloc_size;
				alloc_size -= curr_alloc_size;
				curr_alloc_size = min(be_max_phys_size *
						      1024, alloc_size);
				j++;
				mem_arr++;
			}
		} while (alloc_size);
		mem_descr->num_elements = j;
		mem_descr->size_in_bytes = phba->mem_req[i];
		mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
					       GFP_KERNEL);
		if (!mem_descr->mem_array)
			goto free_mem;

		memcpy(mem_descr->mem_array, mem_arr_orig,
		       sizeof(struct mem_array) * j);
		mem_descr++;
	}
	kfree(mem_arr_orig);
	return 0;
free_mem:
	mem_descr->num_elements = j;
	while ((i) || (j)) {
		for (j = mem_descr->num_elements; j > 0; j--) {
			pci_free_consistent(phba->pcidev,
					    mem_descr->mem_array[j - 1].size,
					    mem_descr->mem_array[j - 1].
					    virtual_address,
2720 2721
					    (unsigned long)mem_descr->
					    mem_array[j - 1].
2722 2723 2724 2725 2726 2727 2728 2729 2730 2731
					    bus_address.u.a64.address);
		}
		if (i) {
			i--;
			kfree(mem_descr->mem_array);
			mem_descr--;
		}
	}
	kfree(mem_arr_orig);
	kfree(phba->init_mem);
2732
	kfree(phba->phwi_ctrlr->wrb_context);
2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767
	kfree(phba->phwi_ctrlr);
	return -ENOMEM;
}

static int beiscsi_get_memory(struct beiscsi_hba *phba)
{
	beiscsi_find_mem_req(phba);
	return beiscsi_alloc_mem(phba);
}

static void iscsi_init_global_templates(struct beiscsi_hba *phba)
{
	struct pdu_data_out *pdata_out;
	struct pdu_nop_out *pnop_out;
	struct be_mem_descriptor *mem_descr;

	mem_descr = phba->init_mem;
	mem_descr += ISCSI_MEM_GLOBAL_HEADER;
	pdata_out =
	    (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
	memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);

	AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
		      IIOC_SCSI_DATA);

	pnop_out =
	    (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
				   virtual_address + BE_ISCSI_PDU_HEADER_SIZE);

	memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
	AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
	AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
	AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
}

2768
static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2769 2770
{
	struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2771
	struct hwi_context_memory *phwi_ctxt;
2772
	struct wrb_handle *pwrb_handle = NULL;
2773 2774
	struct hwi_controller *phwi_ctrlr;
	struct hwi_wrb_context *pwrb_context;
2775 2776 2777
	struct iscsi_wrb *pwrb = NULL;
	unsigned int num_cxn_wrbh = 0;
	unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2778 2779 2780 2781 2782 2783 2784 2785

	mem_descr_wrbh = phba->init_mem;
	mem_descr_wrbh += HWI_MEM_WRBH;

	mem_descr_wrb = phba->init_mem;
	mem_descr_wrb += HWI_MEM_WRB;
	phwi_ctrlr = phba->phwi_ctrlr;

2786 2787 2788
	/* Allocate memory for WRBQ */
	phwi_ctxt = phwi_ctrlr->phwi_ctxt;
	phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
2789
				     phba->params.cxns_per_ctrl,
2790 2791 2792 2793 2794 2795 2796 2797
				     GFP_KERNEL);
	if (!phwi_ctxt->be_wrbq) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : WRBQ Mem Alloc Failed\n");
		return -ENOMEM;
	}

	for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2798 2799 2800 2801
		pwrb_context = &phwi_ctrlr->wrb_context[index];
		pwrb_context->pwrb_handle_base =
				kzalloc(sizeof(struct wrb_handle *) *
					phba->params.wrbs_per_cxn, GFP_KERNEL);
2802
		if (!pwrb_context->pwrb_handle_base) {
2803 2804
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : Mem Alloc Failed. Failing to load\n");
2805 2806
			goto init_wrb_hndl_failed;
		}
2807 2808 2809
		pwrb_context->pwrb_handle_basestd =
				kzalloc(sizeof(struct wrb_handle *) *
					phba->params.wrbs_per_cxn, GFP_KERNEL);
2810
		if (!pwrb_context->pwrb_handle_basestd) {
2811 2812
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : Mem Alloc Failed. Failing to load\n");
2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826
			goto init_wrb_hndl_failed;
		}
		if (!num_cxn_wrbh) {
			pwrb_handle =
				mem_descr_wrbh->mem_array[idx].virtual_address;
			num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
					((sizeof(struct wrb_handle)) *
					 phba->params.wrbs_per_cxn));
			idx++;
		}
		pwrb_context->alloc_index = 0;
		pwrb_context->wrb_handles_available = 0;
		pwrb_context->free_index = 0;

2827 2828 2829 2830 2831 2832
		if (num_cxn_wrbh) {
			for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
				pwrb_context->pwrb_handle_base[j] = pwrb_handle;
				pwrb_context->pwrb_handle_basestd[j] =
								pwrb_handle;
				pwrb_context->wrb_handles_available++;
2833
				pwrb_handle->wrb_index = j;
2834 2835 2836 2837 2838 2839
				pwrb_handle++;
			}
			num_cxn_wrbh--;
		}
	}
	idx = 0;
2840
	for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2841
		pwrb_context = &phwi_ctrlr->wrb_context[index];
2842
		if (!num_cxn_wrb) {
2843
			pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2844
			num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2845 2846 2847 2848 2849 2850
				((sizeof(struct iscsi_wrb) *
				  phba->params.wrbs_per_cxn));
			idx++;
		}

		if (num_cxn_wrb) {
2851 2852 2853 2854 2855 2856 2857 2858
			for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
				pwrb_handle = pwrb_context->pwrb_handle_base[j];
				pwrb_handle->pwrb = pwrb;
				pwrb++;
			}
			num_cxn_wrb--;
		}
	}
2859 2860 2861 2862 2863 2864 2865 2866
	return 0;
init_wrb_hndl_failed:
	for (j = index; j > 0; j--) {
		pwrb_context = &phwi_ctrlr->wrb_context[j];
		kfree(pwrb_context->pwrb_handle_base);
		kfree(pwrb_context->pwrb_handle_basestd);
	}
	return -ENOMEM;
2867 2868
}

2869
static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2870
{
2871
	uint8_t ulp_num;
2872 2873 2874 2875
	struct hwi_controller *phwi_ctrlr;
	struct hba_parameters *p = &phba->params;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2876
	unsigned int index, idx, num_per_mem, num_async_data;
2877 2878
	struct be_mem_descriptor *mem_descr;

2879 2880
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2881

2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915 2916 2917 2918 2919
			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET));

			phwi_ctrlr = phba->phwi_ctrlr;
			phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
				(struct hwi_async_pdu_context *)
				 mem_descr->mem_array[0].virtual_address;

			pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
			memset(pasync_ctx, 0, sizeof(*pasync_ctx));

			pasync_ctx->async_entry =
					(struct hwi_async_entry *)
					((long unsigned int)pasync_ctx +
					sizeof(struct hwi_async_pdu_context));

			pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba,
						  ulp_num);
			pasync_ctx->buffer_size = p->defpdu_hdr_sz;

			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
				(ulp_num * MEM_DESCR_OFFSET);
			if (mem_descr->mem_array[0].virtual_address) {
				beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					    "BM_%d : hwi_init_async_pdu_ctx"
					    " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
					    ulp_num,
					    mem_descr->mem_array[0].
					    virtual_address);
			} else
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);

			pasync_ctx->async_header.va_base =
2920 2921
				mem_descr->mem_array[0].virtual_address;

2922 2923 2924
			pasync_ctx->async_header.pa_base.u.a64.address =
				mem_descr->mem_array[0].
				bus_address.u.a64.address;
2925

2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 2936 2937 2938 2939 2940 2941 2942 2943
			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET);
			if (mem_descr->mem_array[0].virtual_address) {
				beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					    "BM_%d : hwi_init_async_pdu_ctx"
					    " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
					    ulp_num,
					    mem_descr->mem_array[0].
					    virtual_address);
			} else
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);

			pasync_ctx->async_header.ring_base =
				mem_descr->mem_array[0].virtual_address;
2944

2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983
			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET);
			if (mem_descr->mem_array[0].virtual_address) {
				beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					    "BM_%d : hwi_init_async_pdu_ctx"
					    " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
					    ulp_num,
					    mem_descr->mem_array[0].
					    virtual_address);
			} else
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);

			pasync_ctx->async_header.handle_base =
				mem_descr->mem_array[0].virtual_address;
			pasync_ctx->async_header.writables = 0;
			INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);

			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET);
			if (mem_descr->mem_array[0].virtual_address) {
				beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					    "BM_%d : hwi_init_async_pdu_ctx"
					    " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
					    ulp_num,
					    mem_descr->mem_array[0].
					    virtual_address);
			} else
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);

			pasync_ctx->async_data.ring_base =
				mem_descr->mem_array[0].virtual_address;
2984

2985 2986 2987 2988 2989 2990 2991 2992
			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET);
			if (!mem_descr->mem_array[0].virtual_address)
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);
2993

2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022
			pasync_ctx->async_data.handle_base =
				mem_descr->mem_array[0].virtual_address;
			pasync_ctx->async_data.writables = 0;
			INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);

			pasync_header_h =
				(struct async_pdu_handle *)
				pasync_ctx->async_header.handle_base;
			pasync_data_h =
				(struct async_pdu_handle *)
				pasync_ctx->async_data.handle_base;

			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
				     (ulp_num * MEM_DESCR_OFFSET);
			if (mem_descr->mem_array[0].virtual_address) {
				beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
					    "BM_%d : hwi_init_async_pdu_ctx"
					    " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
					    ulp_num,
					    mem_descr->mem_array[0].
					    virtual_address);
			} else
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : No Virtual address for ULP : %d\n",
					    ulp_num);

			idx = 0;
3023 3024 3025 3026 3027 3028 3029 3030
			pasync_ctx->async_data.va_base =
				mem_descr->mem_array[idx].virtual_address;
			pasync_ctx->async_data.pa_base.u.a64.address =
				mem_descr->mem_array[idx].
				bus_address.u.a64.address;

			num_async_data = ((mem_descr->mem_array[idx].size) /
					phba->params.defpdu_data_sz);
3031
			num_per_mem = 0;
3032

3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099
			for (index = 0;	index < BEISCSI_GET_CID_COUNT
					(phba, ulp_num); index++) {
				pasync_header_h->cri = -1;
				pasync_header_h->index = (char)index;
				INIT_LIST_HEAD(&pasync_header_h->link);
				pasync_header_h->pbuffer =
					(void *)((unsigned long)
						 (pasync_ctx->
						  async_header.va_base) +
						 (p->defpdu_hdr_sz * index));

				pasync_header_h->pa.u.a64.address =
					pasync_ctx->async_header.pa_base.u.a64.
					address + (p->defpdu_hdr_sz * index);

				list_add_tail(&pasync_header_h->link,
					      &pasync_ctx->async_header.
					      free_list);
				pasync_header_h++;
				pasync_ctx->async_header.free_entries++;
				pasync_ctx->async_header.writables++;

				INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
					       wait_queue.list);
				INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
					       header_busy_list);
				pasync_data_h->cri = -1;
				pasync_data_h->index = (char)index;
				INIT_LIST_HEAD(&pasync_data_h->link);

				if (!num_async_data) {
					num_per_mem = 0;
					idx++;
					pasync_ctx->async_data.va_base =
						mem_descr->mem_array[idx].
						virtual_address;
					pasync_ctx->async_data.pa_base.u.
						a64.address =
						mem_descr->mem_array[idx].
						bus_address.u.a64.address;
					num_async_data =
						((mem_descr->mem_array[idx].
						  size) /
						 phba->params.defpdu_data_sz);
				}
				pasync_data_h->pbuffer =
					(void *)((unsigned long)
					(pasync_ctx->async_data.va_base) +
					(p->defpdu_data_sz * num_per_mem));

				pasync_data_h->pa.u.a64.address =
					pasync_ctx->async_data.pa_base.u.a64.
					address + (p->defpdu_data_sz *
					num_per_mem);
				num_per_mem++;
				num_async_data--;

				list_add_tail(&pasync_data_h->link,
					      &pasync_ctx->async_data.
					      free_list);
				pasync_data_h++;
				pasync_ctx->async_data.free_entries++;
				pasync_ctx->async_data.writables++;

				INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
					       data_busy_list);
			}
3100

3101 3102 3103 3104 3105
			pasync_ctx->async_header.host_write_ptr = 0;
			pasync_ctx->async_header.ep_read_ptr = -1;
			pasync_ctx->async_data.host_write_ptr = 0;
			pasync_ctx->async_data.ep_read_ptr = -1;
		}
3106 3107
	}

3108
	return 0;
3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121
}

static int
be_sgl_create_contiguous(void *virtual_address,
			 u64 physical_address, u32 length,
			 struct be_dma_mem *sgl)
{
	WARN_ON(!virtual_address);
	WARN_ON(!physical_address);
	WARN_ON(!length > 0);
	WARN_ON(!sgl);

	sgl->va = virtual_address;
3122
	sgl->dma = (unsigned long)physical_address;
3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172
	sgl->size = length;

	return 0;
}

static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
{
	memset(sgl, 0, sizeof(*sgl));
}

static void
hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
		     struct mem_array *pmem, struct be_dma_mem *sgl)
{
	if (sgl->va)
		be_sgl_destroy_contiguous(sgl);

	be_sgl_create_contiguous(pmem->virtual_address,
				 pmem->bus_address.u.a64.address,
				 pmem->size, sgl);
}

static void
hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
			   struct mem_array *pmem, struct be_dma_mem *sgl)
{
	if (sgl->va)
		be_sgl_destroy_contiguous(sgl);

	be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
				 pmem->bus_address.u.a64.address,
				 pmem->size, sgl);
}

static int be_fill_queue(struct be_queue_info *q,
		u16 len, u16 entry_size, void *vaddress)
{
	struct be_dma_mem *mem = &q->dma_mem;

	memset(q, 0, sizeof(*q));
	q->len = len;
	q->entry_size = entry_size;
	mem->size = len * entry_size;
	mem->va = vaddress;
	if (!mem->va)
		return -ENOMEM;
	memset(mem->va, 0, mem->size);
	return 0;
}

3173
static int beiscsi_create_eqs(struct beiscsi_hba *phba,
3174 3175
			     struct hwi_context_memory *phwi_context)
{
3176
	unsigned int i, num_eq_pages;
3177
	int ret = 0, eq_for_mcc;
3178 3179 3180
	struct be_queue_info *eq;
	struct be_dma_mem *mem;
	void *eq_vaddress;
3181
	dma_addr_t paddr;
3182

3183 3184
	num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
				      sizeof(struct be_eq_entry));
3185

3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203
	if (phba->msix_enabled)
		eq_for_mcc = 1;
	else
		eq_for_mcc = 0;
	for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
		eq = &phwi_context->be_eq[i].q;
		mem = &eq->dma_mem;
		phwi_context->be_eq[i].phba = phba;
		eq_vaddress = pci_alloc_consistent(phba->pcidev,
						     num_eq_pages * PAGE_SIZE,
						     &paddr);
		if (!eq_vaddress)
			goto create_eq_error;

		mem->va = eq_vaddress;
		ret = be_fill_queue(eq, phba->params.num_eq_entries,
				    sizeof(struct be_eq_entry), eq_vaddress);
		if (ret) {
3204 3205
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : be_fill_queue Failed for EQ\n");
3206 3207
			goto create_eq_error;
		}
3208

3209 3210 3211 3212
		mem->dma = paddr;
		ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
					    phwi_context->cur_eqd);
		if (ret) {
3213 3214 3215
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : beiscsi_cmd_eq_create"
				    "Failed for EQ\n");
3216 3217
			goto create_eq_error;
		}
3218 3219 3220 3221

		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
			    "BM_%d : eqid = %d\n",
			    phwi_context->be_eq[i].q.id);
3222 3223
	}
	return 0;
3224
create_eq_error:
3225
	for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3226 3227 3228 3229 3230 3231 3232 3233
		eq = &phwi_context->be_eq[i].q;
		mem = &eq->dma_mem;
		if (mem->va)
			pci_free_consistent(phba->pcidev, num_eq_pages
					    * PAGE_SIZE,
					    mem->va, mem->dma);
	}
	return ret;
3234 3235
}

3236
static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3237 3238
			     struct hwi_context_memory *phwi_context)
{
3239
	unsigned int i, num_cq_pages;
3240
	int ret = 0;
3241 3242
	struct be_queue_info *cq, *eq;
	struct be_dma_mem *mem;
3243
	struct be_eq_obj *pbe_eq;
3244
	void *cq_vaddress;
3245
	dma_addr_t paddr;
3246

3247 3248
	num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
				      sizeof(struct sol_cqe));
3249

3250 3251 3252 3253 3254 3255 3256 3257 3258 3259 3260 3261
	for (i = 0; i < phba->num_cpus; i++) {
		cq = &phwi_context->be_cq[i];
		eq = &phwi_context->be_eq[i].q;
		pbe_eq = &phwi_context->be_eq[i];
		pbe_eq->cq = cq;
		pbe_eq->phba = phba;
		mem = &cq->dma_mem;
		cq_vaddress = pci_alloc_consistent(phba->pcidev,
						     num_cq_pages * PAGE_SIZE,
						     &paddr);
		if (!cq_vaddress)
			goto create_cq_error;
3262
		ret = be_fill_queue(cq, phba->params.num_cq_entries,
3263 3264
				    sizeof(struct sol_cqe), cq_vaddress);
		if (ret) {
3265 3266 3267
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : be_fill_queue Failed "
				    "for ISCSI CQ\n");
3268 3269 3270 3271 3272 3273 3274
			goto create_cq_error;
		}

		mem->dma = paddr;
		ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
					    false, 0);
		if (ret) {
3275 3276 3277
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : beiscsi_cmd_eq_create"
				    "Failed for ISCSI CQ\n");
3278 3279
			goto create_cq_error;
		}
3280 3281 3282
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
			    "BM_%d : iscsi cq_id is %d for eq_id %d\n"
			    "iSCSI CQ CREATED\n", cq->id, eq->id);
3283 3284
	}
	return 0;
3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296

create_cq_error:
	for (i = 0; i < phba->num_cpus; i++) {
		cq = &phwi_context->be_cq[i];
		mem = &cq->dma_mem;
		if (mem->va)
			pci_free_consistent(phba->pcidev, num_cq_pages
					    * PAGE_SIZE,
					    mem->va, mem->dma);
	}
	return ret;

3297 3298 3299 3300 3301 3302
}

static int
beiscsi_create_def_hdr(struct beiscsi_hba *phba,
		       struct hwi_context_memory *phwi_context,
		       struct hwi_controller *phwi_ctrlr,
3303
		       unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3304 3305 3306 3307 3308 3309 3310 3311 3312
{
	unsigned int idx;
	int ret;
	struct be_queue_info *dq, *cq;
	struct be_dma_mem *mem;
	struct be_mem_descriptor *mem_descr;
	void *dq_vaddress;

	idx = 0;
3313
	dq = &phwi_context->be_def_hdrq[ulp_num];
3314
	cq = &phwi_context->be_cq[0];
3315 3316
	mem = &dq->dma_mem;
	mem_descr = phba->init_mem;
3317 3318
	mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
		    (ulp_num * MEM_DESCR_OFFSET);
3319 3320 3321 3322 3323
	dq_vaddress = mem_descr->mem_array[idx].virtual_address;
	ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
			    sizeof(struct phys_addr),
			    sizeof(struct phys_addr), dq_vaddress);
	if (ret) {
3324
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3325 3326 3327
			    "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
			    ulp_num);

3328 3329
		return ret;
	}
3330 3331
	mem->dma = (unsigned long)mem_descr->mem_array[idx].
				  bus_address.u.a64.address;
3332 3333
	ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
					      def_pdu_ring_sz,
3334 3335
					      phba->params.defpdu_hdr_sz,
					      BEISCSI_DEFQ_HDR, ulp_num);
3336
	if (ret) {
3337
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3338 3339 3340
			    "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
			    ulp_num);

3341 3342
		return ret;
	}
3343

3344 3345 3346 3347 3348
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
		    ulp_num,
		    phwi_context->be_def_hdrq[ulp_num].id);
	hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR, ulp_num);
3349 3350 3351 3352 3353 3354 3355
	return 0;
}

static int
beiscsi_create_def_data(struct beiscsi_hba *phba,
			struct hwi_context_memory *phwi_context,
			struct hwi_controller *phwi_ctrlr,
3356
			unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3357 3358 3359 3360 3361 3362 3363 3364 3365
{
	unsigned int idx;
	int ret;
	struct be_queue_info *dataq, *cq;
	struct be_dma_mem *mem;
	struct be_mem_descriptor *mem_descr;
	void *dq_vaddress;

	idx = 0;
3366
	dataq = &phwi_context->be_def_dataq[ulp_num];
3367
	cq = &phwi_context->be_cq[0];
3368 3369
	mem = &dataq->dma_mem;
	mem_descr = phba->init_mem;
3370 3371
	mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
		    (ulp_num * MEM_DESCR_OFFSET);
3372 3373 3374 3375 3376
	dq_vaddress = mem_descr->mem_array[idx].virtual_address;
	ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
			    sizeof(struct phys_addr),
			    sizeof(struct phys_addr), dq_vaddress);
	if (ret) {
3377
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3378 3379 3380 3381
			    "BM_%d : be_fill_queue Failed for DEF PDU "
			    "DATA on ULP : %d\n",
			    ulp_num);

3382 3383
		return ret;
	}
3384 3385
	mem->dma = (unsigned long)mem_descr->mem_array[idx].
				  bus_address.u.a64.address;
3386 3387
	ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
					      def_pdu_ring_sz,
3388 3389
					      phba->params.defpdu_data_sz,
					      BEISCSI_DEFQ_DATA, ulp_num);
3390
	if (ret) {
3391 3392
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d be_cmd_create_default_pdu_queue"
3393 3394
			    " Failed for DEF PDU DATA on ULP : %d\n",
			    ulp_num);
3395 3396
		return ret;
	}
3397

3398
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3399 3400 3401
		    "BM_%d : iscsi def data id on ULP : %d is  %d\n",
		    ulp_num,
		    phwi_context->be_def_dataq[ulp_num].id);
3402

3403
	hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA, ulp_num);
3404
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3405 3406
		    "BM_%d : DEFAULT PDU DATA RING CREATED"
		    "on ULP : %d\n", ulp_num);
3407

3408 3409 3410
	return 0;
}

3411 3412 3413 3414 3415 3416 3417

static int
beiscsi_post_template_hdr(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr;
	struct mem_array *pm_arr;
	struct be_dma_mem sgl;
3418
	int status, ulp_num;
3419

3420 3421 3422 3423 3424 3425
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
			mem_descr = (struct be_mem_descriptor *)phba->init_mem;
			mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
				    (ulp_num * MEM_DESCR_OFFSET);
			pm_arr = mem_descr->mem_array;
3426

3427 3428 3429
			hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
			status = be_cmd_iscsi_post_template_hdr(
				 &phba->ctrl, &sgl);
3430

3431 3432 3433 3434 3435 3436 3437 3438 3439 3440
			if (status != 0) {
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : Post Template HDR Failed for"
					    "ULP_%d\n", ulp_num);
				return status;
			}

			beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
				    "BM_%d : Template HDR Pages Posted for"
				    "ULP_%d\n", ulp_num);
3441 3442 3443 3444 3445
		}
	}
	return 0;
}

3446 3447 3448 3449 3450 3451 3452
static int
beiscsi_post_pages(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr;
	struct mem_array *pm_arr;
	unsigned int page_offset, i;
	struct be_dma_mem sgl;
3453
	int status, ulp_num = 0;
3454 3455 3456 3457 3458

	mem_descr = phba->init_mem;
	mem_descr += HWI_MEM_SGE;
	pm_arr = mem_descr->mem_array;

3459 3460 3461 3462
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
			break;

3463
	page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3464
			phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3465 3466 3467 3468 3469 3470 3471
	for (i = 0; i < mem_descr->num_elements; i++) {
		hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
		status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
						page_offset,
						(pm_arr->size / PAGE_SIZE));
		page_offset += pm_arr->size / PAGE_SIZE;
		if (status != 0) {
3472 3473
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : post sgl failed.\n");
3474 3475 3476 3477
			return status;
		}
		pm_arr++;
	}
3478 3479
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : POSTED PAGES\n");
3480 3481 3482
	return 0;
}

3483 3484 3485
static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
{
	struct be_dma_mem *mem = &q->dma_mem;
3486
	if (mem->va) {
3487 3488
		pci_free_consistent(phba->pcidev, mem->size,
			mem->va, mem->dma);
3489 3490
		mem->va = NULL;
	}
3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503
}

static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
		u16 len, u16 entry_size)
{
	struct be_dma_mem *mem = &q->dma_mem;

	memset(q, 0, sizeof(*q));
	q->len = len;
	q->entry_size = entry_size;
	mem->size = len * entry_size;
	mem->va = pci_alloc_consistent(phba->pcidev, mem->size, &mem->dma);
	if (!mem->va)
3504
		return -ENOMEM;
3505 3506 3507 3508
	memset(mem->va, 0, mem->size);
	return 0;
}

3509 3510 3511 3512 3513 3514 3515
static int
beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
			 struct hwi_context_memory *phwi_context,
			 struct hwi_controller *phwi_ctrlr)
{
	unsigned int wrb_mem_index, offset, size, num_wrb_rings;
	u64 pa_addr_lo;
3516
	unsigned int idx, num, i, ulp_num;
3517 3518 3519 3520
	struct mem_array *pwrb_arr;
	void *wrb_vaddr;
	struct be_dma_mem sgl;
	struct be_mem_descriptor *mem_descr;
3521
	struct hwi_wrb_context *pwrb_context;
3522
	int status;
3523 3524
	uint8_t ulp_count = 0, ulp_base_num = 0;
	uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
3525 3526 3527 3528 3529 3530 3531

	idx = 0;
	mem_descr = phba->init_mem;
	mem_descr += HWI_MEM_WRB;
	pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
			   GFP_KERNEL);
	if (!pwrb_arr) {
3532 3533
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Memory alloc failed in create wrb ring.\n");
3534 3535 3536 3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567
		return -ENOMEM;
	}
	wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
	pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
	num_wrb_rings = mem_descr->mem_array[idx].size /
		(phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));

	for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
		if (num_wrb_rings) {
			pwrb_arr[num].virtual_address = wrb_vaddr;
			pwrb_arr[num].bus_address.u.a64.address	= pa_addr_lo;
			pwrb_arr[num].size = phba->params.wrbs_per_cxn *
					    sizeof(struct iscsi_wrb);
			wrb_vaddr += pwrb_arr[num].size;
			pa_addr_lo += pwrb_arr[num].size;
			num_wrb_rings--;
		} else {
			idx++;
			wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
			pa_addr_lo = mem_descr->mem_array[idx].\
					bus_address.u.a64.address;
			num_wrb_rings = mem_descr->mem_array[idx].size /
					(phba->params.wrbs_per_cxn *
					sizeof(struct iscsi_wrb));
			pwrb_arr[num].virtual_address = wrb_vaddr;
			pwrb_arr[num].bus_address.u.a64.address\
						= pa_addr_lo;
			pwrb_arr[num].size = phba->params.wrbs_per_cxn *
						 sizeof(struct iscsi_wrb);
			wrb_vaddr += pwrb_arr[num].size;
			pa_addr_lo   += pwrb_arr[num].size;
			num_wrb_rings--;
		}
	}
3568 3569 3570 3571 3572 3573 3574 3575 3576 3577

	/* Get the ULP Count */
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
			ulp_count++;
			ulp_base_num = ulp_num;
			cid_count_ulp[ulp_num] =
				BEISCSI_GET_CID_COUNT(phba, ulp_num);
		}

3578 3579 3580 3581 3582
	for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
		wrb_mem_index = 0;
		offset = 0;
		size = 0;

3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593
		if (ulp_count > 1) {
			ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;

			if (!cid_count_ulp[ulp_base_num])
				ulp_base_num = (ulp_base_num + 1) %
						BEISCSI_ULP_COUNT;

			cid_count_ulp[ulp_base_num]--;
		}


3594 3595
		hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
		status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3596 3597 3598
					    &phwi_context->be_wrbq[i],
					    &phwi_ctrlr->wrb_context[i],
					    ulp_base_num);
3599
		if (status != 0) {
3600 3601
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : wrbq create failed.");
3602
			kfree(pwrb_arr);
3603 3604
			return status;
		}
3605 3606
		pwrb_context = &phwi_ctrlr->wrb_context[i];
		BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618
	}
	kfree(pwrb_arr);
	return 0;
}

static void free_wrb_handles(struct beiscsi_hba *phba)
{
	unsigned int index;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_wrb_context *pwrb_context;

	phwi_ctrlr = phba->phwi_ctrlr;
3619
	for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3620 3621 3622 3623 3624 3625
		pwrb_context = &phwi_ctrlr->wrb_context[index];
		kfree(pwrb_context->pwrb_handle_base);
		kfree(pwrb_context->pwrb_handle_basestd);
	}
}

3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641
static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
{
	struct be_queue_info *q;
	struct be_ctrl_info *ctrl = &phba->ctrl;

	q = &phba->ctrl.mcc_obj.q;
	if (q->created)
		beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
	be_queue_free(phba, q);

	q = &phba->ctrl.mcc_obj.cq;
	if (q->created)
		beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
	be_queue_free(phba, q);
}

3642 3643 3644 3645 3646 3647
static void hwi_cleanup(struct beiscsi_hba *phba)
{
	struct be_queue_info *q;
	struct be_ctrl_info *ctrl = &phba->ctrl;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
3648
	struct hwi_async_pdu_context *pasync_ctx;
3649
	int i, eq_num, ulp_num;
3650 3651 3652

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
3653 3654 3655

	be_cmd_iscsi_remove_template_hdr(ctrl);

3656 3657 3658 3659 3660
	for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
		q = &phwi_context->be_wrbq[i];
		if (q->created)
			beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
	}
3661
	kfree(phwi_context->be_wrbq);
3662 3663
	free_wrb_handles(phba);

3664 3665
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3666

3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677
			q = &phwi_context->be_def_hdrq[ulp_num];
			if (q->created)
				beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);

			q = &phwi_context->be_def_dataq[ulp_num];
			if (q->created)
				beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);

			pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
		}
	}
3678 3679 3680

	beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);

3681 3682 3683 3684 3685 3686 3687 3688 3689 3690 3691 3692 3693 3694 3695
	for (i = 0; i < (phba->num_cpus); i++) {
		q = &phwi_context->be_cq[i];
		if (q->created)
			beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
	}
	if (phba->msix_enabled)
		eq_num = 1;
	else
		eq_num = 0;
	for (i = 0; i < (phba->num_cpus + eq_num); i++) {
		q = &phwi_context->be_eq[i].q;
		if (q->created)
			beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
	}
	be_mcc_queues_destroy(phba);
3696
	be_cmd_fw_uninit(ctrl);
3697
}
3698

3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712 3713 3714 3715 3716 3717 3718 3719 3720 3721 3722 3723 3724 3725 3726
static int be_mcc_queues_create(struct beiscsi_hba *phba,
				struct hwi_context_memory *phwi_context)
{
	struct be_queue_info *q, *cq;
	struct be_ctrl_info *ctrl = &phba->ctrl;

	/* Alloc MCC compl queue */
	cq = &phba->ctrl.mcc_obj.cq;
	if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
			sizeof(struct be_mcc_compl)))
		goto err;
	/* Ask BE to create MCC compl queue; */
	if (phba->msix_enabled) {
		if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
					 [phba->num_cpus].q, false, true, 0))
		goto mcc_cq_free;
	} else {
		if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
					  false, true, 0))
		goto mcc_cq_free;
	}

	/* Alloc MCC queue */
	q = &phba->ctrl.mcc_obj.q;
	if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
		goto mcc_cq_destroy;

	/* Ask BE to create MCC queue */
3727
	if (beiscsi_cmd_mccq_create(phba, q, cq))
3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738
		goto mcc_q_free;

	return 0;

mcc_q_free:
	be_queue_free(phba, q);
mcc_cq_destroy:
	beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
mcc_cq_free:
	be_queue_free(phba, cq);
err:
3739
	return -ENOMEM;
3740 3741
}

3742 3743 3744 3745 3746 3747 3748
/**
 * find_num_cpus()- Get the CPU online count
 * @phba: ptr to priv structure
 *
 * CPU count is used for creating EQ.
 **/
static void find_num_cpus(struct beiscsi_hba *phba)
3749 3750 3751 3752 3753
{
	int  num_cpus = 0;

	num_cpus = num_online_cpus();

3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765 3766
	switch (phba->generation) {
	case BE_GEN2:
	case BE_GEN3:
		phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
				  BEISCSI_MAX_NUM_CPUS : num_cpus;
		break;
	case BE_GEN4:
		phba->num_cpus = (num_cpus > OC_SKH_MAX_NUM_CPUS) ?
				  OC_SKH_MAX_NUM_CPUS : num_cpus;
		break;
	default:
		phba->num_cpus = 1;
	}
3767 3768 3769 3770 3771 3772 3773 3774
}

static int hwi_init_port(struct beiscsi_hba *phba)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	unsigned int def_pdu_ring_sz;
	struct be_ctrl_info *ctrl = &phba->ctrl;
3775
	int status, ulp_num;
3776 3777 3778

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
3779 3780 3781
	phwi_context->max_eqd = 0;
	phwi_context->min_eqd = 0;
	phwi_context->cur_eqd = 64;
3782
	be_cmd_fw_initialize(&phba->ctrl);
3783 3784

	status = beiscsi_create_eqs(phba, phwi_context);
3785
	if (status != 0) {
3786 3787
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : EQ not created\n");
3788 3789 3790
		goto error;
	}

3791 3792 3793 3794 3795
	status = be_mcc_queues_create(phba, phwi_context);
	if (status != 0)
		goto error;

	status = mgmt_check_supported_fw(ctrl, phba);
3796
	if (status != 0) {
3797 3798
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Unsupported fw version\n");
3799 3800 3801
		goto error;
	}

3802
	status = beiscsi_create_cqs(phba, phwi_context);
3803
	if (status != 0) {
3804 3805
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : CQ not created\n");
3806 3807 3808
		goto error;
	}

3809 3810
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3811

3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837
			def_pdu_ring_sz =
				BEISCSI_GET_CID_COUNT(phba, ulp_num) *
				sizeof(struct phys_addr);

			status = beiscsi_create_def_hdr(phba, phwi_context,
							phwi_ctrlr,
							def_pdu_ring_sz,
							ulp_num);
			if (status != 0) {
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : Default Header not created for ULP : %d\n",
					    ulp_num);
				goto error;
			}

			status = beiscsi_create_def_data(phba, phwi_context,
							 phwi_ctrlr,
							 def_pdu_ring_sz,
							 ulp_num);
			if (status != 0) {
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : Default Data not created for ULP : %d\n",
					    ulp_num);
				goto error;
			}
		}
3838 3839 3840 3841
	}

	status = beiscsi_post_pages(phba);
	if (status != 0) {
3842 3843
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Post SGL Pages Failed\n");
3844 3845 3846
		goto error;
	}

3847 3848 3849 3850 3851 3852
	status = beiscsi_post_template_hdr(phba);
	if (status != 0) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Template HDR Posting for CXN Failed\n");
	}

3853 3854
	status = beiscsi_create_wrb_rings(phba,	phwi_context, phwi_ctrlr);
	if (status != 0) {
3855 3856
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : WRB Rings not created\n");
3857 3858 3859
		goto error;
	}

3860 3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		uint16_t async_arr_idx = 0;

		if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
			uint16_t cri = 0;
			struct hwi_async_pdu_context *pasync_ctx;

			pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
				     phwi_ctrlr, ulp_num);
			for (cri = 0; cri <
			     phba->params.cxns_per_ctrl; cri++) {
				if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
					       (phwi_ctrlr, cri))
					pasync_ctx->cid_to_async_cri_map[
					phwi_ctrlr->wrb_context[cri].cid] =
					async_arr_idx++;
			}
		}
	}

3880 3881
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : hwi_init_port success\n");
3882 3883 3884
	return 0;

error:
3885 3886
	beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
		    "BM_%d : hwi_init_port failed");
3887
	hwi_cleanup(phba);
3888
	return status;
3889 3890 3891 3892 3893 3894 3895 3896 3897 3898
}

static int hwi_init_controller(struct beiscsi_hba *phba)
{
	struct hwi_controller *phwi_ctrlr;

	phwi_ctrlr = phba->phwi_ctrlr;
	if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
		phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
		    init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3899 3900 3901
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
			    "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
			    phwi_ctrlr->phwi_ctxt);
3902
	} else {
3903 3904 3905
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
			    "than one element.Failing to load\n");
3906 3907 3908 3909
		return -ENOMEM;
	}

	iscsi_init_global_templates(phba);
3910 3911 3912
	if (beiscsi_init_wrb_handle(phba))
		return -ENOMEM;

3913 3914 3915 3916 3917 3918
	if (hwi_init_async_pdu_ctx(phba)) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : hwi_init_async_pdu_ctx failed\n");
		return -ENOMEM;
	}

3919
	if (hwi_init_port(phba) != 0) {
3920 3921 3922
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : hwi_init_controller failed\n");

3923 3924 3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935 3936 3937 3938 3939 3940
		return -ENOMEM;
	}
	return 0;
}

static void beiscsi_free_mem(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr;
	int i, j;

	mem_descr = phba->init_mem;
	i = 0;
	j = 0;
	for (i = 0; i < SE_MEM_MAX; i++) {
		for (j = mem_descr->num_elements; j > 0; j--) {
			pci_free_consistent(phba->pcidev,
			  mem_descr->mem_array[j - 1].size,
			  mem_descr->mem_array[j - 1].virtual_address,
3941 3942
			  (unsigned long)mem_descr->mem_array[j - 1].
			  bus_address.u.a64.address);
3943
		}
3944

3945 3946 3947 3948
		kfree(mem_descr->mem_array);
		mem_descr++;
	}
	kfree(phba->init_mem);
3949
	kfree(phba->phwi_ctrlr->wrb_context);
3950 3951 3952 3953 3954 3955 3956 3957 3958
	kfree(phba->phwi_ctrlr);
}

static int beiscsi_init_controller(struct beiscsi_hba *phba)
{
	int ret = -ENOMEM;

	ret = beiscsi_get_memory(phba);
	if (ret < 0) {
3959 3960 3961
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe -"
			    "Failed in beiscsi_alloc_memory\n");
3962 3963 3964 3965 3966 3967
		return ret;
	}

	ret = hwi_init_controller(phba);
	if (ret)
		goto free_init;
3968 3969 3970
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : Return success from beiscsi_init_controller");

3971 3972 3973 3974
	return 0;

free_init:
	beiscsi_free_mem(phba);
3975
	return ret;
3976 3977 3978 3979 3980 3981 3982
}

static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
	struct sgl_handle *psgl_handle;
	struct iscsi_sge *pfrag;
3983 3984
	unsigned int arr_index, i, idx;
	unsigned int ulp_icd_start, ulp_num = 0;
3985 3986 3987

	phba->io_sgl_hndl_avbl = 0;
	phba->eh_sgl_hndl_avbl = 0;
3988

3989 3990 3991 3992 3993 3994 3995
	mem_descr_sglh = phba->init_mem;
	mem_descr_sglh += HWI_MEM_SGLH;
	if (1 == mem_descr_sglh->num_elements) {
		phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
						 phba->params.ios_per_ctrl,
						 GFP_KERNEL);
		if (!phba->io_sgl_hndl_base) {
3996 3997
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : Mem Alloc Failed. Failing to load\n");
3998 3999 4000 4001 4002 4003 4004 4005
			return -ENOMEM;
		}
		phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
						 (phba->params.icds_per_ctrl -
						 phba->params.ios_per_ctrl),
						 GFP_KERNEL);
		if (!phba->eh_sgl_hndl_base) {
			kfree(phba->io_sgl_hndl_base);
4006 4007
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
				    "BM_%d : Mem Alloc Failed. Failing to load\n");
4008 4009 4010
			return -ENOMEM;
		}
	} else {
4011 4012 4013
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : HWI_MEM_SGLH is more than one element."
			    "Failing to load\n");
4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033 4034 4035 4036 4037 4038
		return -ENOMEM;
	}

	arr_index = 0;
	idx = 0;
	while (idx < mem_descr_sglh->num_elements) {
		psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;

		for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
		      sizeof(struct sgl_handle)); i++) {
			if (arr_index < phba->params.ios_per_ctrl) {
				phba->io_sgl_hndl_base[arr_index] = psgl_handle;
				phba->io_sgl_hndl_avbl++;
				arr_index++;
			} else {
				phba->eh_sgl_hndl_base[arr_index -
					phba->params.ios_per_ctrl] =
								psgl_handle;
				arr_index++;
				phba->eh_sgl_hndl_avbl++;
			}
			psgl_handle++;
		}
		idx++;
	}
4039 4040 4041 4042 4043 4044
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : phba->io_sgl_hndl_avbl=%d"
		    "phba->eh_sgl_hndl_avbl=%d\n",
		    phba->io_sgl_hndl_avbl,
		    phba->eh_sgl_hndl_avbl);

4045 4046
	mem_descr_sg = phba->init_mem;
	mem_descr_sg += HWI_MEM_SGE;
4047 4048 4049 4050
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "\n BM_%d : mem_descr_sg->num_elements=%d\n",
		    mem_descr_sg->num_elements);

4051 4052 4053 4054 4055 4056
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
		if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
			break;

	ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];

4057 4058 4059 4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074
	arr_index = 0;
	idx = 0;
	while (idx < mem_descr_sg->num_elements) {
		pfrag = mem_descr_sg->mem_array[idx].virtual_address;

		for (i = 0;
		     i < (mem_descr_sg->mem_array[idx].size) /
		     (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
		     i++) {
			if (arr_index < phba->params.ios_per_ctrl)
				psgl_handle = phba->io_sgl_hndl_base[arr_index];
			else
				psgl_handle = phba->eh_sgl_hndl_base[arr_index -
						phba->params.ios_per_ctrl];
			psgl_handle->pfrag = pfrag;
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
			pfrag += phba->params.num_sge_per_io;
4075
			psgl_handle->sgl_index = ulp_icd_start + arr_index++;
4076 4077 4078 4079 4080 4081 4082 4083 4084 4085 4086 4087
		}
		idx++;
	}
	phba->io_sgl_free_index = 0;
	phba->io_sgl_alloc_index = 0;
	phba->eh_sgl_free_index = 0;
	phba->eh_sgl_alloc_index = 0;
	return 0;
}

static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
{
4088 4089 4090
	int ret;
	uint16_t i, ulp_num;
	struct ulp_cid_info *ptr_cid_info = NULL;
4091

4092 4093 4094 4095 4096 4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
			ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
					       GFP_KERNEL);

			if (!ptr_cid_info) {
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : Failed to allocate memory"
					    "for ULP_CID_INFO for ULP : %d\n",
					    ulp_num);
				ret = -ENOMEM;
				goto free_memory;

			}

			/* Allocate memory for CID array */
			ptr_cid_info->cid_array = kzalloc(sizeof(void *) *
						  BEISCSI_GET_CID_COUNT(phba,
						  ulp_num), GFP_KERNEL);
			if (!ptr_cid_info->cid_array) {
				beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
					    "BM_%d : Failed to allocate memory"
					    "for CID_ARRAY for ULP : %d\n",
					    ulp_num);
				kfree(ptr_cid_info);
				ptr_cid_info = NULL;
				ret = -ENOMEM;

				goto free_memory;
			}
			ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
						   phba, ulp_num);

			/* Save the cid_info_array ptr */
			phba->cid_array_info[ulp_num] = ptr_cid_info;
		}
4128
	}
4129
	phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
4130
				 phba->params.cxns_per_ctrl, GFP_KERNEL);
4131
	if (!phba->ep_array) {
4132 4133 4134
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Failed to allocate memory in "
			    "hba_setup_cid_tbls\n");
4135 4136 4137
		ret = -ENOMEM;

		goto free_memory;
4138
	}
4139 4140 4141 4142 4143 4144 4145 4146 4147 4148

	phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
				   phba->params.cxns_per_ctrl, GFP_KERNEL);
	if (!phba->conn_table) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Failed to allocate memory in"
			    "hba_setup_cid_tbls\n");

		kfree(phba->ep_array);
		phba->ep_array = NULL;
4149
		ret = -ENOMEM;
4150
	}
4151

4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163
	for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
		ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;

		ptr_cid_info = phba->cid_array_info[ulp_num];
		ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
			phba->phwi_ctrlr->wrb_context[i].cid;

	}

	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
			ptr_cid_info = phba->cid_array_info[ulp_num];
4164

4165 4166 4167 4168
			ptr_cid_info->cid_alloc = 0;
			ptr_cid_info->cid_free = 0;
		}
	}
4169
	return 0;
4170 4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182 4183 4184

free_memory:
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
			ptr_cid_info = phba->cid_array_info[ulp_num];

			if (ptr_cid_info) {
				kfree(ptr_cid_info->cid_array);
				kfree(ptr_cid_info);
				phba->cid_array_info[ulp_num] = NULL;
			}
		}
	}

	return ret;
4185 4186
}

4187
static void hwi_enable_intr(struct beiscsi_hba *phba)
4188 4189 4190 4191 4192 4193
{
	struct be_ctrl_info *ctrl = &phba->ctrl;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_queue_info *eq;
	u8 __iomem *addr;
4194
	u32 reg, i;
4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205 4206
	u32 enabled;

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;

	addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
			PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
	reg = ioread32(addr);

	enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
	if (!enabled) {
		reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4207 4208
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
			    "BM_%d : reg =x%08x addr=%p\n", reg, addr);
4209
		iowrite32(reg, addr);
4210 4211 4212 4213
	}

	if (!phba->msix_enabled) {
		eq = &phwi_context->be_eq[0].q;
4214 4215 4216
		beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
			    "BM_%d : eq->id=%d\n", eq->id);

4217 4218 4219 4220
		hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
	} else {
		for (i = 0; i <= phba->num_cpus; i++) {
			eq = &phwi_context->be_eq[i].q;
4221 4222
			beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
				    "BM_%d : eq->id=%d\n", eq->id);
4223 4224
			hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
		}
4225
	}
4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239
}

static void hwi_disable_intr(struct beiscsi_hba *phba)
{
	struct be_ctrl_info *ctrl = &phba->ctrl;

	u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
	u32 reg = ioread32(addr);

	u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
	if (enabled) {
		reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
		iowrite32(reg, addr);
	} else
4240 4241
		beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
			    "BM_%d : In hwi_disable_intr, Already Disabled\n");
4242 4243
}

4244 4245 4246 4247 4248 4249 4250 4251 4252 4253
/**
 * beiscsi_get_boot_info()- Get the boot session info
 * @phba: The device priv structure instance
 *
 * Get the boot target info and store in driver priv structure
 *
 * return values
 *	Success: 0
 *	Failure: Non-Zero Value
 **/
4254 4255
static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
{
4256
	struct be_cmd_get_session_resp *session_resp;
4257
	struct be_dma_mem nonemb_cmd;
4258
	unsigned int tag;
4259
	unsigned int s_handle;
4260
	int ret = -ENOMEM;
4261

4262 4263 4264
	/* Get the session handle of the boot target */
	ret = be_mgmt_get_boot_shandle(phba, &s_handle);
	if (ret) {
4265 4266 4267
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
			    "BM_%d : No boot session\n");
4268
		return ret;
4269 4270 4271 4272 4273
	}
	nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
				sizeof(*session_resp),
				&nonemb_cmd.dma);
	if (nonemb_cmd.va == NULL) {
4274 4275 4276 4277 4278
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
			    "BM_%d : Failed to allocate memory for"
			    "beiscsi_get_session_info\n");

4279 4280 4281 4282
		return -ENOMEM;
	}

	memset(nonemb_cmd.va, 0, sizeof(*session_resp));
4283
	tag = mgmt_get_session_info(phba, s_handle,
4284
				    &nonemb_cmd);
4285
	if (!tag) {
4286 4287 4288 4289 4290
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
			    "BM_%d : beiscsi_get_session_info"
			    " Failed\n");

4291
		goto boot_freemem;
4292
	}
4293

4294 4295
	ret = beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
	if (ret) {
4296 4297
		beiscsi_log(phba, KERN_ERR,
			    BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4298
			    "BM_%d : beiscsi_get_session_info Failed");
4299 4300
		goto boot_freemem;
	}
4301

4302
	session_resp = nonemb_cmd.va ;
4303

4304 4305
	memcpy(&phba->boot_sess, &session_resp->session_info,
	       sizeof(struct mgmt_session_info));
4306 4307
	ret = 0;

4308 4309 4310
boot_freemem:
	pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
		    nonemb_cmd.va, nonemb_cmd.dma);
4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366
	return ret;
}

static void beiscsi_boot_release(void *data)
{
	struct beiscsi_hba *phba = data;

	scsi_host_put(phba->shost);
}

static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
{
	struct iscsi_boot_kobj *boot_kobj;

	/* get boot info using mgmt cmd */
	if (beiscsi_get_boot_info(phba))
		/* Try to see if we can carry on without this */
		return 0;

	phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
	if (!phba->boot_kset)
		return -ENOMEM;

	/* get a ref because the show function will ref the phba */
	if (!scsi_host_get(phba->shost))
		goto free_kset;
	boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
					     beiscsi_show_boot_tgt_info,
					     beiscsi_tgt_get_attr_visibility,
					     beiscsi_boot_release);
	if (!boot_kobj)
		goto put_shost;

	if (!scsi_host_get(phba->shost))
		goto free_kset;
	boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
						beiscsi_show_boot_ini_info,
						beiscsi_ini_get_attr_visibility,
						beiscsi_boot_release);
	if (!boot_kobj)
		goto put_shost;

	if (!scsi_host_get(phba->shost))
		goto free_kset;
	boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
					       beiscsi_show_boot_eth_info,
					       beiscsi_eth_get_attr_visibility,
					       beiscsi_boot_release);
	if (!boot_kobj)
		goto put_shost;
	return 0;

put_shost:
	scsi_host_put(phba->shost);
free_kset:
	iscsi_boot_destroy_kset(phba->boot_kset);
4367 4368 4369
	return -ENOMEM;
}

4370 4371 4372 4373 4374 4375
static int beiscsi_init_port(struct beiscsi_hba *phba)
{
	int ret;

	ret = beiscsi_init_controller(phba);
	if (ret < 0) {
4376 4377 4378
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe - Failed in"
			    "beiscsi_init_controller\n");
4379 4380 4381 4382
		return ret;
	}
	ret = beiscsi_init_sgl_handle(phba);
	if (ret < 0) {
4383 4384 4385
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe - Failed in"
			    "beiscsi_init_sgl_handle\n");
4386 4387 4388 4389
		goto do_cleanup_ctrlr;
	}

	if (hba_setup_cid_tbls(phba)) {
4390 4391
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Failed in hba_setup_cid_tbls\n");
4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409
		kfree(phba->io_sgl_hndl_base);
		kfree(phba->eh_sgl_hndl_base);
		goto do_cleanup_ctrlr;
	}

	return ret;

do_cleanup_ctrlr:
	hwi_cleanup(phba);
	return ret;
}

static void hwi_purge_eq(struct beiscsi_hba *phba)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_queue_info *eq;
	struct be_eq_entry *eqe = NULL;
4410
	int i, eq_msix;
4411
	unsigned int num_processed;
4412 4413 4414

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
4415 4416 4417 4418
	if (phba->msix_enabled)
		eq_msix = 1;
	else
		eq_msix = 0;
4419

4420 4421
	for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
		eq = &phwi_context->be_eq[i].q;
4422
		eqe = queue_tail_node(eq);
4423
		num_processed = 0;
4424 4425 4426 4427 4428
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
					& EQE_VALID_MASK) {
			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
4429
			num_processed++;
4430
		}
4431 4432 4433

		if (num_processed)
			hwi_ring_eq_db(phba, eq->id, 1,	num_processed, 1, 1);
4434 4435 4436 4437 4438
	}
}

static void beiscsi_clean_port(struct beiscsi_hba *phba)
{
4439 4440
	int mgmt_status, ulp_num;
	struct ulp_cid_info *ptr_cid_info = NULL;
4441

4442 4443 4444 4445 4446 4447 4448 4449 4450 4451
	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
			mgmt_status = mgmt_epfw_cleanup(phba, ulp_num);
			if (mgmt_status)
				beiscsi_log(phba, KERN_WARNING,
					    BEISCSI_LOG_INIT,
					    "BM_%d : mgmt_epfw_cleanup FAILED"
					    " for ULP_%d\n", ulp_num);
		}
	}
4452

4453
	hwi_purge_eq(phba);
4454
	hwi_cleanup(phba);
4455 4456 4457
	kfree(phba->io_sgl_hndl_base);
	kfree(phba->eh_sgl_hndl_base);
	kfree(phba->ep_array);
4458
	kfree(phba->conn_table);
4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471

	for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
		if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
			ptr_cid_info = phba->cid_array_info[ulp_num];

			if (ptr_cid_info) {
				kfree(ptr_cid_info->cid_array);
				kfree(ptr_cid_info);
				phba->cid_array_info[ulp_num] = NULL;
			}
		}
	}

4472 4473
}

4474 4475 4476
/**
 * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
 * @beiscsi_conn: ptr to the conn to be cleaned up
4477
 * @task: ptr to iscsi_task resource to be freed.
4478 4479 4480 4481
 *
 * Free driver mgmt resources binded to CXN.
 **/
void
4482 4483
beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
				struct iscsi_task *task)
4484 4485 4486 4487 4488
{
	struct beiscsi_io_task *io_task;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;
4489 4490
	uint16_t cri_index = BE_GET_CRI_FROM_CID(
				beiscsi_conn->beiscsi_conn_cid);
4491 4492

	phwi_ctrlr = phba->phwi_ctrlr;
4493 4494
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];

4495
	io_task = task->dd_data;
4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509

	if (io_task->pwrb_handle) {
		memset(io_task->pwrb_handle->pwrb, 0,
		       sizeof(struct iscsi_wrb));
		free_wrb_handle(phba, pwrb_context,
				io_task->pwrb_handle);
		io_task->pwrb_handle = NULL;
	}

	if (io_task->psgl_handle) {
		spin_lock_bh(&phba->mgmt_sgl_lock);
		free_mgmt_sgl_handle(phba,
				     io_task->psgl_handle);
		io_task->psgl_handle = NULL;
4510
		spin_unlock_bh(&phba->mgmt_sgl_lock);
4511 4512 4513 4514 4515 4516 4517 4518 4519
	}

	if (io_task->mtask_addr)
		pci_unmap_single(phba->pcidev,
				 io_task->mtask_addr,
				 io_task->mtask_data_count,
				 PCI_DMA_TODEVICE);
}

4520 4521 4522 4523 4524
/**
 * beiscsi_cleanup_task()- Free driver resources of the task
 * @task: ptr to the iscsi task
 *
 **/
4525 4526 4527 4528 4529 4530 4531 4532 4533
static void beiscsi_cleanup_task(struct iscsi_task *task)
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;
4534 4535
	uint16_t cri_index = BE_GET_CRI_FROM_CID(
			     beiscsi_conn->beiscsi_conn_cid);
4536 4537

	phwi_ctrlr = phba->phwi_ctrlr;
4538
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559

	if (io_task->cmd_bhs) {
		pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
			      io_task->bhs_pa.u.a64.address);
		io_task->cmd_bhs = NULL;
	}

	if (task->sc) {
		if (io_task->pwrb_handle) {
			free_wrb_handle(phba, pwrb_context,
					io_task->pwrb_handle);
			io_task->pwrb_handle = NULL;
		}

		if (io_task->psgl_handle) {
			spin_lock(&phba->io_sgl_lock);
			free_io_sgl_handle(phba, io_task->psgl_handle);
			spin_unlock(&phba->io_sgl_lock);
			io_task->psgl_handle = NULL;
		}
	} else {
4560
		if (!beiscsi_conn->login_in_progress)
4561
			beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4562 4563 4564
	}
}

4565 4566 4567 4568 4569 4570
void
beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
			   struct beiscsi_offload_params *params)
{
	struct wrb_handle *pwrb_handle;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
4571 4572
	struct iscsi_task *task = beiscsi_conn->task;
	struct iscsi_session *session = task->conn->session;
4573 4574 4575 4576 4577 4578
	u32 doorbell = 0;

	/*
	 * We can always use 0 here because it is reserved by libiscsi for
	 * login/startup related tasks.
	 */
4579 4580 4581 4582 4583
	beiscsi_conn->login_in_progress = 0;
	spin_lock_bh(&session->lock);
	beiscsi_cleanup_task(task);
	spin_unlock_bh(&session->lock);

4584
	pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid);
4585

4586
	/* Check for the adapter family */
4587
	if (is_chip_be2_be3r(phba))
4588 4589
		beiscsi_offload_cxn_v0(params, pwrb_handle,
				       phba->init_mem);
4590 4591
	else
		beiscsi_offload_cxn_v2(params, pwrb_handle);
4592

4593 4594
	be_dws_le_to_cpu(pwrb_handle->pwrb,
			 sizeof(struct iscsi_target_context_update_wrb));
4595 4596

	doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4597
	doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4598
			     << DB_DEF_PDU_WRB_INDEX_SHIFT;
4599
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4600 4601
	iowrite32(doorbell, phba->db_va +
		  beiscsi_conn->doorbell_offset);
4602 4603 4604 4605 4606
}

static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
			      int *index, int *age)
{
4607
	*index = (int)itt;
4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630
	if (age)
		*age = conn->session->age;
}

/**
 * beiscsi_alloc_pdu - allocates pdu and related resources
 * @task: libiscsi task
 * @opcode: opcode of pdu for task
 *
 * This is called with the session lock held. It will allocate
 * the wrb and sgl if needed for the command. And it will prep
 * the pdu's itt. beiscsi_parse_pdu will later translate
 * the pdu itt to the libiscsi task itt.
 */
static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;
	itt_t itt;
4631
	uint16_t cri_index = 0;
4632 4633
	struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
	dma_addr_t paddr;
4634

4635
	io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
4636
					  GFP_ATOMIC, &paddr);
4637 4638 4639
	if (!io_task->cmd_bhs)
		return -ENOMEM;
	io_task->bhs_pa.u.a64.address = paddr;
4640
	io_task->libiscsi_itt = (itt_t)task->itt;
4641 4642 4643 4644
	io_task->conn = beiscsi_conn;

	task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
	task->hdr_max = sizeof(struct be_cmd_bhs);
4645
	io_task->psgl_handle = NULL;
4646
	io_task->pwrb_handle = NULL;
4647 4648 4649 4650 4651

	if (task->sc) {
		spin_lock(&phba->io_sgl_lock);
		io_task->psgl_handle = alloc_io_sgl_handle(phba);
		spin_unlock(&phba->io_sgl_lock);
4652 4653 4654 4655 4656 4657
		if (!io_task->psgl_handle) {
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
				    "BM_%d : Alloc of IO_SGL_ICD Failed"
				    "for the CID : %d\n",
				    beiscsi_conn->beiscsi_conn_cid);
4658
			goto free_hndls;
4659
		}
4660
		io_task->pwrb_handle = alloc_wrb_handle(phba,
4661
					beiscsi_conn->beiscsi_conn_cid);
4662 4663 4664 4665 4666 4667
		if (!io_task->pwrb_handle) {
			beiscsi_log(phba, KERN_ERR,
				    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
				    "BM_%d : Alloc of WRB_HANDLE Failed"
				    "for the CID : %d\n",
				    beiscsi_conn->beiscsi_conn_cid);
4668
			goto free_io_hndls;
4669
		}
4670 4671
	} else {
		io_task->scsi_cmnd = NULL;
4672
		if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4673
			beiscsi_conn->task = task;
4674 4675 4676 4677 4678
			if (!beiscsi_conn->login_in_progress) {
				spin_lock(&phba->mgmt_sgl_lock);
				io_task->psgl_handle = (struct sgl_handle *)
						alloc_mgmt_sgl_handle(phba);
				spin_unlock(&phba->mgmt_sgl_lock);
4679 4680 4681 4682 4683 4684 4685 4686
				if (!io_task->psgl_handle) {
					beiscsi_log(phba, KERN_ERR,
						    BEISCSI_LOG_IO |
						    BEISCSI_LOG_CONFIG,
						    "BM_%d : Alloc of MGMT_SGL_ICD Failed"
						    "for the CID : %d\n",
						    beiscsi_conn->
						    beiscsi_conn_cid);
4687
					goto free_hndls;
4688
				}
4689

4690 4691 4692
				beiscsi_conn->login_in_progress = 1;
				beiscsi_conn->plogin_sgl_handle =
							io_task->psgl_handle;
4693 4694
				io_task->pwrb_handle =
					alloc_wrb_handle(phba,
4695
					beiscsi_conn->beiscsi_conn_cid);
4696 4697 4698 4699 4700 4701 4702 4703 4704 4705
				if (!io_task->pwrb_handle) {
					beiscsi_log(phba, KERN_ERR,
						    BEISCSI_LOG_IO |
						    BEISCSI_LOG_CONFIG,
						    "BM_%d : Alloc of WRB_HANDLE Failed"
						    "for the CID : %d\n",
						    beiscsi_conn->
						    beiscsi_conn_cid);
					goto free_mgmt_hndls;
				}
4706 4707 4708
				beiscsi_conn->plogin_wrb_handle =
							io_task->pwrb_handle;

4709 4710 4711
			} else {
				io_task->psgl_handle =
						beiscsi_conn->plogin_sgl_handle;
4712 4713
				io_task->pwrb_handle =
						beiscsi_conn->plogin_wrb_handle;
4714 4715 4716 4717 4718
			}
		} else {
			spin_lock(&phba->mgmt_sgl_lock);
			io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
			spin_unlock(&phba->mgmt_sgl_lock);
4719 4720 4721 4722 4723 4724 4725 4726
			if (!io_task->psgl_handle) {
				beiscsi_log(phba, KERN_ERR,
					    BEISCSI_LOG_IO |
					    BEISCSI_LOG_CONFIG,
					    "BM_%d : Alloc of MGMT_SGL_ICD Failed"
					    "for the CID : %d\n",
					    beiscsi_conn->
					    beiscsi_conn_cid);
4727
				goto free_hndls;
4728
			}
4729 4730
			io_task->pwrb_handle =
					alloc_wrb_handle(phba,
4731
					beiscsi_conn->beiscsi_conn_cid);
4732 4733 4734 4735 4736 4737
			if (!io_task->pwrb_handle) {
				beiscsi_log(phba, KERN_ERR,
					    BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
					    "BM_%d : Alloc of WRB_HANDLE Failed"
					    "for the CID : %d\n",
					    beiscsi_conn->beiscsi_conn_cid);
4738
				goto free_mgmt_hndls;
4739
			}
4740

4741 4742
		}
	}
4743 4744 4745
	itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
				 wrb_index << 16) | (unsigned int)
				(io_task->psgl_handle->sgl_index));
4746
	io_task->pwrb_handle->pio_handle = task;
4747

4748 4749
	io_task->cmd_bhs->iscsi_hdr.itt = itt;
	return 0;
4750

4751 4752 4753 4754 4755 4756 4757 4758
free_io_hndls:
	spin_lock(&phba->io_sgl_lock);
	free_io_sgl_handle(phba, io_task->psgl_handle);
	spin_unlock(&phba->io_sgl_lock);
	goto free_hndls;
free_mgmt_hndls:
	spin_lock(&phba->mgmt_sgl_lock);
	free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4759
	io_task->psgl_handle = NULL;
4760
	spin_unlock(&phba->mgmt_sgl_lock);
4761 4762
free_hndls:
	phwi_ctrlr = phba->phwi_ctrlr;
4763 4764 4765
	cri_index = BE_GET_CRI_FROM_CID(
	beiscsi_conn->beiscsi_conn_cid);
	pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4766 4767
	if (io_task->pwrb_handle)
		free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4768 4769 4770
	io_task->pwrb_handle = NULL;
	pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
		      io_task->bhs_pa.u.a64.address);
4771
	io_task->cmd_bhs = NULL;
4772
	return -ENOMEM;
4773
}
4774 4775 4776 4777 4778 4779 4780 4781 4782 4783 4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799 4800 4801 4802 4803 4804 4805 4806 4807 4808 4809 4810 4811 4812 4813 4814 4815 4816 4817 4818 4819 4820 4821 4822 4823 4824 4825
int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
		       unsigned int num_sg, unsigned int xferlen,
		       unsigned int writedir)
{

	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct iscsi_wrb *pwrb = NULL;
	unsigned int doorbell = 0;

	pwrb = io_task->pwrb_handle->pwrb;

	io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
	io_task->bhs_len = sizeof(struct be_cmd_bhs);

	if (writedir) {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
			      INI_WR_CMD);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
			      INI_RD_CMD);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
	}

	io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
					  type, pwrb);

	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
		      cpu_to_be16(*(unsigned short *)
		      &io_task->cmd_bhs->iscsi_hdr.lun));
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
		      io_task->pwrb_handle->wrb_index);
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
		      be32_to_cpu(task->cmdsn));
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
		      io_task->psgl_handle->sgl_index);

	hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
	AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
		      io_task->pwrb_handle->nxt_wrb_index);

	be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));

	doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
	doorbell |= (io_task->pwrb_handle->wrb_index &
		     DB_DEF_PDU_WRB_INDEX_MASK) <<
		     DB_DEF_PDU_WRB_INDEX_SHIFT;
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4826 4827
	iowrite32(doorbell, phba->db_va +
		  beiscsi_conn->doorbell_offset);
4828 4829
	return 0;
}
4830 4831 4832 4833 4834 4835 4836 4837 4838 4839 4840 4841 4842 4843 4844 4845 4846 4847

static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
			  unsigned int num_sg, unsigned int xferlen,
			  unsigned int writedir)
{

	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct iscsi_wrb *pwrb = NULL;
	unsigned int doorbell = 0;

	pwrb = io_task->pwrb_handle->pwrb;
	io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
	io_task->bhs_len = sizeof(struct be_cmd_bhs);

	if (writedir) {
4848 4849
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
			      INI_WR_CMD);
4850 4851
		AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
	} else {
4852 4853
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
			      INI_RD_CMD);
4854 4855 4856
		AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
	}

4857 4858 4859
	io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
					  type, pwrb);

4860
	AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4861 4862
		      cpu_to_be16(*(unsigned short *)
				  &io_task->cmd_bhs->iscsi_hdr.lun));
4863 4864 4865 4866 4867 4868 4869 4870 4871 4872 4873 4874 4875 4876 4877
	AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
	AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
		      io_task->pwrb_handle->wrb_index);
	AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
		      be32_to_cpu(task->cmdsn));
	AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
		      io_task->psgl_handle->sgl_index);

	hwi_write_sgl(pwrb, sg, num_sg, io_task);

	AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
		      io_task->pwrb_handle->nxt_wrb_index);
	be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));

	doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4878
	doorbell |= (io_task->pwrb_handle->wrb_index &
4879 4880 4881
		     DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;

4882 4883
	iowrite32(doorbell, phba->db_va +
		  beiscsi_conn->doorbell_offset);
4884 4885 4886 4887 4888
	return 0;
}

static int beiscsi_mtask(struct iscsi_task *task)
{
4889
	struct beiscsi_io_task *io_task = task->dd_data;
4890 4891 4892 4893 4894
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct iscsi_wrb *pwrb = NULL;
	unsigned int doorbell = 0;
4895
	unsigned int cid;
4896
	unsigned int pwrb_typeoffset = 0;
4897

4898
	cid = beiscsi_conn->beiscsi_conn_cid;
4899
	pwrb = io_task->pwrb_handle->pwrb;
4900
	memset(pwrb, 0, sizeof(*pwrb));
4901

4902
	if (is_chip_be2_be3r(phba)) {
4903 4904 4905 4906 4907 4908 4909 4910 4911 4912 4913
		AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
			      be32_to_cpu(task->cmdsn));
		AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
			      io_task->pwrb_handle->wrb_index);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
			      io_task->psgl_handle->sgl_index);
		AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
			      task->data_count);
		AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
			      io_task->pwrb_handle->nxt_wrb_index);
		pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
			      be32_to_cpu(task->cmdsn));
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
			      io_task->pwrb_handle->wrb_index);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
			      io_task->psgl_handle->sgl_index);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
			      task->data_count);
		AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
			      io_task->pwrb_handle->nxt_wrb_index);
		pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
4926 4927
	}

4928

4929 4930 4931
	switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
	case ISCSI_OP_LOGIN:
		AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
4932
		ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4933 4934 4935
		hwi_write_buffer(pwrb, task);
		break;
	case ISCSI_OP_NOOP_OUT:
4936
		if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
4937
			ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4938 4939
			if (is_chip_be2_be3r(phba))
				AMAP_SET_BITS(struct amap_iscsi_wrb,
4940 4941
					      dmsg, pwrb, 1);
			else
4942
				AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4943
					      dmsg, pwrb, 1);
4944
		} else {
4945
			ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
4946 4947
			if (is_chip_be2_be3r(phba))
				AMAP_SET_BITS(struct amap_iscsi_wrb,
4948 4949
					      dmsg, pwrb, 0);
			else
4950
				AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4951
					      dmsg, pwrb, 0);
4952
		}
4953 4954 4955
		hwi_write_buffer(pwrb, task);
		break;
	case ISCSI_OP_TEXT:
4956
		ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4957 4958 4959
		hwi_write_buffer(pwrb, task);
		break;
	case ISCSI_OP_SCSI_TMFUNC:
4960
		ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
4961 4962 4963
		hwi_write_buffer(pwrb, task);
		break;
	case ISCSI_OP_LOGOUT:
4964
		ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
4965 4966 4967 4968
		hwi_write_buffer(pwrb, task);
		break;

	default:
4969 4970 4971 4972
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
			    "BM_%d : opcode =%d Not supported\n",
			    task->hdr->opcode & ISCSI_OPCODE_MASK);

4973 4974 4975
		return -EINVAL;
	}

4976
	/* Set the task type */
4977 4978 4979
	io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
		AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
		AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
4980

4981
	doorbell |= cid & DB_WRB_POST_CID_MASK;
4982
	doorbell |= (io_task->pwrb_handle->wrb_index &
4983 4984
		     DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4985 4986
	iowrite32(doorbell, phba->db_va +
		  beiscsi_conn->doorbell_offset);
4987 4988 4989 4990 4991 4992 4993
	return 0;
}

static int beiscsi_task_xmit(struct iscsi_task *task)
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct scsi_cmnd *sc = task->sc;
4994
	struct beiscsi_hba *phba = NULL;
4995 4996 4997 4998
	struct scatterlist *sg;
	int num_sg;
	unsigned int  writedir = 0, xferlen = 0;

4999 5000
	phba = ((struct beiscsi_conn *)task->conn->dd_data)->phba;

5001 5002 5003 5004 5005 5006
	if (!sc)
		return beiscsi_mtask(task);

	io_task->scsi_cmnd = sc;
	num_sg = scsi_dma_map(sc);
	if (num_sg < 0) {
5007 5008 5009 5010 5011 5012 5013
		struct iscsi_conn *conn = task->conn;
		struct beiscsi_hba *phba = NULL;

		phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_IO,
			    "BM_%d : scsi_dma_map Failed\n");

5014 5015 5016 5017
		return num_sg;
	}
	xferlen = scsi_bufflen(sc);
	sg = scsi_sglist(sc);
5018
	if (sc->sc_data_direction == DMA_TO_DEVICE)
5019
		writedir = 1;
5020
	 else
5021
		writedir = 0;
5022

5023
	 return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
5024 5025
}

5026 5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042 5043 5044 5045 5046 5047 5048 5049 5050
/**
 * beiscsi_bsg_request - handle bsg request from ISCSI transport
 * @job: job to handle
 */
static int beiscsi_bsg_request(struct bsg_job *job)
{
	struct Scsi_Host *shost;
	struct beiscsi_hba *phba;
	struct iscsi_bsg_request *bsg_req = job->request;
	int rc = -EINVAL;
	unsigned int tag;
	struct be_dma_mem nonemb_cmd;
	struct be_cmd_resp_hdr *resp;
	struct iscsi_bsg_reply *bsg_reply = job->reply;
	unsigned short status, extd_status;

	shost = iscsi_job_to_shost(job);
	phba = iscsi_host_priv(shost);

	switch (bsg_req->msgcode) {
	case ISCSI_BSG_HST_VENDOR:
		nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
					job->request_payload.payload_len,
					&nonemb_cmd.dma);
		if (nonemb_cmd.va == NULL) {
5051 5052 5053
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
				    "BM_%d : Failed to allocate memory for "
				    "beiscsi_bsg_request\n");
5054
			return -ENOMEM;
5055 5056 5057 5058
		}
		tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
						  &nonemb_cmd);
		if (!tag) {
5059
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5060
				    "BM_%d : MBX Tag Allocation Failed\n");
5061

5062 5063 5064
			pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
					    nonemb_cmd.va, nonemb_cmd.dma);
			return -EAGAIN;
5065 5066 5067 5068 5069 5070 5071
		}

		rc = wait_event_interruptible_timeout(
					phba->ctrl.mcc_wait[tag],
					phba->ctrl.mcc_numtag[tag],
					msecs_to_jiffies(
					BEISCSI_HOST_MBX_TIMEOUT));
5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082 5083 5084 5085 5086
		extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
		status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
		free_mcc_tag(&phba->ctrl, tag);
		resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
		sg_copy_from_buffer(job->reply_payload.sg_list,
				    job->reply_payload.sg_cnt,
				    nonemb_cmd.va, (resp->response_length
				    + sizeof(*resp)));
		bsg_reply->reply_payload_rcv_len = resp->response_length;
		bsg_reply->result = status;
		bsg_job_done(job, bsg_reply->result,
			     bsg_reply->reply_payload_rcv_len);
		pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
				    nonemb_cmd.va, nonemb_cmd.dma);
		if (status || extd_status) {
5087
			beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5088
				    "BM_%d : MBX Cmd Failed"
5089 5090 5091
				    " status = %d extd_status = %d\n",
				    status, extd_status);

5092
			return -EIO;
5093 5094
		} else {
			rc = 0;
5095 5096 5097 5098
		}
		break;

	default:
5099 5100 5101
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
				"BM_%d : Unsupported bsg command: 0x%x\n",
				bsg_req->msgcode);
5102 5103 5104 5105 5106 5107
		break;
	}

	return rc;
}

5108 5109 5110 5111 5112 5113
void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
{
	/* Set the logging parameter */
	beiscsi_log_enable_init(phba, beiscsi_log_enable);
}

5114 5115 5116 5117 5118 5119
/*
 * beiscsi_quiesce()- Cleanup Driver resources
 * @phba: Instance Priv structure
 *
 * Free the OS and HW resources held by the driver
 **/
5120
static void beiscsi_quiesce(struct beiscsi_hba *phba)
5121
{
5122 5123 5124 5125
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_eq_obj *pbe_eq;
	unsigned int i, msix_vec;
5126

5127 5128
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
5129
	hwi_disable_intr(phba);
5130 5131 5132 5133
	if (phba->msix_enabled) {
		for (i = 0; i <= phba->num_cpus; i++) {
			msix_vec = phba->msix_entries[i].vector;
			free_irq(msix_vec, &phwi_context->be_eq[i]);
5134
			kfree(phba->msi_name[i]);
5135 5136 5137 5138 5139
		}
	} else
		if (phba->pcidev->irq)
			free_irq(phba->pcidev->irq, phba);
	pci_disable_msix(phba->pcidev);
5140 5141
	destroy_workqueue(phba->wq);
	if (blk_iopoll_enabled)
5142 5143 5144 5145
		for (i = 0; i < phba->num_cpus; i++) {
			pbe_eq = &phwi_context->be_eq[i];
			blk_iopoll_disable(&pbe_eq->iopoll);
		}
5146 5147 5148

	beiscsi_clean_port(phba);
	beiscsi_free_mem(phba);
5149

5150 5151 5152 5153 5154
	beiscsi_unmap_pci_function(phba);
	pci_free_consistent(phba->pcidev,
			    phba->ctrl.mbox_mem_alloced.size,
			    phba->ctrl.mbox_mem_alloced.va,
			    phba->ctrl.mbox_mem_alloced.dma);
5155 5156

	cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
5157 5158 5159 5160 5161 5162 5163 5164 5165 5166 5167 5168 5169
}

static void beiscsi_remove(struct pci_dev *pcidev)
{

	struct beiscsi_hba *phba = NULL;

	phba = pci_get_drvdata(pcidev);
	if (!phba) {
		dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
		return;
	}

5170
	beiscsi_destroy_def_ifaces(phba);
5171
	beiscsi_quiesce(phba);
5172
	iscsi_boot_destroy_kset(phba->boot_kset);
5173 5174 5175
	iscsi_host_remove(phba->shost);
	pci_dev_put(phba->pcidev);
	iscsi_host_free(phba->shost);
5176
	pci_disable_device(pcidev);
5177 5178
}

5179 5180 5181 5182 5183 5184 5185 5186 5187 5188 5189 5190
static void beiscsi_shutdown(struct pci_dev *pcidev)
{

	struct beiscsi_hba *phba = NULL;

	phba = (struct beiscsi_hba *)pci_get_drvdata(pcidev);
	if (!phba) {
		dev_err(&pcidev->dev, "beiscsi_shutdown called with no phba\n");
		return;
	}

	beiscsi_quiesce(phba);
5191
	pci_disable_device(pcidev);
5192 5193
}

5194 5195 5196 5197 5198 5199 5200 5201 5202 5203 5204 5205 5206 5207 5208
static void beiscsi_msix_enable(struct beiscsi_hba *phba)
{
	int i, status;

	for (i = 0; i <= phba->num_cpus; i++)
		phba->msix_entries[i].entry = i;

	status = pci_enable_msix(phba->pcidev, phba->msix_entries,
				 (phba->num_cpus + 1));
	if (!status)
		phba->msix_enabled = true;

	return;
}

5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227
/*
 * beiscsi_hw_health_check()- Check adapter health
 * @work: work item to check HW health
 *
 * Check if adapter in an unrecoverable state or not.
 **/
static void
beiscsi_hw_health_check(struct work_struct *work)
{
	struct beiscsi_hba *phba =
		container_of(work, struct beiscsi_hba,
			     beiscsi_hw_check_task.work);

	beiscsi_ue_detect(phba);

	schedule_delayed_work(&phba->beiscsi_hw_check_task,
			      msecs_to_jiffies(1000));
}

5228 5229
static int beiscsi_dev_probe(struct pci_dev *pcidev,
			     const struct pci_device_id *id)
5230 5231
{
	struct beiscsi_hba *phba = NULL;
5232 5233 5234
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_eq_obj *pbe_eq;
5235
	int ret, i;
5236 5237 5238

	ret = beiscsi_enable_pci(pcidev);
	if (ret < 0) {
5239 5240
		dev_err(&pcidev->dev,
			"beiscsi_dev_probe - Failed to enable pci device\n");
5241 5242 5243 5244 5245
		return ret;
	}

	phba = beiscsi_hba_alloc(pcidev);
	if (!phba) {
5246 5247
		dev_err(&pcidev->dev,
			"beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
5248 5249 5250
		goto disable_pci;
	}

5251 5252 5253
	/* Initialize Driver configuration Paramters */
	beiscsi_hba_attrs_init(phba);

5254
	phba->fw_timeout = false;
5255
	phba->mac_addr_set = false;
5256 5257


5258 5259 5260 5261 5262
	switch (pcidev->device) {
	case BE_DEVICE_ID1:
	case OC_DEVICE_ID1:
	case OC_DEVICE_ID2:
		phba->generation = BE_GEN2;
5263
		phba->iotask_fn = beiscsi_iotask;
5264 5265 5266 5267
		break;
	case BE_DEVICE_ID2:
	case OC_DEVICE_ID3:
		phba->generation = BE_GEN3;
5268
		phba->iotask_fn = beiscsi_iotask;
5269
		break;
5270 5271
	case OC_SKH_ID1:
		phba->generation = BE_GEN4;
5272
		phba->iotask_fn = beiscsi_iotask_v2;
5273
		break;
5274 5275 5276 5277
	default:
		phba->generation = 0;
	}

5278
	if (enable_msix)
5279
		find_num_cpus(phba);
5280
	else
5281 5282
		phba->num_cpus = 1;

5283 5284 5285
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : num_cpus = %d\n",
		    phba->num_cpus);
5286

5287
	if (enable_msix) {
5288
		beiscsi_msix_enable(phba);
5289 5290 5291
		if (!phba->msix_enabled)
			phba->num_cpus = 1;
	}
5292 5293
	ret = be_ctrl_init(phba, pcidev);
	if (ret) {
5294 5295 5296
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe-"
			    "Failed in be_ctrl_init\n");
5297 5298 5299
		goto hba_free;
	}

5300 5301 5302
	ret = beiscsi_cmd_reset_function(phba);
	if (ret) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5303
			    "BM_%d : Reset Failed\n");
5304 5305 5306 5307 5308
		goto hba_free;
	}
	ret = be_chk_reset_complete(phba);
	if (ret) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5309
			    "BM_%d : Failed to get out of reset.\n");
5310
		goto hba_free;
5311 5312
	}

5313 5314 5315
	spin_lock_init(&phba->io_sgl_lock);
	spin_lock_init(&phba->mgmt_sgl_lock);
	spin_lock_init(&phba->isr_lock);
5316
	spin_lock_init(&phba->async_pdu_lock);
5317 5318
	ret = mgmt_get_fw_config(&phba->ctrl, phba);
	if (ret != 0) {
5319 5320
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Error getting fw config\n");
5321 5322
		goto free_port;
	}
5323
	phba->shost->max_id = phba->params.cxns_per_ctrl;
5324
	beiscsi_get_params(phba);
5325
	phba->shost->can_queue = phba->params.ios_per_ctrl;
5326 5327
	ret = beiscsi_init_port(phba);
	if (ret < 0) {
5328 5329 5330
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe-"
			    "Failed in beiscsi_init_port\n");
5331 5332 5333
		goto free_port;
	}

5334 5335 5336 5337 5338 5339 5340 5341 5342
	for (i = 0; i < MAX_MCC_CMD ; i++) {
		init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
		phba->ctrl.mcc_tag[i] = i + 1;
		phba->ctrl.mcc_numtag[i + 1] = 0;
		phba->ctrl.mcc_tag_available++;
	}

	phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;

5343
	snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
5344
		 phba->shost->host_no);
5345
	phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, phba->wq_name);
5346
	if (!phba->wq) {
5347 5348 5349
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe-"
			    "Failed to allocate work queue\n");
5350 5351 5352
		goto free_twq;
	}

5353 5354
	INIT_DELAYED_WORK(&phba->beiscsi_hw_check_task,
			  beiscsi_hw_health_check);
5355

5356 5357
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
5358

5359
	if (blk_iopoll_enabled) {
5360 5361 5362 5363 5364 5365
		for (i = 0; i < phba->num_cpus; i++) {
			pbe_eq = &phwi_context->be_eq[i];
			blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
					be_iopoll);
			blk_iopoll_enable(&pbe_eq->iopoll);
		}
5366 5367 5368 5369 5370 5371 5372 5373 5374 5375 5376 5377 5378 5379 5380 5381 5382

		i = (phba->msix_enabled) ? i : 0;
		/* Work item for MCC handling */
		pbe_eq = &phwi_context->be_eq[i];
		INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
	} else {
		if (phba->msix_enabled) {
			for (i = 0; i <= phba->num_cpus; i++) {
				pbe_eq = &phwi_context->be_eq[i];
				INIT_WORK(&pbe_eq->work_cqs,
					  beiscsi_process_all_cqs);
			}
		} else {
				pbe_eq = &phwi_context->be_eq[0];
				INIT_WORK(&pbe_eq->work_cqs,
					  beiscsi_process_all_cqs);
			}
5383
	}
5384

5385 5386
	ret = beiscsi_init_irqs(phba);
	if (ret < 0) {
5387 5388 5389
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : beiscsi_dev_probe-"
			    "Failed to beiscsi_init_irqs\n");
5390 5391
		goto free_blkenbld;
	}
5392
	hwi_enable_intr(phba);
5393 5394 5395 5396 5397 5398

	if (beiscsi_setup_boot_info(phba))
		/*
		 * log error but continue, because we may not be using
		 * iscsi boot.
		 */
5399 5400 5401
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
			    "BM_%d : Could not set up "
			    "iSCSI boot info.\n");
5402

5403
	beiscsi_create_def_ifaces(phba);
5404 5405 5406
	schedule_delayed_work(&phba->beiscsi_hw_check_task,
			      msecs_to_jiffies(1000));

5407 5408
	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5409 5410 5411 5412 5413
	return 0;

free_blkenbld:
	destroy_workqueue(phba->wq);
	if (blk_iopoll_enabled)
5414 5415 5416 5417
		for (i = 0; i < phba->num_cpus; i++) {
			pbe_eq = &phwi_context->be_eq[i];
			blk_iopoll_disable(&pbe_eq->iopoll);
		}
5418 5419 5420 5421 5422 5423 5424 5425 5426 5427
free_twq:
	beiscsi_clean_port(phba);
	beiscsi_free_mem(phba);
free_port:
	pci_free_consistent(phba->pcidev,
			    phba->ctrl.mbox_mem_alloced.size,
			    phba->ctrl.mbox_mem_alloced.va,
			   phba->ctrl.mbox_mem_alloced.dma);
	beiscsi_unmap_pci_function(phba);
hba_free:
5428 5429
	if (phba->msix_enabled)
		pci_disable_msix(phba->pcidev);
5430 5431 5432 5433 5434 5435 5436 5437 5438 5439 5440
	iscsi_host_remove(phba->shost);
	pci_dev_put(phba->pcidev);
	iscsi_host_free(phba->shost);
disable_pci:
	pci_disable_device(pcidev);
	return ret;
}

struct iscsi_transport beiscsi_iscsi_transport = {
	.owner = THIS_MODULE,
	.name = DRV_NAME,
5441
	.caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5442 5443 5444 5445 5446 5447
		CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
	.create_session = beiscsi_session_create,
	.destroy_session = beiscsi_session_destroy,
	.create_conn = beiscsi_conn_create,
	.bind_conn = beiscsi_conn_bind,
	.destroy_conn = iscsi_conn_teardown,
5448
	.attr_is_visible = be2iscsi_attr_is_visible,
5449 5450
	.set_iface_param = be2iscsi_iface_set_param,
	.get_iface_param = be2iscsi_iface_get_param,
5451
	.set_param = beiscsi_set_param,
5452
	.get_conn_param = iscsi_conn_get_param,
5453 5454 5455
	.get_session_param = iscsi_session_get_param,
	.get_host_param = beiscsi_get_host_param,
	.start_conn = beiscsi_conn_start,
5456
	.stop_conn = iscsi_conn_stop,
5457 5458 5459 5460 5461 5462
	.send_pdu = iscsi_conn_send_pdu,
	.xmit_task = beiscsi_task_xmit,
	.cleanup_task = beiscsi_cleanup_task,
	.alloc_pdu = beiscsi_alloc_pdu,
	.parse_pdu_itt = beiscsi_parse_pdu,
	.get_stats = beiscsi_conn_get_stats,
5463
	.get_ep_param = beiscsi_ep_get_param,
5464 5465 5466 5467
	.ep_connect = beiscsi_ep_connect,
	.ep_poll = beiscsi_ep_poll,
	.ep_disconnect = beiscsi_ep_disconnect,
	.session_recovery_timedout = iscsi_session_recovery_timedout,
5468
	.bsg_request = beiscsi_bsg_request,
5469 5470 5471 5472 5473 5474
};

static struct pci_driver beiscsi_pci_driver = {
	.name = DRV_NAME,
	.probe = beiscsi_dev_probe,
	.remove = beiscsi_remove,
5475
	.shutdown = beiscsi_shutdown,
5476 5477 5478
	.id_table = beiscsi_pci_id_table
};

5479

5480 5481 5482 5483 5484 5485 5486
static int __init beiscsi_module_init(void)
{
	int ret;

	beiscsi_scsi_transport =
			iscsi_register_transport(&beiscsi_iscsi_transport);
	if (!beiscsi_scsi_transport) {
5487 5488
		printk(KERN_ERR
		       "beiscsi_module_init - Unable to  register beiscsi transport.\n");
5489
		return -ENOMEM;
5490
	}
5491 5492
	printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
	       &beiscsi_iscsi_transport);
5493 5494 5495

	ret = pci_register_driver(&beiscsi_pci_driver);
	if (ret) {
5496 5497
		printk(KERN_ERR
		       "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
5498 5499 5500 5501 5502 5503 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514
		goto unregister_iscsi_transport;
	}
	return 0;

unregister_iscsi_transport:
	iscsi_unregister_transport(&beiscsi_iscsi_transport);
	return ret;
}

static void __exit beiscsi_module_exit(void)
{
	pci_unregister_driver(&beiscsi_pci_driver);
	iscsi_unregister_transport(&beiscsi_iscsi_transport);
}

module_init(beiscsi_module_init);
module_exit(beiscsi_module_exit);