hw_sysexc.h 4.6 KB
Newer Older
F
 
fengzi.rtt@gmail.com 已提交
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
//*****************************************************************************
//
// hw_sysexc.h - Macros used when accessing the system exception module.
//
// Copyright (c) 2011 Texas Instruments Incorporated.  All rights reserved.
// Software License Agreement
// 
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
// 
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
// 
21
// This is part of revision 8264 of the Stellaris Firmware Development Package.
F
 
fengzi.rtt@gmail.com 已提交
22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89
//
//*****************************************************************************

#ifndef __HW_SYSEXC_H__
#define __HW_SYSEXC_H__

//*****************************************************************************
//
// The following are defines for the System Exception Module register
// addresses.
//
//*****************************************************************************
#define SYSEXC_RIS              0x400F9000  // System Exception Raw Interrupt
                                            // Status
#define SYSEXC_IM               0x400F9004  // System Exception Interrupt Mask
#define SYSEXC_MIS              0x400F9008  // System Exception Raw Interrupt
                                            // Status
#define SYSEXC_IC               0x400F900C  // System Exception Interrupt Clear

//*****************************************************************************
//
// The following are defines for the bit fields in the SYSEXC_RIS register.
//
//*****************************************************************************
#define SYSEXC_RIS_IXCRIS       0x00000020  // Inexact Exception Flag
#define SYSEXC_RIS_OFCRIS       0x00000010  // Overflow Exception Flag
#define SYSEXC_RIS_UFCRIS       0x00000008  // Underflow Exception Flag
#define SYSEXC_RIS_IOCRIS       0x00000004  // Invalid Operation Flag
#define SYSEXC_RIS_DZCRIS       0x00000002  // Divide By 0 Exception Flag
#define SYSEXC_RIS_IDCRIS       0x00000001  // Input Denormal Exception Flag

//*****************************************************************************
//
// The following are defines for the bit fields in the SYSEXC_IM register.
//
//*****************************************************************************
#define SYSEXC_IM_IXCIM         0x00000020  // Inexact Exception Flag
#define SYSEXC_IM_OFCIM         0x00000010  // Overflow Exception Flag
#define SYSEXC_IM_UFCIM         0x00000008  // Underflow Exception Flag
#define SYSEXC_IM_IOCIM         0x00000004  // Invalid Operation Flag
#define SYSEXC_IM_DZCIM         0x00000002  // Divide By 0 Exception Flag
#define SYSEXC_IM_IDCIM         0x00000001  // Input Denormal Exception Flag

//*****************************************************************************
//
// The following are defines for the bit fields in the SYSEXC_MIS register.
//
//*****************************************************************************
#define SYSEXC_MIS_IXCMIS       0x00000020  // Inexact Exception Flag
#define SYSEXC_MIS_OFCMIS       0x00000010  // Overflow Exception Flag
#define SYSEXC_MIS_UFCMIS       0x00000008  // Underflow Exception Flag
#define SYSEXC_MIS_IOCMIS       0x00000004  // Invalid Operation Flag
#define SYSEXC_MIS_DZCMIS       0x00000002  // Divide By 0 Exception Flag
#define SYSEXC_MIS_IDCMIS       0x00000001  // Input Denormal Exception Flag

//*****************************************************************************
//
// The following are defines for the bit fields in the SYSEXC_IC register.
//
//*****************************************************************************
#define SYSEXC_IC_IXCIC         0x00000020  // Inexact Exception Flag
#define SYSEXC_IC_OFCIC         0x00000010  // Overflow Exception Flag
#define SYSEXC_IC_UFCIC         0x00000008  // Underflow Exception Flag
#define SYSEXC_IC_IOCIC         0x00000004  // Invalid Operation Flag
#define SYSEXC_IC_DZCIC         0x00000002  // Divide By 0 Exception Flag
#define SYSEXC_IC_IDCIC         0x00000001  // Input Denormal Exception Flag

#endif // __HW_SYSEXC_H__