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提交 646c1443 编写于 作者: wuyangyong's avatar wuyangyong
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update Stellaris Peripheral Driver Library to r8264. 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1869 bbd45198-f89e-11dd-88c7-29a3b14d5316
上级 315fffcf
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Showing with 78544 addition and 42090 deletion
bsp/lm3s8962/Libraries/SConscript
浏览文件 @ 646c1443
......@@ -6,9 +6,13 @@ from building import *
cwd = GetCurrentDir()
src = Glob('driverlib/*.c')
# cortex-m3 no FPU.
if rtconfig.PART_TYPE.startswith('PART_LM4F') != True:
SrcRemove(src, 'fpu.c')
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
src += ['startup/gcc/startup_LPC17xx.s']
src += ['startup/gcc/start_gcc.s']
elif rtconfig.CROSS_TOOL == 'keil':
src += ['startup/arm/start_rvds.S']
elif rtconfig.CROSS_TOOL == 'iar':
......@@ -16,6 +20,7 @@ elif rtconfig.CROSS_TOOL == 'iar':
CPPPATH = [cwd]
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH)
CPPDEFINES = [rtconfig.PART_TYPE]
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
Return('group')
bsp/lm3s8962/Libraries/driverlib/adc.h
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// adc.h - ADC headers for using the ADC driver functions.
//
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......@@ -80,6 +80,14 @@ extern "C"
#define ADC_CTL_CH13 0x0000000D // Input channel 13
#define ADC_CTL_CH14 0x0000000E // Input channel 14
#define ADC_CTL_CH15 0x0000000F // Input channel 15
#define ADC_CTL_CH16 0x00000100 // Input channel 16
#define ADC_CTL_CH17 0x00000101 // Input channel 17
#define ADC_CTL_CH18 0x00000102 // Input channel 18
#define ADC_CTL_CH19 0x00000103 // Input channel 19
#define ADC_CTL_CH20 0x00000104 // Input channel 20
#define ADC_CTL_CH21 0x00000105 // Input channel 21
#define ADC_CTL_CH22 0x00000106 // Input channel 22
#define ADC_CTL_CH23 0x00000107 // Input channel 23
#define ADC_CTL_CMP0 0x00080000 // Select Comparator 0
#define ADC_CTL_CMP1 0x00090000 // Select Comparator 1
#define ADC_CTL_CMP2 0x000A0000 // Select Comparator 2
......@@ -173,6 +181,15 @@ extern "C"
//*****************************************************************************
#define ADC_REF_INT 0x00000000 // Internal reference
#define ADC_REF_EXT_3V 0x00000001 // External 3V reference
#define ADC_REF_EXT_1V 0x00000003 // External 1V reference
//*****************************************************************************
//
// Values that can be passed to ADCResolutionSet as the ulResolution parameter.
//
//*****************************************************************************
#define ADC_RES_10BIT 0x00000000 // 10-bit resolution
#define ADC_RES_12BIT 0x00000010 // 12-bit resolution
//*****************************************************************************
//
......@@ -243,6 +260,8 @@ extern void ADCComparatorIntClear(unsigned long ulBase,
unsigned long ulStatus);
extern void ADCReferenceSet(unsigned long ulBase, unsigned long ulRef);
extern unsigned long ADCReferenceGet(unsigned long ulBase);
extern void ADCResolutionSet(unsigned long ulBase, unsigned long ulResolution);
extern unsigned long ADCResolutionGet(unsigned long ulBase);
extern void ADCPhaseDelaySet(unsigned long ulBase, unsigned long ulPhase);
extern unsigned long ADCPhaseDelayGet(unsigned long ulBase);
......
bsp/lm3s8962/Libraries/driverlib/can.h
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// can.h - Defines and Macros for the CAN controller.
//
// Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......@@ -179,25 +179,25 @@ typedef struct
//! Buffer 1 segments, measured in time quanta. The valid values for this
//! setting range from 2 to 16.
//
unsigned int uSyncPropPhase1Seg;
unsigned long ulSyncPropPhase1Seg;
//
//! This value holds the Phase Buffer 2 segment in time quanta. The valid
//! values for this setting range from 1 to 8.
//
unsigned int uPhase2Seg;
unsigned long ulPhase2Seg;
//
//! This value holds the Resynchronization Jump Width in time quanta. The
//! valid values for this setting range from 1 to 4.
//
unsigned int uSJW;
unsigned long ulSJW;
//
//! This value holds the CAN_CLK divider used to determine time quanta.
//! The valid values for this setting range from 1 to 1023.
//
unsigned int uQuantumPrescaler;
unsigned long ulQuantumPrescaler;
}
tCANBitClkParms;
......
bsp/lm3s8962/Libraries/driverlib/comp.c
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// comp.c - Driver for the analog comparator.
//
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......@@ -45,8 +45,8 @@
//! \param ulComp is the index of the comparator to configure.
//! \param ulConfig is the configuration of the comparator.
//!
//! This function will configure a comparator. The \e ulConfig parameter is
//! the result of a logical OR operation between the \b COMP_TRIG_xxx,
//! This function configures a comparator. The \e ulConfig parameter is the
//! result of a logical OR operation between the \b COMP_TRIG_xxx,
//! \b COMP_INT_xxx, \b COMP_ASRCP_xxx, and \b COMP_OUTPUT_xxx values.
//!
//! The \b COMP_TRIG_xxx term can take on the following values:
......@@ -117,8 +117,8 @@ ComparatorConfigure(unsigned long ulBase, unsigned long ulComp,
//! \param ulBase is the base address of the comparator module.
//! \param ulRef is the desired reference voltage.
//!
//! This function will set the internal reference voltage value. The voltage
//! is specified as one of the following values:
//! This function sets the internal reference voltage value. The voltage is
//! specified as one of the following values:
//!
//! - \b COMP_REF_OFF to turn off the reference voltage
//! - \b COMP_REF_0V to set the reference voltage to 0 V
......@@ -212,9 +212,9 @@ ComparatorValueGet(unsigned long ulBase, unsigned long ulComp)
//! \param pfnHandler is a pointer to the function to be called when the
//! comparator interrupt occurs.
//!
//! This sets the handler to be called when the comparator interrupt occurs.
//! This will enable the interrupt in the interrupt controller; it is the
//! interrupt-handler's responsibility to clear the interrupt source via
//! This function sets the handler to be called when the comparator interrupt occurs
//! and enables the interrupt in the interrupt controller. It is the interrupt
//! handler's responsibility to clear the interrupt source via
//! ComparatorIntClear().
//!
//! \sa IntRegister() for important information about registering interrupt
......@@ -256,9 +256,9 @@ ComparatorIntRegister(unsigned long ulBase, unsigned long ulComp,
//! \param ulBase is the base address of the comparator module.
//! \param ulComp is the index of the comparator.
//!
//! This function will clear the handler to be called when a comparator
//! interrupt occurs. This will also mask off the interrupt in the interrupt
//! controller so that the interrupt handler no longer is called.
//! This function clears the handler to be called when a comparator interrupt
//! occurs. This function also masks off the interrupt in the interrupt controller
//! so that the interrupt handler no longer is called.
//!
//! \sa IntRegister() for important information about registering interrupt
//! handlers.
......@@ -299,7 +299,7 @@ ComparatorIntUnregister(unsigned long ulBase, unsigned long ulComp)
//! \param ulComp is the index of the comparator.
//!
//! This function enables generation of an interrupt from the specified
//! comparator. Only comparators whose interrupts are enabled can be reflected
//! comparator. Only enabled comparator interrupts can be reflected
//! to the processor.
//!
//! \return None.
......@@ -328,7 +328,7 @@ ComparatorIntEnable(unsigned long ulBase, unsigned long ulComp)
//! \param ulComp is the index of the comparator.
//!
//! This function disables generation of an interrupt from the specified
//! comparator. Only comparators whose interrupts are enabled can be reflected
//! comparator. Only enabled comparator interrupts can be reflected
//! to the processor.
//!
//! \return None.
......@@ -358,7 +358,7 @@ ComparatorIntDisable(unsigned long ulBase, unsigned long ulComp)
//! \param bMasked is \b false if the raw interrupt status is required and
//! \b true if the masked interrupt status is required.
//!
//! This returns the interrupt status for the comparator. Either the raw or
//! This function returns the interrupt status for the comparator. Either the raw or
//! the masked interrupt status can be returned.
//!
//! \return \b true if the interrupt is asserted and \b false if it is not
......@@ -397,18 +397,18 @@ ComparatorIntStatus(unsigned long ulBase, unsigned long ulComp,
//! \param ulComp is the index of the comparator.
//!
//! The comparator interrupt is cleared, so that it no longer asserts. This
//! must be done in the interrupt handler to keep it from being called again
//! immediately upon exit. Note that for a level triggered interrupt, the
//! interrupt cannot be cleared until it stops asserting.
//! fucntion must be called in the interrupt handler to keep the handler from
//! being called again immediately upon exit. Note that for a level-triggered
//! interrupt, the interrupt cannot be cleared until it stops asserting.
//!
//! \note Since there is a write buffer in the Cortex-M3 processor, it may take
//! several clock cycles before the interrupt source is actually cleared.
//! \note Because there is a write buffer in the Cortex-M processor, it may
//! take several clock cycles before the interrupt source is actually cleared.
//! Therefore, it is recommended that the interrupt source be cleared early in
//! the interrupt handler (as opposed to the very last action) to avoid
//! returning from the interrupt handler before the interrupt source is
//! actually cleared. Failure to do so may result in the interrupt handler
//! being immediately reentered (since NVIC still sees the interrupt source
//! asserted).
//! being immediately reentered (because the interrupt controller still sees
//! the interrupt source asserted).
//!
//! \return None.
//
......
bsp/lm3s8962/Libraries/driverlib/comp.h
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// comp.h - Prototypes for the analog comparator driver.
//
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......
bsp/lm3s8962/Libraries/driverlib/cpu.c
浏览文件 @ 646c1443
......@@ -3,7 +3,7 @@
// cpu.c - Instruction wrappers for special CPU instructions needed by the
// drivers.
//
// Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -19,7 +19,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......@@ -360,8 +360,7 @@ CPUbasepriSet(unsigned long ulNewBasepri)
//
// Set the BASEPRI register
//
__asm(" msr BASEPRI, r0\n"
" bx lr\n");
__asm(" msr BASEPRI, r0\n");
}
#endif
......
bsp/lm3s8962/Libraries/driverlib/cpu.h
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// cpu.h - Prototypes for the CPU instruction wrapper functions.
//
// Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......
bsp/lm3s8962/Libraries/driverlib/debug.h
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// debug.h - Macros for assisting debug of the driver library.
//
// Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......
bsp/lm3s8962/Libraries/driverlib/eeprom.c 0 → 100644
浏览文件 @ 646c1443
此差异已折叠。
bsp/lm3s8962/Libraries/driverlib/eeprom.h 0 → 100644
浏览文件 @ 646c1443
//*****************************************************************************
//
// eeprom.h - Prototypes for the EEPROM driver.
//
// Copyright (c) 2010-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
#ifndef __EEPROM_H__
#define __EEPROM_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
//! \addtogroup eeprom_api
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Values returned by EEPROMInit.
//
//*****************************************************************************
//
//! This value may be returned from a call to EEPROMInit(). It indicates that
//! no previous write operations were interrupted by a reset event and that the
//! EEPROM peripheral is ready for use.
//
#define EEPROM_INIT_OK 0
//
//! This value may be returned from a call to EEPROMInit(). It indicates that
//! a previous data or protection write operation was interrupted by a reset
//! event. The EEPROM peripheral has recovered its state but the last write
//! operation may have been lost. The application must check the validity of
//! data it has written and retry any writes as required.
//
#define EEPROM_INIT_RETRY 1
//
//! This value may be returned from a call to EEPROMInit(). It indicates that a
//! previous data or protection write operation was interrupted by a reset
//! event and that the EEPROM peripheral was unable to clean up after the
//! problem. This situation may be resolved with another reset or may be fatal
//! depending upon the cause of the problem. For example, if the voltage to
//! the part is unstable, retrying once the voltage has stabilized may clear
//! the error.
//
#define EEPROM_INIT_ERROR 2
//*****************************************************************************
//
// Error indicators returned by various EEPROM API calls. These will be ORed
// together into the final return code.
//
//*****************************************************************************
//
//! This return code bit indicates that the EEPROM programming state machine
//! failed to write a value due to the voltage level dropping below that
//! required for EEPROM programming. The operation may be retried once the
//! voltage stabilizes.
//
#define EEPROM_RC_INVPL 0x00000100
//
//! This return code bit indicates that an attempt was made to read from
//! the EEPROM while a write operation was in progress.
//
#define EEPROM_RC_WRBUSY 0x00000020
//
//! This return code bit indicates that an attempt was made to write a
//! value but the destination permissions disallow write operations. This
//! may be due to the destination block being locked, access protection set
//! to prohibit writes or an attempt to write a password when one is already
//! written.
//
#define EEPROM_RC_NOPERM 0x00000010
//
//! This return code bit indicates that the EEPROM programming state machine
//! is currently copying to or from the internal copy buffer to make room for
//! a newly written value. It is provided as a status indicator and does not
//! indicate an error.
//
#define EEPROM_RC_WKCOPY 0x00000008
//
//! This return code bit indicates that the EEPROM programming state machine
//! is currently erasing the internal copy buffer. It is provided as a
//! status indicator and does not indicate an error.
//
#define EEPROM_RC_WKERASE 0x00000004
//
//! This return code bit indicates that the EEPROM programming state machine
//! is currently working. No new write operations should be attempted until
//! this bit is clear.
//
#define EEPROM_RC_WORKING 0x00000001
//*****************************************************************************
//
// Values that can be passed to EEPROMBlockProtectSet() in the ulProtect
// parameter, and returned by EEPROMBlockProtectGet().
//
//*****************************************************************************
//
//! This bit may be ORed with the protection option passed to
//! EEPROMBlockProtectSet() or returned from EEPROMBlockProtectGet(). It
//! restricts EEPROM access to threads running in supervisor mode and prevents
//! access to an EEPROM block when the CPU is in user mode.
//
#define EEPROM_PROT_SUPERVISOR_ONLY 0x00000008
//
//! This value may be passed to EEPROMBlockProtectSet() or returned from
//! EEPROMBlockProtectGet(). It indicates that the block should offer
//! read/write access when no password is set or when a password is set and
//! the block is unlocked, and read-only access when a password is set but
//! the block is locked.
//
#define EEPROM_PROT_RW_LRO_URW 0x00000000
//
//! This value may be passed to EEPROMBlockProtectSet() or returned from
//! EEPROMBlockProtectGet(). It indicates that the block should offer neither
//! read nor write access unless it is protected by a password and unlocked.
//
#define EEPROM_PROT_NA_LNA_URW 0x00000001
//
//! This value may be passed to EEPROMBlockProtectSet() or returned from
//! EEPROMBlockProtectGet(). It indicates that the block should offer
//! read-only access when no password is set or when a password is set and the
//! block is unlocked. When a password is set and the block is locked, neither
//! read nor write access is permitted.
//
#define EEPROM_PROT_RO_LNA_URO 0x00000002
//*****************************************************************************
//
//! This value may be passed to EEPROMIntEnable() and EEPROMIntDisable() and is
//! returned by EEPROMIntStatus() if an EEPROM interrupt is currently being
//! signaled.
//
//*****************************************************************************
#define EEPROM_INT_PROGRAM 0x00000004
//*****************************************************************************
//
//! Returns the EEPROM block number containing a given offset address.
//!
//! \param ulAddr is the linear, byte address of the EEPROM location whose
//! block number is to be returned. This is a zero-based offset from the start
//! of the EEPROM storage.
//!
//! This macro may be used to translate an EEPROM address offset into a
//! block number suitable for use in any of the driver's block protection
//! functions. The address provided is expressed as a byte offset from the
//! base of the EEPROM.
//!
//! \return Returns the zero-based block number which contains the passed
//! address.
//
//*****************************************************************************
#define EEPROMBlockFromAddr(ulAddr) ((ulAddr) >> 6)
//*****************************************************************************
//
//! Returns the offset address of the first word in an EEPROM block.
//!
//! \param ulBlock is the index of the EEPROM block whose first word address
//! is to be returned.
//!
//! This macro may be used to determine the address of the first word in a
//! given EEPROM block. The address returned is expressed as a byte offset
//! from the base of EEPROM storage.
//!
//! \return Returns the address of the first word in the given EEPROM block.
//
//*****************************************************************************
#define EEPROMAddrFromBlock(ulBlock) ((ulBlock) << 6)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
extern unsigned long EEPROMInit(void);
extern unsigned long EEPROMSizeGet(void);
extern unsigned long EEPROMBlockCountGet(void);
extern void EEPROMRead(unsigned long *pulData, unsigned long ulAddress,
unsigned long ulCount);
extern unsigned long EEPROMProgram(unsigned long *pulData,
unsigned long ulAddress,
unsigned long ulCount);
extern unsigned long EEPROMProgramNonBlocking(unsigned long ulData,
unsigned long ulAddress);
extern unsigned long EEPROMStatusGet(void);
extern unsigned long EEPROMMassErase(void);
extern unsigned long EEPROMBlockProtectGet(unsigned long ulBlock);
extern unsigned long EEPROMBlockProtectSet(unsigned long ulBlock,
unsigned long ulProtect);
extern unsigned long EEPROMBlockPasswordSet(unsigned long ulBlock,
unsigned long *pulPassword,
unsigned long ulCount);
extern unsigned long EEPROMBlockLock(unsigned long ulBlock);
extern unsigned long EEPROMBlockUnlock(unsigned long ulBlock,
unsigned long *pulPassword,
unsigned long ulCount);
extern void EEPROMBlockHide(unsigned long ulBlock);
extern void EEPROMIntEnable(unsigned long ulIntFlags);
extern void EEPROMIntDisable(unsigned long ulIntFlags);
extern unsigned long EEPROMIntStatus(tBoolean bMasked);
extern void EEPROMIntClear(unsigned long ulIntFlags);
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __EEPROM_H__
bsp/lm3s8962/Libraries/driverlib/epi.c
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// epi.c - Driver for the EPI module.
//
// Copyright (c) 2008-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2008-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......@@ -50,9 +50,10 @@
//! - \b EPI_MODE_GENERAL - use for general-purpose mode operation
//! - \b EPI_MODE_SDRAM - use with SDRAM device
//! - \b EPI_MODE_HB8 - use with host-bus 8-bit interface
//! - \b EPI_MODE_HB16 - use with host-bus 16-bit interface
//! - \b EPI_MODE_DISABLE - disable the EPI module
//!
//! Selection of any of the above modes will enable the EPI module, except
//! Selection of any of the above modes enables the EPI module, except
//! for \b EPI_MODE_DISABLE which should be used to disable the module.
//!
//! \return None.
......@@ -68,6 +69,7 @@ EPIModeSet(unsigned long ulBase, unsigned long ulMode)
ASSERT((ulMode == EPI_MODE_GENERAL) ||
(ulMode == EPI_MODE_SDRAM) ||
(ulMode == EPI_MODE_HB8) ||
(ulMode == EPI_MODE_HB16) ||
(ulMode == EPI_MODE_DISABLE));
//
......@@ -84,15 +86,15 @@ EPIModeSet(unsigned long ulBase, unsigned long ulMode)
//! \param ulDivider is the value of the clock divider to be applied to
//! the external interface (0-65535).
//!
//! This functions sets the clock divider(s) that will be used to determine the
//! This function sets the clock divider(s) that is used to determine the
//! clock rate of the external interface. The \e ulDivider value is used to
//! derive the EPI clock rate from the system clock based upon the following
//! derive the EPI clock rate from the system clock based on the following
//! formula.
//!
//! EPIClock = (Divider == 0) ? SysClk : (SysClk / (((Divider / 2) + 1) * 2))
//!
//! For example, a divider value of 1 results in an EPI clock rate of half
//! the system clock, value of 2 or 3 yield one quarter of the system clock and
//! the system clock, value of 2 or 3 yields one quarter of the system clock and
//! a value of 4 results in one sixth of the system clock rate.
//!
//! In cases where a dual chip select mode is in use and different clock rates
......@@ -213,16 +215,15 @@ EPIConfigSDRAMSet(unsigned long ulBase, unsigned long ulConfig,
//! rate resulting from the divider in the lower 16 bits of the parameter passed
//! to EPIDividerSet().
//! - one of \b EPI_HB8_CSCFG_CS, \b EPI_HB8_CSCFG_ALE,
//! \b EPI_HB8_CSCFG_DUAL_CS or \b EPI_HB8_CSCFG_ALE_DUAL. \b EPI_HB8_CSCFG_CS
//! sets EPI30 to operate as a Chip Select (CSn) signal. When using this mode,
//! \b EPI_HB8_MODE_ADMUX must not be specified. \b EPI_HB8_CSCFG_ALE sets
//! EPI30 to operate as an address latch (ALE). \b EPI_HB8_CSCFG_DUAL_CS sets
//! EPI30 to operate as CS0n and EPI27 as CS1n with the asserted chip select
//! determined from the most significant address bit for the respective external
//! address map. \b EPI_HB8_CSCFG_DUAL_ALE sets EPI30 as an address latch (ALE),
//! EPI27 as CS0n and EPI26 as CS1n with the asserted chip select determined
//! from the most significant address bit for the respective external address
//! map.
//! \b EPI_HB8_CSCFG_DUAL_CS or \b EPI_HB8_CSCFG_ALE_DUAL_CS.
//! \b EPI_HB8_CSCFG_CS sets EPI30 to operate as a Chip Select (CSn) signal.
//! \b EPI_HB8_CSCFG_ALE sets EPI30 to operate as an address latch (ALE).
//! \b EPI_HB8_CSCFG_DUAL_CS sets EPI30 to operate as CS0n and EPI27 as CS1n
//! with the asserted chip select determined from the most significant address
//! bit for the respective external address map. \b EPI_HB8_CSCFG_ALE_DUAL_CS
//! sets EPI30 as an address latch (ALE), EPI27 as CS0n and EPI26 as CS1n with
//! the asserted chip select determined from the most significant address bit
//! for the respective external address map.
//!
//! The parameter \e ulMaxWait is used if the FIFO mode is chosen. If a
//! FIFO is used along with RXFULL or TXEMPTY ready signals, then this
......@@ -248,7 +249,9 @@ EPIConfigHB8Set(unsigned long ulBase, unsigned long ulConfig,
//
HWREG(ulBase + EPI_O_HB8CFG2) = (((ulConfig & EPI_HB8_WORD_ACCESS) ?
EPI_HB8CFG2_WORD : 0) |
((ulConfig & EPI_HB8_CSBAUD_DUAL) ? EPI_HB8CFG2_CSBAUD : 0) | ((ulConfig & EPI_HB8_CSCFG_MASK) << 15));
((ulConfig & EPI_HB8_CSBAUD_DUAL) ?
EPI_HB8CFG2_CSBAUD : 0) |
((ulConfig & EPI_HB8_CSCFG_MASK) << 15));
//
// Fill in the max wait field of the configuration word.
//
......@@ -261,6 +264,96 @@ EPIConfigHB8Set(unsigned long ulBase, unsigned long ulConfig,
HWREG(ulBase + EPI_O_HB8CFG) = ulConfig;
}
//*****************************************************************************
//
//! Configures the interface for Host-bus 16 operation.
//!
//! \param ulBase is the EPI module base address.
//! \param ulConfig is the interface configuration.
//! \param ulMaxWait is the maximum number of external clocks to wait
//! if a FIFO ready signal is holding off the transaction.
//!
//! This function is used to configure the interface when used in Host-bus 16
//! operation as chosen with the function EPIModeSet(). The parameter
//! \e ulConfig is the logical OR of any of the following:
//!
//! - one of \b EPI_HB16_MODE_ADMUX, \b EPI_HB16_MODE_ADDEMUX,
//! \b EPI_HB16_MODE_SRAM, or \b EPI_HB16_MODE_FIFO to select the HB16 mode
//! - \b EPI_HB16_USE_TXEMPTY - enable TXEMPTY signal with FIFO
//! - \b EPI_HB16_USE_RXFULL - enable RXFULL signal with FIFO
//! - \b EPI_HB16_WRHIGH - use active high write strobe, otherwise it is
//! active low
//! - \b EPI_HB16_RDHIGH - use active high read strobe, otherwise it is
//! active low
//! - one of \b EPI_HB16_WRWAIT_0, \b EPI_HB16_WRWAIT_1, \b EPI_HB16_WRWAIT_2,
//! or \b EPI_HB16_WRWAIT_3 to select the number of write wait states (default
//! is 0 wait states)
//! - one of \b EPI_HB16_RDWAIT_0, \b EPI_HB16_RDWAIT_1, \b EPI_HB16_RDWAIT_2,
//! or \b EPI_HB16_RDWAIT_3 to select the number of read wait states (default
//! is 0 wait states)
//! - \b EPI_HB16_WORD_ACCESS - use Word Access mode to route bytes to the
//! correct byte lanes allowing data to be stored in bits [31:16]. If absent,
//! all data transfers use bits [15:0].
//! - \b EPI_HB16_BSEL - enables byte selects. In this mode, two EPI signals
//! operate as byte selects allowing 8-bit transfers. If this flag is not
//! specified, data must be read and written using only 16-bit transfers.
//! - \b EPI_HB16_CSBAUD_DUAL - use different baud rates when accessing devices
//! on each CSn. CS0n uses the baud rate specified by the lower 16 bits of the
//! divider passed to EPIDividerSet() and CS1n uses the divider passed in the
//! upper 16 bits. If this option is absent, both chip selects use the baud
//! rate resulting from the divider in the lower 16 bits of the parameter passed
//! to EPIDividerSet().
//! - one of \b EPI_HB16_CSCFG_CS, \b EPI_HB16_CSCFG_ALE,
//! \b EPI_HB16_CSCFG_DUAL_CS or \b EPI_HB16_CSCFG_ALE_DUAL_CS.
//! \b EPI_HB16_CSCFG_CS sets EPI30 to operate as a Chip Select (CSn) signal.
//! \b EPI_HB16_CSCFG_ALE sets EPI30 to operate as an address latch (ALE).
//! \b EPI_HB16_CSCFG_DUAL_CS sets EPI30 to operate as CS0n and EPI27 as CS1n
//! with the asserted chip select determined from the most significant address
//! bit for the respective external address map. \b EPI_HB16_CSCFG_ALE_DUAL_CS
//! sets EPI30 as an address latch (ALE), EPI27 as CS0n and EPI26 as CS1n with
//! the asserted chip select determined from the most significant address bit
//! for the respective external address map.
//!
//! The parameter \e ulMaxWait is used if the FIFO mode is chosen. If a
//! FIFO is used along with RXFULL or TXEMPTY ready signals, then this
//! parameter determines the maximum number of clocks to wait when the
//! transaction is being held off by by the FIFO using one of these ready
//! signals. A value of 0 means to wait forever.
//!
//! \return None.
//
//*****************************************************************************
void
EPIConfigHB16Set(unsigned long ulBase, unsigned long ulConfig,
unsigned long ulMaxWait)
{
//
// Check the arguments.
//
ASSERT(ulBase == EPI0_BASE);
ASSERT(ulMaxWait < 256);
//
// Determine the CS and word access modes.
//
HWREG(ulBase + EPI_O_HB16CFG2) = (((ulConfig & EPI_HB16_WORD_ACCESS) ?
EPI_HB16CFG2_WORD : 0) |
((ulConfig & EPI_HB16_CSBAUD_DUAL) ?
EPI_HB16CFG2_CSBAUD : 0) |
((ulConfig & EPI_HB16_CSCFG_MASK) << 15));
//
// Fill in the max wait field of the configuration word.
//
ulConfig &= ~EPI_HB16CFG_MAXWAIT_M;
ulConfig |= ulMaxWait << EPI_HB16CFG_MAXWAIT_S;
//
// Write the main HostBus16 configuration register.
//
HWREG(ulBase + EPI_O_HB16CFG) = ulConfig;
}
//*****************************************************************************
//
//! Configures the interface for general-purpose mode operation.
......@@ -274,9 +367,8 @@ EPIConfigHB8Set(unsigned long ulBase, unsigned long ulConfig,
//!
//! This function is used to configure the interface when used in
//! general-purpose operation as chosen with the function EPIModeSet(). The
//! parameter
//! \e ulConfig is the logical OR of any of the following:
//!
//! parameter \e ulConfig is the logical OR of any of the following:
//!
//! - \b EPI_GPMODE_CLKPIN - interface clock is output on a pin
//! - \b EPI_GPMODE_CLKGATE - clock is stopped when there is no transaction,
//! otherwise it is free-running
......@@ -288,13 +380,13 @@ EPIConfigHB8Set(unsigned long ulBase, unsigned long ulConfig,
//! - \b EPI_GPMODE_FRAME50 - framing signal is 50/50 duty cycle, otherwise it
//! is a pulse
//! - \b EPI_GPMODE_READWRITE - read and write strobes are emitted on pins
//! - \b EPI_GPMODE_WRITE2CYCLE - a two cycle write is used, otherwise a
//! - \b EPI_GPMODE_WRITE2CYCLE - a two-cycle write is used, otherwise a
//! single-cycle write is used
//! - \b EPI_GPMODE_READ2CYCLE - a two cycle read is used, otherwise a
//! - \b EPI_GPMODE_READ2CYCLE - a two-cycle read is used, otherwise a
//! single-cycle read is used
//! - \b EPI_GPMODE_ASIZE_NONE, \b EPI_GPMODE_ASIZE_4,
//! \b EPI_GPMODE_ASIZE_12, or \b EPI_GPMODE_ASIZE_20 to choose no address
//! bus, or and address bus size of 4, 12, or 20 bits
//! bus or an address bus size of 4, 12, or 20 bits
//! - \b EPI_GPMODE_DSIZE_8, \b EPI_GPMODE_DSIZE_16,
//! \b EPI_GPMODE_DSIZE_24, or \b EPI_GPMODE_DSIZE_32 to select a data bus
//! size of 8, 16, 24, or 32 bits
......@@ -313,7 +405,7 @@ EPIConfigHB8Set(unsigned long ulBase, unsigned long ulConfig,
//! external clock enable is used, this parameter determines the maximum
//! number of clocks to wait when the external clock enable signal is holding
//! off a transaction. A value of 0 means to wait forever. If a non-zero
//! value is used and exceeded, an interrupt will occur and the transaction
//! value is used and exceeded, an interrupt occurs and the transaction
//! aborted.
//!
//! \return None.
......@@ -422,7 +514,7 @@ EPIAddressMapSet(unsigned long ulBase, unsigned long ulMap)
//! Once configured, the non-blocking read is started by calling
//! EPINonBlockingReadStart(). If the addresses to be read from the device
//! are in a sequence, it is not necessary to call this function multiple
//! times. Until it is changed, the EPI module will remember the last address
//! times. Until it is changed, the EPI module stores the last address
//! that was used for a non-blocking read (per channel).
//!
//! \return None.
......@@ -468,9 +560,9 @@ EPINonBlockingReadConfigure(unsigned long ulBase, unsigned long ulChannel,
//!
//! This function starts a non-blocking read that was previously configured
//! with the function EPINonBlockingReadConfigure(). Once this function is
//! called, the EPI module will begin reading data from the external device
//! into the read FIFO. The EPI will stop reading when the FIFO fills up
//! and resume reading when the application drains the FIFO, until the
//! called, the EPI module begins reading data from the external device
//! into the read FIFO. The EPI stops reading when the FIFO fills up
//! and resumes reading when the application drains the FIFO, until the
//! total specified count of data items has been read.
//!
//! Once a read transaction is completed and the FIFO drained, another
......@@ -534,7 +626,7 @@ EPINonBlockingReadStop(unsigned long ulBase, unsigned long ulChannel)
ulOffset = ulChannel * (EPI_O_RPSTD1 - EPI_O_RPSTD0);
//
// Write a 0 to the read count register, which will cancel the transaction.
// Write a 0 to the read count register, which cancels the transaction.
//
HWREG(ulBase + EPI_O_RPSTD0 + ulOffset) = 0;
}
......@@ -612,10 +704,10 @@ EPINonBlockingReadAvail(unsigned long ulBase)
//! be stored.
//!
//! This function reads 32-bit data items from the read FIFO and stores
//! the values in a caller supplied buffer. The function will read and store
//! the values in a caller-supplied buffer. The function reads and stores
//! data from the FIFO until there is no more data in the FIFO or the maximum
//! count is reached as specified in the parameter \e ulCount. The actual
//! count of items will be returned.
//! count of items is returned.
//!
//! \return The number of items read from the FIFO.
//
......@@ -634,8 +726,8 @@ EPINonBlockingReadGet32(unsigned long ulBase, unsigned long ulCount,
ASSERT(pulBuf);
//
// Read from the FIFO while there are any items to read, and
// the callers specified count is not exceeded.
// Read from the FIFO while there are any items to read and
// the caller's specified count is not exceeded.
//
while(HWREG(ulBase + EPI_O_RFIFOCNT) && ulCount--)
{
......@@ -663,14 +755,14 @@ EPINonBlockingReadGet32(unsigned long ulBase, unsigned long ulCount,
//!
//! \param ulBase is the EPI module base address.
//! \param ulCount is the maximum count of items to read.
//! \param pusBuf is the caller supplied buffer where the read data should
//! \param pusBuf is the caller-supplied buffer where the read data should
//! be stored.
//!
//! This function reads 16-bit data items from the read FIFO and stores
//! the values in a caller supplied buffer. The function will read and store
//! the values in a caller-supplied buffer. The function reads and stores
//! data from the FIFO until there is no more data in the FIFO or the maximum
//! count is reached as specified in the parameter \e ulCount. The actual
//! count of items will be returned.
//! count of items is returned.
//!
//! \return The number of items read from the FIFO.
//
......@@ -690,12 +782,12 @@ EPINonBlockingReadGet16(unsigned long ulBase, unsigned long ulCount,
//
// Read from the FIFO while there are any items to read, and
// the callers specified count is not exceeded.
// the caller's specified count is not exceeded.
//
while(HWREG(ulBase + EPI_O_RFIFOCNT) && ulCount--)
{
//
// Read from the FIFO and store in the caller supplied buffer.
// Read from the FIFO and store in the caller-supplied buffer.
//
*pusBuf = (unsigned short)HWREG(ulBase + EPI_O_READFIFO);
......@@ -718,14 +810,14 @@ EPINonBlockingReadGet16(unsigned long ulBase, unsigned long ulCount,
//!
//! \param ulBase is the EPI module base address.
//! \param ulCount is the maximum count of items to read.
//! \param pucBuf is the caller supplied buffer where the read data should
//! \param pucBuf is the caller-supplied buffer where the read data should
//! be stored.
//!
//! This function reads 8-bit data items from the read FIFO and stores
//! the values in a caller supplied buffer. The function will read and store
//! the values in a caller-supplied buffer. The function reads and stores
//! data from the FIFO until there is no more data in the FIFO or the maximum
//! count is reached as specified in the parameter \e ulCount. The actual
//! count of items will be returned.
//! count of items is returned.
//!
//! \return The number of items read from the FIFO.
//
......@@ -745,7 +837,7 @@ EPINonBlockingReadGet8(unsigned long ulBase, unsigned long ulCount,
//
// Read from the FIFO while there are any items to read, and
// the callers specified count is not exceeded.
// the caller's specified count is not exceeded.
//
while(HWREG(ulBase + EPI_O_RFIFOCNT) && ulCount--)
{
......@@ -1047,7 +1139,7 @@ EPIIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
//!
//! \param ulBase is the EPI module base address.
//!
//! This function will disable and clear the handler to be called when the
//! This function disables and clears the handler to be called when the
//! EPI interrupt occurs.
//!
//! \sa IntRegister() for important information about registering interrupt
......
bsp/lm3s8962/Libraries/driverlib/epi.h
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// epi.h - Prototypes and macros for the EPI module.
//
// Copyright (c) 2008-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2008-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......@@ -44,6 +44,7 @@ extern "C"
#define EPI_MODE_GENERAL 0x00000010
#define EPI_MODE_SDRAM 0x00000011
#define EPI_MODE_HB8 0x00000012
#define EPI_MODE_HB16 0x00000013
#define EPI_MODE_DISABLE 0x00000000
//*****************************************************************************
......@@ -115,6 +116,37 @@ extern "C"
#define EPI_HB8_CSCFG_MASK 0x00000600
//*****************************************************************************
//
// Values that can be passed to EPIConfigHB16ModeSet()
//
//*****************************************************************************
#define EPI_HB16_USE_TXEMPTY 0x00800000
#define EPI_HB16_USE_RXFULL 0x00400000
#define EPI_HB16_WRHIGH 0x00200000
#define EPI_HB16_RDHIGH 0x00100000
#define EPI_HB16_WRWAIT_0 0x00000000
#define EPI_HB16_WRWAIT_1 0x00000040
#define EPI_HB16_WRWAIT_2 0x00000080
#define EPI_HB16_WRWAIT_3 0x000000C0
#define EPI_HB16_RDWAIT_0 0x00000000
#define EPI_HB16_RDWAIT_1 0x00000010
#define EPI_HB16_RDWAIT_2 0x00000020
#define EPI_HB16_RDWAIT_3 0x00000030
#define EPI_HB16_MODE_ADMUX 0x00000000
#define EPI_HB16_MODE_ADDEMUX 0x00000001
#define EPI_HB16_MODE_SRAM 0x00000002
#define EPI_HB16_MODE_FIFO 0x00000003
#define EPI_HB16_BSEL 0x00000004
#define EPI_HB16_WORD_ACCESS 0x00000100
#define EPI_HB16_CSCFG_ALE 0x00000000
#define EPI_HB16_CSCFG_CS 0x00000200
#define EPI_HB16_CSCFG_DUAL_CS 0x00000400
#define EPI_HB16_CSCFG_ALE_DUAL_CS 0x00000600
#define EPI_HB16_CSBAUD_DUAL 0x00000800
#define EPI_HB16_CSCFG_MASK 0x00000600
//*****************************************************************************
//
// Values that can be passed to EPIConfigSDRAMSet()
......@@ -196,6 +228,8 @@ extern void EPIConfigGPModeSet(unsigned long ulBase, unsigned long ulConfig,
unsigned long ulMaxWait);
extern void EPIConfigHB8Set(unsigned long ulBase, unsigned long ulConfig,
unsigned long ulMaxWait);
extern void EPIConfigHB16Set(unsigned long ulBase, unsigned long ulConfig,
unsigned long ulMaxWait);
extern void EPIAddressMapSet(unsigned long ulBase, unsigned long ulMap);
extern void EPINonBlockingReadConfigure(unsigned long ulBase,
unsigned long ulChannel,
......
bsp/lm3s8962/Libraries/driverlib/ethernet.h
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// ethernet.h - Defines and Macros for the ethernet module.
//
// Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......@@ -136,10 +136,13 @@ extern void EthernetIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
extern void EthernetIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
extern unsigned long EthernetIntStatus(unsigned long ulBase, tBoolean bMasked);
extern void EthernetIntClear(unsigned long ulBase, unsigned long ulIntFlags);
extern void EthernetPHYAddrSet(unsigned long ulBase, unsigned char ucAddr);
extern void EthernetPHYWrite(unsigned long ulBase, unsigned char ucRegAddr,
unsigned long ulData);
extern unsigned long EthernetPHYRead(unsigned long ulBase,
unsigned char ucRegAddr);
extern void EthernetPHYPowerOff(unsigned long ulBase);
extern void EthernetPHYPowerOn(unsigned long ulBase);
//*****************************************************************************
//
......
bsp/lm3s8962/Libraries/driverlib/fan.c 0 → 100644
浏览文件 @ 646c1443
此差异已折叠。
bsp/lm3s8962/Libraries/driverlib/fan.h 0 → 100644
浏览文件 @ 646c1443
//*****************************************************************************
//
// fan.h - Prototypes and macros for the Fan controller.
//
// Copyright (c) 2010-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
#ifndef __FAN_H__
#define __FAN_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Fan status values that can be returned from the FanChannelStatus() function.
//
//*****************************************************************************
#define FAN_STATUS_STALLED 0
#define FAN_STATUS_CHANGING 1
#define FAN_STATUS_LOCKED 2
#define FAN_STATUS_NOATTAIN 3
//*****************************************************************************
//
// Configuration flags to be used with FanChannelConfigManual() and
// FanChannelConfigAuto().
//
//*****************************************************************************
#define FAN_CONFIG_RESTART (1 << 15)
#define FAN_CONFIG_NORESTART (0 << 15)
#define FAN_CONFIG_ACCEL_FAST (1 << 14)
#define FAN_CONFIG_ACCEL_SLOW (0 << 14)
#define FAN_CONFIG_HYST_1 (0 << 11)
#define FAN_CONFIG_HYST_2 (1 << 11)
#define FAN_CONFIG_HYST_4 (2 << 11)
#define FAN_CONFIG_HYST_8 (3 << 11)
#define FAN_CONFIG_HYST_16 (4 << 11)
#define FAN_CONFIG_HYST_32 (5 << 11)
#define FAN_CONFIG_HYST_64 (6 << 11)
#define FAN_CONFIG_HYST_128 (7 << 11)
#define FAN_CONFIG_START_2 (0 << 8)
#define FAN_CONFIG_START_4 (1 << 8)
#define FAN_CONFIG_START_8 (2 << 8)
#define FAN_CONFIG_START_16 (3 << 8)
#define FAN_CONFIG_START_32 (4 << 8)
#define FAN_CONFIG_START_64 (5 << 8)
#define FAN_CONFIG_START_128 (6 << 8)
#define FAN_CONFIG_START_256 (7 << 8)
#define FAN_CONFIG_START_DUTY_OFF (0 << 6)
#define FAN_CONFIG_START_DUTY_50 (1 << 6)
#define FAN_CONFIG_START_DUTY_75 (2 << 6)
#define FAN_CONFIG_START_DUTY_100 (3 << 6)
#define FAN_CONFIG_AVG_NONE (0 << 4)
#define FAN_CONFIG_AVG_2 (1 << 4)
#define FAN_CONFIG_AVG_4 (2 << 4)
#define FAN_CONFIG_AVG_8 (3 << 4)
#define FAN_CONFIG_TACH_1 (0 << 2)
#define FAN_CONFIG_TACH_2 (1 << 2)
#define FAN_CONFIG_TACH_4 (2 << 2)
#define FAN_CONFIG_TACH_8 (3 << 2)
//*****************************************************************************
//
// Interrupt configuration/status flags to be used with the following
// functions: FanIntEnable(), FanIntDisable(), FanIntStatus(), FanIntClear().
//
//*****************************************************************************
#define FAN_CH5_INT_AUTO_SPEED_OK (1 << 22)
#define FAN_CH5_INT_MANUAL_SPEED_CHANGE (1 << 22)
#define FAN_CH5_INT_AUTO_SPEED_ERROR (1 << 21)
#define FAN_CH5_INT_MANUAL_SPEED_UPDATE (1 << 21)
#define FAN_CH5_INT_STALL (1 << 20)
#define FAN_CH4_INT_AUTO_SPEED_OK (1 << 18)
#define FAN_CH4_INT_MANUAL_SPEED_CHANGE (1 << 18)
#define FAN_CH4_INT_AUTO_SPEED_ERROR (1 << 17)
#define FAN_CH4_INT_MANUAL_SPEED_UPDATE (1 << 17)
#define FAN_CH4_INT_STALL (1 << 16)
#define FAN_CH3_INT_AUTO_SPEED_OK (1 << 14)
#define FAN_CH3_INT_MANUAL_SPEED_CHANGE (1 << 14)
#define FAN_CH3_INT_AUTO_SPEED_ERROR (1 << 13)
#define FAN_CH3_INT_MANUAL_SPEED_UPDATE (1 << 13)
#define FAN_CH3_INT_STALL (1 << 12)
#define FAN_CH2_INT_AUTO_SPEED_OK (1 << 10)
#define FAN_CH2_INT_MANUAL_SPEED_CHANGE (1 << 10)
#define FAN_CH2_INT_AUTO_SPEED_ERROR (1 << 9)
#define FAN_CH2_INT_MANUAL_SPEED_UPDATE (1 << 9)
#define FAN_CH2_INT_STALL (1 << 8)
#define FAN_CH1_INT_AUTO_SPEED_OK (1 << 6)
#define FAN_CH1_INT_MANUAL_SPEED_CHANGE (1 << 6)
#define FAN_CH1_INT_AUTO_SPEED_ERROR (1 << 5)
#define FAN_CH1_INT_MANUAL_SPEED_UPDATE (1 << 5)
#define FAN_CH1_INT_STALL (1 << 4)
#define FAN_CH0_INT_AUTO_SPEED_OK (1 << 2)
#define FAN_CH0_INT_MANUAL_SPEED_CHANGE (1 << 2)
#define FAN_CH0_INT_AUTO_SPEED_ERROR (1 << 1)
#define FAN_CH0_INT_MANUAL_SPEED_UPDATE (1 << 1)
#define FAN_CH0_INT_STALL (1 << 0)
#define FAN_CHx_INT_AUTO_SPEED_OK(x) (1 << (((x) * 4) + 2))
#define FAN_CHx_INT_MANUAL_SPEED_CHANGE(x) (1 << (((x) * 4) + 2))
#define FAN_CHx_INT_AUTO_SPEED_ERROR(x) (1 << (((x) * 4) + 1))
#define FAN_CHx_INT_MANUAL_SPEED_UPDATE(x) (1 << (((x) * 4) + 1))
#define FAN_CHx_INT_STALL(x) (1 << ((x) * 4))
//*****************************************************************************
//
// API Function prototypes
//
//*****************************************************************************
extern void FanChannelEnable(unsigned long ulBase, unsigned long ulChannel);
extern void FanChannelDisable(unsigned long ulBase, unsigned long ulChannel);
extern unsigned long FanChannelStatus(unsigned long ulBase,
unsigned long ulChannel);
extern void FanChannelConfigManual(unsigned long ulBase, unsigned long ulChannel,
unsigned long ulConfig);
extern void FanChannelConfigAuto(unsigned long ulBase, unsigned long ulChannel,
unsigned long ulConfig);
extern void FanChannelDutySet(unsigned long ulBase, unsigned long ulChannel,
unsigned long ulDuty);
extern unsigned long FanChannelDutyGet(unsigned long ulBase,
unsigned long ulChannel);
extern void FanChannelRPMSet(unsigned long ulBase, unsigned long ulChannel,
unsigned long ulRPM);
extern unsigned long FanChannelRPMGet(unsigned long ulBase,
unsigned long ulChannel);
extern void FanIntEnable(unsigned long ulBase, unsigned long ulFlags);
extern void FanIntDisable(unsigned long ulBase, unsigned long ulFlags);
extern unsigned long FanIntStatus(unsigned long ulBase, tBoolean bMasked);
extern void FanIntClear(unsigned long ulBase, unsigned long ulFlags);
extern void FanIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
extern void FanIntUnregister(unsigned long ulBase);
extern unsigned long FanChannelsGet(unsigned long ulBase);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __FAN_H__
bsp/lm3s8962/Libraries/driverlib/flash.c
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// flash.c - Driver for programming the on-chip flash.
//
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......@@ -70,7 +70,8 @@ static const unsigned long g_pulFMPRERegs[] =
//! Gets the number of processor clocks per micro-second.
//!
//! This function returns the number of clocks per micro-second, as presently
//! known by the flash controller.
//! known by the flash controller. This function is only valid on Sandstorm-
//! and Fury-class devices.
//!
//! \return Returns the number of processor clocks per micro-second.
//
......@@ -93,7 +94,7 @@ FlashUsecGet(void)
//! This function is used to tell the flash controller the number of processor
//! clocks per micro-second. This value must be programmed correctly or the
//! flash most likely will not program correctly; it has no affect on reading
//! flash.
//! flash. This function is only valid on Sandstorm- and Fury-class devices.
//!
//! \return None.
//
......@@ -113,11 +114,11 @@ FlashUsecSet(unsigned long ulClocks)
//!
//! \param ulAddress is the start address of the flash block to be erased.
//!
//! This function will erase a 1 kB block of the on-chip flash. After erasing,
//! the block will be filled with 0xFF bytes. Read-only and execute-only
//! blocks cannot be erased.
//! This function erases a 1-kB block of the on-chip flash. After erasing,
//! the block is filled with 0xFF bytes. Read-only and execute-only blocks
//! cannot be erased.
//!
//! This function will not return until the block has been erased.
//! This function does not return until the block has been erased.
//!
//! \return Returns 0 on success, or -1 if an invalid block address was
//! specified or the block is write-protected.
......@@ -132,9 +133,10 @@ FlashErase(unsigned long ulAddress)
ASSERT(!(ulAddress & (FLASH_ERASE_SIZE - 1)));
//
// Clear the flash access interrupt.
// Clear the flash access and error interrupts.
//
HWREG(FLASH_FCMISC) = FLASH_FCMISC_AMISC;
HWREG(FLASH_FCMISC) = (FLASH_FCMISC_AMISC | FLASH_FCMISC_VOLTMISC |
FLASH_FCMISC_ERMISC);
//
// Erase the block.
......@@ -150,9 +152,10 @@ FlashErase(unsigned long ulAddress)
}
//
// Return an error if an access violation occurred.
// Return an error if an access violation or erase error occurred.
//
if(HWREG(FLASH_FCRIS) & FLASH_FCRIS_ARIS)
if(HWREG(FLASH_FCRIS) & (FLASH_FCRIS_ARIS | FLASH_FCRIS_VOLTRIS |
FLASH_FCRIS_ERRIS))
{
return(-1);
}
......@@ -173,19 +176,16 @@ FlashErase(unsigned long ulAddress)
//! \param ulCount is the number of bytes to be programmed. Must be a multiple
//! of four.
//!
//! This function will program a sequence of words into the on-chip flash.
//! Programming each location consists of the result of an AND operation
//! of the new data and the existing data; in other words bits that contain
//! 1 can remain 1 or be changed to 0, but bits that are 0 cannot be changed
//! to 1. Therefore, a word can be programmed multiple times as long as these
//! rules are followed; if a program operation attempts to change a 0 bit to
//! a 1 bit, that bit will not have its value changed.
//! This function programs a sequence of words into the on-chip flash.
//! Each word in a page of flash can only be programmed one time between an
//! erase of that page; programming a word multiple times results in an
//! unpredictable value in that word of flash.
//!
//! Since the flash is programmed one word at a time, the starting address and
//! byte count must both be multiples of four. It is up to the caller to
//! Because the flash is programmed one word at a time, the starting address
//! and byte count must both be multiples of four. It is up to the caller to
//! verify the programmed contents, if such verification is required.
//!
//! This function will not return until the data has been programmed.
//! This function does not return until the data has been programmed.
//!
//! \return Returns 0 on success, or -1 if a programming error is encountered.
//
......@@ -201,9 +201,10 @@ FlashProgram(unsigned long *pulData, unsigned long ulAddress,
ASSERT(!(ulCount & 3));
//
// Clear the flash access interrupt.
// Clear the flash access and error interrupts.
//
HWREG(FLASH_FCMISC) = FLASH_FCMISC_AMISC;
HWREG(FLASH_FCMISC) = (FLASH_FCMISC_AMISC | FLASH_FCMISC_VOLTMISC |
FLASH_FCMISC_INVDMISC | FLASH_FCMISC_PROGMISC);
//
// See if this device has a write buffer.
......@@ -280,7 +281,8 @@ FlashProgram(unsigned long *pulData, unsigned long ulAddress,
//
// Return an error if an access violation occurred.
//
if(HWREG(FLASH_FCRIS) & FLASH_FCRIS_ARIS)
if(HWREG(FLASH_FCRIS) & (FLASH_FCRIS_ARIS | FLASH_FCRIS_VOLTRIS |
FLASH_FCRIS_INVDRIS | FLASH_FCRIS_PROGRIS))
{
return(-1);
}
......@@ -297,7 +299,7 @@ FlashProgram(unsigned long *pulData, unsigned long ulAddress,
//!
//! \param ulAddress is the start address of the flash block to be queried.
//!
//! This function will get the current protection for the specified 2 kB block
//! This function gets the current protection for the specified 2-kB block
//! of flash. Each block can be read/write, read-only, or execute-only.
//! Read/write blocks can be read, executed, erased, and programmed. Read-only
//! blocks can be read and executed. Execute-only blocks can only be executed;
......@@ -390,17 +392,17 @@ FlashProtectGet(unsigned long ulAddress)
//! \param eProtect is the protection to be applied to the block. Can be one
//! of \b FlashReadWrite, \b FlashReadOnly, or \b FlashExecuteOnly.
//!
//! This function will set the protection for the specified 2 kB block of
//! flash. Blocks which are read/write can be made read-only or execute-only.
//! Blocks which are read-only can be made execute-only. Blocks which are
//! This function sets the protection for the specified 2-kB block of
//! flash. Blocks that are read/write can be made read-only or execute-only.
//! Blocks that are read-only can be made execute-only. Blocks that are
//! execute-only cannot have their protection modified. Attempts to make the
//! block protection less stringent (that is, read-only to read/write) will
//! result in a failure (and be prevented by the hardware).
//! block protection less stringent (that is, read-only to read/write)
//! result in a failure (and are prevented by the hardware).
//!
//! Changes to the flash protection are maintained only until the next reset.
//! This allows the application to be executed in the desired flash protection
//! environment to check for inappropriate flash access (via the flash
//! interrupt). To make the flash protection permanent, use the
//! This protocol allows the application to be executed in the desired flash
//! protection environment to check for inappropriate flash access (via the
//! flash interrupt). To make the flash protection permanent, use the
//! FlashProtectSave() function.
//!
//! \return Returns 0 on success, or -1 if an invalid address or an invalid
......@@ -536,7 +538,7 @@ FlashProtectSet(unsigned long ulAddress, tFlashProtection eProtect)
{
ulProtectRE &= ~(FLASH_FMP_BLOCK_31 | FLASH_FMP_BLOCK_30);
ulProtectRE |= (HWREG(g_pulFMPRERegs[ulBank]) &
(FLASH_FMP_BLOCK_31 | FLASH_FMP_BLOCK_30));
(FLASH_FMP_BLOCK_31 | FLASH_FMP_BLOCK_30));
}
//
......@@ -555,11 +557,11 @@ FlashProtectSet(unsigned long ulAddress, tFlashProtection eProtect)
//
//! Saves the flash protection settings.
//!
//! This function will make the currently programmed flash protection settings
//! permanent. This is a non-reversible operation; a chip reset or power cycle
//! will not change the flash protection.
//! This function makes the currently programmed flash protection settings
//! permanent. On some devices, this operation is non-reversible; a chip reset
//! or power cycle does not change the flash protection.
//!
//! This function will not return until the protection has been saved.
//! This function does not return until the protection has been saved.
//!
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
//
......@@ -567,7 +569,7 @@ FlashProtectSet(unsigned long ulAddress, tFlashProtection eProtect)
long
FlashProtectSave(void)
{
int ulTemp, ulLimit;
unsigned long ulTemp, ulLimit;
//
// If running on a Sandstorm-class device, only trigger a save of the first
......@@ -604,8 +606,8 @@ FlashProtectSave(void)
//! \param pulUser0 is a pointer to the location to store USER Register 0.
//! \param pulUser1 is a pointer to the location to store USER Register 1.
//!
//! This function will read the contents of user registers (0 and 1), and
//! store them in the specified locations.
//! This function reads the contents of user registers (0 and 1), and
//! stores them in the specified locations.
//!
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
//
......@@ -646,7 +648,7 @@ FlashUserGet(unsigned long *pulUser0, unsigned long *pulUser1)
//! \param ulUser0 is the value to store in USER Register 0.
//! \param ulUser1 is the value to store in USER Register 1.
//!
//! This function will set the contents of the user registers (0 and 1) to
//! This function sets the contents of the user registers (0 and 1) to
//! the specified values.
//!
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
......@@ -679,11 +681,11 @@ FlashUserSet(unsigned long ulUser0, unsigned long ulUser1)
//
//! Saves the user registers.
//!
//! This function will make the currently programmed user register settings
//! permanent. This is a non-reversible operation; a chip reset or power cycle
//! will not change this setting.
//! This function makes the currently programmed user register settings
//! permanent. On some devices, this operation is non-reversible; a chip reset
//! or power cycle does not change this setting.
//!
//! This function will not return until the protection has been saved.
//! This function does not return until the protection has been saved.
//!
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
//
......@@ -739,12 +741,12 @@ FlashUserSave(void)
//! \param pfnHandler is a pointer to the function to be called when the flash
//! interrupt occurs.
//!
//! This sets the handler to be called when the flash interrupt occurs. The
//! flash controller can generate an interrupt when an invalid flash access
//! This function sets the handler to be called when the flash interrupt occurs.
//! The flash controller can generate an interrupt when an invalid flash access
//! occurs, such as trying to program or erase a read-only block, or trying to
//! read from an execute-only block. It can also generate an interrupt when a
//! program or erase operation has completed. The interrupt will be
//! automatically enabled when the handler is registered.
//! program or erase operation has completed. The interrupt is automatically
//! enabled when the handler is registered.
//!
//! \sa IntRegister() for important information about registering interrupt
//! handlers.
......@@ -770,9 +772,9 @@ FlashIntRegister(void (*pfnHandler)(void))
//
//! Unregisters the interrupt handler for the flash interrupt.
//!
//! This function will clear the handler to be called when the flash interrupt
//! occurs. This will also mask off the interrupt in the interrupt controller
//! so that the interrupt handler is no longer called.
//! This function clears the handler to be called when the flash interrupt
//! occurs. This function also masks off the interrupt in the interrupt
//! controller so that the interrupt handler is no longer called.
//!
//! \sa IntRegister() for important information about registering interrupt
//! handlers.
......@@ -801,9 +803,9 @@ FlashIntUnregister(void)
//! \param ulIntFlags is a bit mask of the interrupt sources to be enabled.
//! Can be any of the \b FLASH_INT_PROGRAM or \b FLASH_INT_ACCESS values.
//!
//! Enables the indicated flash controller interrupt sources. Only the sources
//! that are enabled can be reflected to the processor interrupt; disabled
//! sources have no effect on the processor.
//! This function enables the indicated flash controller interrupt sources.
//! Only the sources that are enabled can be reflected to the processor
//! interrupt; disabled sources have no effect on the processor.
//!
//! \return None.
//
......@@ -824,9 +826,9 @@ FlashIntEnable(unsigned long ulIntFlags)
//! \param ulIntFlags is a bit mask of the interrupt sources to be disabled.
//! Can be any of the \b FLASH_INT_PROGRAM or \b FLASH_INT_ACCESS values.
//!
//! Disables the indicated flash controller interrupt sources. Only the
//! sources that are enabled can be reflected to the processor interrupt;
//! disabled sources have no effect on the processor.
//! This function disables the indicated flash controller interrupt sources.
//! Only the sources that are enabled can be reflected to the processor
//! interrupt; disabled sources have no effect on the processor.
//!
//! \return None.
//
......@@ -847,9 +849,9 @@ FlashIntDisable(unsigned long ulIntFlags)
//! \param bMasked is false if the raw interrupt status is required and true if
//! the masked interrupt status is required.
//!
//! This returns the interrupt status for the flash controller. Either the raw
//! interrupt status or the status of interrupts that are allowed to reflect to
//! the processor can be returned.
//! This function returns the interrupt status for the flash controller.
//! Either the raw interrupt status or the status of interrupts that are
//! allowed to reflect to the processor can be returned.
//!
//! \return The current interrupt status, enumerated as a bit field of
//! \b FLASH_INT_PROGRAM and \b FLASH_INT_ACCESS.
......@@ -880,17 +882,17 @@ FlashIntStatus(tBoolean bMasked)
//! Can be any of the \b FLASH_INT_PROGRAM or \b FLASH_INT_AMISC values.
//!
//! The specified flash controller interrupt sources are cleared, so that they
//! no longer assert. This must be done in the interrupt handler to keep it
//! from being called again immediately upon exit.
//! no longer assert. This function must be called in the interrupt handler
//! to keep the interrupt from being triggered again immediately upon exit.
//!
//! \note Since there is a write buffer in the Cortex-M3 processor, it may take
//! several clock cycles before the interrupt source is actually cleared.
//! \note Because there is a write buffer in the Cortex-M processor, it may
//! take several clock cycles before the interrupt source is actually cleared.
//! Therefore, it is recommended that the interrupt source be cleared early in
//! the interrupt handler (as opposed to the very last action) to avoid
//! returning from the interrupt handler before the interrupt source is
//! actually cleared. Failure to do so may result in the interrupt handler
//! being immediately reentered (since NVIC still sees the interrupt source
//! asserted).
//! being immediately reentered (because the interrupt controller still sees
//! the interrupt source asserted).
//!
//! \return None.
//
......
bsp/lm3s8962/Libraries/driverlib/flash.h
浏览文件 @ 646c1443
......@@ -2,7 +2,7 @@
//
// flash.h - Prototypes for the flash driver.
//
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......@@ -56,8 +56,13 @@ tFlashProtection;
// returned from FlashIntStatus().
//
//*****************************************************************************
#define FLASH_INT_PROGRAM 0x00000002 // Programming Interrupt Mask
#define FLASH_INT_ACCESS 0x00000001 // Access Interrupt Mask
#define FLASH_INT_PROGRAM 0x00000002 // Programming Interrupt Mask
#define FLASH_INT_ACCESS 0x00000001 // Access Interrupt Mask
#define FLASH_INT_EEPROM 0x00000004 // EEPROM Interrupt Mask
#define FLASH_INT_VOLTAGE_ERR 0x00000200 // Voltage Error Interrupt Mask
#define FLASH_INT_DATA_ERR 0x00000400 // Invalid Data Interrupt Mask
#define FLASH_INT_ERASE_ERR 0x00000800 // Erase Error Interrupt Mask
#define FLASH_INT_PROGRAM_ERR 0x00002000 // Program Verify Error Interrupt Mask
//*****************************************************************************
//
......
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//*****************************************************************************
//
// fpu.h - Prototypes for the floatint point manipulation routines.
//
// Copyright (c) 2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
#ifndef __FPU_H__
#define __FPU_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Values that can be passed to FPUHalfPrecisionSet as the ulMode parameter.
//
//*****************************************************************************
#define FPU_HALF_IEEE 0x00000000
#define FPU_HALF_ALTERNATE 0x04000000
//*****************************************************************************
//
// Values that can be passed to FPUNaNModeSet as the ulMode parameter.
//
//*****************************************************************************
#define FPU_NAN_PROPAGATE 0x00000000
#define FPU_NAN_DEFAULT 0x02000000
//*****************************************************************************
//
// Values that can be passed to FPUFlushToZeroModeSet as the ulMode parameter.
//
//*****************************************************************************
#define FPU_FLUSH_TO_ZERO_DIS 0x00000000
#define FPU_FLUSH_TO_ZERO_EN 0x01000000
//*****************************************************************************
//
// Values that can be passed to FPURoundingModeSet as the ulMode parameter.
//
//*****************************************************************************
#define FPU_ROUND_NEAREST 0x00000000
#define FPU_ROUND_POS_INF 0x00400000
#define FPU_ROUND_NEG_INF 0x00800000
#define FPU_ROUND_ZERO 0x00c00000
//*****************************************************************************
//
// Prototypes.
//
//*****************************************************************************
extern void FPUEnable(void);
extern void FPUDisable(void);
extern void FPUStackingEnable(void);
extern void FPULazyStackingEnable(void);
extern void FPUStackingDisable(void);
extern void FPUHalfPrecisionModeSet(unsigned long ulMode);
extern void FPUNaNModeSet(unsigned long ulMode);
extern void FPUFlushToZeroModeSet(unsigned long ulMode);
extern void FPURoundingModeSet(unsigned long ulMode);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __FPU_H__
bsp/lm3s8962/Libraries/driverlib/i2s.h
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......@@ -2,7 +2,7 @@
//
// i2s.h - Prototypes and macros for the I2S controller.
//
// Copyright (c) 2008-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2008-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......
bsp/lm3s8962/Libraries/driverlib/interrupt.h
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......@@ -2,7 +2,7 @@
//
// interrupt.h - Prototypes for the NVIC Interrupt Controller Driver.
//
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......
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//
// mpu.h - Defines and Macros for the memory protection unit.
//
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......
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//
// pwm.h - API function protoypes for Pulse Width Modulation (PWM) ports
//
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
......@@ -18,7 +18,7 @@
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************
......
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