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6dd8744a
编写于
7月 29, 2017
作者:
B
bors
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差异文件
Auto merge of #43492 - lu-zero:master, r=alexcrichton
More Altivec Intrinsics
上级
42a09c01
c4710203
变更
6
隐藏空白更改
内联
并排
Showing
6 changed file
with
186 addition
and
17 deletion
+186
-17
src/etc/platform-intrinsics/powerpc.json
src/etc/platform-intrinsics/powerpc.json
+58
-2
src/librustc_platform_intrinsics/powerpc.rs
src/librustc_platform_intrinsics/powerpc.rs
+115
-0
src/librustc_trans/llvm_util.rs
src/librustc_trans/llvm_util.rs
+4
-1
src/rustllvm/PassWrapper.cpp
src/rustllvm/PassWrapper.cpp
+7
-13
src/test/run-make/print-cfg/Makefile
src/test/run-make/print-cfg/Makefile
+1
-1
src/test/run-pass/sse2.rs
src/test/run-pass/sse2.rs
+1
-0
未找到文件。
src/etc/platform-intrinsics/powerpc.json
浏览文件 @
6dd8744a
...
...
@@ -3,8 +3,15 @@
"intrinsic_prefix"
:
"_vec_"
,
"llvm_prefix"
:
"llvm.ppc.altivec."
,
"number_info"
:
{
"unsigned"
:
{},
"signed"
:
{}
"unsigned"
:
{
"kind"
:
"u"
,
"data_type_short"
:
{
"8"
:
"b"
,
"16"
:
"h"
,
"32"
:
"w"
,
"64"
:
"d"
}
},
"signed"
:
{
"kind"
:
"s"
,
"data_type_short"
:
{
"8"
:
"b"
,
"16"
:
"h"
,
"32"
:
"w"
,
"64"
:
"d"
}
},
"float"
:
{}
},
"width_info"
:
{
"128"
:
{
"width"
:
""
}
...
...
@@ -16,6 +23,55 @@
"llvm"
:
"vperm"
,
"ret"
:
"s32"
,
"args"
:
[
"0"
,
"0"
,
"s8"
]
},
{
"intrinsic"
:
"mradds"
,
"width"
:
[
128
],
"llvm"
:
"vmhraddshs"
,
"ret"
:
"s16"
,
"args"
:
[
"0"
,
"0"
,
"0"
]
},
{
"intrinsic"
:
"cmpb"
,
"width"
:
[
128
],
"llvm"
:
"vcmpbfp"
,
"ret"
:
"s32"
,
"args"
:
[
"f32"
,
"f32"
]
},
{
"intrinsic"
:
"cmpeq{0.data_type_short}"
,
"width"
:
[
128
],
"llvm"
:
"vcmpequ{0.data_type_short}"
,
"ret"
:
"s(8-32)"
,
"args"
:
[
"0"
,
"0"
]
},
{
"intrinsic"
:
"cmpgt{1.kind}{1.data_type_short}"
,
"width"
:
[
128
],
"llvm"
:
"vcmpgt{1.kind}{1.data_type_short}"
,
"ret"
:
"s(8-32)"
,
"args"
:
[
"0u"
,
"1"
]
},
{
"intrinsic"
:
"cmpgt{1.kind}{1.data_type_short}"
,
"width"
:
[
128
],
"llvm"
:
"vcmpgt{1.kind}{1.data_type_short}"
,
"ret"
:
"s(8-32)"
,
"args"
:
[
"0"
,
"1"
]
},
{
"intrinsic"
:
"max{0.kind}{0.data_type_short}"
,
"width"
:
[
128
],
"llvm"
:
"vmax{0.kind}{0.data_type_short}"
,
"ret"
:
"i(8-32)"
,
"args"
:
[
"0"
,
"0"
]
},
{
"intrinsic"
:
"min{0.kind}{0.data_type_short}"
,
"width"
:
[
128
],
"llvm"
:
"vmin{0.kind}{0.data_type_short}"
,
"ret"
:
"i(8-32)"
,
"args"
:
[
"0"
,
"0"
]
}
]
}
src/librustc_platform_intrinsics/powerpc.rs
浏览文件 @
6dd8744a
...
...
@@ -27,6 +27,121 @@ pub fn find(name: &str) -> Option<Intrinsic> {
output
:
&
::
I32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vperm"
)
},
"_vec_mradds"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
3
]
=
[
&
::
I16x8
,
&
::
I16x8
,
&
::
I16x8
];
&
INPUTS
},
output
:
&
::
I16x8
,
definition
:
Named
(
"llvm.ppc.altivec.vmhraddshs"
)
},
"_vec_cmpb"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
F32x4
,
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
I32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vcmpbfp"
)
},
"_vec_cmpeqb"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I8x16
,
&
::
I8x16
];
&
INPUTS
},
output
:
&
::
I8x16
,
definition
:
Named
(
"llvm.ppc.altivec.vcmpequb"
)
},
"_vec_cmpeqh"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I16x8
,
&
::
I16x8
];
&
INPUTS
},
output
:
&
::
I16x8
,
definition
:
Named
(
"llvm.ppc.altivec.vcmpequh"
)
},
"_vec_cmpeqw"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I32x4
,
&
::
I32x4
];
&
INPUTS
},
output
:
&
::
I32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vcmpequw"
)
},
"_vec_cmpgtub"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
U8x16
,
&
::
U8x16
];
&
INPUTS
},
output
:
&
::
I8x16
,
definition
:
Named
(
"llvm.ppc.altivec.vcmpgtub"
)
},
"_vec_cmpgtuh"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
U16x8
,
&
::
U16x8
];
&
INPUTS
},
output
:
&
::
I16x8
,
definition
:
Named
(
"llvm.ppc.altivec.vcmpgtuh"
)
},
"_vec_cmpgtuw"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
U32x4
,
&
::
U32x4
];
&
INPUTS
},
output
:
&
::
I32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vcmpgtuw"
)
},
"_vec_cmpgtsb"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I8x16
,
&
::
I8x16
];
&
INPUTS
},
output
:
&
::
I8x16
,
definition
:
Named
(
"llvm.ppc.altivec.vcmpgtsb"
)
},
"_vec_cmpgtsh"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I16x8
,
&
::
I16x8
];
&
INPUTS
},
output
:
&
::
I16x8
,
definition
:
Named
(
"llvm.ppc.altivec.vcmpgtsh"
)
},
"_vec_cmpgtsw"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I32x4
,
&
::
I32x4
];
&
INPUTS
},
output
:
&
::
I32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vcmpgtsw"
)
},
"_vec_maxsb"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I8x16
,
&
::
I8x16
];
&
INPUTS
},
output
:
&
::
I8x16
,
definition
:
Named
(
"llvm.ppc.altivec.vmaxsb"
)
},
"_vec_maxub"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
U8x16
,
&
::
U8x16
];
&
INPUTS
},
output
:
&
::
U8x16
,
definition
:
Named
(
"llvm.ppc.altivec.vmaxub"
)
},
"_vec_maxsh"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I16x8
,
&
::
I16x8
];
&
INPUTS
},
output
:
&
::
I16x8
,
definition
:
Named
(
"llvm.ppc.altivec.vmaxsh"
)
},
"_vec_maxuh"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
U16x8
,
&
::
U16x8
];
&
INPUTS
},
output
:
&
::
U16x8
,
definition
:
Named
(
"llvm.ppc.altivec.vmaxuh"
)
},
"_vec_maxsw"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I32x4
,
&
::
I32x4
];
&
INPUTS
},
output
:
&
::
I32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vmaxsw"
)
},
"_vec_maxuw"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
U32x4
,
&
::
U32x4
];
&
INPUTS
},
output
:
&
::
U32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vmaxuw"
)
},
"_vec_minsb"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I8x16
,
&
::
I8x16
];
&
INPUTS
},
output
:
&
::
I8x16
,
definition
:
Named
(
"llvm.ppc.altivec.vminsb"
)
},
"_vec_minub"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
U8x16
,
&
::
U8x16
];
&
INPUTS
},
output
:
&
::
U8x16
,
definition
:
Named
(
"llvm.ppc.altivec.vminub"
)
},
"_vec_minsh"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I16x8
,
&
::
I16x8
];
&
INPUTS
},
output
:
&
::
I16x8
,
definition
:
Named
(
"llvm.ppc.altivec.vminsh"
)
},
"_vec_minuh"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
U16x8
,
&
::
U16x8
];
&
INPUTS
},
output
:
&
::
U16x8
,
definition
:
Named
(
"llvm.ppc.altivec.vminuh"
)
},
"_vec_minsw"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
I32x4
,
&
::
I32x4
];
&
INPUTS
},
output
:
&
::
I32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vminsw"
)
},
"_vec_minuw"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
2
]
=
[
&
::
U32x4
,
&
::
U32x4
];
&
INPUTS
},
output
:
&
::
U32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vminuw"
)
},
_
=>
return
None
,
})
}
src/librustc_trans/llvm_util.rs
浏览文件 @
6dd8744a
...
...
@@ -80,7 +80,10 @@ unsafe fn configure_llvm(sess: &Session) {
const
HEXAGON_WHITELIST
:
&
'static
[
&
'static
str
]
=
&
[
"hvx
\0
"
,
"hvx-double
\0
"
];
const
POWERPC_WHITELIST
:
&
'static
[
&
'static
str
]
=
&
[
"altivec
\0
"
,
"vsx
\0
"
];
const
POWERPC_WHITELIST
:
&
'static
[
&
'static
str
]
=
&
[
"altivec
\0
"
,
"power8-altivec
\0
"
,
"power9-altivec
\0
"
,
"power8-vector
\0
"
,
"power9-vector
\0
"
,
"vsx
\0
"
];
pub
fn
target_features
(
sess
:
&
Session
)
->
Vec
<
Symbol
>
{
let
target_machine
=
create_target_machine
(
sess
);
...
...
src/rustllvm/PassWrapper.cpp
浏览文件 @
6dd8744a
...
...
@@ -181,20 +181,14 @@ extern "C" bool LLVMRustHasFeature(LLVMTargetMachineRef TM,
TargetMachine
*
Target
=
unwrap
(
TM
);
const
MCSubtargetInfo
*
MCInfo
=
Target
->
getMCSubtargetInfo
();
const
FeatureBitset
&
Bits
=
MCInfo
->
getFeatureBits
();
const
llvm
::
SubtargetFeatureKV
*
FeatureEntry
;
#define SUBTARGET(x) \
if (MCInfo->isCPUStringValid(x##SubTypeKV[0].Key)) { \
FeatureEntry = x##FeatureKV; \
} else
GEN_SUBTARGETS
{
return
false
;
}
#undef SUBTARGET
while
(
strcmp
(
Feature
,
FeatureEntry
->
Key
)
!=
0
)
FeatureEntry
++
;
#if LLVM_VERSION_GE(4, 0)
const
ArrayRef
<
SubtargetFeatureKV
>
FeatTable
=
MCInfo
->
getFeatureTable
();
return
(
Bits
&
FeatureEntry
->
Value
)
==
FeatureEntry
->
Value
;
for
(
auto
&
FeatureEntry
:
FeatTable
)
if
(
!
strcmp
(
FeatureEntry
.
Key
,
Feature
))
return
(
Bits
&
FeatureEntry
.
Value
)
==
FeatureEntry
.
Value
;
#endif
return
false
;
}
enum
class
LLVMRustCodeModel
{
...
...
src/test/run-make/print-cfg/Makefile
浏览文件 @
6dd8744a
...
...
@@ -5,7 +5,7 @@ all: default
$(RUSTC)
--target
x86_64-pc-windows-gnu
--print
cfg |
grep
x86_64
$(RUSTC)
--target
i686-pc-windows-msvc
--print
cfg |
grep
msvc
$(RUSTC)
--target
i686-apple-darwin
--print
cfg |
grep
macos
$(RUSTC)
--target
i686-unknown-linux-gnu
--print
cfg |
grep
sse2
$(RUSTC)
--target
i686-unknown-linux-gnu
--print
cfg |
grep
gnu
ifdef
IS_WINDOWS
default
:
...
...
src/test/run-pass/sse2.rs
浏览文件 @
6dd8744a
...
...
@@ -7,6 +7,7 @@
// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
// option. This file may not be copied, modified, or distributed
// except according to those terms.
// min-llvm-version 4.0
#![feature(cfg_target_feature)]
...
...
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