1. 14 5月, 2009 3 次提交
  2. 07 4月, 2009 1 次提交
  3. 06 1月, 2009 1 次提交
  4. 13 12月, 2008 1 次提交
    • R
      cpumask: centralize cpu_online_map and cpu_possible_map · 98a79d6a
      Rusty Russell 提交于
      Impact: cleanup
      
      Each SMP arch defines these themselves.  Move them to a central
      location.
      
      Twists:
      1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a
         CONFIG_INIT_ALL_POSSIBLE for this rather than break them.
      
      2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'.
         Those archs simply have phys_cpu_present_map replaced everywhere.
      
      3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky
         so I just manipulate them both in sync.
      
      4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map'
         declarations.
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      Reviewed-by: NGrant Grundler <grundler@parisc-linux.org>
      Tested-by: NTony Luck <tony.luck@intel.com>
      Acked-by: NIngo Molnar <mingo@elte.hu>
      Cc: Mike Travis <travis@sgi.com>
      Cc: ink@jurassic.park.msu.ru
      Cc: rmk@arm.linux.org.uk
      Cc: starvik@axis.com
      Cc: tony.luck@intel.com
      Cc: takata@linux-m32r.org
      Cc: ralf@linux-mips.org
      Cc: grundler@parisc-linux.org
      Cc: paulus@samba.org
      Cc: schwidefsky@de.ibm.com
      Cc: lethal@linux-sh.org
      Cc: wli@holomorphy.com
      Cc: davem@davemloft.net
      Cc: jdike@addtoit.com
      Cc: mingo@redhat.com
      98a79d6a
  5. 20 10月, 2008 1 次提交
  6. 11 10月, 2008 1 次提交
  7. 31 7月, 2008 1 次提交
  8. 28 6月, 2008 1 次提交
    • A
      PCI: remove unused arch pcibios_update_resource() functions · 0aea5313
      Adrian Bunk 提交于
      Russell King did the following back in 2003:
      
      <--  snip  -->
      
          [PCI] pci-9: Kill per-architecture pcibios_update_resource()
      
          Kill pcibios_update_resource(), replacing it with pci_update_resource().
          pci_update_resource() uses pcibios_resource_to_bus() to convert a
          resource to a device BAR - the transformation should be exactly the
          same as the transformation used for the PCI bridges.
      
          pci_update_resource "knows" about 64-bit BARs, but doesn't attempt to
          set the high 32-bits to anything non-zero - currently no architecture
          attempts to do something different.  If anyone cares, please fix; I'm
          going to reflect current behaviour for the time being.
      
          Ivan pointed out the following architectures need to examine their
          pcibios_update_resource() implementation - they should make sure that
          this new implementation does the right thing.  #warning's have been
          added where appropriate.
      
              ia64
              mips
              mips64
      
          This cset also includes a fix for the problem reported by AKPM where
          64-bit arch compilers complain about the resource mask being placed
          in a u32.
      
      <--  snip  -->
      
      This patch removes the unused pcibios_update_resource() functions the
      kernel gained since, from FRV, m68k, mips & sh architectures.
      Signed-off-by: NAdrian Bunk <bunk@kernel.org>
      Acked-by: NDavid Howells <dhowells@redhat.com>
      Acked-by: NGreg Ungerer <gerg@uclinux.org>
      Acked-by: NPaul Mundt <lethal@linux-sh.org>
      Acked-by: NRalf Baechle <ralf@linux-mips.org>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      0aea5313
  9. 26 6月, 2008 1 次提交
  10. 12 5月, 2008 1 次提交
  11. 29 4月, 2008 1 次提交
  12. 12 3月, 2008 1 次提交
  13. 29 1月, 2008 3 次提交
  14. 27 11月, 2007 1 次提交
  15. 30 10月, 2007 1 次提交
  16. 20 10月, 2007 1 次提交
  17. 19 10月, 2007 1 次提交
  18. 12 10月, 2007 6 次提交
  19. 27 8月, 2007 1 次提交
  20. 01 8月, 2007 6 次提交
  21. 18 7月, 2007 1 次提交
  22. 11 7月, 2007 4 次提交
  23. 08 5月, 2007 1 次提交
    • M
      serial driver PMC MSP71xx · beab697a
      Marc St-Jean 提交于
      Serial driver patch for the PMC-Sierra MSP71xx devices.
      
      There are three different fixes:
      
      1 Fix for DesignWare APB THRE errata: In brief, this is a non-standard
        16550 in that the THRE interrupt will not re-assert itself simply by
        disabling and re-enabling the THRI bit in the IER, it is only re-enabled
        if a character is actually sent out.
      
        It appears that the "8250-uart-backup-timer.patch" in the "mm" tree
        also fixes it so we have dropped our initial workaround.  This patch now
        needs to be applied on top of that "mm" patch.
      
      2 Fix for Busy Detect on LCR write: The DesignWare APB UART has a feature
        which causes a new Busy Detect interrupt to be generated if it's busy
        when the LCR is written.  This fix saves the value of the LCR and
        rewrites it after clearing the interrupt.
      
      3 Workaround for interrupt/data concurrency issue: The SoC needs to
        ensure that writes that can cause interrupts to be cleared reach the UART
        before returning from the ISR.  This fix reads a non-destructive register
        on the UART so the read transaction completion ensures the previously
        queued write transaction has also completed.
      Signed-off-by: NMarc St-Jean <Marc_St-Jean@pmc-sierra.com>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      beab697a