- 17 1月, 2015 7 次提交
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由 Lendacky, Thomas 提交于
Certain PHY settings need to be configurable by UEFI depending on the platform being used. Add new device tree / ACPI properties that, if present, will override the pre-determined values currently used. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Add support for ACPI to the amd-xgbe and amd-xgbe-phy drivers. This support converts many of the device tree APIs to the new device_property APIs. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
When receiving and processing extended next pages the base registers were used instead of the XNP registers. Update the code to use the device XNP and link partner XNP registers. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Advertise and apply the Forward Error Correction capabilities of the device based on the FEC ability of the device. Also, remove the use of some hard coded values related to KR and FEC in preference of some #defines. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
The auto negotiation logic was geared to being the initiator of the auto negotiation. This presented problems when auto negotiation was initiated by the remote end. Change the auto negotiation logic to make use of the auto negotiation event interrupt thus allowing the auto negotiation state machine to function properly in either scenario. This also removes the polling during auto-negotiation. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Reads to registers are undefined when the PCS is powered down. To be safe, save the CTRL1 register used for power down during suspend and restore that value during resume. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
This set of patches resolves some checks reported by the checkpatch tool. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 12月, 2014 1 次提交
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由 Johan Hovold 提交于
Use generic config_init callback also for KSZ8021 and KSZ8031. This has been avoided this far due to commit b838b4ac ("phy/micrel: KSZ8031RNL RMII clock reconfiguration bug"), which claims that the PHY becomes unresponsive if the broadcast-disable flag is set before configuring the clock mode. Turns out that the problem seemingly worked-around by the above mentioned commit was really due to a hardware-configuration issue, where the PHY was in fact strapped to address 3 rather than 0. Tested-by: NBruno Thomsen <bth@kamstrup.dk> Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 12月, 2014 1 次提交
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由 David S. Miller 提交于
Otherwise we get things like: warning: (NET_DSA_BCM_SF2 && BCMGENET && SYSTEMPORT) selects FIXED_PHY which has unmet direct dependencies (NETDEVICES && PHYLIB=y) In order to make this work we have to rename fixed.c to fixed_phy.c because the regulator drivers already have a module named "fixed.o". Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 12月, 2014 1 次提交
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由 Mark Salter 提交于
When building the bcmgenet driver as module, I get: ERROR: "fixed_phy_register" [drivers/net/ethernet/broadcom/genet/genet.ko] undefined! commit b0ba512e225d72 ("net: bcmgenet: enable driver to work without device tree") which added a call to fixed_phy_register. But fixed_phy_register needs to be exported if used from a module. Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 12月, 2014 1 次提交
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由 Florian Fainelli 提交于
GPHY revision G0 has its version rolled over to 0x10, introduce an explicit check for that revision and invoke the proper workaround function for it. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 11月, 2014 1 次提交
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由 Rojhalat Ibrahim 提交于
Convert mdio-mux-gpio to the GPIO descriptor interface and use the new gpiod_set_array function to set all output signals simultaneously. Signed-off-by: NRojhalat Ibrahim <imr@rtschenk.de> Acked-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 11月, 2014 7 次提交
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由 Johan Hovold 提交于
Add myself to the list of copyright holders. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Add generic interrupt-config callback and store interrupt-level bitmask in type data for PHY types not using bit 9. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Micrel KSZ8081 and KSZ8091 PHYs have the RMII Reference Clock Select bit, which is used to select 25 or 50 MHz clock mode. Note that on some revisions of the PHY (e.g. KSZ8081RND) the function of this bit is inverted so that setting it enables 25 rather than 50 MHz mode. Add a new device-tree property "micrel,rmii-reference-clock-select-25-mhz" to describe this. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Add generic RMII-Reference-Clock-Select support. Several Micrel PHY have an RMII-Reference-Clock-Select bit to select 25 MHz or 50 MHz clock mode. Recently, support for configuring this through device tree for KSZ8021 and KSZ8031 was added. Generalise this support so that it can be configured for other PHY types as well. Note that some PHY revisions (of the same type) has this bit inverted. This should be either configurable through a new device-tree property, or preferably, determined based on PHY ID if possible. Also note that this removes support for setting 25 MHz mode from board files which was also added by the above mentioned commit 45f56cb82e45 ("net/phy: micrel: Add clock support for KSZ8021/KSZ8031"). Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Add has_broadcast_disable flag to type-data and generic config_init. This allows us to remove the ksz8081 config_init callback. Note that ksz8021_config_init is kept for now due to a95a18afe4c8 ("phy/micrel: KSZ8031RNL RMII clock reconfiguration bug"). Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Parse the "micrel,led-mode" property at probe, rather than at config_init time in the led-setup helper itself. Note that the bogus parent->of_node bit is removed. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Add structured device-type information and support for generic led-mode setup to the generic config_init callback. This is a first step in ultimately getting rid of device-type specific callbacks. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 11月, 2014 16 次提交
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由 Richard Cochran 提交于
Commit ae5c6c6d "ptp: Classify ptp over ip over vlan packets" changed the code in two drivers that matches time stamps with PTP frames, with the goal of allowing VLAN tagged PTP packets to receive hardware time stamps. However, that commit failed to account for the VLAN header when parsing IPv4 packets. This patch fixes those two drivers to correctly match VLAN tagged IPv4/UDP PTP messages with their time stamps. This patch should also be applied to v3.17. Signed-off-by: NRichard Cochran <richardcochran@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
PHY revisions E0 and F0 share the same shorter workaround initialization sequence. Dedicate a special function for these two PHY revisions to perform the needed workaround sequence. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
PHY revision D0 requires a specific workaround sequence which needs to be applied to get the HW to behave properly in all corner cases conditions. Do this based on the revision we just read out of the HW using a specific function. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
This function performs a R/RC calibration reset and will start being used by more than one function in the next patches, create a helper function to factor code. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
bcm7445_config_init() was working around non-production version of the PHY HW block, so just remove it entirely. bcm7xxx_28nm_afe_config_init() was running for all PHY revisions greater than B0, but this workaround sequence is really specific to the B0 PHY revision, so rename the function accordingly and update the GPHY macro to use the generic config_init callback. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
bcm7xxx_28nm_config_init() can be called as frequently as needed by the PHY library upon suspend/resume cycles and interface bring up/down, just print the PHY revision once and for all in order not to spam kernel logs. Fixes: d8ebfed3 ("net: phy: bcm7xxx: utilize PHY revision in config_init") Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Enable led-mode configuration for KSZ8081 and KSZ8091. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Clean up led-mode setup by introducing proper defines for PHY Control registers 1 and 2 and only passing the register to the setup function. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Refactor led-mode error handling. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Make sure never to update more than two bits when setting the led mode, something which could for example change the reference-clock setting. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Disable PHY address 0 as the broadcast address, so that it can be used as a unique (non-broadcast) address on a shared bus. Note that this can also be configured using the B-CAST_OFF pin on KSZ9091, but that KSZ8081 lacks this pin and is also limited to addresses 0 and 3. Specifically, this allows for dual KSZ8081 setups. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Refactor and clean up broadcast disable. Some Micrel PHYs have a broadcast-off bit in the Operation Mode Strap Override register which can be used to disable PHY address 0 as the broadcast address, so that it can be used as a unique (non-broadcast) address on a shared bus. Note that the KSZPHY_OMSO_RMII_OVERRIDE bit is set by default on KSZ8021/8031. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Use BIT macro for bitmask definitions. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Make sure never to update the control register with random data (an error code) by checking the return value after reading it. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Replace module init/exit which only calls phy_drivers_register with module_phy_driver macro. Tested using Micrel driver, and otherwise compile-tested only. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Replace module init/exit which only calls phy_driver_register with module_phy_driver macro. Compile tested only. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 11月, 2014 1 次提交
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由 Brian Hill 提交于
When advertised capabilities are changed with mii-tool, such as: mii-tool -A 10baseT the existing handler has two errors. - An actual PHY register value is provided by mii-tool, and this must be mapped to internal state with mii_adv_to_ethtool_adv_t(). - The PHY state machine needs to be told that autonegotiation has again been performed. If not, the MAC will not be notified of the new link speed and duplex, resulting in a possible config mismatch. Signed-off-by: NBrian Hill <Brian@houston-radar.com> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 11月, 2014 2 次提交
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由 Lendacky, Thomas 提交于
The amd-xgbe-phy driver needs to perform ioremap calls, so add HAS_IOMEM to its build dependency. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
This patch adds support to sync the states of the PCS and the PHY after a reset is performed. If the PCS and the PHY are not in the same state after reset an extra mode change would be performed. This extra mode change might not be needed if the PCS and the PHY are synced up after reset. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 11月, 2014 1 次提交
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由 Vladimir Zapolskiy 提交于
When a sysfs binary file is asked to be removed, it is found by attribute name, so strictly speaking this change is not a fix, but just in case when attribute name is changed in the driver or sysfs internals are changed, it might be better to remove the previously created file using right the same binary attribute. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: David S. Miller <davem@davemloft.net> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 10月, 2014 1 次提交
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由 Vince Bridgers 提交于
Marvell phy 88E1145 configuration & initialization was missing a case for initializing SGMII mode. This patch adds that case. Signed-off-by: NVince Bridgers <vbridger@opensource.altera.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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